ar71xx: add v4.14 support
[openwrt/staging/rmilecki.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb95x.c
1 /*
2 * MikroTik RouterBOARD 95X support
3 *
4 * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
5 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2013 Kamil Trzcinski <ayufan@ayufan.eu>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #define pr_fmt(fmt) "rb95x: " fmt
14
15 #include <linux/phy.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 #include <linux/ath9k_platform.h>
19 #include <linux/ar8216_platform.h>
20 #include <linux/mtd/mtd.h>
21 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
22 #include <linux/mtd/nand.h>
23 #else
24 #include <linux/mtd/rawnand.h>
25 #endif
26 #include <linux/mtd/partitions.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/flash.h>
29 #include <linux/routerboot.h>
30 #include <linux/gpio.h>
31 #include <linux/version.h>
32
33 #include <asm/mach-ath79/ath79.h>
34 #include <asm/mach-ath79/ar71xx_regs.h>
35
36 #include "common.h"
37 #include "dev-eth.h"
38 #include "dev-m25p80.h"
39 #include "dev-nfc.h"
40 #include "dev-usb.h"
41 #include "dev-wmac.h"
42 #include "machtypes.h"
43 #include "routerboot.h"
44 #include "dev-leds-gpio.h"
45
46 #define RB95X_GPIO_NAND_NCE 14
47
48 static struct mtd_partition rb95x_nand_partitions[] = {
49 {
50 .name = "booter",
51 .offset = 0,
52 .size = (256 * 1024),
53 .mask_flags = MTD_WRITEABLE,
54 },
55 {
56 .name = "kernel",
57 .offset = (256 * 1024),
58 .size = (4 * 1024 * 1024) - (256 * 1024),
59 },
60 {
61 .name = "ubi",
62 .offset = MTDPART_OFS_NXTBLK,
63 .size = MTDPART_SIZ_FULL,
64 },
65 };
66
67 static struct gpio_led rb951ui_leds_gpio[] __initdata = {
68 {
69 .name = "rb:green:wlan",
70 .gpio = 11,
71 .active_low = 1,
72 }, {
73 .name = "rb:green:act",
74 .gpio = 3,
75 .active_low = 1,
76 }, {
77 .name = "rb:green:port1",
78 .gpio = 13,
79 .active_low = 1,
80 }, {
81 .name = "rb:green:port2",
82 .gpio = 12,
83 .active_low = 1,
84 }, {
85 .name = "rb:green:port3",
86 .gpio = 4,
87 .active_low = 1,
88 }, {
89 .name = "rb:green:port4",
90 .gpio = 21,
91 .active_low = 1,
92 }, {
93 .name = "rb:green:port5",
94 .gpio = 16,
95 .active_low = 1,
96 }
97 };
98
99 static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = {
100 .mode = AR8327_PAD_MAC_RGMII,
101 .txclk_delay_en = true,
102 .rxclk_delay_en = true,
103 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
104 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
105 };
106
107 static struct ar8327_platform_data rb95x_ar8327_data = {
108 .pad0_cfg = &rb95x_ar8327_pad0_cfg,
109 .port0_cfg = {
110 .force_link = 1,
111 .speed = AR8327_PORT_SPEED_1000,
112 .duplex = 1,
113 .txpause = 1,
114 .rxpause = 1,
115 }
116 };
117
118 static struct mdio_board_info rb95x_mdio0_info[] = {
119 {
120 .bus_id = "ag71xx-mdio.0",
121 .mdio_addr = 0,
122 .platform_data = &rb95x_ar8327_data,
123 },
124 };
125
126 void __init rb95x_wlan_init(void)
127 {
128 char *art_buf;
129 u8 wlan_mac[ETH_ALEN];
130
131 art_buf = rb_get_wlan_data();
132 if (art_buf == NULL)
133 return;
134
135 ath79_init_mac(wlan_mac, ath79_mac_base, 11);
136 ath79_register_wmac(art_buf + 0x1000, wlan_mac);
137
138 kfree(art_buf);
139 }
140
141 static void rb95x_nand_select_chip(int chip_no)
142 {
143 switch (chip_no) {
144 case 0:
145 gpio_set_value(RB95X_GPIO_NAND_NCE, 0);
146 break;
147 default:
148 gpio_set_value(RB95X_GPIO_NAND_NCE, 1);
149 break;
150 }
151 ndelay(500);
152 }
153
154 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
155 static struct nand_ecclayout rb95x_nand_ecclayout = {
156 .eccbytes = 6,
157 .eccpos = { 8, 9, 10, 13, 14, 15 },
158 .oobavail = 9,
159 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
160 };
161
162 #else
163
164 static int rb95x_ooblayout_ecc(struct mtd_info *mtd, int section,
165 struct mtd_oob_region *oobregion)
166 {
167 switch (section) {
168 case 0:
169 oobregion->offset = 8;
170 oobregion->length = 3;
171 return 0;
172 case 1:
173 oobregion->offset = 13;
174 oobregion->length = 3;
175 return 0;
176 default:
177 return -ERANGE;
178 }
179 }
180
181 static int rb95x_ooblayout_free(struct mtd_info *mtd, int section,
182 struct mtd_oob_region *oobregion)
183 {
184 switch (section) {
185 case 0:
186 oobregion->offset = 0;
187 oobregion->length = 4;
188 return 0;
189 case 1:
190 oobregion->offset = 4;
191 oobregion->length = 1;
192 return 0;
193 case 2:
194 oobregion->offset = 6;
195 oobregion->length = 2;
196 return 0;
197 case 3:
198 oobregion->offset = 11;
199 oobregion->length = 2;
200 return 0;
201 default:
202 return -ERANGE;
203 }
204 }
205
206 static const struct mtd_ooblayout_ops rb95x_nand_ecclayout_ops = {
207 .ecc = rb95x_ooblayout_ecc,
208 .free = rb95x_ooblayout_free,
209 };
210 #endif /* < 4.6 */
211
212 static int rb95x_nand_scan_fixup(struct mtd_info *mtd)
213 {
214 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
215 struct nand_chip *chip = mtd->priv;
216 #else
217 struct nand_chip *chip = mtd_to_nand(mtd);
218 #endif /* < 4.6.0 */
219
220 if (mtd->writesize == 512) {
221 /*
222 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
223 * will not be able to find the kernel that we load.
224 */
225 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
226 chip->ecc.layout = &rb95x_nand_ecclayout;
227 #else
228 mtd_set_ooblayout(mtd, &rb95x_nand_ecclayout_ops);
229 #endif
230 }
231
232 chip->options = NAND_NO_SUBPAGE_WRITE;
233
234 return 0;
235 }
236
237 void __init rb95x_nand_init(void)
238 {
239 gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
240
241 ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup);
242 ath79_nfc_set_parts(rb95x_nand_partitions,
243 ARRAY_SIZE(rb95x_nand_partitions));
244 ath79_nfc_set_select_chip(rb95x_nand_select_chip);
245 ath79_nfc_set_swap_dma(true);
246 ath79_register_nfc();
247 }
248
249 static int __init rb95x_setup(void)
250 {
251 const struct rb_info *info;
252
253 info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000);
254 if (!info)
255 return -EINVAL;
256
257 rb95x_nand_init();
258
259 return 0;
260 }
261
262 static void __init rb951g_setup(void)
263 {
264 if (rb95x_setup())
265 return;
266
267 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
268 AR934X_ETH_CFG_SW_ONLY_MODE);
269
270 ath79_register_mdio(0, 0x0);
271
272 mdiobus_register_board_info(rb95x_mdio0_info,
273 ARRAY_SIZE(rb95x_mdio0_info));
274
275 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
276 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
277 ath79_eth0_data.phy_mask = BIT(0);
278
279 ath79_register_eth(0);
280
281 rb95x_wlan_init();
282 ath79_register_usb();
283 }
284
285 MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD",
286 rb951g_setup);
287
288 static void __init rb951ui_setup(void)
289 {
290 if (rb95x_setup())
291 return;
292
293 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
294
295 ath79_register_mdio(1, 0x0);
296
297 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
298 ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
299
300 ath79_switch_data.phy4_mii_en = 1;
301 ath79_switch_data.phy_poll_mask = BIT(4);
302 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
303 ath79_eth0_data.phy_mask = BIT(4);
304 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
305 ath79_register_eth(0);
306
307 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
308 ath79_register_eth(1);
309
310 gpio_request_one(20, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
311 "USB power");
312
313 gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
314 "POE power");
315
316 rb95x_wlan_init();
317 ath79_register_usb();
318
319 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb951ui_leds_gpio),
320 rb951ui_leds_gpio);
321 }
322
323 MIPS_MACHINE(ATH79_MACH_RB_951U, "951HnD", "MikroTik RouterBOARD 951Ui-2HnD",
324 rb951ui_setup);