ar71xx: add v4.14 support
[openwrt/staging/rmilecki.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb91x.c
1 /*
2 * MikroTik RouterBOARD 91X support
3 *
4 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) "rb91x: " fmt
12
13 #include <linux/phy.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/ath9k_platform.h>
17 #include <linux/mtd/mtd.h>
18 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
19 #include <linux/mtd/nand.h>
20 #else
21 #include <linux/mtd/rawnand.h>
22 #endif
23 #include <linux/mtd/partitions.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/74x164.h>
26 #include <linux/spi/flash.h>
27 #include <linux/routerboot.h>
28 #include <linux/gpio.h>
29 #include <linux/platform_data/gpio-latch.h>
30 #include <linux/platform_data/rb91x_nand.h>
31 #include <linux/platform_data/phy-at803x.h>
32
33 #include <asm/prom.h>
34 #include <asm/mach-ath79/ath79.h>
35 #include <asm/mach-ath79/ath79_spi_platform.h>
36 #include <asm/mach-ath79/ar71xx_regs.h>
37
38 #include "common.h"
39 #include "dev-eth.h"
40 #include "dev-leds-gpio.h"
41 #include "dev-nfc.h"
42 #include "dev-usb.h"
43 #include "dev-spi.h"
44 #include "dev-wmac.h"
45 #include "machtypes.h"
46 #include "pci.h"
47 #include "routerboot.h"
48
49 #define RB_ROUTERBOOT_OFFSET 0x0000
50 #define RB_ROUTERBOOT_MIN_SIZE 0xb000
51 #define RB_HARD_CFG_SIZE 0x1000
52 #define RB_BIOS_OFFSET 0xd000
53 #define RB_BIOS_SIZE 0x1000
54 #define RB_SOFT_CFG_OFFSET 0xf000
55 #define RB_SOFT_CFG_SIZE 0x1000
56
57 #define RB91X_FLAG_USB BIT(0)
58 #define RB91X_FLAG_PCIE BIT(1)
59
60 #define RB91X_LATCH_GPIO_BASE 32
61 #define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x))
62
63 #define RB91X_SSR_GPIO_BASE (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT)
64 #define RB91X_SSR_GPIO(_x) (RB91X_SSR_GPIO_BASE + (_x))
65
66 #define RB91X_SSR_BIT_LED1 0
67 #define RB91X_SSR_BIT_LED2 1
68 #define RB91X_SSR_BIT_LED3 2
69 #define RB91X_SSR_BIT_LED4 3
70 #define RB91X_SSR_BIT_LED5 4
71 #define RB91X_SSR_BIT_5 5
72 #define RB91X_SSR_BIT_USB_POWER 6
73 #define RB91X_SSR_BIT_PCIE_POWER 7
74
75 #define RB91X_GPIO_SSR_STROBE RB91X_LATCH_GPIO(0)
76 #define RB91X_GPIO_LED_POWER RB91X_LATCH_GPIO(1)
77 #define RB91X_GPIO_LED_USER RB91X_LATCH_GPIO(2)
78 #define RB91X_GPIO_NAND_READ RB91X_LATCH_GPIO(3)
79 #define RB91X_GPIO_NAND_RDY RB91X_LATCH_GPIO(4)
80 #define RB91X_GPIO_NLE RB91X_LATCH_GPIO(11)
81 #define RB91X_GPIO_NAND_NRW RB91X_LATCH_GPIO(12)
82 #define RB91X_GPIO_NAND_NCE RB91X_LATCH_GPIO(13)
83 #define RB91X_GPIO_NAND_CLE RB91X_LATCH_GPIO(14)
84 #define RB91X_GPIO_NAND_ALE RB91X_LATCH_GPIO(15)
85
86 #define RB91X_GPIO_LED_1 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1)
87 #define RB91X_GPIO_LED_2 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2)
88 #define RB91X_GPIO_LED_3 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3)
89 #define RB91X_GPIO_LED_4 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4)
90 #define RB91X_GPIO_LED_5 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5)
91 #define RB91X_GPIO_USB_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER)
92 #define RB91X_GPIO_PCIE_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER)
93
94 struct rb_board_info {
95 const char *name;
96 u32 flags;
97 };
98
99 static struct mtd_partition rb711gr100_spi_partitions[] = {
100 {
101 .name = "routerboot",
102 .offset = RB_ROUTERBOOT_OFFSET,
103 .mask_flags = MTD_WRITEABLE,
104 }, {
105 .name = "hard_config",
106 .size = RB_HARD_CFG_SIZE,
107 .mask_flags = MTD_WRITEABLE,
108 }, {
109 .name = "bios",
110 .offset = RB_BIOS_OFFSET,
111 .size = RB_BIOS_SIZE,
112 .mask_flags = MTD_WRITEABLE,
113 }, {
114 .name = "soft_config",
115 .size = RB_SOFT_CFG_SIZE,
116 }
117 };
118
119 static struct flash_platform_data rb711gr100_spi_flash_data = {
120 .parts = rb711gr100_spi_partitions,
121 .nr_parts = ARRAY_SIZE(rb711gr100_spi_partitions),
122 };
123
124 static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = {
125 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
126 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22
127 };
128
129 static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = {
130 .base = RB91X_LATCH_GPIO_BASE,
131 .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios),
132 .gpios = rb711gr100_gpio_latch_gpios,
133 .le_gpio_index = 11,
134 .le_active_low = true,
135 };
136
137 static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = {
138 .gpio_nce = RB91X_GPIO_NAND_NCE,
139 .gpio_ale = RB91X_GPIO_NAND_ALE,
140 .gpio_cle = RB91X_GPIO_NAND_CLE,
141 .gpio_rdy = RB91X_GPIO_NAND_RDY,
142 .gpio_read = RB91X_GPIO_NAND_READ,
143 .gpio_nrw = RB91X_GPIO_NAND_NRW,
144 .gpio_nle = RB91X_GPIO_NLE,
145 };
146
147 static u8 rb711gr100_ssr_initdata[] = {
148 BIT(RB91X_SSR_BIT_PCIE_POWER) |
149 BIT(RB91X_SSR_BIT_USB_POWER) |
150 BIT(RB91X_SSR_BIT_5)
151 };
152
153 static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = {
154 .base = RB91X_SSR_GPIO_BASE,
155 .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata),
156 .init_data = rb711gr100_ssr_initdata,
157 };
158
159 static struct spi_board_info rb711gr100_spi_info[] = {
160 {
161 .bus_num = 0,
162 .chip_select = 0,
163 .max_speed_hz = 25000000,
164 .modalias = "m25p80",
165 .platform_data = &rb711gr100_spi_flash_data,
166 }, {
167 .bus_num = 0,
168 .chip_select = 1,
169 .max_speed_hz = 10000000,
170 .modalias = "74x164",
171 .platform_data = &rb711gr100_ssr_data,
172 }
173 };
174
175 static int rb711gr100_spi_cs_gpios[2] = {
176 -ENOENT,
177 RB91X_GPIO_SSR_STROBE,
178 };
179
180 static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = {
181 .bus_num = 0,
182 .num_chipselect = 2,
183 .cs_gpios = rb711gr100_spi_cs_gpios,
184 };
185
186 static struct gpio_led rb711gr100_leds[] __initdata = {
187 {
188 .name = "rb:green:led1",
189 .gpio = RB91X_GPIO_LED_1,
190 .active_low = 0,
191 },
192 {
193 .name = "rb:green:led2",
194 .gpio = RB91X_GPIO_LED_2,
195 .active_low = 0,
196 },
197 {
198 .name = "rb:green:led3",
199 .gpio = RB91X_GPIO_LED_3,
200 .active_low = 0,
201 },
202 {
203 .name = "rb:green:led4",
204 .gpio = RB91X_GPIO_LED_4,
205 .active_low = 0,
206 },
207 {
208 .name = "rb:green:led5",
209 .gpio = RB91X_GPIO_LED_5,
210 .active_low = 0,
211 },
212 {
213 .name = "rb:green:user",
214 .gpio = RB91X_GPIO_LED_USER,
215 .active_low = 0,
216 },
217 {
218 .name = "rb:green:power",
219 .gpio = RB91X_GPIO_LED_POWER,
220 .active_low = 0,
221 .default_state = LEDS_GPIO_DEFSTATE_KEEP,
222 },
223 };
224
225 static struct at803x_platform_data rb91x_at803x_data = {
226 .disable_smarteee = 1,
227 .enable_rgmii_rx_delay = 1,
228 .enable_rgmii_tx_delay = 1,
229 };
230
231 static struct mdio_board_info rb91x_mdio0_info[] = {
232 {
233 .bus_id = "ag71xx-mdio.0",
234 .mdio_addr = 0,
235 .platform_data = &rb91x_at803x_data,
236 },
237 };
238
239 static void __init rb711gr100_init_partitions(const struct rb_info *info)
240 {
241 rb711gr100_spi_partitions[0].size = info->hard_cfg_offs;
242 rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs;
243
244 rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs;
245 }
246
247 void __init rb711gr100_wlan_init(void)
248 {
249 char *caldata;
250 u8 wlan_mac[ETH_ALEN];
251
252 caldata = rb_get_wlan_data();
253 if (caldata == NULL)
254 return;
255
256 ath79_init_mac(wlan_mac, ath79_mac_base, 1);
257 ath79_register_wmac(caldata + 0x1000, wlan_mac);
258
259 kfree(caldata);
260 }
261
262 #define RB_BOARD_INFO(_name, _flags) \
263 { \
264 .name = (_name), \
265 .flags = (_flags), \
266 }
267
268 static const struct rb_board_info rb711gr100_boards[] __initconst = {
269 RB_BOARD_INFO("911G-2HPnD", 0),
270 RB_BOARD_INFO("911G-5HPnD", 0),
271 RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
272 RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
273 };
274
275 static u32 rb711gr100_get_flags(const struct rb_info *info)
276 {
277 int i;
278
279 for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) {
280 const struct rb_board_info *bi;
281
282 bi = &rb711gr100_boards[i];
283 if (strcmp(info->board_name, bi->name) == 0)
284 return bi->flags;
285 }
286
287 return 0;
288 }
289
290 static void __init rb711gr100_setup(void)
291 {
292 const struct rb_info *info;
293 char buf[64];
294 u32 flags;
295
296 info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
297 if (!info)
298 return;
299
300 scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
301 (info->board_name) ? info->board_name : "");
302 mips_set_machine_name(buf);
303
304 rb711gr100_init_partitions(info);
305 ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info,
306 ARRAY_SIZE(rb711gr100_spi_info));
307
308 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
309 AR934X_ETH_CFG_RXD_DELAY |
310 AR934X_ETH_CFG_SW_ONLY_MODE);
311
312 ath79_register_mdio(0, 0x0);
313
314 mdiobus_register_board_info(rb91x_mdio0_info,
315 ARRAY_SIZE(rb91x_mdio0_info));
316
317 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
318 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
319 ath79_eth0_data.phy_mask = BIT(0);
320 ath79_eth0_pll_data.pll_1000 = 0x02000000;
321
322 ath79_register_eth(0);
323
324 rb711gr100_wlan_init();
325
326 platform_device_register_data(NULL, "rb91x-nand", -1,
327 &rb711gr100_nand_data,
328 sizeof(rb711gr100_nand_data));
329
330 platform_device_register_data(NULL, "gpio-latch", -1,
331 &rb711gr100_gpio_latch_data,
332 sizeof(rb711gr100_gpio_latch_data));
333
334 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds),
335 rb711gr100_leds);
336
337 flags = rb711gr100_get_flags(info);
338
339 if (flags & RB91X_FLAG_USB)
340 ath79_register_usb();
341
342 if (flags & RB91X_FLAG_PCIE)
343 ath79_register_pci();
344
345 }
346
347 MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup);