target/linux/pistachio/patches-5.15/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch

   1 From 981c1d416af45eff207227aec106381ac23aac99 Mon Sep 17 00:00:00 2001
   2 From: Ian Pozella <Ian.Pozella@imgtec.com>
   3 Date: Mon, 20 Feb 2017 10:00:52 +0000
   4 Subject: MIPS: DTS: img: marduk: switch mmc to 1 bit mode
   5
   6 The mmc block in Pistachio allows 1 to 8 data bits to be used.
   7 Marduk uses 4 bits allowing the upper 4 bits to be allocated
   8 to the Mikrobus ports. However these bits are still connected
   9 internally meaning the mmc block recieves signals on all data lines
  10 and seems the internal HW CRC checks get corrupted by this erroneous
  11 data.
  12
  13 We cannot control what data is sent on these lines because they go
  14 to external ports. 1 bit mode does not exhibit the issue hence the
  15 safe default is to use this. If a user knows that in their use case
  16 they will not use the upper bits then they can set to 4 bit mode in
  17 order to improve performance.
  18
  19 Also make sure that the upper 4 bits don't get allocated to the mmc
  20 driver (the default is to assign all 8 pins) so they can be allocated
  21 to other drivers. Allocating all 4 despite setting 1 bit mode as this
  22 matches what is there in hardware.
  23
  24 Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
  25 ---
  26  arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++-
  27  1 file changed, 2 insertions(+), 1 deletion(-)
  28
  29 --- a/arch/mips/boot/dts/img/pistachio_marduk.dts
  30 +++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
  31 @@ -118,7 +118,7 @@
  32
  33  &sdhost {
  34         status = "okay";
  35 -       bus-width = <4>;
  36 +       bus-width = <1>;
  37         disable-wp;
  38  };
  39
  40 @@ -128,6 +128,7 @@
  41
  42  &pin_sdhost_data {
  43         drive-strength = <2>;
  44 +       pins = "mfio17", "mfio18", "mfio19", "mfio20";
  45  };
  46
  47  &pwm {