kernel: Reorder generic kernel 6.1 config
[openwrt/staging/pepe2k.git] / target / linux / generic / backport-6.1 / 789-STABLE-02-net-dsa-mt7530-fix-link-local-frames-that-ingress-vl.patch
1 From f1fa919ea59655f73cb3972264e157b8831ba546 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3 Date: Thu, 14 Mar 2024 12:33:41 +0300
4 Subject: [PATCH 2/3] net: dsa: mt7530: fix link-local frames that ingress vlan
5 filtering ports
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 [ Upstream commit e8bf353577f382c7066c661fed41b2adc0fc7c40 ]
11
12 Whether VLAN-aware or not, on every VID VLAN table entry that has the CPU
13 port as a member of it, frames are set to egress the CPU port with the VLAN
14 tag stacked. This is so that VLAN tags can be appended after hardware
15 special tag (called DSA tag in the context of Linux drivers).
16
17 For user ports on a VLAN-unaware bridge, frame ingressing the user port
18 egresses CPU port with only the special tag.
19
20 For user ports on a VLAN-aware bridge, frame ingressing the user port
21 egresses CPU port with the special tag and the VLAN tag.
22
23 This causes issues with link-local frames, specifically BPDUs, because the
24 software expects to receive them VLAN-untagged.
25
26 There are two options to make link-local frames egress untagged. Setting
27 CONSISTENT or UNTAGGED on the EG_TAG bits on the relevant register.
28 CONSISTENT means frames egress exactly as they ingress. That means
29 egressing with the VLAN tag they had at ingress or egressing untagged if
30 they ingressed untagged. Although link-local frames are not supposed to be
31 transmitted VLAN-tagged, if they are done so, when egressing through a CPU
32 port, the special tag field will be broken.
33
34 BPDU egresses CPU port with VLAN tag egressing stacked, received on
35 software:
36
37 00:01:25.104821 AF Unknown (382365846), length 106:
38 | STAG | | VLAN |
39 0x0000: 0000 6c27 614d 4143 0001 0000 8100 0001 ..l'aMAC........
40 0x0010: 0026 4242 0300 0000 0000 0000 6c27 614d .&BB........l'aM
41 0x0020: 4143 0000 0000 0000 6c27 614d 4143 0000 AC......l'aMAC..
42 0x0030: 0000 1400 0200 0f00 0000 0000 0000 0000 ................
43
44 BPDU egresses CPU port with VLAN tag egressing untagged, received on
45 software:
46
47 00:23:56.628708 AF Unknown (25215488), length 64:
48 | STAG |
49 0x0000: 0000 6c27 614d 4143 0001 0000 0026 4242 ..l'aMAC.....&BB
50 0x0010: 0300 0000 0000 0000 6c27 614d 4143 0000 ........l'aMAC..
51 0x0020: 0000 0000 6c27 614d 4143 0000 0000 1400 ....l'aMAC......
52 0x0030: 0200 0f00 0000 0000 0000 0000 ............
53
54 BPDU egresses CPU port with VLAN tag egressing tagged, received on
55 software:
56
57 00:01:34.311963 AF Unknown (25215488), length 64:
58 | Mess |
59 0x0000: 0000 6c27 614d 4143 0001 0001 0026 4242 ..l'aMAC.....&BB
60 0x0010: 0300 0000 0000 0000 6c27 614d 4143 0000 ........l'aMAC..
61 0x0020: 0000 0000 6c27 614d 4143 0000 0000 1400 ....l'aMAC......
62 0x0030: 0200 0f00 0000 0000 0000 0000 ............
63
64 To prevent confusing the software, force the frame to egress UNTAGGED
65 instead of CONSISTENT. This way, frames can't possibly be received TAGGED
66 by software which would have the special tag field broken.
67
68 VLAN Tag Egress Procedure
69
70 For all frames, one of these options set the earliest in this order will
71 apply to the frame:
72
73 - EG_TAG in certain registers for certain frames.
74 This will apply to frame with matching MAC DA or EtherType.
75
76 - EG_TAG in the address table.
77 This will apply to frame at its incoming port.
78
79 - EG_TAG in the PVC register.
80 This will apply to frame at its incoming port.
81
82 - EG_CON and [EG_TAG per port] in the VLAN table.
83 This will apply to frame at its outgoing port.
84
85 - EG_TAG in the PCR register.
86 This will apply to frame at its outgoing port.
87
88 EG_TAG in certain registers for certain frames:
89
90 PPPoE Discovery_ARP/RARP: PPP_EG_TAG and ARP_EG_TAG in the APC register.
91 IGMP_MLD: IGMP_EG_TAG and MLD_EG_TAG in the IMC register.
92 BPDU and PAE: BPDU_EG_TAG and PAE_EG_TAG in the BPC register.
93 REV_01 and REV_02: R01_EG_TAG and R02_EG_TAG in the RGAC1 register.
94 REV_03 and REV_0E: R03_EG_TAG and R0E_EG_TAG in the RGAC2 register.
95 REV_10 and REV_20: R10_EG_TAG and R20_EG_TAG in the RGAC3 register.
96 REV_21 and REV_UN: R21_EG_TAG and RUN_EG_TAG in the RGAC4 register.
97
98 With this change, it can be observed that a bridge interface with stp_state
99 and vlan_filtering enabled will properly block ports now.
100
101 Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
102 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
103 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
104 Signed-off-by: Sasha Levin <sashal@kernel.org>
105 ---
106 drivers/net/dsa/mt7530.c | 23 +++++++++++++++--------
107 drivers/net/dsa/mt7530.h | 9 ++++++++-
108 2 files changed, 23 insertions(+), 9 deletions(-)
109
110 --- a/drivers/net/dsa/mt7530.c
111 +++ b/drivers/net/dsa/mt7530.c
112 @@ -1001,16 +1001,23 @@ unlock_exit:
113 static void
114 mt753x_trap_frames(struct mt7530_priv *priv)
115 {
116 - /* Trap BPDUs to the CPU port(s) */
117 - mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
118 + /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them
119 + * VLAN-untagged.
120 + */
121 + mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK |
122 + MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK |
123 + MT753X_BPDU_PORT_FW_MASK,
124 + MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
125 + MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) |
126 + MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
127 MT753X_BPDU_CPU_ONLY);
128
129 - /* Trap 802.1X PAE frames to the CPU port(s) */
130 - mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_PORT_FW_MASK,
131 - MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY));
132 -
133 - /* Trap LLDP frames with :0E MAC DA to the CPU port(s) */
134 - mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_PORT_FW_MASK,
135 + /* Trap LLDP frames with :0E MAC DA to the CPU port(s) and egress them
136 + * VLAN-untagged.
137 + */
138 + mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK |
139 + MT753X_R0E_PORT_FW_MASK,
140 + MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
141 MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY));
142 }
143
144 --- a/drivers/net/dsa/mt7530.h
145 +++ b/drivers/net/dsa/mt7530.h
146 @@ -63,12 +63,18 @@ enum mt753x_id {
147
148 /* Registers for BPDU and PAE frame control*/
149 #define MT753X_BPC 0x24
150 -#define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0)
151 +#define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22)
152 +#define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x)
153 #define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16)
154 #define MT753X_PAE_PORT_FW(x) FIELD_PREP(MT753X_PAE_PORT_FW_MASK, x)
155 +#define MT753X_BPDU_EG_TAG_MASK GENMASK(8, 6)
156 +#define MT753X_BPDU_EG_TAG(x) FIELD_PREP(MT753X_BPDU_EG_TAG_MASK, x)
157 +#define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0)
158
159 /* Register for :03 and :0E MAC DA frame control */
160 #define MT753X_RGAC2 0x2c
161 +#define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22)
162 +#define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x)
163 #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16)
164 #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x)
165
166 @@ -251,6 +257,7 @@ enum mt7530_port_mode {
167 enum mt7530_vlan_port_eg_tag {
168 MT7530_VLAN_EG_DISABLED = 0,
169 MT7530_VLAN_EG_CONSISTENT = 1,
170 + MT7530_VLAN_EG_UNTAGGED = 4,
171 };
172
173 enum mt7530_vlan_port_attr {