target/linux/at91/patches-6.1/108-clk-at91-sama7g5-set-low-limit-for-mck0-at-32KHz.patch

   1 From 9fd5a49f6da9de5da83f4a53eccefad647ab15ed Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Mon, 11 Oct 2021 14:27:18 +0300
   4 Subject: [PATCH 246/247] clk: at91: sama7g5: set low limit for mck0 at 32KHz
   5
   6 MCK0 could go as low as 32KHz. Set this limit.
   7
   8 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
   9 Link: https://lore.kernel.org/r/20211011112719.3951784-15-claudiu.beznea@microchip.com
  10 Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
  11 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
  12 ---
  13  drivers/clk/at91/sama7g5.c | 2 +-
  14  1 file changed, 1 insertion(+), 1 deletion(-)
  15
  16 --- a/drivers/clk/at91/sama7g5.c
  17 +++ b/drivers/clk/at91/sama7g5.c
  18 @@ -849,7 +849,7 @@ static const struct {
  19
  20  /* MCK0 characteristics. */
  21  static const struct clk_master_characteristics mck0_characteristics = {
  22 -       .output = { .min = 50000000, .max = 200000000 },
  23 +       .output = { .min = 32768, .max = 200000000 },
  24         .divisors = { 1, 2, 4, 3, 5 },
  25         .have_div3_pres = 1,
  26  };