target/linux/ramips/dts/mt7620a.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "ralink,mt7620a-soc";
   7
   8         aliases {
   9                 spi0 = &spi0;
  10                 spi1 = &spi1;
  11                 serial0 = &uartlite;
  12         };
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         compatible = "mips,mips24KEc";
  20                         reg = <0>;
  21                 };
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttyS0,57600";
  26         };
  27
  28         cpuintc: cpuintc {
  29                 #address-cells = <0>;
  30                 #interrupt-cells = <1>;
  31                 interrupt-controller;
  32                 compatible = "mti,cpu-interrupt-controller";
  33         };
  34
  35         palmbus: palmbus@10000000 {
  36                 compatible = "palmbus";
  37                 reg = <0x10000000 0x200000>;
  38                 ranges = <0x0 0x10000000 0x1FFFFF>;
  39
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42
  43                 sysc: sysc@0 {
  44                         compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon";
  45                         reg = <0x0 0x100>;
  46                 };
  47
  48                 timer: timer@100 {
  49                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  50                         reg = <0x100 0x20>;
  51
  52                         interrupt-parent = <&intc>;
  53                         interrupts = <1>;
  54                 };
  55
  56                 watchdog: watchdog@120 {
  57                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  58                         reg = <0x120 0x10>;
  59
  60                         resets = <&rstctrl 8>;
  61                         reset-names = "wdt";
  62
  63                         interrupt-parent = <&intc>;
  64                         interrupts = <1>;
  65                 };
  66
  67                 intc: intc@200 {
  68                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  69                         reg = <0x200 0x100>;
  70
  71                         resets = <&rstctrl 19>;
  72                         reset-names = "intc";
  73
  74                         interrupt-controller;
  75                         #interrupt-cells = <1>;
  76
  77                         interrupt-parent = <&cpuintc>;
  78                         interrupts = <2>;
  79                 };
  80
  81                 memc: memc@300 {
  82                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  83                         reg = <0x300 0x100>;
  84
  85                         resets = <&rstctrl 20>;
  86                         reset-names = "mc";
  87
  88                         interrupt-parent = <&intc>;
  89                         interrupts = <3>;
  90                 };
  91
  92                 uart: uart@500 {
  93                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  94                         reg = <0x500 0x100>;
  95
  96                         resets = <&rstctrl 12>;
  97                         reset-names = "uart";
  98
  99                         interrupt-parent = <&intc>;
 100                         interrupts = <5>;
 101
 102                         reg-shift = <2>;
 103
 104                         status = "disabled";
 105                 };
 106
 107                 gpio0: gpio@600 {
 108                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 109                         reg = <0x600 0x34>;
 110
 111                         resets = <&rstctrl 13>;
 112                         reset-names = "pio";
 113
 114                         interrupt-parent = <&intc>;
 115                         interrupts = <6>;
 116
 117                         gpio-controller;
 118                         #gpio-cells = <2>;
 119
 120                         ngpios = <24>;
 121                         ralink,gpio-base = <0>;
 122                         ralink,register-map = [ 00 04 08 0c
 123                                                 20 24 28 2c
 124                                                 30 34 ];
 125                 };
 126
 127                 gpio1: gpio@638 {
 128                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 129                         reg = <0x638 0x24>;
 130
 131                         interrupt-parent = <&intc>;
 132                         interrupts = <6>;
 133
 134                         gpio-controller;
 135                         #gpio-cells = <2>;
 136
 137                         ngpios = <16>;
 138                         ralink,gpio-base = <24>;
 139                         ralink,register-map = [ 00 04 08 0c
 140                                                 10 14 18 1c
 141                                                 20 24 ];
 142
 143                         status = "disabled";
 144                 };
 145
 146                 gpio2: gpio@660 {
 147                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 148                         reg = <0x660 0x24>;
 149
 150                         interrupt-parent = <&intc>;
 151                         interrupts = <6>;
 152
 153                         gpio-controller;
 154                         #gpio-cells = <2>;
 155
 156                         ngpios = <32>;
 157                         ralink,gpio-base = <40>;
 158                         ralink,register-map = [ 00 04 08 0c
 159                                                 10 14 18 1c
 160                                                 20 24 ];
 161
 162                         status = "disabled";
 163                 };
 164
 165                 gpio3: gpio@688 {
 166                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 167                         reg = <0x688 0x24>;
 168
 169                         interrupt-parent = <&intc>;
 170                         interrupts = <6>;
 171
 172                         gpio-controller;
 173                         #gpio-cells = <2>;
 174
 175                         ngpios = <1>;
 176                         ralink,gpio-base = <72>;
 177                         ralink,register-map = [ 00 04 08 0c
 178                                                 10 14 18 1c
 179                                                 20 24 ];
 180
 181                         status = "disabled";
 182                 };
 183
 184                 i2c: i2c@900 {
 185                         compatible = "ralink,rt2880-i2c";
 186                         reg = <0x900 0x100>;
 187
 188                         resets = <&rstctrl 16>;
 189                         reset-names = "i2c";
 190
 191                         #address-cells = <1>;
 192                         #size-cells = <0>;
 193
 194                         status = "disabled";
 195
 196                         pinctrl-names = "default";
 197                         pinctrl-0 = <&i2c_pins>;
 198                 };
 199
 200                 i2s: i2s@a00 {
 201                         compatible = "mediatek,mt7620-i2s";
 202                         reg = <0xa00 0x100>;
 203
 204                         resets = <&rstctrl 17>;
 205                         reset-names = "i2s";
 206
 207                         interrupt-parent = <&intc>;
 208                         interrupts = <10>;
 209
 210                         txdma-req = <2>;
 211                         rxdma-req = <3>;
 212
 213                         dmas = <&gdma 4>,
 214                                 <&gdma 6>;
 215                         dma-names = "tx", "rx";
 216
 217                         status = "disabled";
 218                 };
 219
 220                 spi0: spi@b00 {
 221                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 222                         reg = <0xb00 0x40>;
 223
 224                         resets = <&rstctrl 18>;
 225                         reset-names = "spi";
 226
 227                         #address-cells = <1>;
 228                         #size-cells = <0>;
 229
 230                         status = "disabled";
 231
 232                         pinctrl-names = "default";
 233                         pinctrl-0 = <&spi_pins>;
 234                 };
 235
 236                 spi1: spi@b40 {
 237                         compatible = "ralink,rt2880-spi";
 238                         reg = <0xb40 0x60>;
 239
 240                         resets = <&rstctrl 18>;
 241                         reset-names = "spi";
 242
 243                         #address-cells = <1>;
 244                         #size-cells = <0>;
 245
 246                         status = "disabled";
 247
 248                         pinctrl-names = "default";
 249                         pinctrl-0 = <&spi_cs1>;
 250                 };
 251
 252                 uartlite: uartlite@c00 {
 253                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 254                         reg = <0xc00 0x100>;
 255
 256                         resets = <&rstctrl 19>;
 257                         reset-names = "uartl";
 258
 259                         interrupt-parent = <&intc>;
 260                         interrupts = <12>;
 261
 262                         reg-shift = <2>;
 263
 264                         pinctrl-names = "default";
 265                         pinctrl-0 = <&uartlite_pins>;
 266                 };
 267
 268                 systick: systick@d00 {
 269                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 270                         reg = <0xd00 0x10>;
 271
 272                         resets = <&rstctrl 28>;
 273                         reset-names = "intc";
 274
 275                         interrupt-parent = <&cpuintc>;
 276                         interrupts = <7>;
 277                 };
 278
 279                 pcm: pcm@2000 {
 280                         compatible = "ralink,mt7620a-pcm";
 281                         reg = <0x2000 0x800>;
 282
 283                         resets = <&rstctrl 11>;
 284                         reset-names = "pcm";
 285
 286                         interrupt-parent = <&intc>;
 287                         interrupts = <4>;
 288
 289                         status = "disabled";
 290                 };
 291
 292                 gdma: gdma@2800 {
 293                         compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma";
 294                         reg = <0x2800 0x800>;
 295
 296                         resets = <&rstctrl 14>;
 297                         reset-names = "dma";
 298
 299                         interrupt-parent = <&intc>;
 300                         interrupts = <7>;
 301
 302                         #dma-cells = <1>;
 303                         #dma-channels = <16>;
 304                         #dma-requests = <16>;
 305
 306                         status = "disabled";
 307                 };
 308         };
 309
 310         pinctrl: pinctrl {
 311                 compatible = "ralink,rt2880-pinmux";
 312                 pinctrl-names = "default";
 313                 pinctrl-0 = <&state_default>;
 314
 315                 state_default: pinctrl0 {
 316                 };
 317
 318                 pcm_i2s_pins: pcm_i2s {
 319                         pcm_i2s {
 320                                 groups = "uartf";
 321                                 function = "pcm i2s";
 322                         };
 323                 };
 324
 325                 uartf_gpio_pins: uartf_gpio {
 326                         uartf_gpio {
 327                                 groups = "uartf";
 328                                 function = "gpio uartf";
 329                         };
 330                 };
 331
 332                 gpio_i2s_pins: gpio_i2s {
 333                         gpio_i2s {
 334                                 groups = "uartf";
 335                                 function = "gpio i2s";
 336                         };
 337                 };
 338
 339                 spi_pins: spi_pins {
 340                         spi_pins {
 341                                 groups = "spi";
 342                                 function = "spi";
 343                         };
 344                 };
 345
 346                 spi_cs1: spi1 {
 347                         spi1 {
 348                                 groups = "spi refclk";
 349                                 function = "spi refclk";
 350                         };
 351                 };
 352
 353                 i2c_pins: i2c_pins {
 354                         i2c_pins {
 355                                 groups = "i2c";
 356                                 function = "i2c";
 357                         };
 358                 };
 359
 360                 uartlite_pins: uartlite {
 361                         uart {
 362                                 groups = "uartlite";
 363                                 function = "uartlite";
 364                         };
 365                 };
 366
 367                 mdio_pins: mdio {
 368                         mdio {
 369                                 groups = "mdio";
 370                                 function = "mdio";
 371                         };
 372                 };
 373
 374                 mdio_refclk_pins: mdio_refclk {
 375                         mdio_refclk {
 376                                 groups = "mdio";
 377                                 function = "refclk";
 378                         };
 379                 };
 380
 381                 ephy_pins: ephy {
 382                         ephy {
 383                                 groups = "ephy";
 384                                 function = "ephy";
 385                         };
 386                 };
 387
 388                 wled_pins: wled {
 389                         wled {
 390                                 groups = "wled";
 391                                 function = "wled";
 392                         };
 393                 };
 394
 395                 rgmii1_pins: rgmii1 {
 396                         rgmii1 {
 397                                 groups = "rgmii1";
 398                                 function = "rgmii1";
 399                         };
 400                 };
 401
 402                 rgmii2_pins: rgmii2 {
 403                         rgmii2 {
 404                                 groups = "rgmii2";
 405                                 function = "rgmii2";
 406                         };
 407                 };
 408
 409                 pcie_pins: pcie {
 410                         pcie {
 411                                 groups = "pcie";
 412                                 function = "pcie rst";
 413                         };
 414                 };
 415
 416                 pa_pins: pa {
 417                         pa {
 418                                 groups = "pa";
 419                                 function = "pa";
 420                         };
 421                 };
 422
 423                 pa_gpio_pins: pa_gpio {
 424                         pa {
 425                                 groups = "pa";
 426                                 function = "gpio";
 427                         };
 428                 };
 429
 430                 sdhci_pins: sdhci {
 431                         sdhci {
 432                                 groups = "nd_sd";
 433                                 function = "sd";
 434                         };
 435                 };
 436         };
 437
 438         rstctrl: rstctrl {
 439                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 440                 #reset-cells = <1>;
 441         };
 442
 443         clkctrl: clkctrl {
 444                 compatible = "ralink,rt2880-clock";
 445                 #clock-cells = <1>;
 446         };
 447
 448         usbphy: usbphy {
 449                 compatible = "mediatek,mt7620-usbphy";
 450                 #phy-cells = <0>;
 451
 452                 ralink,sysctl = <&sysc>;
 453                 resets = <&rstctrl 22 &rstctrl 25>;
 454                 reset-names = "host", "device";
 455
 456                 clocks = <&clkctrl 22 &clkctrl 25>;
 457                 clock-names = "host", "device";
 458         };
 459
 460         ethernet: ethernet@10100000 {
 461                 compatible = "mediatek,mt7620-eth";
 462                 reg = <0x10100000 0x10000>;
 463
 464                 #address-cells = <1>;
 465                 #size-cells = <0>;
 466
 467                 interrupt-parent = <&cpuintc>;
 468                 interrupts = <5>;
 469
 470                 resets = <&rstctrl 21 &rstctrl 23>;
 471                 reset-names = "fe", "esw";
 472
 473                 mediatek,switch = <&gsw>;
 474
 475                 port@4 {
 476                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 477                         reg = <4>;
 478
 479                         status = "disabled";
 480                 };
 481
 482                 port@5 {
 483                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 484                         reg = <5>;
 485
 486                         status = "disabled";
 487                 };
 488
 489                 mdio-bus {
 490                         #address-cells = <1>;
 491                         #size-cells = <0>;
 492
 493                         status = "disabled";
 494                 };
 495         };
 496
 497         gsw: gsw@10110000 {
 498                 compatible = "mediatek,mt7620-gsw";
 499                 reg = <0x10110000 0x8000>;
 500
 501                 resets = <&rstctrl 23>;
 502                 reset-names = "esw";
 503
 504                 interrupt-parent = <&intc>;
 505                 interrupts = <17>;
 506         };
 507
 508         sdhci: sdhci@10130000 {
 509                 compatible = "ralink,mt7620-sdhci";
 510                 reg = <0x10130000 0x4000>;
 511
 512                 interrupt-parent = <&intc>;
 513                 interrupts = <14>;
 514
 515                 pinctrl-names = "default";
 516                 pinctrl-0 = <&sdhci_pins>;
 517
 518                 status = "disabled";
 519         };
 520
 521         ehci: ehci@101c0000 {
 522                 #address-cells = <1>;
 523                 #size-cells = <0>;
 524                 compatible = "generic-ehci";
 525                 reg = <0x101c0000 0x1000>;
 526
 527                 interrupt-parent = <&intc>;
 528                 interrupts = <18>;
 529
 530                 phys = <&usbphy>;
 531                 phy-names = "usb";
 532
 533                 status = "disabled";
 534
 535                 ehci_port1: port@1 {
 536                         reg = <1>;
 537                         #trigger-source-cells = <0>;
 538                 };
 539         };
 540
 541         ohci: ohci@101c1000 {
 542                 #address-cells = <1>;
 543                 #size-cells = <0>;
 544                 compatible = "generic-ohci";
 545                 reg = <0x101c1000 0x1000>;
 546
 547                 interrupt-parent = <&intc>;
 548                 interrupts = <18>;
 549
 550                 phys = <&usbphy>;
 551                 phy-names = "usb";
 552
 553                 status = "disabled";
 554
 555                 ohci_port1: port@1 {
 556                         reg = <1>;
 557                         #trigger-source-cells = <0>;
 558                 };
 559         };
 560
 561         pcie: pcie@10140000 {
 562                 compatible = "mediatek,mt7620-pci";
 563                 reg = <0x10140000 0x100
 564                         0x10142000 0x100>;
 565
 566                 #address-cells = <3>;
 567                 #size-cells = <2>;
 568
 569                 resets = <&rstctrl 26>;
 570                 reset-names = "pcie0";
 571
 572                 clocks = <&clkctrl 26>;
 573                 clock-names = "pcie0";
 574
 575                 interrupt-parent = <&cpuintc>;
 576                 interrupts = <4>;
 577
 578                 pinctrl-names = "default";
 579                 pinctrl-0 = <&pcie_pins>;
 580
 581                 device_type = "pci";
 582
 583                 bus-range = <0 255>;
 584                 ranges = <
 585                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 586                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 587                 >;
 588
 589                 status = "disabled";
 590
 591                 pcie0: pcie@0,0 {
 592                         reg = <0x0000 0 0 0 0>;
 593
 594                         #address-cells = <3>;
 595                         #size-cells = <2>;
 596
 597                         device_type = "pci";
 598
 599                         ranges;
 600                 };
 601         };
 602
 603         wmac: wmac@10180000 {
 604                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 605                 reg = <0x10180000 0x40000>;
 606
 607                 interrupt-parent = <&cpuintc>;
 608                 interrupts = <6>;
 609
 610                 ralink,eeprom = "soc_wmac.eeprom";
 611         };
 612 };