treewide: remove label = "cpu" from DSA dt-binding
[openwrt/staging/noltari.git] / target / linux / mediatek / dts / mt7622-xiaomi-redmi-router-ax6s.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6
7 #include "mt7622.dtsi"
8 #include "mt6380.dtsi"
9
10 / {
11 model = "Xiaomi Redmi Router AX6S";
12 compatible = "xiaomi,redmi-router-ax6s", "mediatek,mt7622";
13
14 aliases {
15 serial0 = &uart0;
16 led-boot = &led_power_amber;
17 led-failsafe = &led_power_amber;
18 led-running = &led_power_blue;
19 led-upgrade = &led_power_blue;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
25 };
26
27 memory {
28 reg = <0 0x40000000 0 0x8000000>;
29 };
30
31 leds {
32 compatible = "gpio-leds";
33
34 led_power_blue: power_blue {
35 label = "blue:power";
36 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
37 };
38
39 led_power_amber: power_amber {
40 label = "amber:power";
41 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
42 };
43
44 led_net_blue: net_blue {
45 label = "blue:net";
46 gpios = <&pio 01 GPIO_ACTIVE_LOW>;
47 };
48
49 led_net_amber: net_amber {
50 label = "amber:net";
51 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
52 };
53
54 };
55
56 keys {
57 compatible = "gpio-keys";
58
59 reset {
60 label = "reset";
61 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_RESTART>;
63 };
64
65 mesh {
66 label = "mesh";
67 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
68 linux,code = <BTN_9>;
69 linux,input-type = <EV_SW>;
70 };
71 };
72 };
73
74 &cpu0 {
75 proc-supply = <&mt6380_vcpu_reg>;
76 sram-supply = <&mt6380_vm_reg>;
77 };
78
79 &cpu1 {
80 proc-supply = <&mt6380_vcpu_reg>;
81 sram-supply = <&mt6380_vm_reg>;
82 };
83
84 &pio {
85 eth_pins: eth-pins {
86 mux {
87 function = "eth";
88 groups = "mdc_mdio", "rgmii_via_gmac2";
89 };
90 };
91
92 pcie0_pins: pcie0-pins {
93 mux {
94 function = "pcie";
95 groups = "pcie0_pad_perst",
96 "pcie0_1_waken",
97 "pcie0_1_clkreq";
98 };
99 };
100
101 pmic_bus_pins: pmic-bus-pins {
102 mux {
103 function = "pmic";
104 groups = "pmic_bus";
105 };
106 };
107
108 pwm7_pins: pwm1-2-pins {
109 mux {
110 function = "pwm";
111 groups = "pwm_ch7_2";
112 };
113 };
114
115 /* Serial NAND is shared pin with SPI-NOR */
116 serial_nand_pins: serial-nand-pins {
117 mux {
118 function = "flash";
119 groups = "snfi";
120 };
121 };
122
123 uart0_pins: uart0-pins {
124 mux {
125 function = "uart";
126 groups = "uart0_0_tx_rx" ;
127 };
128 };
129
130 watchdog_pins: watchdog-pins {
131 mux {
132 function = "watchdog";
133 groups = "watchdog";
134 };
135 };
136 };
137
138 &eth {
139 pinctrl-names = "default";
140 pinctrl-0 = <&eth_pins>;
141 status = "okay";
142
143 gmac0: mac@0 {
144 compatible = "mediatek,eth-mac";
145 reg = <0>;
146
147 phy-connection-type = "2500base-x";
148
149 nvmem-cells = <&macaddr_factory_4>;
150 nvmem-cell-names = "mac-address";
151 mac-address-increment = <(-1)>;
152
153 fixed-link {
154 speed = <2500>;
155 full-duplex;
156 pause;
157 };
158 };
159
160 mdio-bus {
161 #address-cells = <1>;
162 #size-cells = <0>;
163
164 switch@0 {
165 compatible = "mediatek,mt7531";
166 reg = <0>;
167 interrupt-controller;
168 #interrupt-cells = <1>;
169 interrupt-parent = <&pio>;
170 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
171 reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
172
173 ports {
174 #address-cells = <1>;
175 #size-cells = <0>;
176
177 wan: port@1 {
178 reg = <1>;
179 label = "wan";
180 };
181
182 port@2 {
183 reg = <2>;
184 label = "lan1";
185 };
186
187 port@3 {
188 reg = <3>;
189 label = "lan2";
190 };
191
192 port@4 {
193 reg = <4>;
194 label = "lan3";
195 };
196
197 port@6 {
198 reg = <6>;
199 ethernet = <&gmac0>;
200 phy-mode = "2500base-x";
201
202 fixed-link {
203 speed = <2500>;
204 full-duplex;
205 pause;
206 };
207 };
208 };
209 };
210 };
211 };
212
213 &bch {
214 status = "okay";
215 };
216
217 &snfi {
218 pinctrl-names = "default";
219 pinctrl-0 = <&serial_nand_pins>;
220 status = "okay";
221
222 flash@0 {
223 compatible = "spi-nand";
224 reg = <0>;
225 spi-tx-bus-width = <4>;
226 spi-rx-bus-width = <4>;
227 nand-ecc-engine = <&snfi>;
228
229 mediatek,bmt-v2;
230 mediatek,bmt-table-size = <0x1000>;
231 mediatek,bmt-remap-range = <0x0 0x6c0000>;
232
233 partitions {
234 compatible = "fixed-partitions";
235 #address-cells = <1>;
236 #size-cells = <1>;
237
238 partition@0 {
239 label = "Preloader";
240 reg = <0x0 0x80000>;
241 read-only;
242 };
243
244 partition@80000 {
245 label = "ATF";
246 reg = <0x80000 0x40000>;
247 read-only;
248 };
249
250 partition@c0000 {
251 label = "u-boot";
252 reg = <0xc0000 0x80000>;
253 read-only;
254 };
255
256 partition@140000 {
257 label = "u-boot-env";
258 reg = <0x140000 0x40000>;
259 };
260
261 partition@180000 {
262 label = "bdata";
263 reg = <0x180000 0x40000>;
264 };
265
266 factory: partition@1c0000 {
267 label = "factory";
268 reg = <0x1c0000 0x80000>;
269 read-only;
270
271 compatible = "nvmem-cells";
272 #address-cells = <1>;
273 #size-cells = <1>;
274
275 macaddr_factory_4: macaddr@4 {
276 reg = <0x4 0x6>;
277 };
278 };
279
280 partition@240000 {
281 label = "crash";
282 reg = <0x240000 0x40000>;
283 read-only;
284 };
285
286 partition@280000 {
287 label = "crash_log";
288 reg = <0x280000 0x40000>;
289 read-only;
290 };
291
292 /* Shrunk and renamed from "firmware"
293 * as to not break luci size checks
294 */
295 partition@2c0000 {
296 label = "kernel";
297 reg = <0x2c0000 0x400000>;
298 };
299
300 /* ubi partition is the result of squashing
301 * consecutive stock partitions:
302 * - firmware (partially)
303 * - firmware1
304 * - overlay
305 * - obr
306 */
307 partition@6c0000 {
308 label = "ubi";
309 reg = <0x6C0000 0x6f00000>;
310 };
311 };
312 };
313 };
314
315 &pcie0 {
316 pinctrl-names = "default";
317 pinctrl-0 = <&pcie0_pins>;
318 status = "okay";
319 };
320
321 &slot0 {
322 status = "okay";
323
324 wifi@0,0 {
325 compatible = "mediatek,mt76";
326 reg = <0x0000 0 0 0 0>;
327 mediatek,mtd-eeprom = <&factory 0x5000>;
328 ieee80211-freq-limit = <5000000 6000000>;
329 mediatek,disable-radar-background;
330 };
331 };
332
333 &pwm {
334 pinctrl-names = "default";
335 pinctrl-0 = <&pwm7_pins>;
336 status = "okay";
337 };
338
339 &pwrap {
340 pinctrl-names = "default";
341 pinctrl-0 = <&pmic_bus_pins>;
342 status = "okay";
343 };
344
345 &rtc {
346 status = "disabled";
347 };
348
349 &uart0 {
350 pinctrl-names = "default";
351 pinctrl-0 = <&uart0_pins>;
352 status = "okay";
353 };
354
355 &watchdog {
356 pinctrl-names = "default";
357 pinctrl-0 = <&watchdog_pins>;
358 status = "okay";
359 };
360
361 &wmac {
362 status = "okay";
363
364 mediatek,mtd-eeprom = <&factory 0x0>;
365 };