target/linux/mediatek/dts/mt7622-elecom-wrc-x3200gst3.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/leds/common.h>
   7
   8 #include "mt7622.dtsi"
   9 #include "mt6380.dtsi"
  10
  11 / {
  12         model = "ELECOM WRC-X3200GST3";
  13         compatible = "elecom,wrc-x3200gst3", "mediatek,mt7622";
  14
  15         aliases {
  16                 serial0 = &uart0;
  17                 led-boot = &led_power_green;
  18                 led-failsafe = &led_power_red;
  19                 led-running = &led_power_green;
  20                 led-upgrade = &led_power_green;
  21                 label-mac-device = &wan;
  22         };
  23
  24         chosen {
  25                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
  26         };
  27
  28         memory {
  29                 reg = <0 0x40000000 0 0x1f000000>;
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34
  35                 led-0 {
  36                         label = "red:wps";
  37                         gpios = <&pio 47 GPIO_ACTIVE_HIGH>;
  38                         color = <LED_COLOR_ID_RED>;
  39                         function = LED_FUNCTION_WPS;
  40                 };
  41
  42                 led_power_red: led-1 {
  43                         label = "red:power";
  44                         gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
  45                         color = <LED_COLOR_ID_RED>;
  46                         function = LED_FUNCTION_POWER;
  47                         function-enumerator = <1>;
  48                 };
  49
  50                 led_power_green: led-2 {
  51                         label = "green:power";
  52                         gpios = <&pio 49 GPIO_ACTIVE_HIGH>;
  53                         color = <LED_COLOR_ID_GREEN>;
  54                         function = LED_FUNCTION_POWER;
  55                         function-enumerator = <2>;
  56                 };
  57
  58                 led-3 {
  59                         label = "blue:power";
  60                         gpios = <&pio 50 GPIO_ACTIVE_HIGH>;
  61                         color = <LED_COLOR_ID_BLUE>;
  62                         function = LED_FUNCTION_POWER;
  63                         function-enumerator = <3>;
  64                 };
  65
  66                 led-4 {
  67                         label = "white:wlan2g";
  68                         gpios = <&pio 85 GPIO_ACTIVE_HIGH>;
  69                         color = <LED_COLOR_ID_WHITE>;
  70                         function = LED_FUNCTION_WLAN;
  71                         function-enumerator = <1>;
  72                         linux,default-trigger = "phy0tpt";
  73                 };
  74
  75                 led-5 {
  76                         label = "white:wlan5g";
  77                         gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
  78                         color = <LED_COLOR_ID_WHITE>;
  79                         function = LED_FUNCTION_WLAN;
  80                         function-enumerator = <2>;
  81                         linux,default-trigger = "phy1radio";
  82                 };
  83         };
  84
  85         keys {
  86                 compatible = "gpio-keys";
  87
  88                 reset {
  89                         label = "reset";
  90                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  91                         linux,code = <KEY_RESTART>;
  92                 };
  93
  94                 ap {
  95                         label = "ap";
  96                         gpios = <&pio 42 GPIO_ACTIVE_LOW>;
  97                         linux,code = <BTN_0>;
  98                         linux,input-type = <EV_SW>;
  99                 };
 100
 101                 router {
 102                         label = "router";
 103                         gpios = <&pio 43 GPIO_ACTIVE_LOW>;
 104                         linux,code = <BTN_1>;
 105                         linux,input-type = <EV_SW>;
 106                 };
 107
 108                 wps {
 109                         label = "wps";
 110                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
 111                         linux,code = <KEY_WPS_BUTTON>;
 112                 };
 113         };
 114 };
 115
 116 &cpu0 {
 117         proc-supply = <&mt6380_vcpu_reg>;
 118         sram-supply = <&mt6380_vm_reg>;
 119 };
 120
 121 &cpu1 {
 122         proc-supply = <&mt6380_vcpu_reg>;
 123         sram-supply = <&mt6380_vm_reg>;
 124 };
 125
 126 &pio {
 127         eth_pins: eth-pins {
 128                 mux {
 129                         function = "eth";
 130                         groups = "mdc_mdio", "rgmii_via_gmac2";
 131                 };
 132         };
 133
 134         pcie0_pins: pcie0-pins {
 135                 mux {
 136                         function = "pcie";
 137                         groups = "pcie0_pad_perst",
 138                                  "pcie0_1_waken",
 139                                  "pcie0_1_clkreq";
 140                 };
 141         };
 142
 143         pmic_bus_pins: pmic-bus-pins {
 144                 mux {
 145                         function = "pmic";
 146                         groups = "pmic_bus";
 147                 };
 148         };
 149
 150         pwm7_pins: pwm1-2-pins {
 151                 mux {
 152                         function = "pwm";
 153                         groups = "pwm_ch7_2";
 154                 };
 155         };
 156
 157         /* Serial NAND is shared pin with SPI-NOR */
 158         serial_nand_pins: serial-nand-pins {
 159                 mux {
 160                         function = "flash";
 161                         groups = "snfi";
 162                 };
 163
 164                 conf-cmd-data {
 165                         pins = "SPI_WP", "SPI_HOLD", "SPI_MOSI",
 166                                "SPI_MISO", "SPI_CS";
 167                         drive-strength = <16>;
 168                         bias-pull-up;
 169                 };
 170
 171                 conf-clk {
 172                         pins = "SPI_CLK";
 173                         drive-strength = <16>;
 174                         bias-pull-down;
 175                 };
 176         };
 177
 178         uart0_pins: uart0-pins {
 179                 mux {
 180                         function = "uart";
 181                         groups = "uart0_0_tx_rx" ;
 182                 };
 183         };
 184
 185         watchdog_pins: watchdog-pins {
 186                 mux {
 187                         function = "watchdog";
 188                         groups = "watchdog";
 189                 };
 190         };
 191 };
 192
 193 &eth {
 194         pinctrl-names = "default";
 195         pinctrl-0 = <&eth_pins>;
 196         status = "okay";
 197
 198         gmac0: mac@0 {
 199                 compatible = "mediatek,eth-mac";
 200                 reg = <0>;
 201
 202                 phy-connection-type = "2500base-x";
 203
 204                 nvmem-cells = <&macaddr_factory_7fff4>;
 205                 nvmem-cell-names = "mac-address";
 206
 207                 fixed-link {
 208                         speed = <2500>;
 209                         full-duplex;
 210                         pause;
 211                 };
 212         };
 213
 214         mdio-bus {
 215                 #address-cells = <1>;
 216                 #size-cells = <0>;
 217
 218                 switch@0 {
 219                         compatible = "mediatek,mt7531";
 220                         reg = <0>;
 221                         interrupt-controller;
 222                         #interrupt-cells = <1>;
 223                         interrupt-parent = <&pio>;
 224                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 225                         reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
 226
 227                         ports {
 228                                 #address-cells = <1>;
 229                                 #size-cells = <0>;
 230
 231                                 wan: port@0 {
 232                                         reg = <0>;
 233                                         label = "wan";
 234
 235                                         nvmem-cells = <&macaddr_factory_7fffa>;
 236                                         nvmem-cell-names = "mac-address";
 237                                 };
 238
 239                                 port@1 {
 240                                         reg = <1>;
 241                                         label = "lan4";
 242                                 };
 243
 244                                 port@2 {
 245                                         reg = <2>;
 246                                         label = "lan3";
 247                                 };
 248
 249                                 port@3 {
 250                                         reg = <3>;
 251                                         label = "lan2";
 252                                 };
 253
 254                                 port@4 {
 255                                         reg = <4>;
 256                                         label = "lan1";
 257                                 };
 258
 259                                 port@6 {
 260                                         reg = <6>;
 261                                         ethernet = <&gmac0>;
 262                                         phy-mode = "2500base-x";
 263
 264                                         fixed-link {
 265                                                 speed = <2500>;
 266                                                 full-duplex;
 267                                                 pause;
 268                                         };
 269                                 };
 270                         };
 271                 };
 272         };
 273 };
 274
 275 &bch {
 276         status = "okay";
 277 };
 278
 279 &snfi {
 280         pinctrl-names = "default";
 281         pinctrl-0 = <&serial_nand_pins>;
 282         status = "okay";
 283
 284         flash@0 {
 285                 compatible = "spi-nand";
 286                 reg = <0>;
 287                 spi-tx-bus-width = <4>;
 288                 spi-rx-bus-width = <4>;
 289                 nand-ecc-engine = <&snfi>;
 290                 mediatek,bmt-v2;
 291                 mediatek,bmt-table-size = <0x1000>;
 292                 mediatek,bmt-remap-range = <0x0 0x8c0000>,
 293                                            <0x1bc0000 0x30c0000>;
 294
 295                 partitions {
 296                         compatible = "fixed-partitions";
 297                         #address-cells = <1>;
 298                         #size-cells = <1>;
 299
 300                         partition@0 {
 301                                 label = "Preloader";
 302                                 reg = <0x0 0x80000>;
 303                                 read-only;
 304                         };
 305
 306                         partition@80000 {
 307                                 label = "ATF";
 308                                 reg = <0x80000 0x40000>;
 309                                 read-only;
 310                         };
 311
 312                         partition@c0000 {
 313                                 label = "u-boot";
 314                                 reg = <0xc0000 0x80000>;
 315                                 read-only;
 316                         };
 317
 318                         partition@140000 {
 319                                 label = "u-boot-env";
 320                                 reg = <0x140000 0x80000>;
 321                                 read-only;
 322                         };
 323
 324                         factory: partition@1c0000 {
 325                                 label = "factory";
 326                                 reg = <0x1c0000 0x100000>;
 327                                 read-only;
 328
 329                                 compatible = "nvmem-cells";
 330                                 #address-cells = <1>;
 331                                 #size-cells = <1>;
 332
 333                                 macaddr_factory_4: macaddr@4 {
 334                                         reg = <0x4 0x6>;
 335                                 };
 336
 337                                 macaddr_factory_7fff4: macaddr@7fff4 {
 338                                         reg = <0x7fff4 0x6>;
 339                                 };
 340
 341                                 macaddr_factory_7fffa: macaddr@7fffa {
 342                                         reg = <0x7fffa 0x6>;
 343                                 };
 344                         };
 345
 346                         partition@2c0000 {
 347                                 label = "kernel";
 348                                 reg = <0x2c0000 0x600000>;
 349                         };
 350
 351                         partition@8c0000 {
 352                                 label = "ubi";
 353                                 reg = <0x8c0000 0x1300000>;
 354                         };
 355
 356                         partition@1bc0000 {
 357                                 label = "tm_pattern";
 358                                 reg = <0x1bc0000 0x500000>;
 359                                 read-only;
 360                         };
 361
 362                         partition@20c0000 {
 363                                 label = "tm_key";
 364                                 reg = <0x20c0000 0x100000>;
 365                                 read-only;
 366                         };
 367
 368                         partition@21c0000 {
 369                                 label = "user_data";
 370                                 reg = <0x21c0000 0xf00000>;
 371                                 read-only;
 372                         };
 373
 374                         partition@30c0000 {
 375                                 label = "reserved";
 376                                 reg = <0x30c0000 0x4f40000>;
 377                                 read-only;
 378                         };
 379                 };
 380         };
 381 };
 382
 383 &pcie0 {
 384         pinctrl-names = "default";
 385         pinctrl-0 = <&pcie0_pins>;
 386         status = "okay";
 387 };
 388
 389 &slot0 {
 390         status = "okay";
 391
 392         wifi@0,0 {
 393                 compatible = "mediatek,mt76";
 394                 reg = <0x0000 0 0 0 0>;
 395                 mediatek,mtd-eeprom = <&factory 0x5000>;
 396                 ieee80211-freq-limit = <5000000 6000000>;
 397                 nvmem-cells = <&macaddr_factory_4>;
 398                 nvmem-cell-names = "mac-address";
 399                 mac-address-increment = <1>;
 400         };
 401 };
 402
 403 &pwm {
 404         pinctrl-names = "default";
 405         pinctrl-0 = <&pwm7_pins>;
 406         status = "okay";
 407 };
 408
 409 &pwrap {
 410         pinctrl-names = "default";
 411         pinctrl-0 = <&pmic_bus_pins>;
 412         status = "okay";
 413 };
 414
 415 &rtc {
 416         status = "disabled";
 417 };
 418
 419 &uart0 {
 420         pinctrl-names = "default";
 421         pinctrl-0 = <&uart0_pins>;
 422         status = "okay";
 423 };
 424
 425 &watchdog {
 426         pinctrl-names = "default";
 427         pinctrl-0 = <&watchdog_pins>;
 428         status = "okay";
 429 };
 430
 431 &wmac {
 432         status = "okay";
 433
 434         mediatek,mtd-eeprom = <&factory 0x0>;
 435 };