target/linux/bmips/patches-5.10/407-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch

   1 From a212dcb2f04ae42f35ec11122a2532b1bcf8a94f Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
   3 Date: Fri, 24 Jun 2016 22:18:25 +0200
   4 Subject: [PATCH 08/12] pinctrl: add a pincontrol driver for BCM6368
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
  10 GPIOs onto alternative functions. Not all are documented.
  11
  12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  13 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  14 ---
  15  drivers/pinctrl/bcm/Kconfig           |  11 +
  16  drivers/pinctrl/bcm/Makefile          |   1 +
  17  drivers/pinctrl/bcm/pinctrl-bcm6368.c | 679 ++++++++++++++++++++++++++
  18  3 files changed, 691 insertions(+)
  19  create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6368.c
  20
  21 --- a/drivers/pinctrl/bcm/Kconfig
  22 +++ b/drivers/pinctrl/bcm/Kconfig
  23 @@ -62,6 +62,17 @@ config PINCTRL_BCM6362
  24         help
  25            Say Y here to enable the Broadcom BCM6362 GPIO driver.
  26
  27 +config PINCTRL_BCM6368
  28 +       bool "Broadcom BCM6368 GPIO driver"
  29 +       depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
  30 +       select PINMUX
  31 +       select PINCONF
  32 +       select GENERIC_PINCONF
  33 +       select MFD_SYSCON
  34 +       default BMIPS_GENERIC
  35 +       help
  36 +          Say Y here to enable the Broadcom BCM6368 GPIO driver.
  37 +
  38  config PINCTRL_IPROC_GPIO
  39         bool "Broadcom iProc GPIO (with PINCONF) driver"
  40         depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
  41 --- a/drivers/pinctrl/bcm/Makefile
  42 +++ b/drivers/pinctrl/bcm/Makefile
  43 @@ -6,6 +6,7 @@ obj-$(CONFIG_PINCTRL_BCM2835)           += pinctr
  44  obj-$(CONFIG_PINCTRL_BCM6328)          += pinctrl-bcm6328.o
  45  obj-$(CONFIG_PINCTRL_BCM6358)          += pinctrl-bcm6358.o
  46  obj-$(CONFIG_PINCTRL_BCM6362)          += pinctrl-bcm6362.o
  47 +obj-$(CONFIG_PINCTRL_BCM6368)          += pinctrl-bcm6368.o
  48  obj-$(CONFIG_PINCTRL_IPROC_GPIO)       += pinctrl-iproc-gpio.o
  49  obj-$(CONFIG_PINCTRL_CYGNUS_MUX)       += pinctrl-cygnus-mux.o
  50  obj-$(CONFIG_PINCTRL_NS)               += pinctrl-ns.o
  51 --- /dev/null
  52 +++ b/drivers/pinctrl/bcm/pinctrl-bcm6368.c
  53 @@ -0,0 +1,679 @@
  54 +// SPDX-License-Identifier: GPL-2.0+
  55 +/*
  56 + * Driver for BCM6368 GPIO unit (pinctrl + GPIO)
  57 + *
  58 + * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
  59 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
  60 + */
  61 +
  62 +#include <linux/bitops.h>
  63 +#include <linux/gpio.h>
  64 +#include <linux/kernel.h>
  65 +#include <linux/mfd/syscon.h>
  66 +#include <linux/of.h>
  67 +#include <linux/of_gpio.h>
  68 +#include <linux/of_irq.h>
  69 +#include <linux/platform_device.h>
  70 +#include <linux/regmap.h>
  71 +
  72 +#include <linux/pinctrl/machine.h>
  73 +#include <linux/pinctrl/pinconf.h>
  74 +#include <linux/pinctrl/pinconf-generic.h>
  75 +#include <linux/pinctrl/pinmux.h>
  76 +
  77 +#include "../core.h"
  78 +#include "../pinctrl-utils.h"
  79 +
  80 +#define MODULE_NAME            "bcm6368-pinctrl"
  81 +#define BCM6368_NUM_GPIOS      38
  82 +
  83 +#define BANK_SIZE              sizeof(uint32_t)
  84 +#define PINS_PER_BANK          (BANK_SIZE * BITS_PER_BYTE)
  85 +
  86 +#define BCM6368_DIROUT_REG     0x04
  87 +#define BCM6368_DATA_REG       0x0c
  88 +#define BCM6368_MODE_REG       0x18
  89 +#define BCM6368_BASEMODE_REG   0x38
  90 +#define  BCM6368_BASEMODE_MASK 0x7
  91 +#define  BCM6368_BASEMODE_GPIO 0x0
  92 +#define  BCM6368_BASEMODE_UART1        0x1
  93 +
  94 +struct bcm6368_pingroup {
  95 +       const char *name;
  96 +       const unsigned * const pins;
  97 +       const unsigned num_pins;
  98 +};
  99 +
 100 +struct bcm6368_function {
 101 +       const char *name;
 102 +       const char * const *groups;
 103 +       const unsigned num_groups;
 104 +
 105 +       unsigned dir_out:16;
 106 +       unsigned basemode:3;
 107 +};
 108 +
 109 +struct bcm6368_pinctrl {
 110 +       struct device *dev;
 111 +       struct regmap *regs;
 112 +       struct regmap_field *overlays;
 113 +
 114 +       struct pinctrl_dev *pctl_dev;
 115 +       struct gpio_chip gpio_chip;
 116 +       struct pinctrl_desc pctl_desc;
 117 +       struct pinctrl_gpio_range gpio_range;
 118 +};
 119 +
 120 +#define BCM6368_BASEMODE_PIN(a, b)             \
 121 +       {                                       \
 122 +               .number = a,                    \
 123 +               .name = b,                      \
 124 +               .drv_data = (void *)true        \
 125 +       }
 126 +
 127 +static const struct pinctrl_pin_desc bcm6368_pins[] = {
 128 +       PINCTRL_PIN(0, "gpio0"),
 129 +       PINCTRL_PIN(1, "gpio1"),
 130 +       PINCTRL_PIN(2, "gpio2"),
 131 +       PINCTRL_PIN(3, "gpio3"),
 132 +       PINCTRL_PIN(4, "gpio4"),
 133 +       PINCTRL_PIN(5, "gpio5"),
 134 +       PINCTRL_PIN(6, "gpio6"),
 135 +       PINCTRL_PIN(7, "gpio7"),
 136 +       PINCTRL_PIN(8, "gpio8"),
 137 +       PINCTRL_PIN(9, "gpio9"),
 138 +       PINCTRL_PIN(10, "gpio10"),
 139 +       PINCTRL_PIN(11, "gpio11"),
 140 +       PINCTRL_PIN(12, "gpio12"),
 141 +       PINCTRL_PIN(13, "gpio13"),
 142 +       PINCTRL_PIN(14, "gpio14"),
 143 +       PINCTRL_PIN(15, "gpio15"),
 144 +       PINCTRL_PIN(16, "gpio16"),
 145 +       PINCTRL_PIN(17, "gpio17"),
 146 +       PINCTRL_PIN(18, "gpio18"),
 147 +       PINCTRL_PIN(19, "gpio19"),
 148 +       PINCTRL_PIN(20, "gpio20"),
 149 +       PINCTRL_PIN(21, "gpio21"),
 150 +       PINCTRL_PIN(22, "gpio22"),
 151 +       PINCTRL_PIN(23, "gpio23"),
 152 +       PINCTRL_PIN(24, "gpio24"),
 153 +       PINCTRL_PIN(25, "gpio25"),
 154 +       PINCTRL_PIN(26, "gpio26"),
 155 +       PINCTRL_PIN(27, "gpio27"),
 156 +       PINCTRL_PIN(28, "gpio28"),
 157 +       PINCTRL_PIN(29, "gpio29"),
 158 +       BCM6368_BASEMODE_PIN(30, "gpio30"),
 159 +       BCM6368_BASEMODE_PIN(31, "gpio31"),
 160 +       BCM6368_BASEMODE_PIN(32, "gpio32"),
 161 +       BCM6368_BASEMODE_PIN(33, "gpio33"),
 162 +       PINCTRL_PIN(34, "gpio34"),
 163 +       PINCTRL_PIN(35, "gpio35"),
 164 +       PINCTRL_PIN(36, "gpio36"),
 165 +       PINCTRL_PIN(37, "gpio37"),
 166 +};
 167 +
 168 +static unsigned gpio0_pins[] = { 0 };
 169 +static unsigned gpio1_pins[] = { 1 };
 170 +static unsigned gpio2_pins[] = { 2 };
 171 +static unsigned gpio3_pins[] = { 3 };
 172 +static unsigned gpio4_pins[] = { 4 };
 173 +static unsigned gpio5_pins[] = { 5 };
 174 +static unsigned gpio6_pins[] = { 6 };
 175 +static unsigned gpio7_pins[] = { 7 };
 176 +static unsigned gpio8_pins[] = { 8 };
 177 +static unsigned gpio9_pins[] = { 9 };
 178 +static unsigned gpio10_pins[] = { 10 };
 179 +static unsigned gpio11_pins[] = { 11 };
 180 +static unsigned gpio12_pins[] = { 12 };
 181 +static unsigned gpio13_pins[] = { 13 };
 182 +static unsigned gpio14_pins[] = { 14 };
 183 +static unsigned gpio15_pins[] = { 15 };
 184 +static unsigned gpio16_pins[] = { 16 };
 185 +static unsigned gpio17_pins[] = { 17 };
 186 +static unsigned gpio18_pins[] = { 18 };
 187 +static unsigned gpio19_pins[] = { 19 };
 188 +static unsigned gpio20_pins[] = { 20 };
 189 +static unsigned gpio21_pins[] = { 21 };
 190 +static unsigned gpio22_pins[] = { 22 };
 191 +static unsigned gpio23_pins[] = { 23 };
 192 +static unsigned gpio24_pins[] = { 24 };
 193 +static unsigned gpio25_pins[] = { 25 };
 194 +static unsigned gpio26_pins[] = { 26 };
 195 +static unsigned gpio27_pins[] = { 27 };
 196 +static unsigned gpio28_pins[] = { 28 };
 197 +static unsigned gpio29_pins[] = { 29 };
 198 +static unsigned gpio30_pins[] = { 30 };
 199 +static unsigned gpio31_pins[] = { 31 };
 200 +static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
 201 +
 202 +#define BCM6368_GROUP(n)                               \
 203 +       {                                               \
 204 +               .name = #n,                             \
 205 +               .pins = n##_pins,                       \
 206 +               .num_pins = ARRAY_SIZE(n##_pins),       \
 207 +       }
 208 +
 209 +static struct bcm6368_pingroup bcm6368_groups[] = {
 210 +       BCM6368_GROUP(gpio0),
 211 +       BCM6368_GROUP(gpio1),
 212 +       BCM6368_GROUP(gpio2),
 213 +       BCM6368_GROUP(gpio3),
 214 +       BCM6368_GROUP(gpio4),
 215 +       BCM6368_GROUP(gpio5),
 216 +       BCM6368_GROUP(gpio6),
 217 +       BCM6368_GROUP(gpio7),
 218 +       BCM6368_GROUP(gpio8),
 219 +       BCM6368_GROUP(gpio9),
 220 +       BCM6368_GROUP(gpio10),
 221 +       BCM6368_GROUP(gpio11),
 222 +       BCM6368_GROUP(gpio12),
 223 +       BCM6368_GROUP(gpio13),
 224 +       BCM6368_GROUP(gpio14),
 225 +       BCM6368_GROUP(gpio15),
 226 +       BCM6368_GROUP(gpio16),
 227 +       BCM6368_GROUP(gpio17),
 228 +       BCM6368_GROUP(gpio18),
 229 +       BCM6368_GROUP(gpio19),
 230 +       BCM6368_GROUP(gpio20),
 231 +       BCM6368_GROUP(gpio21),
 232 +       BCM6368_GROUP(gpio22),
 233 +       BCM6368_GROUP(gpio23),
 234 +       BCM6368_GROUP(gpio24),
 235 +       BCM6368_GROUP(gpio25),
 236 +       BCM6368_GROUP(gpio26),
 237 +       BCM6368_GROUP(gpio27),
 238 +       BCM6368_GROUP(gpio28),
 239 +       BCM6368_GROUP(gpio29),
 240 +       BCM6368_GROUP(gpio30),
 241 +       BCM6368_GROUP(gpio31),
 242 +       BCM6368_GROUP(uart1_grp),
 243 +};
 244 +
 245 +static const char * const analog_afe_0_groups[] = {
 246 +       "gpio0",
 247 +};
 248 +
 249 +static const char * const analog_afe_1_groups[] = {
 250 +       "gpio1",
 251 +};
 252 +
 253 +static const char * const sys_irq_groups[] = {
 254 +       "gpio2",
 255 +};
 256 +
 257 +static const char * const serial_led_data_groups[] = {
 258 +       "gpio3",
 259 +};
 260 +
 261 +static const char * const serial_led_clk_groups[] = {
 262 +       "gpio4",
 263 +};
 264 +
 265 +static const char * const inet_led_groups[] = {
 266 +       "gpio5",
 267 +};
 268 +
 269 +static const char * const ephy0_led_groups[] = {
 270 +       "gpio6",
 271 +};
 272 +
 273 +static const char * const ephy1_led_groups[] = {
 274 +       "gpio7",
 275 +};
 276 +
 277 +static const char * const ephy2_led_groups[] = {
 278 +       "gpio8",
 279 +};
 280 +
 281 +static const char * const ephy3_led_groups[] = {
 282 +       "gpio9",
 283 +};
 284 +
 285 +static const char * const robosw_led_data_groups[] = {
 286 +       "gpio10",
 287 +};
 288 +
 289 +static const char * const robosw_led_clk_groups[] = {
 290 +       "gpio11",
 291 +};
 292 +
 293 +static const char * const robosw_led0_groups[] = {
 294 +       "gpio12",
 295 +};
 296 +
 297 +static const char * const robosw_led1_groups[] = {
 298 +       "gpio13",
 299 +};
 300 +
 301 +static const char * const usb_device_led_groups[] = {
 302 +       "gpio14",
 303 +};
 304 +
 305 +static const char * const pci_req1_groups[] = {
 306 +       "gpio16",
 307 +};
 308 +
 309 +static const char * const pci_gnt1_groups[] = {
 310 +       "gpio17",
 311 +};
 312 +
 313 +static const char * const pci_intb_groups[] = {
 314 +       "gpio18",
 315 +};
 316 +
 317 +static const char * const pci_req0_groups[] = {
 318 +       "gpio19",
 319 +};
 320 +
 321 +static const char * const pci_gnt0_groups[] = {
 322 +       "gpio20",
 323 +};
 324 +
 325 +static const char * const pcmcia_cd1_groups[] = {
 326 +       "gpio22",
 327 +};
 328 +
 329 +static const char * const pcmcia_cd2_groups[] = {
 330 +       "gpio23",
 331 +};
 332 +
 333 +static const char * const pcmcia_vs1_groups[] = {
 334 +       "gpio24",
 335 +};
 336 +
 337 +static const char * const pcmcia_vs2_groups[] = {
 338 +       "gpio25",
 339 +};
 340 +
 341 +static const char * const ebi_cs2_groups[] = {
 342 +       "gpio26",
 343 +};
 344 +
 345 +static const char * const ebi_cs3_groups[] = {
 346 +       "gpio27",
 347 +};
 348 +
 349 +static const char * const spi_cs2_groups[] = {
 350 +       "gpio28",
 351 +};
 352 +
 353 +static const char * const spi_cs3_groups[] = {
 354 +       "gpio29",
 355 +};
 356 +
 357 +static const char * const spi_cs4_groups[] = {
 358 +       "gpio30",
 359 +};
 360 +
 361 +static const char * const spi_cs5_groups[] = {
 362 +       "gpio31",
 363 +};
 364 +
 365 +static const char * const uart1_groups[] = {
 366 +       "uart1_grp",
 367 +};
 368 +
 369 +#define BCM6368_FUN(n, out)                            \
 370 +       {                                               \
 371 +               .name = #n,                             \
 372 +               .groups = n##_groups,                   \
 373 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 374 +               .dir_out = out,                         \
 375 +       }
 376 +
 377 +#define BCM6368_BASEMODE_FUN(n, val, out)              \
 378 +       {                                               \
 379 +               .name = #n,                             \
 380 +               .groups = n##_groups,                   \
 381 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 382 +               .basemode = BCM6368_BASEMODE_##val,     \
 383 +               .dir_out = out,                         \
 384 +       }
 385 +
 386 +static const struct bcm6368_function bcm6368_funcs[] = {
 387 +       BCM6368_FUN(analog_afe_0, 1),
 388 +       BCM6368_FUN(analog_afe_1, 1),
 389 +       BCM6368_FUN(sys_irq, 1),
 390 +       BCM6368_FUN(serial_led_data, 1),
 391 +       BCM6368_FUN(serial_led_clk, 1),
 392 +       BCM6368_FUN(inet_led, 1),
 393 +       BCM6368_FUN(ephy0_led, 1),
 394 +       BCM6368_FUN(ephy1_led, 1),
 395 +       BCM6368_FUN(ephy2_led, 1),
 396 +       BCM6368_FUN(ephy3_led, 1),
 397 +       BCM6368_FUN(robosw_led_data, 1),
 398 +       BCM6368_FUN(robosw_led_clk, 1),
 399 +       BCM6368_FUN(robosw_led0, 1),
 400 +       BCM6368_FUN(robosw_led1, 1),
 401 +       BCM6368_FUN(usb_device_led, 1),
 402 +       BCM6368_FUN(pci_req1, 0),
 403 +       BCM6368_FUN(pci_gnt1, 0),
 404 +       BCM6368_FUN(pci_intb, 0),
 405 +       BCM6368_FUN(pci_req0, 0),
 406 +       BCM6368_FUN(pci_gnt0, 0),
 407 +       BCM6368_FUN(pcmcia_cd1, 0),
 408 +       BCM6368_FUN(pcmcia_cd2, 0),
 409 +       BCM6368_FUN(pcmcia_vs1, 0),
 410 +       BCM6368_FUN(pcmcia_vs2, 0),
 411 +       BCM6368_FUN(ebi_cs2, 1),
 412 +       BCM6368_FUN(ebi_cs3, 1),
 413 +       BCM6368_FUN(spi_cs2, 1),
 414 +       BCM6368_FUN(spi_cs3, 1),
 415 +       BCM6368_FUN(spi_cs4, 1),
 416 +       BCM6368_FUN(spi_cs5, 1),
 417 +       BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
 418 +};
 419 +
 420 +static inline unsigned int bcm6368_bank_pin(unsigned int pin)
 421 +{
 422 +       return pin % PINS_PER_BANK;
 423 +}
 424 +
 425 +static inline unsigned int bcm6368_reg_off(unsigned int reg, unsigned int pin)
 426 +{
 427 +       return reg - (pin / PINS_PER_BANK) * BANK_SIZE;
 428 +}
 429 +
 430 +static int bcm6368_gpio_direction_input(struct gpio_chip *chip,
 431 +                                       unsigned int pin)
 432 +{
 433 +       struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
 434 +       unsigned int dirout = bcm6368_reg_off(BCM6368_DIROUT_REG, pin);
 435 +       unsigned int bank_pin = bcm6368_bank_pin(pin);
 436 +       int ret;
 437 +
 438 +       /*
 439 +        * Check with the pinctrl driver whether this pin is usable as
 440 +        * an input GPIO
 441 +        */
 442 +       ret = pinctrl_gpio_direction_input(chip->base + pin);
 443 +       if (ret)
 444 +               return ret;
 445 +
 446 +       regmap_update_bits(pc->regs, dirout, BIT(bank_pin), 0);
 447 +
 448 +       return 0;
 449 +}
 450 +
 451 +static int bcm6368_gpio_direction_output(struct gpio_chip *chip,
 452 +                                        unsigned int pin, int value)
 453 +{
 454 +       struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
 455 +       unsigned int data = bcm6368_reg_off(BCM6368_DATA_REG, pin);
 456 +       unsigned int dirout = bcm6368_reg_off(BCM6368_DIROUT_REG, pin);
 457 +       unsigned int bank_pin = bcm6368_bank_pin(pin);
 458 +       unsigned int val = value ? BIT(bank_pin) : 0;
 459 +       int ret;
 460 +
 461 +       /*
 462 +        * Check with the pinctrl driver whether this pin is usable as
 463 +        * an output GPIO
 464 +        */
 465 +       ret = pinctrl_gpio_direction_output(chip->base + pin);
 466 +       if (ret)
 467 +               return ret;
 468 +
 469 +       regmap_update_bits(pc->regs, dirout, BIT(bank_pin), BIT(bank_pin));
 470 +       regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
 471 +
 472 +       return 0;
 473 +}
 474 +
 475 +static int bcm6368_gpio_get(struct gpio_chip *chip, unsigned int pin)
 476 +{
 477 +       struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
 478 +       unsigned int data = bcm6368_reg_off(BCM6368_DATA_REG, pin);
 479 +       unsigned int bank_pin = bcm6368_bank_pin(pin);
 480 +       unsigned int val;
 481 +
 482 +       regmap_read(pc->regs, data, &val);
 483 +
 484 +       return !!(val & BIT(bank_pin));
 485 +}
 486 +
 487 +static int bcm6368_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
 488 +{
 489 +       struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
 490 +       unsigned int dirout = bcm6368_reg_off(BCM6368_DIROUT_REG, pin);
 491 +       unsigned int bank_pin = bcm6368_bank_pin(pin);
 492 +       unsigned int val;
 493 +
 494 +       regmap_read(pc->regs, dirout, &val);
 495 +
 496 +       if (val & BIT(bank_pin))
 497 +               return GPIO_LINE_DIRECTION_OUT;
 498 +
 499 +       return GPIO_LINE_DIRECTION_IN;
 500 +}
 501 +
 502 +static void bcm6368_gpio_set(struct gpio_chip *chip, unsigned int pin,
 503 +                            int value)
 504 +{
 505 +       struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
 506 +       unsigned int data = bcm6368_reg_off(BCM6368_DATA_REG, pin);
 507 +       unsigned int bank_pin = bcm6368_bank_pin(pin);
 508 +       unsigned int val = value ? BIT(bank_pin) : 0;
 509 +
 510 +       regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
 511 +}
 512 +
 513 +static int bcm6368_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 514 +{
 515 +       char irq_name[7];
 516 +
 517 +       sprintf(irq_name, "gpio%d", gpio);
 518 +
 519 +       return of_irq_get_byname(chip->of_node, irq_name);
 520 +}
 521 +
 522 +static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 523 +{
 524 +       return ARRAY_SIZE(bcm6368_groups);
 525 +}
 526 +
 527 +static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 528 +                                                 unsigned group)
 529 +{
 530 +       return bcm6368_groups[group].name;
 531 +}
 532 +
 533 +static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 534 +                                         unsigned group, const unsigned **pins,
 535 +                                         unsigned *num_pins)
 536 +{
 537 +       *pins = bcm6368_groups[group].pins;
 538 +       *num_pins = bcm6368_groups[group].num_pins;
 539 +
 540 +       return 0;
 541 +}
 542 +
 543 +static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
 544 +{
 545 +       return ARRAY_SIZE(bcm6368_funcs);
 546 +}
 547 +
 548 +static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 549 +                                                unsigned selector)
 550 +{
 551 +       return bcm6368_funcs[selector].name;
 552 +}
 553 +
 554 +static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
 555 +                                     unsigned selector,
 556 +                                     const char * const **groups,
 557 +                                     unsigned * const num_groups)
 558 +{
 559 +       *groups = bcm6368_funcs[selector].groups;
 560 +       *num_groups = bcm6368_funcs[selector].num_groups;
 561 +
 562 +       return 0;
 563 +}
 564 +
 565 +static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 566 +                                  unsigned selector, unsigned group)
 567 +{
 568 +       struct bcm6368_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 569 +       const struct bcm6368_pingroup *pg = &bcm6368_groups[group];
 570 +       const struct bcm6368_function *fun = &bcm6368_funcs[selector];
 571 +       int i, pin;
 572 +
 573 +       if (fun->basemode) {
 574 +               unsigned int mask = 0;
 575 +
 576 +               for (i = 0; i < pg->num_pins; i++) {
 577 +                       pin = pg->pins[i];
 578 +                       if (pin < PINS_PER_BANK)
 579 +                               mask |= BIT(pin);
 580 +               }
 581 +
 582 +               regmap_update_bits(pc->regs, BCM6368_MODE_REG, mask, 0);
 583 +               regmap_field_write(pc->overlays, fun->basemode);
 584 +       } else {
 585 +               pin = pg->pins[0];
 586 +
 587 +               if (bcm6368_pins[pin].drv_data)
 588 +                       regmap_field_write(pc->overlays,
 589 +                                          BCM6368_BASEMODE_GPIO);
 590 +
 591 +               regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(pin),
 592 +                                  BIT(pin));
 593 +       }
 594 +
 595 +       for (pin = 0; pin < pg->num_pins; pin++) {
 596 +               int hw_gpio = bcm6368_pins[pin].number;
 597 +               struct gpio_chip *gc = &pc->gpio_chip;
 598 +
 599 +               if (fun->dir_out & BIT(pin))
 600 +                       gc->direction_output(gc, hw_gpio, 0);
 601 +               else
 602 +                       gc->direction_input(gc, hw_gpio);
 603 +       }
 604 +
 605 +       return 0;
 606 +}
 607 +
 608 +static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
 609 +                                      struct pinctrl_gpio_range *range,
 610 +                                      unsigned offset)
 611 +{
 612 +       struct bcm6368_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 613 +
 614 +       if (offset >= PINS_PER_BANK && !bcm6368_pins[offset].drv_data)
 615 +               return 0;
 616 +
 617 +       /* disable all functions using this pin */
 618 +       if (offset < PINS_PER_BANK)
 619 +               regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(offset), 0);
 620 +
 621 +       if (bcm6368_pins[offset].drv_data)
 622 +               regmap_field_write(pc->overlays, BCM6368_BASEMODE_GPIO);
 623 +
 624 +       return 0;
 625 +}
 626 +
 627 +static struct pinctrl_ops bcm6368_pctl_ops = {
 628 +       .get_groups_count = bcm6368_pinctrl_get_group_count,
 629 +       .get_group_name = bcm6368_pinctrl_get_group_name,
 630 +       .get_group_pins = bcm6368_pinctrl_get_group_pins,
 631 +       .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
 632 +       .dt_free_map = pinctrl_utils_free_map,
 633 +};
 634 +
 635 +static struct pinmux_ops bcm6368_pmx_ops = {
 636 +       .get_functions_count = bcm6368_pinctrl_get_func_count,
 637 +       .get_function_name = bcm6368_pinctrl_get_func_name,
 638 +       .get_function_groups = bcm6368_pinctrl_get_groups,
 639 +       .set_mux = bcm6368_pinctrl_set_mux,
 640 +       .gpio_request_enable = bcm6368_gpio_request_enable,
 641 +       .strict = true,
 642 +};
 643 +
 644 +static int bcm6368_pinctrl_probe(struct platform_device *pdev)
 645 +{
 646 +       struct reg_field overlays = REG_FIELD(BCM6368_BASEMODE_REG, 0, 15);
 647 +       struct device *dev = &pdev->dev;
 648 +       struct device_node *np = dev->of_node;
 649 +       struct bcm6368_pinctrl *pc;
 650 +       int err;
 651 +
 652 +       pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
 653 +       if (!pc)
 654 +               return -ENOMEM;
 655 +
 656 +       platform_set_drvdata(pdev, pc);
 657 +       pc->dev = dev;
 658 +
 659 +       pc->regs = syscon_node_to_regmap(dev->parent->of_node);
 660 +       if (IS_ERR(pc->regs))
 661 +               return PTR_ERR(pc->regs);
 662 +
 663 +       pc->overlays = devm_regmap_field_alloc(&pdev->dev, pc->regs, overlays);
 664 +       if (IS_ERR(pc->overlays))
 665 +               return PTR_ERR(pc->overlays);
 666 +
 667 +       /* disable all muxes by default */
 668 +       regmap_field_write(pc->overlays, 0);
 669 +
 670 +       pc->gpio_chip.label = MODULE_NAME;
 671 +       pc->gpio_chip.owner = THIS_MODULE;
 672 +       pc->gpio_chip.request = gpiochip_generic_request;
 673 +       pc->gpio_chip.free = gpiochip_generic_free;
 674 +       pc->gpio_chip.direction_input = bcm6368_gpio_direction_input;
 675 +       pc->gpio_chip.direction_output = bcm6368_gpio_direction_output;
 676 +       pc->gpio_chip.get_direction = bcm6368_gpio_get_direction;
 677 +       pc->gpio_chip.get = bcm6368_gpio_get;
 678 +       pc->gpio_chip.set = bcm6368_gpio_set;
 679 +       pc->gpio_chip.set_config = gpiochip_generic_config;
 680 +       pc->gpio_chip.base = -1;
 681 +       pc->gpio_chip.ngpio = BCM6368_NUM_GPIOS;
 682 +       pc->gpio_chip.can_sleep = false;
 683 +       pc->gpio_chip.parent = dev;
 684 +       pc->gpio_chip.of_node = np;
 685 +
 686 +       if (of_get_property(np, "interrupt-names", NULL))
 687 +               pc->gpio_chip.to_irq = bcm6368_gpio_to_irq;
 688 +
 689 +       err = gpiochip_add_data(&pc->gpio_chip, pc);
 690 +       if (err) {
 691 +               dev_err(dev, "could not add GPIO chip\n");
 692 +               return err;
 693 +       }
 694 +
 695 +       pc->pctl_desc.name = MODULE_NAME,
 696 +       pc->pctl_desc.pins = bcm6368_pins,
 697 +       pc->pctl_desc.npins = ARRAY_SIZE(bcm6368_pins),
 698 +       pc->pctl_desc.pctlops = &bcm6368_pctl_ops,
 699 +       pc->pctl_desc.pmxops = &bcm6368_pmx_ops,
 700 +       pc->pctl_desc.owner = THIS_MODULE,
 701 +
 702 +       pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
 703 +       if (IS_ERR(pc->pctl_dev)) {
 704 +               gpiochip_remove(&pc->gpio_chip);
 705 +               return PTR_ERR(pc->pctl_dev);
 706 +       }
 707 +
 708 +       pc->gpio_range.name = MODULE_NAME;
 709 +       pc->gpio_range.npins = BCM6368_NUM_GPIOS;
 710 +       pc->gpio_range.base = pc->gpio_chip.base;
 711 +       pc->gpio_range.gc = &pc->gpio_chip;
 712 +       pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
 713 +
 714 +       dev_info(dev, "registered\n");
 715 +
 716 +       return 0;
 717 +}
 718 +
 719 +static const struct of_device_id bcm6368_pinctrl_match[] = {
 720 +       { .compatible = "brcm,bcm6368-pinctrl", },
 721 +       { },
 722 +};
 723 +
 724 +static struct platform_driver bcm6368_pinctrl_driver = {
 725 +       .probe = bcm6368_pinctrl_probe,
 726 +       .driver = {
 727 +               .name = MODULE_NAME,
 728 +               .of_match_table = bcm6368_pinctrl_match,
 729 +       },
 730 +};
 731 +
 732 +builtin_platform_driver(bcm6368_pinctrl_driver);