target/linux/bmips/dts/bcm63268.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/clock/bcm63268-clock.h>
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h>
   9 #include <dt-bindings/reset/bcm63268-reset.h>
  10 #include <dt-bindings/soc/bcm63268-pm.h>
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15         compatible = "brcm,bcm63268";
  16
  17         aliases {
  18                 nflash = &nflash;
  19                 pinctrl = &pinctrl;
  20                 serial0 = &uart0;
  21                 serial1 = &uart1;
  22                 spi0 = &lsspi;
  23                 spi1 = &hsspi;
  24         };
  25
  26         chosen {
  27                 bootargs = "earlycon";
  28                 stdout-path = "serial0:115200n8";
  29         };
  30
  31         clocks {
  32                 periph_osc: periph-osc {
  33                         compatible = "fixed-clock";
  34
  35                         #clock-cells = <0>;
  36
  37                         clock-frequency = <50000000>;
  38                         clock-output-names = "periph";
  39                 };
  40
  41                 hsspi_osc: hsspi-osc {
  42                         compatible = "fixed-clock";
  43
  44                         #clock-cells = <0>;
  45
  46                         clock-frequency = <400000000>;
  47                         clock-output-names = "hsspi_osc";
  48                 };
  49         };
  50
  51         cpus {
  52                 #address-cells = <1>;
  53                 #size-cells = <0>;
  54                 mips-hpt-frequency = <200000000>;
  55
  56                 cpu@0 {
  57                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  58                         device_type = "cpu";
  59                         reg = <0>;
  60                 };
  61
  62                 cpu@1 {
  63                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  64                         device_type = "cpu";
  65                         reg = <1>;
  66                 };
  67         };
  68
  69         cpu_intc: interrupt-controller {
  70                 #address-cells = <0>;
  71                 compatible = "mti,cpu-interrupt-controller";
  72
  73                 interrupt-controller;
  74                 #interrupt-cells = <1>;
  75         };
  76
  77         memory@0 {
  78                 device_type = "memory";
  79                 reg = <0 0>;
  80         };
  81
  82         ubus {
  83                 #address-cells = <1>;
  84                 #size-cells = <1>;
  85
  86                 compatible = "simple-bus";
  87                 ranges;
  88
  89                 periph_clk: clock-controller@10000004 {
  90                         compatible = "brcm,bcm63268-clocks";
  91                         reg = <0x10000004 0x4>;
  92                         #clock-cells = <1>;
  93                 };
  94
  95                 pll_cntl: syscon@10000008 {
  96                         compatible = "syscon", "simple-mfd";
  97                         reg = <0x10000008 0x4>;
  98                         native-endian;
  99
 100                         syscon-reboot {
 101                                 compatible = "syscon-reboot";
 102                                 offset = <0x0>;
 103                                 mask = <0x1>;
 104                         };
 105                 };
 106
 107                 periph_rst: reset-controller@10000010 {
 108                         compatible = "brcm,bcm6345-reset";
 109                         reg = <0x10000010 0x4>;
 110                         #reset-cells = <1>;
 111                 };
 112
 113                 ext_intc: interrupt-controller@10000018 {
 114                         #address-cells = <1>;
 115                         compatible = "brcm,bcm6345-ext-intc";
 116                         reg = <0x10000018 0x4>;
 117
 118                         interrupt-controller;
 119                         #interrupt-cells = <2>;
 120
 121                         interrupts = <BCM63268_IRQ_EXT0>,
 122                                      <BCM63268_IRQ_EXT1>,
 123                                      <BCM63268_IRQ_EXT2>,
 124                                      <BCM63268_IRQ_EXT3>;
 125                 };
 126
 127                 periph_intc: interrupt-controller@10000020 {
 128                         #address-cells = <1>;
 129                         compatible = "brcm,bcm6345-l1-intc";
 130                         reg = <0x10000020 0x20>,
 131                               <0x10000040 0x20>;
 132
 133                         interrupt-controller;
 134                         #interrupt-cells = <1>;
 135
 136                         interrupt-parent = <&cpu_intc>;
 137                         interrupts = <2>, <3>;
 138                 };
 139
 140                 wdt: watchdog@1000009c {
 141                         compatible = "brcm,bcm7038-wdt";
 142                         reg = <0x1000009c 0xc>;
 143
 144                         clocks = <&periph_osc>;
 145
 146                         timeout-sec = <30>;
 147                 };
 148
 149                 timer_clk: clock-controller@100000ac {
 150                         compatible = "brcm,bcm63268-timer-clocks";
 151                         reg = <0x100000ac 0x4>;
 152                         #clock-cells = <1>;
 153                         #reset-cells = <1>;
 154                 };
 155
 156                 gpio_cntl: syscon@100000c0 {
 157                         compatible = "brcm,bcm63268-gpio-sysctl",
 158                                      "syscon", "simple-mfd";
 159                         reg = <0x100000c0 0x80>;
 160                         ranges = <0 0x100000c0 0x80>;
 161                         native-endian;
 162
 163                         gpio: gpio@0 {
 164                                 compatible = "brcm,bcm63268-gpio";
 165                                 reg-names = "dirout", "dat";
 166                                 reg = <0x0 0x8>, <0x8 0x8>;
 167
 168                                 gpio-controller;
 169                                 gpio-ranges = <&pinctrl 0 0 52>;
 170                                 #gpio-cells = <2>;
 171                         };
 172
 173                         pinctrl: pinctrl@10 {
 174                                 compatible = "brcm,bcm63268-pinctrl";
 175                                 reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>;
 176
 177                                 pinctrl_serial_led: serial_led-pins {
 178                                         pinctrl_serial_led_clk: serial_led_clk-pins {
 179                                                 function = "serial_led_clk";
 180                                                 pins = "gpio0";
 181                                         };
 182
 183                                         pinctrl_serial_led_data: serial_led_data-pins {
 184                                                 function = "serial_led_data";
 185                                                 pins = "gpio1";
 186                                         };
 187                                 };
 188
 189                                 pinctrl_hsspi_cs4: hsspi_cs4-pins {
 190                                         function = "hsspi_cs4";
 191                                         pins = "gpio16";
 192                                 };
 193
 194                                 pinctrl_hsspi_cs5: hsspi_cs5-pins {
 195                                         function = "hsspi_cs5";
 196                                         pins = "gpio17";
 197                                 };
 198
 199                                 pinctrl_hsspi_cs6: hsspi_cs6-pins {
 200                                         function = "hsspi_cs6";
 201                                         pins = "gpio8";
 202                                 };
 203
 204                                 pinctrl_hsspi_cs7: hsspi_cs7-pins {
 205                                         function = "hsspi_cs7";
 206                                         pins = "gpio9";
 207                                 };
 208
 209                                 pinctrl_adsl_spi: adsl_spi {
 210                                         pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
 211                                                 function = "adsl_spi_miso";
 212                                                 pins = "gpio18";
 213                                         };
 214
 215                                         pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
 216                                                 function = "adsl_spi_mosi";
 217                                                 pins = "gpio19";
 218                                         };
 219                                 };
 220
 221                                 pinctrl_vreq_clk: vreq_clk-pins {
 222                                         function = "vreq_clk";
 223                                         pins = "gpio22";
 224                                 };
 225
 226                                 pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins {
 227                                         function = "pcie_clkreq_b";
 228                                         pins = "gpio23";
 229                                 };
 230
 231                                 pinctrl_robosw_led_clk: robosw_led_clk-pins {
 232                                         function = "robosw_led_clk";
 233                                         pins = "gpio30";
 234                                 };
 235
 236                                 pinctrl_robosw_led_data: robosw_led_data-pins {
 237                                         function = "robosw_led_data";
 238                                         pins = "gpio31";
 239                                 };
 240
 241                                 pinctrl_nand: nand-pins {
 242                                         function = "nand";
 243                                         group = "nand_grp";
 244                                 };
 245
 246                                 pinctrl_gpio35_alt: gpio35_alt-pins {
 247                                         function = "gpio35_alt";
 248                                         pin = "gpio35";
 249                                 };
 250
 251                                 pinctrl_dectpd: dectpd-pins {
 252                                         function = "dectpd";
 253                                         group = "dectpd_grp";
 254                                 };
 255
 256                                 pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {
 257                                         function = "vdsl_phy_override_0";
 258                                         group = "vdsl_phy_override_0_grp";
 259                                 };
 260
 261                                 pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {
 262                                         function = "vdsl_phy_override_1";
 263                                         group = "vdsl_phy_override_1_grp";
 264                                 };
 265
 266                                 pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {
 267                                         function = "vdsl_phy_override_2";
 268                                         group = "vdsl_phy_override_2_grp";
 269                                 };
 270
 271                                 pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {
 272                                         function = "vdsl_phy_override_3";
 273                                         group = "vdsl_phy_override_3_grp";
 274                                 };
 275
 276                                 pinctrl_dsl_gpio8: dsl_gpio8-pins {
 277                                         function = "dsl_gpio8";
 278                                         group = "dsl_gpio8";
 279                                 };
 280
 281                                 pinctrl_dsl_gpio9: dsl_gpio9-pins {
 282                                         function = "dsl_gpio9";
 283                                         group = "dsl_gpio9";
 284                                 };
 285                         };
 286                 };
 287
 288                 uart0: serial@10000180 {
 289                         compatible = "brcm,bcm6345-uart";
 290                         reg = <0x10000180 0x18>;
 291
 292                         interrupt-parent = <&periph_intc>;
 293                         interrupts = <BCM63268_IRQ_UART0>;
 294
 295                         clocks = <&periph_osc>;
 296                         clock-names = "periph";
 297
 298                         status = "disabled";
 299                 };
 300
 301                 uart1: serial@100001a0 {
 302                         compatible = "brcm,bcm6345-uart";
 303                         reg = <0x100001a0 0x18>;
 304
 305                         interrupt-parent = <&periph_intc>;
 306                         interrupts = <BCM63268_IRQ_UART1>;
 307
 308                         clocks = <&periph_osc>;
 309                         clock-names = "periph";
 310
 311                         status = "disabled";
 312                 };
 313
 314                 nflash: nand@10000200 {
 315                         #address-cells = <1>;
 316                         #size-cells = <0>;
 317                         compatible = "brcm,nand-bcm6368",
 318                                      "brcm,brcmnand-v4.0",
 319                                      "brcm,brcmnand";
 320                         reg = <0x10000200 0x180>,
 321                               <0x10000600 0x200>,
 322                               <0x100000b0 0x10>;
 323                         reg-names = "nand",
 324                                     "nand-cache",
 325                                     "nand-int-base";
 326
 327                         interrupt-parent = <&periph_intc>;
 328                         interrupts = <BCM63268_IRQ_NAND>;
 329
 330                         clocks = <&periph_clk BCM63268_CLK_NAND>;
 331                         clock-names = "nand";
 332
 333                         pinctrl-names = "default";
 334                         pinctrl-0 = <&pinctrl_nand>;
 335
 336                         status = "disabled";
 337                 };
 338
 339                 lsspi: spi@10000800 {
 340                         #address-cells = <1>;
 341                         #size-cells = <0>;
 342                         compatible = "brcm,bcm6358-spi";
 343                         reg = <0x10000800 0x70c>;
 344
 345                         interrupt-parent = <&periph_intc>;
 346                         interrupts = <BCM63268_IRQ_LSSPI>;
 347
 348                         clocks = <&periph_clk BCM63268_CLK_SPI>;
 349                         clock-names = "spi";
 350
 351                         resets = <&periph_rst BCM63268_RST_SPI>;
 352
 353                         status = "disabled";
 354                 };
 355
 356                 hsspi: spi@10001000 {
 357                         #address-cells = <1>;
 358                         #size-cells = <0>;
 359                         compatible = "brcm,bcm6328-hsspi";
 360                         reg = <0x10001000 0x600>;
 361
 362                         interrupt-parent = <&periph_intc>;
 363                         interrupts = <BCM63268_IRQ_HSSPI>;
 364
 365                         clocks = <&periph_clk BCM63268_CLK_HSSPI>,
 366                                  <&hsspi_osc>;
 367                         clock-names = "hsspi",
 368                                       "pll";
 369
 370                         resets = <&periph_rst BCM63268_RST_SPI>;
 371
 372                         status = "disabled";
 373                 };
 374
 375                 serdes_cntl: syscon@10001804 {
 376                         compatible = "syscon";
 377                         reg = <0x10001804 0x4>;
 378                         native-endian;
 379                 };
 380
 381                 periph_pwr: power-controller@1000184c {
 382                         compatible = "brcm,bcm63268-power-controller";
 383                         reg = <0x1000184c 0x4>;
 384                         #power-domain-cells = <1>;
 385                 };
 386
 387                 leds: led-controller@10001900 {
 388                         #address-cells = <1>;
 389                         #size-cells = <0>;
 390                         compatible = "brcm,bcm6328-leds";
 391                         reg = <0x10001900 0x24>;
 392
 393                         status = "disabled";
 394                 };
 395
 396                 ehci: usb@10002500 {
 397                         compatible = "brcm,bcm63268-ehci", "generic-ehci";
 398                         reg = <0x10002500 0x100>;
 399                         big-endian;
 400                         spurious-oc;
 401
 402                         interrupt-parent = <&periph_intc>;
 403                         interrupts = <BCM63268_IRQ_EHCI>;
 404
 405                         phys = <&usbh 0>;
 406                         phy-names = "usb";
 407
 408                         status = "disabled";
 409                 };
 410
 411                 ohci: usb@10002600 {
 412                         compatible = "brcm,bcm63268-ohci", "generic-ohci";
 413                         reg = <0x10002600 0x100>;
 414                         big-endian;
 415                         no-big-frame-no;
 416
 417                         interrupt-parent = <&periph_intc>;
 418                         interrupts = <BCM63268_IRQ_OHCI>;
 419
 420                         phys = <&usbh 0>;
 421                         phy-names = "usb";
 422
 423                         status = "disabled";
 424                 };
 425
 426                 usbh: usb-phy@10002700 {
 427                         compatible = "brcm,bcm63268-usbh-phy";
 428                         reg = <0x10002700 0x38>;
 429
 430                         #phy-cells = <1>;
 431
 432                         clocks = <&periph_clk BCM63268_CLK_USBH>,
 433                                  <&timer_clk BCM63268_TCLK_USB_REF>;
 434                         clock-names = "usbh",
 435                                       "usb_ref";
 436
 437                         power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
 438                         resets = <&periph_rst BCM63268_RST_USBH>;
 439
 440                         status = "disabled";
 441                 };
 442
 443                 ethernet: ethernet@1000d800 {
 444                         compatible = "brcm,bcm63268-enetsw";
 445                         reg = <0x1000d800 0x80>,
 446                               <0x1000da00 0x80>,
 447                               <0x1000dc00 0x80>;
 448                         reg-names = "dma",
 449                                     "dma-channels",
 450                                     "dma-sram";
 451
 452                         interrupt-parent = <&periph_intc>;
 453                         interrupts = <BCM63268_IRQ_ENETSW_RX_DMA0>,
 454                                      <BCM63268_IRQ_ENETSW_TX_DMA0>;
 455                         interrupt-names = "rx",
 456                                           "tx";
 457
 458                         clocks = <&periph_clk BCM63268_CLK_GMAC>,
 459                                  <&periph_clk BCM63268_CLK_ROBOSW>,
 460                                  <&periph_clk BCM63268_CLK_ROBOSW250>,
 461                                  <&timer_clk BCM63268_TCLK_EPHY1>,
 462                                  <&timer_clk BCM63268_TCLK_EPHY2>,
 463                                  <&timer_clk BCM63268_TCLK_EPHY3>,
 464                                  <&timer_clk BCM63268_TCLK_GPHY1>;
 465
 466                         resets = <&periph_rst BCM63268_RST_ENETSW>,
 467                                  <&periph_rst BCM63268_RST_EPHY>,
 468                                  <&periph_rst BCM63268_RST_GPHY>;
 469
 470                         power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_ROBOSW>;
 471
 472                         dma-rx = <0>;
 473                         dma-tx = <1>;
 474
 475                         status = "disabled";
 476                 };
 477
 478                 pcie: pcie@106e0000 {
 479                         compatible = "brcm,bcm6328-pcie";
 480                         reg = <0x106e0000 0x10000>;
 481                         #address-cells = <3>;
 482                         #size-cells = <2>;
 483
 484                         device_type = "pci";
 485                         bus-range = <0x00 0x01>;
 486                         ranges = <0x2000000 0 0x11000000 0x11000000 0 0xf00000>;
 487                         linux,pci-probe-only = <1>;
 488
 489                         interrupt-parent = <&periph_intc>;
 490                         interrupts = <BCM63268_IRQ_PCIE_RC>;
 491
 492                         clocks = <&periph_clk BCM63268_CLK_PCIE>;
 493                         clock-names = "pcie";
 494
 495                         resets = <&periph_rst BCM63268_RST_PCIE>,
 496                                  <&periph_rst BCM63268_RST_PCIE_EXT>,
 497                                  <&periph_rst BCM63268_RST_PCIE_CORE>,
 498                                  <&periph_rst BCM63268_RST_PCIE_HARD>;
 499                         reset-names = "pcie",
 500                                       "pcie-ext",
 501                                       "pcie-core",
 502                                       "pcie-hard";
 503
 504                         power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_PCIE>;
 505
 506                         brcm,serdes = <&serdes_cntl>;
 507
 508                         status = "disabled";
 509                 };
 510
 511                 switch0: switch@10700000 {
 512                         #address-cells = <1>;
 513                         #size-cells = <0>;
 514                         compatible = "brcm,bcm6328-switch";
 515                         reg = <0x10700000 0x8000>;
 516                         big-endian;
 517
 518                         ports {
 519                                 #address-cells = <1>;
 520                                 #size-cells = <0>;
 521
 522                                 port@8 {
 523                                         reg = <8>;
 524
 525                                         phy-mode = "internal";
 526                                         ethernet = <&ethernet>;
 527
 528                                         fixed-link {
 529                                                 speed = <1000>;
 530                                                 full-duplex;
 531                                         };
 532                                 };
 533                         };
 534                 };
 535
 536                 mdio: mdio@107000b0 {
 537                         #address-cells = <1>;
 538                         #size-cells = <0>;
 539                         compatible = "brcm,bcm6368-mdio-mux";
 540                         reg = <0x107000b0 0x8>;
 541
 542                         mdio_int: mdio@0 {
 543                                 #address-cells = <1>;
 544                                 #size-cells = <0>;
 545                                 reg = <0>;
 546
 547                                 phy1: ethernet-phy@1 {
 548                                         compatible = "ethernet-phy-ieee802.3-c22";
 549                                         reg = <1>;
 550                                 };
 551
 552                                 phy2: ethernet-phy@2 {
 553                                         compatible = "ethernet-phy-ieee802.3-c22";
 554                                         reg = <2>;
 555                                 };
 556
 557                                 phy3: ethernet-phy@3 {
 558                                         compatible = "ethernet-phy-ieee802.3-c22";
 559                                         reg = <3>;
 560                                 };
 561
 562                                 phy4: ethernet-phy@4 {
 563                                         compatible = "ethernet-phy-ieee802.3-c22";
 564                                         reg = <4>;
 565                                 };
 566                         };
 567
 568                         mdio_ext: mdio@1 {
 569                                 #address-cells = <1>;
 570                                 #size-cells = <0>;
 571                                 reg = <1>;
 572                         };
 573                 };
 574         };
 575 };