9f613ad47ac9f2c8a1c32168cae683c35a7432c2
[openwrt/staging/noltari.git] / target / linux / bmips / dts / bcm6318.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6318-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6318-reset.h>
10 #include <dt-bindings/soc/bcm6318-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm6318";
16
17 aliases {
18 pinctrl = &pinctrl;
19 serial0 = &uart0;
20 spi1 = &hsspi;
21 };
22
23 chosen {
24 bootargs = "earlycon";
25 stdout-path = "serial0:115200n8";
26 };
27
28 clocks {
29 periph_osc: periph-osc {
30 compatible = "fixed-clock";
31
32 #clock-cells = <0>;
33
34 clock-frequency = <50000000>;
35 clock-output-names = "periph";
36 };
37
38 hsspi_osc: hsspi-osc {
39 compatible = "fixed-clock";
40
41 #clock-cells = <0>;
42
43 clock-frequency = <250000000>;
44 clock-output-names = "hsspi_osc";
45 };
46 };
47
48 cpus {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 mips-hpt-frequency = <166500000>;
52
53 cpu@0 {
54 compatible = "brcm,bmips3300", "mips,mips4Kc";
55 device_type = "cpu";
56 reg = <0>;
57 };
58 };
59
60 cpu_intc: interrupt-controller {
61 #address-cells = <0>;
62 compatible = "mti,cpu-interrupt-controller";
63
64 interrupt-controller;
65 #interrupt-cells = <1>;
66 };
67
68 memory@0 {
69 device_type = "memory";
70 reg = <0 0>;
71 };
72
73 ubus {
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 compatible = "simple-bus";
78 ranges;
79
80 periph_clk: clock-controller@10000004 {
81 compatible = "brcm,bcm6318-clocks";
82 reg = <0x10000004 0x4>;
83 #clock-cells = <1>;
84 };
85
86 ubus_clk: clock-controller@10000008 {
87 compatible = "brcm,bcm6318-ubus-clocks";
88 reg = <0x10000008 0x4>;
89 #clock-cells = <1>;
90 };
91
92 periph_rst: reset-controller@10000010 {
93 compatible = "brcm,bcm6345-reset";
94 reg = <0x10000010 0x4>;
95 #reset-cells = <1>;
96 };
97
98 ext_intc: interrupt-controller@10000018 {
99 #address-cells = <1>;
100 compatible = "brcm,bcm6318-ext-intc";
101 reg = <0x10000018 0x4>;
102
103 interrupt-controller;
104 #interrupt-cells = <2>;
105
106 interrupts = <BCM6318_IRQ_EXT0>,
107 <BCM6318_IRQ_EXT1>,
108 <BCM6318_IRQ_EXT2>,
109 <BCM6318_IRQ_EXT3>;
110 };
111
112 periph_intc: interrupt-controller@10000020 {
113 #address-cells = <1>;
114 compatible = "brcm,bcm6345-l1-intc";
115 reg = <0x10000020 0x20>;
116
117 interrupt-controller;
118 #interrupt-cells = <1>;
119
120 interrupt-parent = <&cpu_intc>;
121 interrupts = <2>, <3>;
122 };
123
124 wdt: watchdog@10000068 {
125 compatible = "brcm,bcm7038-wdt";
126 reg = <0x10000068 0xc>;
127
128 clocks = <&periph_osc>;
129
130 timeout-sec = <30>;
131 };
132
133 pll_cntl: syscon@10000074 {
134 compatible = "syscon", "simple-mfd";
135 reg = <0x10000074 0x4>;
136 native-endian;
137
138 syscon-reboot {
139 compatible = "syscon-reboot";
140 offset = <0>;
141 mask = <0x1>;
142 };
143 };
144
145 gpio_cntl: syscon@10000080 {
146 compatible = "brcm,bcm6318-gpio-sysctl",
147 "syscon", "simple-mfd";
148 reg = <0x10000080 0x80>;
149 ranges = <0 0x10000080 0x80>;
150 native-endian;
151
152 gpio: gpio@0 {
153 compatible = "brcm,bcm6318-gpio";
154 reg-names = "dirout", "dat";
155 reg = <0x0 0x8>, <0x8 0x8>;
156
157 gpio-controller;
158 gpio-ranges = <&pinctrl 0 0 50>;
159 #gpio-cells = <2>;
160 };
161
162 pinctrl: pinctrl@18 {
163 compatible = "brcm,bcm6318-pinctrl";
164 reg = <0x18 0x10>, <0x54 0x18>;
165
166 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
167 function = "ephy0_spd_led";
168 pins = "gpio0";
169 };
170
171 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
172 function = "ephy1_spd_led";
173 pins = "gpio1";
174 };
175
176 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
177 function = "ephy2_spd_led";
178 pins = "gpio2";
179 };
180
181 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
182 function = "ephy3_spd_led";
183 pins = "gpio3";
184 };
185
186 pinctrl_ephy0_act_led: ephy0_act_led-pins {
187 function = "ephy0_act_led";
188 pins = "gpio4";
189 };
190
191 pinctrl_ephy1_act_led: ephy1_act_led-pins {
192 function = "ephy1_act_led";
193 pins = "gpio5";
194 };
195
196 pinctrl_ephy2_act_led: ephy2_act_led-pins {
197 function = "ephy2_act_led";
198 pins = "gpio6";
199 };
200
201 pinctrl_ephy3_act_led: ephy3_act_led-pins {
202 function = "ephy3_act_led";
203 pins = "gpio7";
204 };
205
206 pinctrl_serial_led: serial_led-pins {
207 pinctrl_serial_led_data: serial_led_data-pins {
208 function = "serial_led_data";
209 pins = "gpio6";
210 };
211
212 pinctrl_serial_led_clk: serial_led_clk-pins {
213 function = "serial_led_clk";
214 pins = "gpio7";
215 };
216 };
217
218 pinctrl_inet_act_led: inet_act_led-pins {
219 function = "inet_act_led";
220 pins = "gpio8";
221 };
222
223 pinctrl_inet_fail_led: inet_fail_led-pins {
224 function = "inet_fail_led";
225 pins = "gpio9";
226 };
227
228 pinctrl_dsl_led: dsl_led-pins {
229 function = "dsl_led";
230 pins = "gpio10";
231 };
232
233 pinctrl_post_fail_led: post_fail_led-pins {
234 function = "post_fail_led";
235 pins = "gpio11";
236 };
237
238 pinctrl_wlan_wps_led: wlan_wps_led-pins {
239 function = "wlan_wps_led";
240 pins = "gpio12";
241 };
242
243 pinctrl_usb_pwron: usb_pwron-pins {
244 function = "usb_pwron";
245 pins = "gpio13";
246 };
247
248 pinctrl_usb_device_led: usb_device_led-pins {
249 function = "usb_device_led";
250 pins = "gpio13";
251 };
252
253 pinctrl_usb_active: usb_active-pins {
254 function = "usb_active";
255 pins = "gpio40";
256 };
257 };
258 };
259
260 uart0: serial@10000100 {
261 compatible = "brcm,bcm6345-uart";
262 reg = <0x10000100 0x18>;
263
264 interrupt-parent = <&periph_intc>;
265 interrupts = <BCM6318_IRQ_UART0>;
266
267 clocks = <&periph_osc>;
268 clock-names = "periph";
269
270 status = "disabled";
271 };
272
273 leds: led-controller@10000200 {
274 #address-cells = <1>;
275 #size-cells = <0>;
276 compatible = "brcm,bcm6328-leds";
277 reg = <0x10000200 0x24>;
278
279 status = "disabled";
280 };
281
282 periph_pwr: power-controller@100008e8 {
283 compatible = "brcm,bcm6318-power-controller";
284 reg = <0x100008e8 0x4>;
285
286 #power-domain-cells = <1>;
287 };
288
289 hsspi: spi@10003000 {
290 #address-cells = <1>;
291 #size-cells = <0>;
292 compatible = "brcm,bcm6328-hsspi";
293 reg = <0x10003000 0x600>;
294
295 interrupt-parent = <&periph_intc>;
296 interrupts = <BCM6318_IRQ_HSSPI>;
297
298 clocks = <&periph_clk BCM6318_CLK_HSSPI>,
299 <&hsspi_osc>;
300 clock-names = "hsspi",
301 "pll";
302
303 resets = <&periph_rst BCM6318_RST_SPI>;
304
305 status = "disabled";
306 };
307
308 ehci: usb@10005000 {
309 compatible = "brcm,bcm6318-ehci", "generic-ehci";
310 reg = <0x10005000 0x100>;
311 big-endian;
312 spurious-oc;
313
314 interrupt-parent = <&periph_intc>;
315 interrupts = <BCM6318_IRQ_EHCI>;
316
317 phys = <&usbh 0>;
318 phy-names = "usb";
319
320 status = "disabled";
321 };
322
323 ohci: usb@10005100 {
324 compatible = "brcm,bcm6318-ohci", "generic-ohci";
325 reg = <0x10005100 0x100>;
326 big-endian;
327 no-big-frame-no;
328
329 interrupt-parent = <&periph_intc>;
330 interrupts = <BCM6318_IRQ_OHCI>;
331
332 phys = <&usbh 0>;
333 phy-names = "usb";
334
335 status = "disabled";
336 };
337
338 usbh: usb-phy@10005200 {
339 compatible = "brcm,bcm6318-usbh-phy";
340 reg = <0x10005200 0x38>;
341
342 #phy-cells = <1>;
343
344 clocks = <&periph_clk BCM6318_CLK_USBD>,
345 <&ubus_clk BCM6318_UCLK_USB>;
346 clock-names = "usbh",
347 "usb_ref";
348
349 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_USB>;
350 resets = <&periph_rst BCM6318_RST_USBH>;
351
352 status = "disabled";
353 };
354
355 pcie: pcie@10010000 {
356 compatible = "brcm,bcm6318-pcie";
357 reg = <0x10010000 0x10000>;
358 #address-cells = <3>;
359 #size-cells = <2>;
360
361 device_type = "pci";
362 bus-range = <0x00 0x01>;
363 ranges = <0x2000000 0 0x10200000 0x10200000 0 0x100000>;
364 linux,pci-probe-only = <1>;
365
366 interrupt-parent = <&periph_intc>;
367 interrupts = <BCM6318_IRQ_PCIE_RC>;
368
369 clocks = <&periph_clk BCM6318_CLK_PCIE>,
370 <&periph_clk BCM6318_CLK_PCIE25>,
371 <&ubus_clk BCM6318_UCLK_PCIE>;
372 clock-names = "pcie",
373 "pcie25",
374 "pcie-ubus";
375
376 resets = <&periph_rst BCM6318_RST_PCIE>,
377 <&periph_rst BCM6318_RST_PCIE_EXT>,
378 <&periph_rst BCM6318_RST_PCIE_CORE>,
379 <&periph_rst BCM6318_RST_PCIE_HARD>;
380 reset-names = "pcie",
381 "pcie-ext",
382 "pcie-core",
383 "pcie-hard";
384
385 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_PCIE>;
386
387 status = "disabled";
388 };
389
390 switch0: switch@10080000 {
391 #address-cells = <1>;
392 #size-cells = <0>;
393 compatible = "brcm,bcm6328-switch";
394 reg = <0x10080000 0x8000>;
395 big-endian;
396
397 ports {
398 #address-cells = <1>;
399 #size-cells = <0>;
400
401 port@8 {
402 reg = <8>;
403 label = "cpu";
404
405 phy-mode = "internal";
406 ethernet = <&ethernet>;
407
408 fixed-link {
409 speed = <1000>;
410 full-duplex;
411 };
412 };
413 };
414 };
415
416 mdio: mdio@100800b0 {
417 #address-cells = <1>;
418 #size-cells = <0>;
419 compatible = "brcm,bcm6368-mdio-mux";
420 reg = <0x100800b0 0x8>;
421
422 mdio_int: mdio@0 {
423 #address-cells = <1>;
424 #size-cells = <0>;
425 reg = <0>;
426
427 phy1: ethernet-phy@1 {
428 compatible = "ethernet-phy-ieee802.3-c22";
429 reg = <1>;
430 };
431
432 phy2: ethernet-phy@2 {
433 compatible = "ethernet-phy-ieee802.3-c22";
434 reg = <2>;
435 };
436
437 phy3: ethernet-phy@3 {
438 compatible = "ethernet-phy-ieee802.3-c22";
439 reg = <3>;
440 };
441
442 phy4: ethernet-phy@4 {
443 compatible = "ethernet-phy-ieee802.3-c22";
444 reg = <4>;
445 };
446 };
447
448 mdio_ext: mdio@1 {
449 #address-cells = <1>;
450 #size-cells = <0>;
451 reg = <1>;
452 };
453 };
454
455 ethernet: ethernet@10088000 {
456 compatible = "brcm,bcm6318-enetsw";
457 reg = <0x10088000 0x80>,
458 <0x10088200 0x80>,
459 <0x10088400 0x80>;
460 reg-names = "dma",
461 "dma-channels",
462 "dma-sram";
463
464 interrupt-parent = <&periph_intc>;
465 interrupts = <BCM6318_IRQ_ENETSW_RX_DMA0>,
466 <BCM6318_IRQ_ENETSW_TX_DMA0>;
467 interrupt-names = "rx",
468 "tx";
469
470 clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
471 <&periph_clk BCM6318_CLK_ROBOSW025>,
472 <&ubus_clk BCM6318_UCLK_ROBOSW>;
473
474 resets = <&periph_rst BCM6318_RST_ENETSW>,
475 <&periph_rst BCM6318_RST_EPHY>;
476
477 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_EPHY0>,
478 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY1>,
479 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY2>,
480 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY3>;
481
482 dma-rx = <0>;
483 dma-tx = <1>;
484
485 status = "disabled";
486 };
487 };
488 };