target/linux/bcm63xx/patches-5.15/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch

   1 From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Tue, 29 Jul 2014 22:16:36 +0200
   4 Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
   5
   6 Allow using raw sprom content as templates.
   7
   8 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
   9 ---
  10  arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
  11  1 file changed, 482 insertions(+)
  12
  13 --- a/arch/mips/bcm63xx/sprom.c
  14 +++ b/arch/mips/bcm63xx/sprom.c
  15 @@ -55,13 +55,556 @@ int bcm63xx_get_fallback_sprom(struct ss
  16                 return -EINVAL;
  17         }
  18  }
  19 +
  20 +/* FIXME: use lib_sprom after submission upstream */
  21 +
  22 +/* Get the word-offset for a SSB_SPROM_XXX define. */
  23 +#define SPOFF(offset)  ((offset) / sizeof(u16))
  24 +/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
  25 +#define SPEX16(_outvar, _offset, _mask, _shift)        \
  26 +       out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
  27 +#define SPEX32(_outvar, _offset, _mask, _shift)        \
  28 +       out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
  29 +                          in[SPOFF(_offset)]) & (_mask)) >> (_shift))
  30 +#define SPEX(_outvar, _offset, _mask, _shift) \
  31 +       SPEX16(_outvar, _offset, _mask, _shift)
  32 +
  33 +#define SPEX_ARRAY8(_field, _offset, _mask, _shift)    \
  34 +       do {    \
  35 +               SPEX(_field[0], _offset +  0, _mask, _shift);   \
  36 +               SPEX(_field[1], _offset +  2, _mask, _shift);   \
  37 +               SPEX(_field[2], _offset +  4, _mask, _shift);   \
  38 +               SPEX(_field[3], _offset +  6, _mask, _shift);   \
  39 +               SPEX(_field[4], _offset +  8, _mask, _shift);   \
  40 +               SPEX(_field[5], _offset + 10, _mask, _shift);   \
  41 +               SPEX(_field[6], _offset + 12, _mask, _shift);   \
  42 +               SPEX(_field[7], _offset + 14, _mask, _shift);   \
  43 +       } while (0)
  44 +
  45 +
  46 +static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
  47 +                               u16 mask, u16 shift)
  48 +{
  49 +       u16 v;
  50 +       u8 gain;
  51 +
  52 +       v = in[SPOFF(offset)];
  53 +       gain = (v & mask) >> shift;
  54 +       if (gain == 0xFF)
  55 +               gain = 2; /* If unset use 2dBm */
  56 +       if (sprom_revision == 1) {
  57 +               /* Convert to Q5.2 */
  58 +               gain <<= 2;
  59 +       } else {
  60 +               /* Q5.2 Fractional part is stored in 0xC0 */
  61 +               gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
  62 +       }
  63 +
  64 +       return (s8)gain;
  65 +}
  66 +
  67 +static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
  68 +{
  69 +       SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
  70 +       SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
  71 +       SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
  72 +       SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
  73 +       SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
  74 +       SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
  75 +       SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
  76 +       SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
  77 +       SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
  78 +       SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
  79 +            SSB_SPROM2_MAXP_A_LO_SHIFT);
  80 +}
  81 +
  82 +static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
  83 +{
  84 +       u16 loc[3];
  85 +
  86 +       if (out->revision == 3)                 /* rev 3 moved MAC */
  87 +               loc[0] = SSB_SPROM3_IL0MAC;
  88 +       else {
  89 +               loc[0] = SSB_SPROM1_IL0MAC;
  90 +               loc[1] = SSB_SPROM1_ET0MAC;
  91 +               loc[2] = SSB_SPROM1_ET1MAC;
  92 +       }
  93 +
  94 +       SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
  95 +       SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
  96 +            SSB_SPROM1_ETHPHY_ET1A_SHIFT);
  97 +       SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
  98 +       SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
  99 +       SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
 100 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 101 +       if (out->revision == 1)
 102 +               SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
 103 +                    SSB_SPROM1_BINF_CCODE_SHIFT);
 104 +       SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
 105 +            SSB_SPROM1_BINF_ANTA_SHIFT);
 106 +       SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
 107 +            SSB_SPROM1_BINF_ANTBG_SHIFT);
 108 +       SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
 109 +       SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
 110 +       SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
 111 +       SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
 112 +       SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
 113 +       SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
 114 +       SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
 115 +       SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
 116 +            SSB_SPROM1_GPIOA_P1_SHIFT);
 117 +       SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
 118 +       SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
 119 +            SSB_SPROM1_GPIOB_P3_SHIFT);
 120 +       SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
 121 +            SSB_SPROM1_MAXPWR_A_SHIFT);
 122 +       SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
 123 +       SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
 124 +            SSB_SPROM1_ITSSI_A_SHIFT);
 125 +       SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
 126 +       SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
 127 +
 128 +       SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
 129 +       SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
 130 +
 131 +       /* Extract the antenna gain values. */
 132 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 133 +                                                    SSB_SPROM1_AGAIN,
 134 +                                                    SSB_SPROM1_AGAIN_BG,
 135 +                                                    SSB_SPROM1_AGAIN_BG_SHIFT);
 136 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 137 +                                                    SSB_SPROM1_AGAIN,
 138 +                                                    SSB_SPROM1_AGAIN_A,
 139 +                                                    SSB_SPROM1_AGAIN_A_SHIFT);
 140 +       if (out->revision >= 2)
 141 +               sprom_extract_r23(out, in);
 142 +}
 143 +
 144 +/* Revs 4 5 and 8 have partially shared layout */
 145 +static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
 146 +{
 147 +       SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
 148 +            SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
 149 +       SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
 150 +            SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
 151 +       SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
 152 +            SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
 153 +       SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
 154 +            SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
 155 +
 156 +       SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
 157 +            SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
 158 +       SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
 159 +            SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
 160 +       SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
 161 +            SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
 162 +       SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
 163 +            SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
 164 +
 165 +       SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
 166 +            SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
 167 +       SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
 168 +            SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
 169 +       SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
 170 +            SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
 171 +       SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
 172 +            SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
 173 +
 174 +       SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
 175 +            SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
 176 +       SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
 177 +            SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
 178 +       SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
 179 +            SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
 180 +       SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
 181 +            SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
 182 +}
 183 +
 184 +static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
 185 +{
 186 +       static const u16 pwr_info_offset[] = {
 187 +               SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
 188 +               SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
 189 +       };
 190 +       u16 il0mac_offset;
 191 +       int i;
 192 +
 193 +       BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
 194 +                    ARRAY_SIZE(out->core_pwr_info));
 195 +
 196 +       if (out->revision == 4)
 197 +               il0mac_offset = SSB_SPROM4_IL0MAC;
 198 +       else
 199 +               il0mac_offset = SSB_SPROM5_IL0MAC;
 200 +
 201 +       SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
 202 +       SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
 203 +            SSB_SPROM4_ETHPHY_ET1A_SHIFT);
 204 +       SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
 205 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 206 +       if (out->revision == 4) {
 207 +               SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
 208 +               SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
 209 +               SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
 210 +               SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
 211 +               SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
 212 +               SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
 213 +       } else {
 214 +               SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
 215 +               SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
 216 +               SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
 217 +               SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
 218 +               SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
 219 +               SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
 220 +       }
 221 +       SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
 222 +            SSB_SPROM4_ANTAVAIL_A_SHIFT);
 223 +       SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
 224 +            SSB_SPROM4_ANTAVAIL_BG_SHIFT);
 225 +       SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
 226 +       SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
 227 +            SSB_SPROM4_ITSSI_BG_SHIFT);
 228 +       SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
 229 +       SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
 230 +            SSB_SPROM4_ITSSI_A_SHIFT);
 231 +       if (out->revision == 4) {
 232 +               SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
 233 +               SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
 234 +                    SSB_SPROM4_GPIOA_P1_SHIFT);
 235 +               SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
 236 +               SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
 237 +                    SSB_SPROM4_GPIOB_P3_SHIFT);
 238 +       } else {
 239 +               SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
 240 +               SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
 241 +                    SSB_SPROM5_GPIOA_P1_SHIFT);
 242 +               SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
 243 +               SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
 244 +                    SSB_SPROM5_GPIOB_P3_SHIFT);
 245 +       }
 246 +
 247 +       /* Extract the antenna gain values. */
 248 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 249 +                                                    SSB_SPROM4_AGAIN01,
 250 +                                                    SSB_SPROM4_AGAIN0,
 251 +                                                    SSB_SPROM4_AGAIN0_SHIFT);
 252 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 253 +                                                    SSB_SPROM4_AGAIN01,
 254 +                                                    SSB_SPROM4_AGAIN1,
 255 +                                                    SSB_SPROM4_AGAIN1_SHIFT);
 256 +       out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
 257 +                                                    SSB_SPROM4_AGAIN23,
 258 +                                                    SSB_SPROM4_AGAIN2,
 259 +                                                    SSB_SPROM4_AGAIN2_SHIFT);
 260 +       out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
 261 +                                                    SSB_SPROM4_AGAIN23,
 262 +                                                    SSB_SPROM4_AGAIN3,
 263 +                                                    SSB_SPROM4_AGAIN3_SHIFT);
 264 +
 265 +       /* Extract cores power info info */
 266 +       for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 267 +               u16 o = pwr_info_offset[i];
 268 +
 269 +               SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
 270 +                       SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
 271 +               SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
 272 +                       SSB_SPROM4_2G_MAXP, 0);
 273 +
 274 +               SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
 275 +               SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
 276 +               SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
 277 +               SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
 278 +
 279 +               SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
 280 +                       SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
 281 +               SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
 282 +                       SSB_SPROM4_5G_MAXP, 0);
 283 +               SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
 284 +                       SSB_SPROM4_5GH_MAXP, 0);
 285 +               SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
 286 +                       SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
 287 +
 288 +               SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
 289 +               SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
 290 +               SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
 291 +               SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
 292 +               SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
 293 +               SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
 294 +               SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
 295 +               SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
 296 +               SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
 297 +               SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
 298 +               SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
 299 +               SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
 300 +       }
 301 +
 302 +       sprom_extract_r458(out, in);
 303 +
 304 +       /* TODO - get remaining rev 4 stuff needed */
 305 +}
 306 +
 307 +static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
 308 +{
 309 +       int i;
 310 +       u16 o;
 311 +       static const u16 pwr_info_offset[] = {
 312 +               SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
 313 +               SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
 314 +       };
 315 +       BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
 316 +                       ARRAY_SIZE(out->core_pwr_info));
 317 +
 318 +       SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
 319 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 320 +       SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
 321 +       SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
 322 +       SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
 323 +       SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
 324 +       SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
 325 +       SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
 326 +       SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
 327 +            SSB_SPROM8_ANTAVAIL_A_SHIFT);
 328 +       SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
 329 +            SSB_SPROM8_ANTAVAIL_BG_SHIFT);
 330 +       SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
 331 +       SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
 332 +            SSB_SPROM8_ITSSI_BG_SHIFT);
 333 +       SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
 334 +       SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
 335 +            SSB_SPROM8_ITSSI_A_SHIFT);
 336 +       SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
 337 +       SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
 338 +            SSB_SPROM8_MAXP_AL_SHIFT);
 339 +       SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
 340 +       SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
 341 +            SSB_SPROM8_GPIOA_P1_SHIFT);
 342 +       SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
 343 +       SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
 344 +            SSB_SPROM8_GPIOB_P3_SHIFT);
 345 +       SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
 346 +       SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
 347 +            SSB_SPROM8_TRI5G_SHIFT);
 348 +       SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
 349 +       SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
 350 +            SSB_SPROM8_TRI5GH_SHIFT);
 351 +       SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
 352 +       SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
 353 +            SSB_SPROM8_RXPO5G_SHIFT);
 354 +       SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
 355 +       SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
 356 +            SSB_SPROM8_RSSISMC2G_SHIFT);
 357 +       SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
 358 +            SSB_SPROM8_RSSISAV2G_SHIFT);
 359 +       SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
 360 +            SSB_SPROM8_BXA2G_SHIFT);
 361 +       SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
 362 +       SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
 363 +            SSB_SPROM8_RSSISMC5G_SHIFT);
 364 +       SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
 365 +            SSB_SPROM8_RSSISAV5G_SHIFT);
 366 +       SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
 367 +            SSB_SPROM8_BXA5G_SHIFT);
 368 +       SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
 369 +       SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
 370 +       SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
 371 +       SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
 372 +       SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
 373 +       SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
 374 +       SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
 375 +       SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
 376 +       SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
 377 +       SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
 378 +       SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
 379 +       SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
 380 +       SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
 381 +       SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
 382 +       SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
 383 +       SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
 384 +       SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
 385 +
 386 +       /* Extract the antenna gain values. */
 387 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 388 +                                                    SSB_SPROM8_AGAIN01,
 389 +                                                    SSB_SPROM8_AGAIN0,
 390 +                                                    SSB_SPROM8_AGAIN0_SHIFT);
 391 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 392 +                                                    SSB_SPROM8_AGAIN01,
 393 +                                                    SSB_SPROM8_AGAIN1,
 394 +                                                    SSB_SPROM8_AGAIN1_SHIFT);
 395 +       out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
 396 +                                                    SSB_SPROM8_AGAIN23,
 397 +                                                    SSB_SPROM8_AGAIN2,
 398 +                                                    SSB_SPROM8_AGAIN2_SHIFT);
 399 +       out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
 400 +                                                    SSB_SPROM8_AGAIN23,
 401 +                                                    SSB_SPROM8_AGAIN3,
 402 +                                                    SSB_SPROM8_AGAIN3_SHIFT);
 403 +
 404 +       /* Extract cores power info info */
 405 +       for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 406 +               o = pwr_info_offset[i];
 407 +               SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
 408 +                       SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
 409 +               SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
 410 +                       SSB_SPROM8_2G_MAXP, 0);
 411 +
 412 +               SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
 413 +               SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
 414 +               SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
 415 +
 416 +               SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
 417 +                       SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
 418 +               SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
 419 +                       SSB_SPROM8_5G_MAXP, 0);
 420 +               SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
 421 +                       SSB_SPROM8_5GH_MAXP, 0);
 422 +               SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
 423 +                       SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
 424 +
 425 +               SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
 426 +               SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
 427 +               SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
 428 +               SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
 429 +               SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
 430 +               SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
 431 +               SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
 432 +               SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
 433 +               SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
 434 +       }
 435 +
 436 +       /* Extract FEM info */
 437 +       SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 438 +               SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
 439 +       SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
 440 +               SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
 441 +       SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
 442 +               SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
 443 +       SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
 444 +               SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
 445 +       SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
 446 +               SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
 447 +
 448 +       SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
 449 +               SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
 450 +       SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
 451 +               SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
 452 +       SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
 453 +               SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
 454 +       SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
 455 +               SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
 456 +       SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
 457 +               SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
 458 +
 459 +       SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
 460 +            SSB_SPROM8_LEDDC_ON_SHIFT);
 461 +       SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
 462 +            SSB_SPROM8_LEDDC_OFF_SHIFT);
 463 +
 464 +       SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
 465 +            SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
 466 +       SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
 467 +            SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
 468 +       SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
 469 +            SSB_SPROM8_TXRXC_SWITCH_SHIFT);
 470 +
 471 +       SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
 472 +
 473 +       SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
 474 +       SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
 475 +       SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
 476 +       SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
 477 +
 478 +       SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
 479 +            SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
 480 +       SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
 481 +            SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
 482 +       SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
 483 +            SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
 484 +            SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
 485 +       SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
 486 +            SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
 487 +       SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
 488 +            SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
 489 +            SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
 490 +       SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
 491 +            SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
 492 +            SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
 493 +       SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
 494 +            SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
 495 +            SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
 496 +       SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
 497 +            SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
 498 +
 499 +       SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
 500 +       SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
 501 +       SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
 502 +       SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
 503 +
 504 +       SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
 505 +            SSB_SPROM8_THERMAL_TRESH_SHIFT);
 506 +       SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
 507 +            SSB_SPROM8_THERMAL_OFFSET_SHIFT);
 508 +       SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
 509 +            SSB_SPROM8_TEMPDELTA_PHYCAL,
 510 +            SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
 511 +       SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
 512 +            SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
 513 +       SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
 514 +            SSB_SPROM8_TEMPDELTA_HYSTERESIS,
 515 +            SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
 516 +       sprom_extract_r458(out, in);
 517 +
 518 +       /* TODO - get remaining rev 8 stuff needed */
 519 +}
 520 +
 521 +static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
 522 +{
 523 +       memset(out, 0, sizeof(*out));
 524 +
 525 +       out->revision = in[size - 1] & 0x00FF;
 526 +
 527 +       memset(out->et0mac, 0xFF, 6);           /* preset et0 and et1 mac */
 528 +       memset(out->et1mac, 0xFF, 6);
 529 +
 530 +       switch (out->revision) {
 531 +       case 1:
 532 +       case 2:
 533 +       case 3:
 534 +               sprom_extract_r123(out, in);
 535 +               break;
 536 +       case 4:
 537 +       case 5:
 538 +               sprom_extract_r45(out, in);
 539 +               break;
 540 +       case 8:
 541 +               sprom_extract_r8(out, in);
 542 +               break;
 543 +       default:
 544 +               pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
 545 +                       out->revision);
 546 +               out->revision = 1;
 547 +               sprom_extract_r123(out, in);
 548 +       }
 549 +
 550 +       if (out->boardflags_lo == 0xFFFF)
 551 +               out->boardflags_lo = 0;  /* per specs */
 552 +       if (out->boardflags_hi == 0xFFFF)
 553 +               out->boardflags_hi = 0;  /* per specs */
 554 +
 555 +       return 0;
 556 +}
 557 +
 558 +static __initdata u16 template_sprom[220];
 559  #endif
 560
 561 +
 562  int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
 563  {
 564         int ret = 0;
 565
 566  #ifdef CONFIG_SSB_PCIHOST
 567 +       u16 size = 0;
 568 +
 569         switch (data->type) {
 570         case SPROM_DEFAULT:
 571                 memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
 572 @@ -71,6 +614,9 @@ int __init bcm63xx_register_fallback_spr
 573                 return -EINVAL;
 574         }
 575
 576 +       if (size > 0)
 577 +               sprom_extract(&bcm63xx_sprom, template_sprom, size);
 578 +
 579         memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
 580         memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
 581         memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);