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[openwrt/staging/noltari.git] / package / kernel / lantiq / ltq-deu / src / ifxmips_aes.c
1 /******************************************************************************
2 **
3 ** FILE NAME : ifxmips_aes.c
4 ** PROJECT : IFX UEIP
5 ** MODULES : DEU Module
6 **
7 ** DATE : September 8, 2009
8 ** AUTHOR : Mohammad Firdaus
9 ** DESCRIPTION : Data Encryption Unit Driver for AES Algorithm
10 ** COPYRIGHT : Copyright (c) 2009
11 ** Infineon Technologies AG
12 ** Am Campeon 1-12, 85579 Neubiberg, Germany
13 **
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License as published by
16 ** the Free Software Foundation; either version 2 of the License, or
17 ** (at your option) any later version.
18 **
19 ** HISTORY
20 ** $Date $Author $Comment
21 ** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
22 *******************************************************************************/
23 /*!
24 \defgroup IFX_DEU IFX_DEU_DRIVERS
25 \ingroup API
26 \brief ifx DEU driver module
27 */
28
29 /*!
30 \file ifxmips_aes.c
31 \ingroup IFX_DEU
32 \brief AES Encryption Driver main file
33 */
34
35 /*!
36 \defgroup IFX_AES_FUNCTIONS IFX_AES_FUNCTIONS
37 \ingroup IFX_DEU
38 \brief IFX AES driver Functions
39 */
40
41
42 /* Project Header Files */
43 #if defined(CONFIG_MODVERSIONS)
44 #define MODVERSIONS
45 #include <linux/modeversions>
46 #endif
47
48 #include <linux/version.h>
49 #include <linux/module.h>
50 #include <linux/init.h>
51 #include <linux/proc_fs.h>
52 #include <linux/fs.h>
53 #include <linux/types.h>
54 #include <linux/errno.h>
55 #include <linux/crypto.h>
56 #include <linux/interrupt.h>
57 #include <linux/delay.h>
58 #include <asm/byteorder.h>
59 #include <crypto/algapi.h>
60
61 #include "ifxmips_deu.h"
62
63 #if defined(CONFIG_DANUBE)
64 #include "ifxmips_deu_danube.h"
65 extern int ifx_danube_pre_1_4;
66 #elif defined(CONFIG_AR9)
67 #include "ifxmips_deu_ar9.h"
68 #elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
69 #include "ifxmips_deu_vr9.h"
70 #else
71 #error "Unkown platform"
72 #endif
73
74 /* DMA related header and variables */
75
76 spinlock_t aes_lock;
77 #define CRTCL_SECT_INIT spin_lock_init(&aes_lock)
78 #define CRTCL_SECT_START spin_lock_irqsave(&aes_lock, flag)
79 #define CRTCL_SECT_END spin_unlock_irqrestore(&aes_lock, flag)
80
81 /* Definition of constants */
82 #define AES_START IFX_AES_CON
83 #define AES_MIN_KEY_SIZE 16
84 #define AES_MAX_KEY_SIZE 32
85 #define AES_BLOCK_SIZE 16
86 #define CTR_RFC3686_NONCE_SIZE 4
87 #define CTR_RFC3686_IV_SIZE 8
88 #define CTR_RFC3686_MAX_KEY_SIZE (AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE)
89
90 #ifdef CRYPTO_DEBUG
91 extern char debug_level;
92 #define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
93 #else
94 #define DPRINTF(level, format, args...)
95 #endif /* CRYPTO_DEBUG */
96
97 /* Function decleration */
98 int aes_chip_init(void);
99 u32 endian_swap(u32 input);
100 u32 input_swap(u32 input);
101 u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
102 void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
103 void des_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
104 int aes_memory_allocate(int value);
105 int des_memory_allocate(int value);
106 void memory_release(u32 *addr);
107
108
109 extern void ifx_deu_aes (void *ctx_arg, uint8_t *out_arg, const uint8_t *in_arg,
110 uint8_t *iv_arg, size_t nbytes, int encdec, int mode);
111 /* End of function decleration */
112
113 struct aes_ctx {
114 int key_length;
115 u32 buf[AES_MAX_KEY_SIZE];
116 u8 nonce[CTR_RFC3686_NONCE_SIZE];
117 };
118
119 extern int disable_deudma;
120 extern int disable_multiblock;
121
122 /*! \fn int aes_set_key (struct crypto_tfm *tfm, const uint8_t *in_key, unsigned int key_len)
123 * \ingroup IFX_AES_FUNCTIONS
124 * \brief sets the AES keys
125 * \param tfm linux crypto algo transform
126 * \param in_key input key
127 * \param key_len key lengths of 16, 24 and 32 bytes supported
128 * \return -EINVAL - bad key length, 0 - SUCCESS
129 */
130 int aes_set_key (struct crypto_tfm *tfm, const u8 *in_key, unsigned int key_len)
131 {
132 struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
133 unsigned long *flags = (unsigned long *) &tfm->crt_flags;
134
135 //printk("set_key in %s\n", __FILE__);
136
137 //aes_chip_init();
138
139 if (key_len != 16 && key_len != 24 && key_len != 32) {
140 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
141 return -EINVAL;
142 }
143
144 ctx->key_length = key_len;
145 DPRINTF(0, "ctx @%p, key_len %d, ctx->key_length %d\n", ctx, key_len, ctx->key_length);
146 memcpy ((u8 *) (ctx->buf), in_key, key_len);
147
148 return 0;
149 }
150
151
152 /*! \fn void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, size_t nbytes, int encdec, int mode)
153 * \ingroup IFX_AES_FUNCTIONS
154 * \brief main interface to AES hardware
155 * \param ctx_arg crypto algo context
156 * \param out_arg output bytestream
157 * \param in_arg input bytestream
158 * \param iv_arg initialization vector
159 * \param nbytes length of bytestream
160 * \param encdec 1 for encrypt; 0 for decrypt
161 * \param mode operation mode such as ebc, cbc, ctr
162 *
163 */
164 void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
165 u8 *iv_arg, size_t nbytes, int encdec, int mode)
166
167 {
168 /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
169 volatile struct aes_t *aes = (volatile struct aes_t *) AES_START;
170 struct aes_ctx *ctx = (struct aes_ctx *)ctx_arg;
171 u32 *in_key = ctx->buf;
172 unsigned long flag;
173 /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
174 int key_len = ctx->key_length;
175
176 int i = 0;
177 int byte_cnt = nbytes;
178
179
180 CRTCL_SECT_START;
181 /* 128, 192 or 256 bit key length */
182 aes->controlr.K = key_len / 8 - 2;
183 if (key_len == 128 / 8) {
184 aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
185 aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
186 aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
187 aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
188 }
189 else if (key_len == 192 / 8) {
190 aes->K5R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
191 aes->K4R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
192 aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
193 aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
194 aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 4));
195 aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 5));
196 }
197 else if (key_len == 256 / 8) {
198 aes->K7R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
199 aes->K6R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
200 aes->K5R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
201 aes->K4R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
202 aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 4));
203 aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 5));
204 aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 6));
205 aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 7));
206 }
207 else {
208 printk (KERN_ERR "[%s %s %d]: Invalid key_len : %d\n", __FILE__, __func__, __LINE__, key_len);
209 CRTCL_SECT_END;
210 return;// -EINVAL;
211 }
212
213 /* let HW pre-process DEcryption key in any case (even if
214 ENcryption is used). Key Valid (KV) bit is then only
215 checked in decryption routine! */
216 aes->controlr.PNK = 1;
217
218
219 aes->controlr.E_D = !encdec; //encryption
220 aes->controlr.O = mode; //0 ECB 1 CBC 2 OFB 3 CFB 4 CTR
221
222 //aes->controlr.F = 128; //default; only for CFB and OFB modes; change only for customer-specific apps
223 if (mode > 0) {
224 aes->IV3R = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
225 aes->IV2R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
226 aes->IV1R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
227 aes->IV0R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
228 };
229
230
231 i = 0;
232 while (byte_cnt >= 16) {
233
234 aes->ID3R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 0));
235 aes->ID2R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 1));
236 aes->ID1R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 2));
237 aes->ID0R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 3)); /* start crypto */
238
239 while (aes->controlr.BUS) {
240 // this will not take long
241 }
242
243 *((volatile u32 *) out_arg + (i * 4) + 0) = aes->OD3R;
244 *((volatile u32 *) out_arg + (i * 4) + 1) = aes->OD2R;
245 *((volatile u32 *) out_arg + (i * 4) + 2) = aes->OD1R;
246 *((volatile u32 *) out_arg + (i * 4) + 3) = aes->OD0R;
247
248 i++;
249 byte_cnt -= 16;
250 }
251
252 /* To handle all non-aligned bytes (not aligned to 16B size) */
253 if (byte_cnt) {
254 u8 temparea[16] = {0,};
255
256 memcpy(temparea, ((u32 *) in_arg + (i * 4)), byte_cnt);
257
258 aes->ID3R = INPUT_ENDIAN_SWAP(*((u32 *) temparea + 0));
259 aes->ID2R = INPUT_ENDIAN_SWAP(*((u32 *) temparea + 1));
260 aes->ID1R = INPUT_ENDIAN_SWAP(*((u32 *) temparea + 2));
261 aes->ID0R = INPUT_ENDIAN_SWAP(*((u32 *) temparea + 3)); /* start crypto */
262
263 while (aes->controlr.BUS) {
264 }
265
266 *((volatile u32 *) temparea + 0) = aes->OD3R;
267 *((volatile u32 *) temparea + 1) = aes->OD2R;
268 *((volatile u32 *) temparea + 2) = aes->OD1R;
269 *((volatile u32 *) temparea + 3) = aes->OD0R;
270
271 memcpy(((u32 *) out_arg + (i * 4)), temparea, byte_cnt);
272 }
273
274 //tc.chen : copy iv_arg back
275 if (mode > 0) {
276 *((u32 *) iv_arg) = DEU_ENDIAN_SWAP(aes->IV3R);
277 *((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(aes->IV2R);
278 *((u32 *) iv_arg + 2) = DEU_ENDIAN_SWAP(aes->IV1R);
279 *((u32 *) iv_arg + 3) = DEU_ENDIAN_SWAP(aes->IV0R);
280 }
281
282 CRTCL_SECT_END;
283 }
284
285 /*!
286 * \fn int ctr_rfc3686_aes_set_key (struct crypto_tfm *tfm, const uint8_t *in_key, unsigned int key_len)
287 * \ingroup IFX_AES_FUNCTIONS
288 * \brief sets RFC3686 key
289 * \param tfm linux crypto algo transform
290 * \param in_key input key
291 * \param key_len key lengths of 20, 28 and 36 bytes supported; last 4 bytes is nonce
292 * \return 0 - SUCCESS
293 * -EINVAL - bad key length
294 */
295 int ctr_rfc3686_aes_set_key (struct crypto_tfm *tfm, const uint8_t *in_key, unsigned int key_len)
296 {
297 struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
298 unsigned long *flags = (unsigned long *)&tfm->crt_flags;
299
300 //printk("ctr_rfc3686_aes_set_key in %s\n", __FILE__);
301
302 memcpy(ctx->nonce, in_key + (key_len - CTR_RFC3686_NONCE_SIZE),
303 CTR_RFC3686_NONCE_SIZE);
304
305 key_len -= CTR_RFC3686_NONCE_SIZE; // remove 4 bytes of nonce
306
307 if (key_len != 16 && key_len != 24 && key_len != 32) {
308 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
309 return -EINVAL;
310 }
311
312 ctx->key_length = key_len;
313
314 memcpy ((u8 *) (ctx->buf), in_key, key_len);
315
316 return 0;
317 }
318
319 /*! \fn void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, u32 nbytes, int encdec, int mode)
320 * \ingroup IFX_AES_FUNCTIONS
321 * \brief main interface with deu hardware in DMA mode
322 * \param ctx_arg crypto algo context
323 * \param out_arg output bytestream
324 * \param in_arg input bytestream
325 * \param iv_arg initialization vector
326 * \param nbytes length of bytestream
327 * \param encdec 1 for encrypt; 0 for decrypt
328 * \param mode operation mode such as ebc, cbc, ctr
329 */
330
331
332 //definitions from linux/include/crypto.h:
333 //#define CRYPTO_TFM_MODE_ECB 0x00000001
334 //#define CRYPTO_TFM_MODE_CBC 0x00000002
335 //#define CRYPTO_TFM_MODE_CFB 0x00000004
336 //#define CRYPTO_TFM_MODE_CTR 0x00000008
337 //#define CRYPTO_TFM_MODE_OFB 0x00000010 // not even defined
338 //but hardware definition: 0 ECB 1 CBC 2 OFB 3 CFB 4 CTR
339
340 /*! \fn void ifx_deu_aes_ecb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
341 * \ingroup IFX_AES_FUNCTIONS
342 * \brief sets AES hardware to ECB mode
343 * \param ctx crypto algo context
344 * \param dst output bytestream
345 * \param src input bytestream
346 * \param iv initialization vector
347 * \param nbytes length of bytestream
348 * \param encdec 1 for encrypt; 0 for decrypt
349 * \param inplace not used
350 */
351 void ifx_deu_aes_ecb (void *ctx, uint8_t *dst, const uint8_t *src,
352 uint8_t *iv, size_t nbytes, int encdec, int inplace)
353 {
354 ifx_deu_aes (ctx, dst, src, NULL, nbytes, encdec, 0);
355 }
356
357 /*! \fn void ifx_deu_aes_cbc (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
358 * \ingroup IFX_AES_FUNCTIONS
359 * \brief sets AES hardware to CBC mode
360 * \param ctx crypto algo context
361 * \param dst output bytestream
362 * \param src input bytestream
363 * \param iv initialization vector
364 * \param nbytes length of bytestream
365 * \param encdec 1 for encrypt; 0 for decrypt
366 * \param inplace not used
367 */
368 void ifx_deu_aes_cbc (void *ctx, uint8_t *dst, const uint8_t *src,
369 uint8_t *iv, size_t nbytes, int encdec, int inplace)
370 {
371 ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 1);
372 }
373
374 /*! \fn void ifx_deu_aes_ofb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
375 * \ingroup IFX_AES_FUNCTIONS
376 * \brief sets AES hardware to OFB mode
377 * \param ctx crypto algo context
378 * \param dst output bytestream
379 * \param src input bytestream
380 * \param iv initialization vector
381 * \param nbytes length of bytestream
382 * \param encdec 1 for encrypt; 0 for decrypt
383 * \param inplace not used
384 */
385 void ifx_deu_aes_ofb (void *ctx, uint8_t *dst, const uint8_t *src,
386 uint8_t *iv, size_t nbytes, int encdec, int inplace)
387 {
388 ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 2);
389 }
390
391 /*! \fn void ifx_deu_aes_cfb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
392 * \ingroup IFX_AES_FUNCTIONS
393 * \brief sets AES hardware to CFB mode
394 * \param ctx crypto algo context
395 * \param dst output bytestream
396 * \param src input bytestream
397 * \param iv initialization vector
398 * \param nbytes length of bytestream
399 * \param encdec 1 for encrypt; 0 for decrypt
400 * \param inplace not used
401 */
402 void ifx_deu_aes_cfb (void *ctx, uint8_t *dst, const uint8_t *src,
403 uint8_t *iv, size_t nbytes, int encdec, int inplace)
404 {
405 ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 3);
406 }
407
408 /*! \fn void ifx_deu_aes_ctr (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
409 * \ingroup IFX_AES_FUNCTIONS
410 * \brief sets AES hardware to CTR mode
411 * \param ctx crypto algo context
412 * \param dst output bytestream
413 * \param src input bytestream
414 * \param iv initialization vector
415 * \param nbytes length of bytestream
416 * \param encdec 1 for encrypt; 0 for decrypt
417 * \param inplace not used
418 */
419 void ifx_deu_aes_ctr (void *ctx, uint8_t *dst, const uint8_t *src,
420 uint8_t *iv, size_t nbytes, int encdec, int inplace)
421 {
422 ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 4);
423 }
424
425 /*! \fn void aes_encrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
426 * \ingroup IFX_AES_FUNCTIONS
427 * \brief encrypt AES_BLOCK_SIZE of data
428 * \param tfm linux crypto algo transform
429 * \param out output bytestream
430 * \param in input bytestream
431 */
432 void aes_encrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
433 {
434 struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
435 ifx_deu_aes (ctx, out, in, NULL, AES_BLOCK_SIZE,
436 CRYPTO_DIR_ENCRYPT, 0);
437 }
438
439 /*! \fn void aes_decrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
440 * \ingroup IFX_AES_FUNCTIONS
441 * \brief decrypt AES_BLOCK_SIZE of data
442 * \param tfm linux crypto algo transform
443 * \param out output bytestream
444 * \param in input bytestream
445 */
446 void aes_decrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
447 {
448 struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
449 ifx_deu_aes (ctx, out, in, NULL, AES_BLOCK_SIZE,
450 CRYPTO_DIR_DECRYPT, 0);
451 }
452
453 /*
454 * \brief AES function mappings
455 */
456 struct crypto_alg ifxdeu_aes_alg = {
457 .cra_name = "aes",
458 .cra_driver_name = "ifxdeu-aes",
459 .cra_priority = 300,
460 .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
461 .cra_blocksize = AES_BLOCK_SIZE,
462 .cra_ctxsize = sizeof(struct aes_ctx),
463 .cra_module = THIS_MODULE,
464 .cra_list = LIST_HEAD_INIT(ifxdeu_aes_alg.cra_list),
465 .cra_u = {
466 .cipher = {
467 .cia_min_keysize = AES_MIN_KEY_SIZE,
468 .cia_max_keysize = AES_MAX_KEY_SIZE,
469 .cia_setkey = aes_set_key,
470 .cia_encrypt = aes_encrypt,
471 .cia_decrypt = aes_decrypt,
472 }
473 }
474 };
475
476 /*! \fn int ecb_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
477 * \ingroup IFX_AES_FUNCTIONS
478 * \brief ECB AES encrypt using linux crypto blkcipher
479 * \param desc blkcipher descriptor
480 * \param dst output scatterlist
481 * \param src input scatterlist
482 * \param nbytes data size in bytes
483 * \return err
484 */
485 int ecb_aes_encrypt(struct blkcipher_desc *desc,
486 struct scatterlist *dst, struct scatterlist *src,
487 unsigned int nbytes)
488 {
489 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
490 struct blkcipher_walk walk;
491 int err;
492 unsigned int enc_bytes;
493
494 blkcipher_walk_init(&walk, dst, src, nbytes);
495 err = blkcipher_walk_virt(desc, &walk);
496
497 while ((nbytes = enc_bytes = walk.nbytes)) {
498 enc_bytes -= (nbytes % AES_BLOCK_SIZE);
499 ifx_deu_aes_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
500 NULL, enc_bytes, CRYPTO_DIR_ENCRYPT, 0);
501 nbytes &= AES_BLOCK_SIZE - 1;
502 err = blkcipher_walk_done(desc, &walk, nbytes);
503 }
504
505 return err;
506 }
507
508 /*! \fn int ecb_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
509 * \ingroup IFX_AES_FUNCTIONS
510 * \brief ECB AES decrypt using linux crypto blkcipher
511 * \param desc blkcipher descriptor
512 * \param dst output scatterlist
513 * \param src input scatterlist
514 * \param nbytes data size in bytes
515 * \return err
516 */
517 int ecb_aes_decrypt(struct blkcipher_desc *desc,
518 struct scatterlist *dst, struct scatterlist *src,
519 unsigned int nbytes)
520 {
521 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
522 struct blkcipher_walk walk;
523 int err;
524 unsigned int dec_bytes;
525
526 blkcipher_walk_init(&walk, dst, src, nbytes);
527 err = blkcipher_walk_virt(desc, &walk);
528
529 while ((nbytes = dec_bytes = walk.nbytes)) {
530 dec_bytes -= (nbytes % AES_BLOCK_SIZE);
531 ifx_deu_aes_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
532 NULL, dec_bytes, CRYPTO_DIR_DECRYPT, 0);
533 nbytes &= AES_BLOCK_SIZE - 1;
534 err = blkcipher_walk_done(desc, &walk, nbytes);
535 }
536
537 return err;
538 }
539
540 /*
541 * \brief AES function mappings
542 */
543 struct crypto_alg ifxdeu_ecb_aes_alg = {
544 .cra_name = "ecb(aes)",
545 .cra_driver_name = "ifxdeu-ecb(aes)",
546 .cra_priority = 400,
547 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
548 .cra_blocksize = AES_BLOCK_SIZE,
549 .cra_ctxsize = sizeof(struct aes_ctx),
550 .cra_type = &crypto_blkcipher_type,
551 .cra_module = THIS_MODULE,
552 .cra_list = LIST_HEAD_INIT(ifxdeu_ecb_aes_alg.cra_list),
553 .cra_u = {
554 .blkcipher = {
555 .min_keysize = AES_MIN_KEY_SIZE,
556 .max_keysize = AES_MAX_KEY_SIZE,
557 .setkey = aes_set_key,
558 .encrypt = ecb_aes_encrypt,
559 .decrypt = ecb_aes_decrypt,
560 }
561 }
562 };
563
564
565 /*! \fn int cbc_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
566 * \ingroup IFX_AES_FUNCTIONS
567 * \brief CBC AES encrypt using linux crypto blkcipher
568 * \param desc blkcipher descriptor
569 * \param dst output scatterlist
570 * \param src input scatterlist
571 * \param nbytes data size in bytes
572 * \return err
573 */
574 int cbc_aes_encrypt(struct blkcipher_desc *desc,
575 struct scatterlist *dst, struct scatterlist *src,
576 unsigned int nbytes)
577 {
578 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
579 struct blkcipher_walk walk;
580 int err;
581 unsigned int enc_bytes;
582
583 blkcipher_walk_init(&walk, dst, src, nbytes);
584 err = blkcipher_walk_virt(desc, &walk);
585
586 while ((nbytes = enc_bytes = walk.nbytes)) {
587 u8 *iv = walk.iv;
588 enc_bytes -= (nbytes % AES_BLOCK_SIZE);
589 ifx_deu_aes_cbc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
590 iv, enc_bytes, CRYPTO_DIR_ENCRYPT, 0);
591 nbytes &= AES_BLOCK_SIZE - 1;
592 err = blkcipher_walk_done(desc, &walk, nbytes);
593 }
594
595 return err;
596 }
597
598 /*! \fn int cbc_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
599 * \ingroup IFX_AES_FUNCTIONS
600 * \brief CBC AES decrypt using linux crypto blkcipher
601 * \param desc blkcipher descriptor
602 * \param dst output scatterlist
603 * \param src input scatterlist
604 * \param nbytes data size in bytes
605 * \return err
606 */
607 int cbc_aes_decrypt(struct blkcipher_desc *desc,
608 struct scatterlist *dst, struct scatterlist *src,
609 unsigned int nbytes)
610 {
611 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
612 struct blkcipher_walk walk;
613 int err;
614 unsigned int dec_bytes;
615
616 blkcipher_walk_init(&walk, dst, src, nbytes);
617 err = blkcipher_walk_virt(desc, &walk);
618
619 while ((nbytes = dec_bytes = walk.nbytes)) {
620 u8 *iv = walk.iv;
621 dec_bytes -= (nbytes % AES_BLOCK_SIZE);
622 ifx_deu_aes_cbc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
623 iv, dec_bytes, CRYPTO_DIR_DECRYPT, 0);
624 nbytes &= AES_BLOCK_SIZE - 1;
625 err = blkcipher_walk_done(desc, &walk, nbytes);
626 }
627
628 return err;
629 }
630
631 /*
632 * \brief AES function mappings
633 */
634 struct crypto_alg ifxdeu_cbc_aes_alg = {
635 .cra_name = "cbc(aes)",
636 .cra_driver_name = "ifxdeu-cbc(aes)",
637 .cra_priority = 400,
638 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
639 .cra_blocksize = AES_BLOCK_SIZE,
640 .cra_ctxsize = sizeof(struct aes_ctx),
641 .cra_type = &crypto_blkcipher_type,
642 .cra_module = THIS_MODULE,
643 .cra_list = LIST_HEAD_INIT(ifxdeu_cbc_aes_alg.cra_list),
644 .cra_u = {
645 .blkcipher = {
646 .min_keysize = AES_MIN_KEY_SIZE,
647 .max_keysize = AES_MAX_KEY_SIZE,
648 .ivsize = AES_BLOCK_SIZE,
649 .setkey = aes_set_key,
650 .encrypt = cbc_aes_encrypt,
651 .decrypt = cbc_aes_decrypt,
652 }
653 }
654 };
655
656
657 /*! \fn int ctr_basic_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
658 * \ingroup IFX_AES_FUNCTIONS
659 * \brief Counter mode AES encrypt using linux crypto blkcipher
660 * \param desc blkcipher descriptor
661 * \param dst output scatterlist
662 * \param src input scatterlist
663 * \param nbytes data size in bytes
664 * \return err
665 */
666 int ctr_basic_aes_encrypt(struct blkcipher_desc *desc,
667 struct scatterlist *dst, struct scatterlist *src,
668 unsigned int nbytes)
669 {
670 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
671 struct blkcipher_walk walk;
672 int err;
673
674 blkcipher_walk_init(&walk, dst, src, nbytes);
675 err = blkcipher_walk_virt(desc, &walk);
676
677 while ((nbytes = walk.nbytes)) {
678 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
679 walk.iv, nbytes, CRYPTO_DIR_ENCRYPT, 0);
680 err = blkcipher_walk_done(desc, &walk, 0);
681 }
682 return err;
683 }
684
685 /*! \fn int ctr_basic_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
686 * \ingroup IFX_AES_FUNCTIONS
687 * \brief Counter mode AES decrypt using linux crypto blkcipher
688 * \param desc blkcipher descriptor
689 * \param dst output scatterlist
690 * \param src input scatterlist
691 * \param nbytes data size in bytes
692 * \return err
693 */
694 int ctr_basic_aes_decrypt(struct blkcipher_desc *desc,
695 struct scatterlist *dst, struct scatterlist *src,
696 unsigned int nbytes)
697 {
698 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
699 struct blkcipher_walk walk;
700 int err;
701
702 blkcipher_walk_init(&walk, dst, src, nbytes);
703 err = blkcipher_walk_virt(desc, &walk);
704
705 while ((nbytes = walk.nbytes)) {
706 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
707 walk.iv, nbytes, CRYPTO_DIR_DECRYPT, 0);
708 err = blkcipher_walk_done(desc, &walk, 0);
709 }
710
711 return err;
712 }
713
714 /*
715 * \brief AES function mappings
716 */
717 struct crypto_alg ifxdeu_ctr_basic_aes_alg = {
718 .cra_name = "ctr(aes)",
719 .cra_driver_name = "ifxdeu-ctr(aes)",
720 .cra_priority = 400,
721 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
722 .cra_blocksize = 1,
723 .cra_ctxsize = sizeof(struct aes_ctx),
724 .cra_type = &crypto_blkcipher_type,
725 .cra_module = THIS_MODULE,
726 .cra_list = LIST_HEAD_INIT(ifxdeu_ctr_basic_aes_alg.cra_list),
727 .cra_u = {
728 .blkcipher = {
729 .min_keysize = AES_MIN_KEY_SIZE,
730 .max_keysize = AES_MAX_KEY_SIZE,
731 .ivsize = AES_BLOCK_SIZE,
732 .setkey = aes_set_key,
733 .encrypt = ctr_basic_aes_encrypt,
734 .decrypt = ctr_basic_aes_decrypt,
735 }
736 }
737 };
738
739
740 /*! \fn int ctr_rfc3686_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
741 * \ingroup IFX_AES_FUNCTIONS
742 * \brief Counter mode AES (rfc3686) encrypt using linux crypto blkcipher
743 * \param desc blkcipher descriptor
744 * \param dst output scatterlist
745 * \param src input scatterlist
746 * \param nbytes data size in bytes
747 * \return err
748 */
749 int ctr_rfc3686_aes_encrypt(struct blkcipher_desc *desc,
750 struct scatterlist *dst, struct scatterlist *src,
751 unsigned int nbytes)
752 {
753 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
754 struct blkcipher_walk walk;
755 int err, bsize = nbytes;
756 u8 rfc3686_iv[16];
757
758 blkcipher_walk_init(&walk, dst, src, nbytes);
759 err = blkcipher_walk_virt(desc, &walk);
760
761 /* set up counter block */
762 memcpy(rfc3686_iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
763 memcpy(rfc3686_iv + CTR_RFC3686_NONCE_SIZE, walk.iv, CTR_RFC3686_IV_SIZE);
764
765 /* initialize counter portion of counter block */
766 *(__be32 *)(rfc3686_iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
767 cpu_to_be32(1);
768
769 /* scatterlist source is the same size as request size, just process once */
770 if (nbytes == walk.nbytes) {
771 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
772 rfc3686_iv, nbytes, CRYPTO_DIR_ENCRYPT, 0);
773 nbytes -= walk.nbytes;
774 err = blkcipher_walk_done(desc, &walk, nbytes);
775 return err;
776 }
777
778 while ((nbytes = walk.nbytes) && (walk.nbytes >= AES_BLOCK_SIZE)) {
779 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
780 rfc3686_iv, nbytes, CRYPTO_DIR_ENCRYPT, 0);
781
782 nbytes -= walk.nbytes;
783 bsize -= walk.nbytes;
784 err = blkcipher_walk_done(desc, &walk, nbytes);
785 }
786
787 /* to handle remaining bytes < AES_BLOCK_SIZE */
788 if (walk.nbytes) {
789 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
790 rfc3686_iv, walk.nbytes, CRYPTO_DIR_ENCRYPT, 0);
791 err = blkcipher_walk_done(desc, &walk, 0);
792 }
793
794 return err;
795 }
796
797 /*! \fn int ctr_rfc3686_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
798 * \ingroup IFX_AES_FUNCTIONS
799 * \brief Counter mode AES (rfc3686) decrypt using linux crypto blkcipher
800 * \param desc blkcipher descriptor
801 * \param dst output scatterlist
802 * \param src input scatterlist
803 * \param nbytes data size in bytes
804 * \return err
805 */
806 int ctr_rfc3686_aes_decrypt(struct blkcipher_desc *desc,
807 struct scatterlist *dst, struct scatterlist *src,
808 unsigned int nbytes)
809 {
810 struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
811 struct blkcipher_walk walk;
812 int err, bsize = nbytes;
813 u8 rfc3686_iv[16];
814
815 blkcipher_walk_init(&walk, dst, src, nbytes);
816 err = blkcipher_walk_virt(desc, &walk);
817
818 /* set up counter block */
819 memcpy(rfc3686_iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
820 memcpy(rfc3686_iv + CTR_RFC3686_NONCE_SIZE, walk.iv, CTR_RFC3686_IV_SIZE);
821
822 /* initialize counter portion of counter block */
823 *(__be32 *)(rfc3686_iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
824 cpu_to_be32(1);
825
826 /* scatterlist source is the same size as request size, just process once */
827 if (nbytes == walk.nbytes) {
828 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
829 rfc3686_iv, nbytes, CRYPTO_DIR_ENCRYPT, 0);
830 nbytes -= walk.nbytes;
831 err = blkcipher_walk_done(desc, &walk, nbytes);
832 return err;
833 }
834
835 while ((nbytes = walk.nbytes) % (walk.nbytes >= AES_BLOCK_SIZE)) {
836 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
837 rfc3686_iv, nbytes, CRYPTO_DIR_DECRYPT, 0);
838
839 nbytes -= walk.nbytes;
840 bsize -= walk.nbytes;
841 err = blkcipher_walk_done(desc, &walk, nbytes);
842 }
843
844 /* to handle remaining bytes < AES_BLOCK_SIZE */
845 if (walk.nbytes) {
846 ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
847 rfc3686_iv, walk.nbytes, CRYPTO_DIR_ENCRYPT, 0);
848 err = blkcipher_walk_done(desc, &walk, 0);
849 }
850
851 return err;
852 }
853
854 /*
855 * \brief AES function mappings
856 */
857 struct crypto_alg ifxdeu_ctr_rfc3686_aes_alg = {
858 .cra_name = "rfc3686(ctr(aes))",
859 .cra_driver_name = "ifxdeu-ctr-rfc3686(aes)",
860 .cra_priority = 400,
861 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
862 .cra_blocksize = 1,
863 .cra_ctxsize = sizeof(struct aes_ctx),
864 .cra_type = &crypto_blkcipher_type,
865 .cra_module = THIS_MODULE,
866 .cra_list = LIST_HEAD_INIT(ifxdeu_ctr_rfc3686_aes_alg.cra_list),
867 .cra_u = {
868 .blkcipher = {
869 .min_keysize = AES_MIN_KEY_SIZE,
870 .max_keysize = CTR_RFC3686_MAX_KEY_SIZE,
871 .ivsize = CTR_RFC3686_IV_SIZE,
872 .setkey = ctr_rfc3686_aes_set_key,
873 .encrypt = ctr_rfc3686_aes_encrypt,
874 .decrypt = ctr_rfc3686_aes_decrypt,
875 }
876 }
877 };
878
879
880 /*! \fn int ifxdeu_init_aes (void)
881 * \ingroup IFX_AES_FUNCTIONS
882 * \brief function to initialize AES driver
883 * \return ret
884 */
885 int ifxdeu_init_aes (void)
886 {
887 int ret = -ENOSYS;
888
889 aes_chip_init();
890
891 if ((ret = crypto_register_alg(&ifxdeu_aes_alg)))
892 goto aes_err;
893
894 if ((ret = crypto_register_alg(&ifxdeu_ecb_aes_alg)))
895 goto ecb_aes_err;
896
897 if ((ret = crypto_register_alg(&ifxdeu_cbc_aes_alg)))
898 goto cbc_aes_err;
899
900 if ((ret = crypto_register_alg(&ifxdeu_ctr_basic_aes_alg)))
901 goto ctr_basic_aes_err;
902
903 if ((ret = crypto_register_alg(&ifxdeu_ctr_rfc3686_aes_alg)))
904 goto ctr_rfc3686_aes_err;
905
906 CRTCL_SECT_INIT;
907
908
909 printk (KERN_NOTICE "IFX DEU AES initialized%s%s.\n", disable_multiblock ? "" : " (multiblock)", disable_deudma ? "" : " (DMA)");
910 return ret;
911
912 ctr_rfc3686_aes_err:
913 crypto_unregister_alg(&ifxdeu_ctr_rfc3686_aes_alg);
914 printk (KERN_ERR "IFX ctr_rfc3686_aes initialization failed!\n");
915 return ret;
916 ctr_basic_aes_err:
917 crypto_unregister_alg(&ifxdeu_ctr_basic_aes_alg);
918 printk (KERN_ERR "IFX ctr_basic_aes initialization failed!\n");
919 return ret;
920 cbc_aes_err:
921 crypto_unregister_alg(&ifxdeu_cbc_aes_alg);
922 printk (KERN_ERR "IFX cbc_aes initialization failed!\n");
923 return ret;
924 ecb_aes_err:
925 crypto_unregister_alg(&ifxdeu_ecb_aes_alg);
926 printk (KERN_ERR "IFX aes initialization failed!\n");
927 return ret;
928 aes_err:
929 printk(KERN_ERR "IFX DEU AES initialization failed!\n");
930
931 return ret;
932 }
933
934 /*! \fn void ifxdeu_fini_aes (void)
935 * \ingroup IFX_AES_FUNCTIONS
936 * \brief unregister aes driver
937 */
938 void ifxdeu_fini_aes (void)
939 {
940 crypto_unregister_alg (&ifxdeu_aes_alg);
941 crypto_unregister_alg (&ifxdeu_ecb_aes_alg);
942 crypto_unregister_alg (&ifxdeu_cbc_aes_alg);
943 crypto_unregister_alg (&ifxdeu_ctr_basic_aes_alg);
944 crypto_unregister_alg (&ifxdeu_ctr_rfc3686_aes_alg);
945
946 }
947
948
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