hostapd: Fix compile against mbedtsl 3.6
[openwrt/staging/nbd.git] / target / linux / ipq806x / files-6.1 / arch / arm / boot / dts / qcom-ipq8065-nighthawk.dtsi
1 #include "qcom-ipq8065-smb208.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/leds/common.h>
5
6 / {
7 memory@0 {
8 reg = <0x42000000 0x1e000000>;
9 device_type = "memory";
10 };
11
12 reserved-memory {
13 rsvd@5fe00000 {
14 reg = <0x5fe00000 0x200000>;
15 reusable;
16 };
17
18 ramoops@42100000 {
19 compatible = "ramoops";
20 reg = <0x42100000 0x40000>;
21 record-size = <0x4000>;
22 console-size = <0x4000>;
23 ftrace-size = <0x4000>;
24 pmsg-size = <0x4000>;
25 };
26 };
27
28 aliases {
29 label-mac-device = &gmac2;
30
31 led-boot = &power_white;
32 led-failsafe = &power_amber;
33 led-running = &power_white;
34 led-upgrade = &power_amber;
35
36 mdio-gpio0 = &mdio0;
37 };
38
39 keys {
40 compatible = "gpio-keys";
41 pinctrl-0 = <&button_pins>;
42 pinctrl-names = "default";
43
44 wifi {
45 label = "wifi";
46 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
47 linux,code = <KEY_RFKILL>;
48 debounce-interval = <60>;
49 wakeup-source;
50 };
51
52 reset {
53 label = "reset";
54 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
55 linux,code = <KEY_RESTART>;
56 debounce-interval = <60>;
57 wakeup-source;
58 };
59
60 wps {
61 label = "wps";
62 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
63 linux,code = <KEY_WPS_BUTTON>;
64 debounce-interval = <60>;
65 wakeup-source;
66 };
67 };
68
69 leds: leds {
70 compatible = "gpio-leds";
71 pinctrl-0 = <&led_pins>;
72 pinctrl-names = "default";
73
74 power_white: power_white {
75 function = LED_FUNCTION_POWER;
76 color = <LED_COLOR_ID_WHITE>;
77 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
78 default-state = "keep";
79 };
80
81 power_amber: power_amber {
82 function = LED_FUNCTION_POWER;
83 color = <LED_COLOR_ID_AMBER>;
84 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
85 };
86
87 wan_white {
88 function = LED_FUNCTION_WAN;
89 color = <LED_COLOR_ID_WHITE>;
90 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
91 };
92
93 wan_amber {
94 function = LED_FUNCTION_WAN;
95 color = <LED_COLOR_ID_AMBER>;
96 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
97 };
98
99 wifi {
100 label = "white:wifi";
101 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
102 };
103
104 wps {
105 function = LED_FUNCTION_WPS;
106 color = <LED_COLOR_ID_WHITE>;
107 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
108 };
109 };
110 };
111
112 &qcom_pinmux {
113 button_pins: button_pins {
114 mux {
115 pins = "gpio6", "gpio54", "gpio65";
116 function = "gpio";
117 drive-strength = <2>;
118 bias-pull-up;
119 };
120 };
121
122 led_pins: led_pins {
123 mux {
124 pins = "gpio7", "gpio8", "gpio9",
125 "gpio22", "gpio23", "gpio24",
126 "gpio26", "gpio53", "gpio64";
127 function = "gpio";
128 drive-strength = <2>;
129 bias-pull-down;
130 };
131 };
132
133 mdio0_pins: mdio0-pins {
134 clk {
135 pins = "gpio1";
136 input-disable;
137 };
138 };
139
140 rgmii2_pins: rgmii2-pins {
141 tx {
142 pins = "gpio27", "gpio28", "gpio29",
143 "gpio30", "gpio31", "gpio32";
144 input-disable;
145 };
146 };
147
148 spi_pins: spi_pins {
149 mux {
150 pins = "gpio18", "gpio19", "gpio21";
151 function = "gsbi5";
152 bias-pull-down;
153 };
154
155 data {
156 pins = "gpio18", "gpio19";
157 drive-strength = <10>;
158 };
159
160 cs {
161 pins = "gpio20";
162 drive-strength = <10>;
163 bias-pull-up;
164 };
165
166 clk {
167 pins = "gpio21";
168 drive-strength = <12>;
169 };
170 };
171
172 spi6_pins: spi6_pins {
173 mux {
174 pins = "gpio55", "gpio56", "gpio58";
175 function = "gsbi6";
176 bias-pull-down;
177 };
178
179 mosi {
180 pins = "gpio55";
181 drive-strength = <12>;
182 };
183
184 miso {
185 pins = "gpio56";
186 drive-strength = <14>;
187 };
188
189 cs {
190 pins = "gpio57";
191 drive-strength = <12>;
192 bias-pull-up;
193 };
194
195 clk {
196 pins = "gpio58";
197 drive-strength = <12>;
198 };
199
200 reset {
201 pins = "gpio33";
202 drive-strength = <10>;
203 bias-pull-down;
204 output-high;
205 };
206 };
207
208 usb0_pwr_en_pins: usb0_pwr_en_pins {
209 mux {
210 pins = "gpio15";
211 function = "gpio";
212 drive-strength = <12>;
213 bias-pull-down;
214 output-high;
215 };
216 };
217
218 usb1_pwr_en_pins: usb1_pwr_en_pins {
219 mux {
220 pins = "gpio16", "gpio68";
221 function = "gpio";
222 drive-strength = <12>;
223 bias-pull-down;
224 output-high;
225 };
226 };
227 };
228
229 &nand {
230 status = "okay";
231
232 nand@0 {
233 reg = <0>;
234 compatible = "qcom,nandcs";
235
236 nand-ecc-strength = <4>;
237 nand-bus-width = <8>;
238 nand-ecc-step-size = <512>;
239
240 nand-is-boot-medium;
241 qcom,boot-partitions = <0x0 0x1180000>;
242
243 partitions: partitions {
244 compatible = "fixed-partitions";
245 #address-cells = <1>;
246 #size-cells = <1>;
247
248 partition@0 {
249 label = "qcadata";
250 reg = <0x0000000 0x0c80000>;
251 read-only;
252 };
253
254 partition@c80000 {
255 label = "APPSBL";
256 reg = <0x0c80000 0x0500000>;
257 read-only;
258 };
259
260 partition@1180000 {
261 label = "APPSBLENV";
262 reg = <0x1180000 0x0080000>;
263 read-only;
264 };
265
266 art: partition@1200000 {
267 label = "art";
268 reg = <0x1200000 0x0140000>;
269 read-only;
270
271 nvmem-layout {
272 compatible = "fixed-layout";
273 #address-cells = <1>;
274 #size-cells = <1>;
275
276 macaddr_art_0: macaddr@0 {
277 reg = <0x0 0x6>;
278 };
279
280 macaddr_art_6: macaddr@6 {
281 compatible = "mac-base";
282 reg = <0x6 0x6>;
283 #nvmem-cell-cells = <1>;
284 };
285
286 macaddr_art_c: macaddr@c {
287 reg = <0xc 0x6>;
288 };
289
290 precal_art_1000: precal@1000 {
291 reg = <0x1000 0x2f20>;
292 };
293
294 precal_art_5000: precal@5000 {
295 reg = <0x5000 0x2f20>;
296 };
297 };
298 };
299
300 partition@1340000 {
301 label = "artbak";
302 reg = <0x1340000 0x0140000>;
303 read-only;
304 };
305
306 partition@1480000 {
307 label = "kernel";
308 reg = <0x1480000 0x0400000>;
309 };
310 };
311 };
312 };
313
314 &mdio0 {
315 status = "okay";
316
317 pinctrl-0 = <&mdio0_pins>;
318 pinctrl-names = "default";
319
320 switch@10 {
321 compatible = "qca,qca8337";
322 #address-cells = <1>;
323 #size-cells = <0>;
324 reg = <0x10>;
325
326 ports {
327 #address-cells = <1>;
328 #size-cells = <0>;
329
330 port@0 {
331 reg = <0>;
332 label = "cpu";
333 ethernet = <&gmac1>;
334 phy-mode = "rgmii";
335 tx-internal-delay-ps = <1000>;
336 rx-internal-delay-ps = <1000>;
337
338 fixed-link {
339 speed = <1000>;
340 full-duplex;
341 };
342 };
343
344 port@1 {
345 reg = <1>;
346 label = "lan4";
347 phy-mode = "internal";
348 phy-handle = <&phy_port1>;
349 };
350
351 port@2 {
352 reg = <2>;
353 label = "lan3";
354 phy-mode = "internal";
355 phy-handle = <&phy_port2>;
356 };
357
358 port@3 {
359 reg = <3>;
360 label = "lan2";
361 phy-mode = "internal";
362 phy-handle = <&phy_port3>;
363 };
364
365 port@4 {
366 reg = <4>;
367 label = "lan1";
368 phy-mode = "internal";
369 phy-handle = <&phy_port4>;
370 };
371
372 port@5 {
373 reg = <5>;
374 label = "wan";
375 phy-mode = "internal";
376 phy-handle = <&phy_port5>;
377 };
378
379 port@6 {
380 reg = <6>;
381 label = "cpu";
382 ethernet = <&gmac2>;
383 phy-mode = "sgmii";
384 qca,sgmii-enable-pll;
385
386 fixed-link {
387 speed = <1000>;
388 full-duplex;
389 };
390 };
391 };
392
393 mdio {
394 #address-cells = <1>;
395 #size-cells = <0>;
396
397 phy_port1: phy@0 {
398 reg = <0>;
399 };
400
401 phy_port2: phy@1 {
402 reg = <1>;
403 };
404
405 phy_port3: phy@2 {
406 reg = <2>;
407 };
408
409 phy_port4: phy@3 {
410 reg = <3>;
411 };
412
413 phy_port5: phy@4 {
414 reg = <4>;
415 };
416 };
417 };
418 };
419
420 &gmac1 {
421 status = "okay";
422
423 phy-mode = "rgmii";
424 qcom,id = <1>;
425 qcom,phy_mdio_addr = <4>;
426 qcom,poll_required = <0>;
427 qcom,rgmii_delay = <1>;
428 qcom,phy_mii_type = <0>;
429 qcom,emulation = <0>;
430 qcom,irq = <255>;
431 mdiobus = <&mdio0>;
432
433 pinctrl-0 = <&rgmii2_pins>;
434 pinctrl-names = "default";
435
436 nvmem-cells = <&macaddr_art_6 0>;
437 nvmem-cell-names = "mac-address";
438
439 fixed-link {
440 speed = <1000>;
441 full-duplex;
442 };
443 };
444
445 &gmac2 {
446 status = "okay";
447
448 phy-mode = "sgmii";
449 qcom,id = <2>;
450 qcom,phy_mdio_addr = <0>; /* none */
451 qcom,poll_required = <0>; /* no polling */
452 qcom,rgmii_delay = <0>;
453 qcom,phy_mii_type = <1>;
454 qcom,emulation = <0>;
455 qcom,irq = <258>;
456 mdiobus = <&mdio0>;
457
458 nvmem-cells = <&macaddr_art_0>;
459 nvmem-cell-names = "mac-address";
460
461 fixed-link {
462 speed = <1000>;
463 full-duplex;
464 };
465 };
466
467 &adm_dma {
468 status = "okay";
469 };
470
471 &sata_phy {
472 status = "okay";
473 };
474
475 &sata {
476 status = "okay";
477 };
478
479 &hs_phy_0 {
480 status = "okay";
481 };
482
483 &ss_phy_0 {
484 status = "okay";
485 };
486
487 &usb3_0 {
488 status = "okay";
489
490 pinctrl-0 = <&usb0_pwr_en_pins>;
491 pinctrl-names = "default";
492 };
493
494 &hs_phy_1 {
495 status = "okay";
496 };
497
498 &ss_phy_1 {
499 status = "okay";
500 };
501
502 &usb3_1 {
503 status = "okay";
504
505 pinctrl-0 = <&usb1_pwr_en_pins>;
506 pinctrl-names = "default";
507 };
508
509 &pcie0 {
510 status = "okay";
511
512 bridge@0,0 {
513 reg = <0x00000000 0 0 0 0>;
514 #address-cells = <3>;
515 #size-cells = <2>;
516 ranges;
517
518 wifi0: wifi@1,0 {
519 compatible = "pci168c,0046";
520 reg = <0x00010000 0 0 0 0>;
521 };
522 };
523 };
524
525 &pcie1 {
526 status = "okay";
527
528 max-link-speed = <1>;
529
530 bridge@0,0 {
531 reg = <0x00000000 0 0 0 0>;
532 #address-cells = <3>;
533 #size-cells = <2>;
534 ranges;
535
536 wifi1: wifi@1,0 {
537 compatible = "pci168c,0046";
538 reg = <0x00010000 0 0 0 0>;
539 };
540 };
541 };