--- /dev/null
+From fd66cd0d79cb836badecb91fdd19afd32afbb443 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 12:02:08 -0800
+Subject: [PATCH 13/16] ARM: dts: NSP: Update ethernet switch node name
+
+Update the switch unit name from srab to ethernet-switch, allowing us
+to fix warnings such as:
+
+ CHECK arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml
+ arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml:
+ srab@18007000: $nodename:0: 'srab@18007000' does not match
+ '^(ethernet-)?switch(@.*)?$'
+ From schema:
+ Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm-nsp.dtsi
++++ b/arch/arm/boot/dts/bcm-nsp.dtsi
+@@ -385,7 +385,7 @@
+ clock-names = "apb_pclk";
+ };
+
+- srab: srab@36000 {
++ srab: ethernet-switch@36000 {
+ compatible = "brcm,nsp-srab";
+ reg = <0x36000 0x1000>,
+ <0x3f308 0x8>,
--- /dev/null
+From 8b0235d1deace8f1bd8cdd149d698fee3974fdf4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 12:06:15 -0800
+Subject: [PATCH 14/16] ARM: dts: NSP: Fix Ethernet switch SGMII register name
+
+The register name should be "sgmii_config", not "sgmii", this is not a
+functional change since no code is currently looking for that register
+by name (or at all).
+
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm-nsp.dtsi
++++ b/arch/arm/boot/dts/bcm-nsp.dtsi
+@@ -390,7 +390,7 @@
+ reg = <0x36000 0x1000>,
+ <0x3f308 0x8>,
+ <0x3f410 0xc>;
+- reg-names = "srab", "mux_config", "sgmii";
++ reg-names = "srab", "mux_config", "sgmii_config";
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
--- /dev/null
+From 42791b317db4cda36751f57bada27857849811d3 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 17:41:32 -0800
+Subject: [PATCH 15/16] ARM: dts: NSP: Add a SRAB compatible string for each
+ board
+
+Provide a valid compatible string for the Ethernet switch node based on
+the board including the switch. This allows us to have sane defaults and
+silences the following warnings:
+
+ arch/arm/boot/dts/bcm958522er.dt.yaml:
+ ethernet-switch@36000: compatible: 'oneOf' conditional failed,
+one
+ must be fixed:
+ ['brcm,bcm5301x-srab'] is too short
+ 'brcm,bcm5325' was expected
+ 'brcm,bcm53115' was expected
+ 'brcm,bcm53125' was expected
+ 'brcm,bcm53128' was expected
+ 'brcm,bcm5365' was expected
+ 'brcm,bcm5395' was expected
+ 'brcm,bcm5389' was expected
+ 'brcm,bcm5397' was expected
+ 'brcm,bcm5398' was expected
+ 'brcm,bcm11360-srab' was expected
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm53010-srab',
+ 'brcm,bcm53011-srab', 'brcm,bcm53012-srab', 'brcm,bcm53018-srab',
+ 'brcm,bcm53019-srab']
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm11404-srab',
+ 'brcm,bcm11407-srab', 'brcm,bcm11409-srab', 'brcm,bcm58310-srab',
+ 'brcm,bcm58311-srab', 'brcm,bcm58313-srab']
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm58522-srab',
+ 'brcm,bcm58523-srab', 'brcm,bcm58525-srab', 'brcm,bcm58622-srab',
+ 'brcm,bcm58623-srab', 'brcm,bcm58625-srab', 'brcm,bcm88312-srab']
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm3384-switch',
+ 'brcm,bcm6328-switch', 'brcm,bcm6368-switch']
+ From schema:
+ Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm958522er.dts | 4 ++++
+ arch/arm/boot/dts/bcm958525er.dts | 4 ++++
+ arch/arm/boot/dts/bcm958525xmc.dts | 4 ++++
+ 3 files changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm958522er.dts
++++ b/arch/arm/boot/dts/bcm958522er.dts
+@@ -178,3 +178,7 @@
+ &xhci {
+ status = "okay";
+ };
++
++&srab {
++ compatible = "brcm,bcm58522-srab", "brcm,nsp-srab";
++};
+--- a/arch/arm/boot/dts/bcm958525er.dts
++++ b/arch/arm/boot/dts/bcm958525er.dts
+@@ -190,3 +190,7 @@
+ &xhci {
+ status = "okay";
+ };
++
++&srab {
++ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
++};
+--- a/arch/arm/boot/dts/bcm958525xmc.dts
++++ b/arch/arm/boot/dts/bcm958525xmc.dts
+@@ -210,3 +210,7 @@
+ &xhci {
+ status = "okay";
+ };
++
++&srab {
++ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
++};
--- /dev/null
+From 51e40c25aa18d926a8eb1c07289d01611b21123a Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 17:44:33 -0800
+Subject: [PATCH 16/16] ARM: dts: NSP: Provide defaults ports container node
+
+Provide an empty 'ports' container node with the correct #address-cells
+and #size-cells properties. This silences the following warning:
+
+arch/arm/boot/dts/bcm958522er.dt.yaml:
+ethernet-switch@36000: 'oneOf' conditional failed, one must be fixed:
+ 'ports' is a required property
+ 'ethernet-ports' is a required property
+ From schema:
+Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++++
+ arch/arm/boot/dts/bcm958622hr.dts | 3 ---
+ arch/arm/boot/dts/bcm958623hr.dts | 3 ---
+ arch/arm/boot/dts/bcm958625hr.dts | 3 ---
+ arch/arm/boot/dts/bcm958625k.dts | 3 ---
+ arch/arm/boot/dts/bcm988312hr.dts | 3 ---
+ 6 files changed, 4 insertions(+), 15 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm-nsp.dtsi
++++ b/arch/arm/boot/dts/bcm-nsp.dtsi
+@@ -420,6 +420,10 @@
+ status = "disabled";
+
+ /* ports are defined in board DTS */
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
+ };
+
+ i2c0: i2c@38000 {
+--- a/arch/arm/boot/dts/bcm958622hr.dts
++++ b/arch/arm/boot/dts/bcm958622hr.dts
+@@ -176,9 +176,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ label = "port0";
+ reg = <0>;
+--- a/arch/arm/boot/dts/bcm958623hr.dts
++++ b/arch/arm/boot/dts/bcm958623hr.dts
+@@ -180,9 +180,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ label = "port0";
+ reg = <0>;
+--- a/arch/arm/boot/dts/bcm958625hr.dts
++++ b/arch/arm/boot/dts/bcm958625hr.dts
+@@ -195,9 +195,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ label = "port0";
+ reg = <0>;
+--- a/arch/arm/boot/dts/bcm958625k.dts
++++ b/arch/arm/boot/dts/bcm958625k.dts
+@@ -216,9 +216,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ label = "port0";
+ reg = <0>;
+--- a/arch/arm/boot/dts/bcm988312hr.dts
++++ b/arch/arm/boot/dts/bcm988312hr.dts
+@@ -184,9 +184,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ label = "port0";
+ reg = <0>;
--- /dev/null
+From b660269cba748dfd07eb5551a88ff34d5ea0b86e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 16 Apr 2021 15:37:48 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix NAND nodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This matches nand-controller.yaml requirements.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+@@ -24,8 +24,8 @@
+ reg = <0x00000000 0x08000000>;
+ };
+
+- nand: nand@18028000 {
+- nandcs@0 {
++ nand_controller: nand-controller@18028000 {
++ nand@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
++++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+@@ -25,8 +25,8 @@
+ <0x88000000 0x08000000>;
+ };
+
+- nand: nand@18028000 {
+- nandcs@0 {
++ nand_controller: nand-controller@18028000 {
++ nand@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
++++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
+@@ -6,8 +6,8 @@
+ */
+
+ / {
+- nand@18028000 {
+- nandcs: nandcs@0 {
++ nand-controller@18028000 {
++ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -500,7 +500,7 @@
+ reg = <0x18004000 0x14>;
+ };
+
+- nand: nand@18028000 {
++ nand_controller: nand-controller@18028000 {
+ compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
+ reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
+ reg-names = "nand", "iproc-idm", "iproc-ext";
+--- a/arch/arm/boot/dts/bcm953012k.dts
++++ b/arch/arm/boot/dts/bcm953012k.dts
+@@ -49,8 +49,8 @@
+ };
+ };
+
+-&nand {
+- nandcs@0 {
++&nand_controller {
++ nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
--- /dev/null
+From bb95d7d440fefd104c593d9cb20da6d34a474e97 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 21 Apr 2021 11:00:06 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix pinmux subnodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This matches pinmux-node.yaml requirements.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094.dtsi | 2 +-
+ arch/arm/boot/dts/bcm5301x.dtsi | 6 +++---
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47094.dtsi
++++ b/arch/arm/boot/dts/bcm47094.dtsi
+@@ -11,7 +11,7 @@
+ &pinctrl {
+ compatible = "brcm,bcm4709-pinmux";
+
+- pinmux_mdio: mdio {
++ pinmux_mdio: mdio-pins {
+ groups = "mdio_grp";
+ function = "mdio";
+ };
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -438,18 +438,18 @@
+ function = "spi";
+ };
+
+- pinmux_i2c: i2c {
++ pinmux_i2c: i2c-pins {
+ groups = "i2c_grp";
+ function = "i2c";
+ };
+
+- pinmux_pwm: pwm {
++ pinmux_pwm: pwm-pins {
+ groups = "pwm0_grp", "pwm1_grp",
+ "pwm2_grp", "pwm3_grp";
+ function = "pwm";
+ };
+
+- pinmux_uart1: uart1 {
++ pinmux_uart1: uart1-pins {
+ groups = "uart1_grp";
+ function = "uart1";
+ };
--- /dev/null
+From 465078bfdf5271601f098450ae2fc974865c59fd Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Thu, 10 Jun 2021 21:35:10 +0100
+Subject: [PATCH] ARM: dts: NSP: add device names to compatible
+
+Currently only the SoC type and platform are specified for all NSP
+devices. This patch adds the device names.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm958522er.dts | 2 +-
+ arch/arm/boot/dts/bcm958525er.dts | 2 +-
+ arch/arm/boot/dts/bcm958525xmc.dts | 2 +-
+ arch/arm/boot/dts/bcm958622hr.dts | 2 +-
+ arch/arm/boot/dts/bcm958625hr.dts | 2 +-
+ arch/arm/boot/dts/bcm958625k.dts | 2 +-
+ arch/arm/boot/dts/bcm988312hr.dts | 2 +-
+ 7 files changed, 7 insertions(+), 7 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm958522er.dts
++++ b/arch/arm/boot/dts/bcm958522er.dts
+@@ -37,7 +37,7 @@
+
+ / {
+ model = "NorthStar Plus SVK (BCM958522ER)";
+- compatible = "brcm,bcm58522", "brcm,nsp";
++ compatible = "brcm,bcm958522er", "brcm,bcm58522", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+--- a/arch/arm/boot/dts/bcm958525er.dts
++++ b/arch/arm/boot/dts/bcm958525er.dts
+@@ -37,7 +37,7 @@
+
+ / {
+ model = "NorthStar Plus SVK (BCM958525ER)";
+- compatible = "brcm,bcm58525", "brcm,nsp";
++ compatible = "brcm,bcm958525er", "brcm,bcm58525", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+--- a/arch/arm/boot/dts/bcm958525xmc.dts
++++ b/arch/arm/boot/dts/bcm958525xmc.dts
+@@ -37,7 +37,7 @@
+
+ / {
+ model = "NorthStar Plus XMC (BCM958525xmc)";
+- compatible = "brcm,bcm58525", "brcm,nsp";
++ compatible = "brcm,bcm958525xmc", "brcm,bcm58525", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+--- a/arch/arm/boot/dts/bcm958622hr.dts
++++ b/arch/arm/boot/dts/bcm958622hr.dts
+@@ -37,7 +37,7 @@
+
+ / {
+ model = "NorthStar Plus SVK (BCM958622HR)";
+- compatible = "brcm,bcm58622", "brcm,nsp";
++ compatible = "brcm,bcm958622hr", "brcm,bcm58622", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+--- a/arch/arm/boot/dts/bcm958625hr.dts
++++ b/arch/arm/boot/dts/bcm958625hr.dts
+@@ -37,7 +37,7 @@
+
+ / {
+ model = "NorthStar Plus SVK (BCM958625HR)";
+- compatible = "brcm,bcm58625", "brcm,nsp";
++ compatible = "brcm,bcm958625hr", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+--- a/arch/arm/boot/dts/bcm958625k.dts
++++ b/arch/arm/boot/dts/bcm958625k.dts
+@@ -36,7 +36,7 @@
+
+ / {
+ model = "NorthStar Plus SVK (BCM958625K)";
+- compatible = "brcm,bcm58625", "brcm,nsp";
++ compatible = "brcm,bcm958625k", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+--- a/arch/arm/boot/dts/bcm988312hr.dts
++++ b/arch/arm/boot/dts/bcm988312hr.dts
+@@ -37,7 +37,7 @@
+
+ / {
+ model = "NorthStar Plus SVK (BCM988312HR)";
+- compatible = "brcm,bcm88312", "brcm,nsp";
++ compatible = "brcm,bcm988312hr", "brcm,bcm88312", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
--- /dev/null
+From 1b90dde4278a7b459979706b572785bc3a10bbb5 Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Thu, 10 Jun 2021 21:35:12 +0100
+Subject: [PATCH] ARM: dts: NSP: enable DMA on bcm988312hr
+
+The previous patch "ARM: dts: NSP: Disable PL330 by default, add
+dma-coherent property" set the DMAC to disabled by default, requiring it
+to be manually enabled on each device. The bcm988312hr was mistakenly
+omitted. This patch adds it back.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm988312hr.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm988312hr.dts
++++ b/arch/arm/boot/dts/bcm988312hr.dts
+@@ -58,6 +58,10 @@
+
+ /* USB 3 support needed to be complete */
+
++&dma {
++ status = "okay";
++};
++
+ &amac0 {
+ status = "okay";
+ };
--- /dev/null
+From 091a12b1814142eac16a115dab206f735b5476a9 Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Sun, 13 Jun 2021 10:46:34 +0100
+Subject: [PATCH] ARM: dts: NSP: disable qspi node by default
+
+The QSPI bus is enabled by default, however this may not used on all
+devices. This patch disables by default, requiring it to be explicitly
+enabled where required.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm-nsp.dtsi | 1 +
+ arch/arm/boot/dts/bcm958522er.dts | 1 +
+ arch/arm/boot/dts/bcm958525er.dts | 1 +
+ arch/arm/boot/dts/bcm958525xmc.dts | 1 +
+ arch/arm/boot/dts/bcm958622hr.dts | 1 +
+ arch/arm/boot/dts/bcm958623hr.dts | 1 +
+ arch/arm/boot/dts/bcm958625hr.dts | 1 +
+ arch/arm/boot/dts/bcm958625k.dts | 1 +
+ arch/arm/boot/dts/bcm988312hr.dts | 1 +
+ 9 files changed, 9 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm-nsp.dtsi
++++ b/arch/arm/boot/dts/bcm-nsp.dtsi
+@@ -310,6 +310,7 @@
+ num-cs = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
++ status = "disabled";
+ };
+
+ xhci: usb@29000 {
+--- a/arch/arm/boot/dts/bcm958522er.dts
++++ b/arch/arm/boot/dts/bcm958522er.dts
+@@ -134,6 +134,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm958525er.dts
++++ b/arch/arm/boot/dts/bcm958525er.dts
+@@ -134,6 +134,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm958525xmc.dts
++++ b/arch/arm/boot/dts/bcm958525xmc.dts
+@@ -150,6 +150,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm958622hr.dts
++++ b/arch/arm/boot/dts/bcm958622hr.dts
+@@ -138,6 +138,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm958623hr.dts
++++ b/arch/arm/boot/dts/bcm958623hr.dts
+@@ -142,6 +142,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm958625hr.dts
++++ b/arch/arm/boot/dts/bcm958625hr.dts
+@@ -149,6 +149,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm958625k.dts
++++ b/arch/arm/boot/dts/bcm958625k.dts
+@@ -153,6 +153,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm988312hr.dts
++++ b/arch/arm/boot/dts/bcm988312hr.dts
+@@ -138,6 +138,7 @@
+ };
+
+ &qspi {
++ status = "okay";
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
--- /dev/null
+From 236b31b1d84eb0e4f10c5f113a2675529456f919 Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Sun, 13 Jun 2021 10:46:36 +0100
+Subject: [PATCH] ARM: dts: NSP: add MDIO bus controller node
+
+This patch adds the node for the MDIO bus controller, present on the NSP
+SoC.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm-nsp.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm-nsp.dtsi
++++ b/arch/arm/boot/dts/bcm-nsp.dtsi
+@@ -363,6 +363,13 @@
+ status = "disabled";
+ };
+
++ mdio: mdio@32000 {
++ compatible = "brcm,iproc-mdio";
++ reg = <0x32000 0x8>;
++ #size-cells = <0>;
++ #address-cells = <1>;
++ };
++
+ rng: rng@33000 {
+ compatible = "brcm,bcm-nsp-rng";
+ reg = <0x33000 0x14>;
--- /dev/null
+From 1c615401bddb1be21e1d375aaa071680f40f1ae2 Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Sun, 13 Jun 2021 10:46:37 +0100
+Subject: [PATCH] ARM: dts: NSP: Move USB3 PHY to internal MDIO bus
+
+This patch largely replicates Vivek Unune's patch "ARM: dts:
+BCM5301X:Make usb3 phy use mdio phy driver"[1] for the NSP platform,
+whereby we need to create an mdio-mux to facilitate switches
+configured via external MDIO, in this case on the Meraki MX65.
+
+However in doing so, we are creating an overlap with usb3_phy's
+ccb-mii range. To resolve this, usb3_phy should be moved to a child
+node of the internal MDIO bus. The result is heavily based upon Vivek's
+patch. This has also been cross-referenced with Yendapally Reddy's
+earlier work which utilised the subsequently dropped brcm,nsp-usb3-phy
+driver: "[PATCH v2 4/4] arm: dts: nsp: Add USB nodes to device tree"
+[2]. Finally, this change provides conformance to the bcm-ns-usb3-phy
+documentation, utilising the required usb3-dmp-syscon property. Note
+that support for the deprecated ccb-mii bindings has been dropped as of
+"phy: phy-bcm-ns-usb3: drop support for deprecated DT binding"[3].
+
+[1] https://lore.kernel.org/patchwork/patch/933971/
+[2] https://www.spinics.net/lists/arm-kernel/msg555132.html
+[3] https://lore.kernel.org/linux-devicetree/20201113113423.9466-1-zajec5@gmail.com/
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm-nsp.dtsi | 38 +++++++++++++++++++++++++++-------
+ 1 file changed, 31 insertions(+), 7 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm-nsp.dtsi
++++ b/arch/arm/boot/dts/bcm-nsp.dtsi
+@@ -370,6 +370,35 @@
+ #address-cells = <1>;
+ };
+
++ mdio-mux@32000 {
++ compatible = "mdio-mux-mmioreg";
++ reg = <0x32000 0x4>;
++ mux-mask = <0x200>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mdio-parent-bus = <&mdio>;
++
++ mdio_int: mdio@0 {
++ reg = <0x0>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ usb3_phy: usb3-phy@10 {
++ compatible = "brcm,ns-bx-usb3-phy";
++ reg = <0x10>;
++ usb3-dmp-syscon = <&usb3_dmp>;
++ #phy-cells = <0>;
++ status = "disabled";
++ };
++ };
++
++ mdio_ext: mdio@200 {
++ reg = <0x200>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++ };
++
+ rng: rng@33000 {
+ compatible = "brcm,bcm-nsp-rng";
+ reg = <0x33000 0x14>;
+@@ -528,13 +557,8 @@
+ };
+ };
+
+- usb3_phy: usb3-phy@104000 {
+- compatible = "brcm,ns-bx-usb3-phy";
+- reg = <0x104000 0x1000>,
+- <0x032000 0x1000>;
+- reg-names = "dmp", "ccb-mii";
+- #phy-cells = <0>;
+- status = "disabled";
++ usb3_dmp: syscon@104000 {
++ reg = <0x104000 0x1000>;
+ };
+ };
+
--- /dev/null
+From f111016a8293b968f05450fec83020c94d0f88c2 Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Fri, 6 Aug 2021 21:44:32 +0100
+Subject: [PATCH] ARM: dts: NSP: Add common bindings for MX64/MX65
+
+These bindings are required for all Meraki MX64/MX65 devices. These
+common bindings include memory (2GB), PWM LEDs, AMAC, I2C (AT24), NAND
+partitions, EHCI, OHCI and pinctrl.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../dts/bcm958625-meraki-mx6x-common.dtsi | 129 ++++++++++++++++++
+ 1 file changed, 129 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
+@@ -0,0 +1,129 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Common Bindings for Cisco Meraki MX64 (Kingpin) and MX65 (Alamo) devices.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++#include "bcm-nsp.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
++
++/ {
++ pwm-leds {
++ compatible = "pwm-leds";
++
++ led-1 {
++ function = LED_FUNCTION_INDICATOR;
++ color = <LED_COLOR_ID_RED>;
++ pwms = <&pwm 1 50000>;
++ max-brightness = <255>;
++ };
++
++ led-2 {
++ function = LED_FUNCTION_INDICATOR;
++ color = <LED_COLOR_ID_GREEN>;
++ pwms = <&pwm 2 50000>;
++ max-brightness = <255>;
++ };
++
++ led-3 {
++ function = LED_FUNCTION_INDICATOR;
++ color = <LED_COLOR_ID_BLUE>;
++ pwms = <&pwm 3 50000>;
++ max-brightness = <255>;
++ };
++ };
++};
++
++&amac2 {
++ status = "okay";
++};
++
++&ehci0 {
++ status = "okay";
++};
++
++&i2c0 {
++ status = "okay";
++
++ at24@50 {
++ compatible = "atmel,24c64";
++ reg = <0x50>;
++ pagesize = <32>;
++ read-only;
++ };
++};
++
++&nand_controller {
++ nand@0 {
++ compatible = "brcm,nandcs";
++ reg = <0>;
++ nand-on-flash-bbt;
++
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ nand-ecc-strength = <24>;
++ nand-ecc-step-size = <1024>;
++
++ brcm,nand-oob-sector-size = <27>;
++
++ partition@0 {
++ label = "u-boot";
++ reg = <0x0 0x80000>;
++ read-only;
++ };
++
++ partition@80000 {
++ label = "shmoo";
++ reg = <0x80000 0x80000>;
++ read-only;
++ };
++
++ partition@100000 {
++ label = "bootkernel1";
++ reg = <0x100000 0x300000>;
++ };
++
++ partition@400000 {
++ label = "nvram";
++ reg = <0x400000 0x100000>;
++ };
++
++ partition@500000 {
++ label = "bootkernel2";
++ reg = <0x500000 0x300000>;
++ };
++
++ partition@800000 {
++ label = "ubi";
++ reg = <0x800000 0x3f700000>;
++ };
++ };
++};
++
++&ohci0 {
++ status = "okay";
++};
++
++&pinctrl {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm_leds>;
++
++ pwm_leds: pwm_leds {
++ function = "pwm";
++ groups = "pwm1_grp", "pwm2_grp", "pwm3_grp";
++ };
++};
++
++&pwm {
++ status = "okay";
++ #pwm-cells = <2>;
++};
++
++&uart0 {
++ clock-frequency = <62500000>;
++ status = "okay";
++};
--- /dev/null
+From 2addf9266a1d0f4ba59c9868b3effcd50de441a4 Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Fri, 6 Aug 2021 21:44:33 +0100
+Subject: [PATCH] ARM: dts: NSP: Add Ax stepping modifications
+
+While uncommon, some Ax NSP SoCs exist in the wild. This stepping
+requires a modified secondary CPU boot-reg and removal of DMA coherency
+properties. Without these modifications, the secondary CPU will be
+inactive and many peripherals will exhibit undefined behaviour.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm-nsp-ax.dtsi | 70 +++++++++++++++++++++++++++++++
+ 1 file changed, 70 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm-nsp-ax.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm-nsp-ax.dtsi
+@@ -0,0 +1,70 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Broadcom Northstar Plus Ax stepping-specific bindings.
++ * Notable differences from B0+ are the secondary-boot-reg and
++ * lack of DMA coherency.
++ */
++
++&cpu1 {
++ secondary-boot-reg = <0xffff042c>;
++};
++
++&dma {
++ /delete-property/ dma-coherent;
++};
++
++&sdio {
++ /delete-property/ dma-coherent;
++};
++
++&amac0 {
++ /delete-property/ dma-coherent;
++};
++
++&amac1 {
++ /delete-property/ dma-coherent;
++};
++
++&amac2 {
++ /delete-property/ dma-coherent;
++};
++
++&ehci0 {
++ /delete-property/ dma-coherent;
++};
++
++&mailbox {
++ /delete-property/ dma-coherent;
++};
++
++&xhci {
++ /delete-property/ dma-coherent;
++};
++
++&ehci0 {
++ /delete-property/ dma-coherent;
++};
++
++&ohci0 {
++ /delete-property/ dma-coherent;
++};
++
++&i2c0 {
++ /delete-property/ dma-coherent;
++};
++
++&sata {
++ /delete-property/ dma-coherent;
++};
++
++&pcie0 {
++ /delete-property/ dma-coherent;
++};
++
++&pcie1 {
++ /delete-property/ dma-coherent;
++};
++
++&pcie2 {
++ /delete-property/ dma-coherent;
++};
--- /dev/null
+From 3f902645280baf0d7dab57c227cc14f43edb45ef Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Fri, 6 Aug 2021 21:44:34 +0100
+Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX64 series
+
+MX64 & MX64W Hardware info:
+ - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
+ - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
+ - Storage: 1 GB (Micron MT29F8G08ABACA)
+ - Networking: BCM58625 internal switch (5x 1GbE ports)
+ - USB: 1x USB2.0
+ - Serial: Internal header
+ - WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus
+
+This patch adds the Meraki MX64 series-specific bindings. Since some
+devices make use of the older A0 SoC, changes need to be made to
+accommodate this case, including removal of coherency options and
+modification to the secondary-boot-reg.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/Makefile | 4 +
+ .../boot/dts/bcm958625-meraki-kingpin.dtsi | 163 ++++++++++++++++++
+ .../arm/boot/dts/bcm958625-meraki-mx64-a0.dts | 25 +++
+ arch/arm/boot/dts/bcm958625-meraki-mx64.dts | 24 +++
+ .../boot/dts/bcm958625-meraki-mx64w-a0.dts | 33 ++++
+ arch/arm/boot/dts/bcm958625-meraki-mx64w.dts | 32 ++++
+ 6 files changed, 281 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64.dts
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -158,6 +158,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
+ bcm958525xmc.dtb \
+ bcm958622hr.dtb \
+ bcm958623hr.dtb \
++ bcm958625-meraki-mx64.dtb \
++ bcm958625-meraki-mx64-a0.dtb \
++ bcm958625-meraki-mx64w.dtb \
++ bcm958625-meraki-mx64w-a0.dtb \
+ bcm958625hr.dtb \
+ bcm988312hr.dtb \
+ bcm958625k.dtb
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
+@@ -0,0 +1,163 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64 series (Kingpin).
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++#include "bcm958625-meraki-mx6x-common.dtsi"
++
++/ {
++
++ keys {
++ compatible = "gpio-keys-polled";
++ autorepeat;
++ poll-interval = <20>;
++
++ reset {
++ label = "reset";
++ linux,code = <KEY_RESTART>;
++ gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ led-0 {
++ /* green:lan1-left */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <0>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 19 GPIO_ACTIVE_LOW>;
++ };
++
++ led-1 {
++ /* green:lan1-right */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <1>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 18 GPIO_ACTIVE_LOW>;
++ };
++
++ led-2 {
++ /* green:lan2-left */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <2>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
++ };
++
++ led-3 {
++ /* green:lan2-right */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <3>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 20 GPIO_ACTIVE_LOW>;
++ };
++
++ led-4 {
++ /* green:lan3-left */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <4>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
++ };
++
++ led-5 {
++ /* green:lan3-right */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <5>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
++ };
++
++ led-6 {
++ /* green:lan4-left */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <6>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
++ };
++
++ led-7 {
++ /* green:lan4-right */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <7>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
++ };
++
++ led-8 {
++ /* green:wan-left */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <8>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 30 GPIO_ACTIVE_LOW>;
++ };
++
++ led-9 {
++ /* green:wan-right */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <9>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
++ };
++
++ led-a {
++ /* amber:power */
++ function = LED_FUNCTION_POWER;
++ color = <LED_COLOR_ID_AMBER>;
++ gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
++ default-state = "on";
++ };
++
++ led-b {
++ /* white:status */
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_WHITE>;
++ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
++ };
++ };
++};
++
++&srab {
++ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
++ status = "okay";
++
++ ports {
++ port@0 {
++ label = "lan1";
++ reg = <0>;
++ };
++
++ port@1 {
++ label = "lan2";
++ reg = <1>;
++ };
++
++ port@2 {
++ label = "lan3";
++ reg = <2>;
++ };
++
++ port@3 {
++ label = "lan4";
++ reg = <3>;
++ };
++
++ port@4 {
++ label = "wan";
++ reg = <4>;
++ };
++
++ port@8 {
++ ethernet = <&amac2>;
++ reg = <8>;
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
+@@ -0,0 +1,25 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64 with A0 SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++#include "bcm-nsp-ax.dtsi"
++
++/ {
++ model = "Cisco Meraki MX64(A0)";
++ compatible = "meraki,mx64-a0", "brcm,bcm58625", "brcm,nsp";
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@60000000 {
++ device_type = "memory";
++ reg = <0x60000000 0x80000000>;
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64.dts
+@@ -0,0 +1,24 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64 with B0+ SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++
++/ {
++ model = "Cisco Meraki MX64";
++ compatible = "meraki,mx64", "brcm,bcm58625", "brcm,nsp";
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@60000000 {
++ device_type = "memory";
++ reg = <0x60000000 0x80000000>;
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
+@@ -0,0 +1,33 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64W with A0 SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++#include "bcm-nsp-ax.dtsi"
++
++/ {
++ model = "Cisco Meraki MX64W(A0)";
++ compatible = "meraki,mx64w-a0", "brcm,bcm58625", "brcm,nsp";
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@60000000 {
++ device_type = "memory";
++ reg = <0x60000000 0x80000000>;
++ };
++};
++
++&pcie0 {
++ status = "okay";
++};
++
++&pcie1 {
++ status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
+@@ -0,0 +1,32 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX64W with B0+ SoC.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-kingpin.dtsi"
++
++/ {
++ model = "Cisco Meraki MX64W";
++ compatible = "meraki,mx64w", "brcm,bcm58625", "brcm,nsp";
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@60000000 {
++ device_type = "memory";
++ reg = <0x60000000 0x80000000>;
++ };
++};
++
++&pcie0 {
++ status = "okay";
++};
++
++&pcie1 {
++ status = "okay";
++};
--- /dev/null
+From 702a8f4744ed5b480f2b2411858184afdb10f9fd Mon Sep 17 00:00:00 2001
+From: Matthew Hagan <mnhagan88@gmail.com>
+Date: Fri, 6 Aug 2021 21:44:35 +0100
+Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX65 series
+
+MX65 & MX65W Hardware info:
+ - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
+ - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
+ - Storage: 1 GB (Micron MT29F8G08ABACA)
+ - Networking: BCM58625 switch (2x 1GbE ports)
+ 2x Qualcomm QCA8337 switches (10x 1GbE ports total)
+ - PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12
+ - USB: 1x USB2.0
+ - Serial: Internal header
+ - WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus.
+
+Note that a driver and firmware image for the BCM59111 PSE has been
+released under GPL, but this is not present in the kernel.
+
+Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/Makefile | 2 +
+ arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 279 ++++++++++++++++++
+ arch/arm/boot/dts/bcm958625-meraki-mx65.dts | 24 ++
+ arch/arm/boot/dts/bcm958625-meraki-mx65w.dts | 32 ++
+ 4 files changed, 337 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65.dts
+ create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65w.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -162,6 +162,8 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
+ bcm958625-meraki-mx64-a0.dtb \
+ bcm958625-meraki-mx64w.dtb \
+ bcm958625-meraki-mx64w-a0.dtb \
++ bcm958625-meraki-mx65.dtb \
++ bcm958625-meraki-mx65w.dtb \
+ bcm958625hr.dtb \
+ bcm988312hr.dtb \
+ bcm958625k.dtb
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
+@@ -0,0 +1,279 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX65 series (Alamo).
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++#include "bcm958625-meraki-mx6x-common.dtsi"
++
++/ {
++ keys {
++ compatible = "gpio-keys-polled";
++ autorepeat;
++ poll-interval = <20>;
++
++ reset {
++ label = "reset";
++ linux,code = <KEY_RESTART>;
++ gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ led-0 {
++ /* green:wan1-left */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <0>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
++ };
++
++ led-1 {
++ /* green:wan1-right */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <1>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
++ };
++
++ led-2 {
++ /* green:wan2-left */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <2>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
++ };
++
++ led-3 {
++ /* green:wan2-right */
++ function = LED_FUNCTION_ACTIVITY;
++ function-enumerator = <3>;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
++ };
++
++ led-4 {
++ /* amber:power */
++ function = LED_FUNCTION_POWER;
++ color = <LED_COLOR_ID_AMBER>;
++ gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
++ default-state = "on";
++ };
++
++ led-5 {
++ /* white:status */
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_WHITE>;
++ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
++ };
++ };
++
++ mdio-mii-mux {
++ compatible = "mdio-mux-mmioreg";
++ reg = <0x1803f1c0 0x4>;
++ mux-mask = <0x2000>;
++ mdio-parent-bus = <&mdio_ext>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mdio@0 {
++ reg = <0x0>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ phy_port6: phy@0 {
++ reg = <0>;
++ };
++
++ phy_port7: phy@1 {
++ reg = <1>;
++ };
++
++ phy_port8: phy@2 {
++ reg = <2>;
++ };
++
++ phy_port9: phy@3 {
++ reg = <3>;
++ };
++
++ phy_port10: phy@4 {
++ reg = <4>;
++ };
++
++ switch@10 {
++ compatible = "qca,qca8337";
++ reg = <0x10>;
++ dsa,member = <1 0>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ port@0 {
++ reg = <0>;
++ ethernet = <&sgmii1>;
++ phy-mode = "sgmii";
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan8";
++ phy-handle = <&phy_port6>;
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan9";
++ phy-handle = <&phy_port7>;
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan10";
++ phy-handle = <&phy_port8>;
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan11";
++ phy-handle = <&phy_port9>;
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "lan12";
++ phy-handle = <&phy_port10>;
++ };
++ };
++ };
++ };
++
++ mdio-mii@2000 {
++ reg = <0x2000>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ phy_port1: phy@0 {
++ reg = <0>;
++ };
++
++ phy_port2: phy@1 {
++ reg = <1>;
++ };
++
++ phy_port3: phy@2 {
++ reg = <2>;
++ };
++
++ phy_port4: phy@3 {
++ reg = <3>;
++ };
++
++ phy_port5: phy@4 {
++ reg = <4>;
++ };
++
++ switch@10 {
++ compatible = "qca,qca8337";
++ reg = <0x10>;
++ dsa,member = <2 0>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ port@0 {
++ reg = <0>;
++ ethernet = <&sgmii0>;
++ phy-mode = "sgmii";
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan3";
++ phy-handle = <&phy_port1>;
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan4";
++ phy-handle = <&phy_port2>;
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan5";
++ phy-handle = <&phy_port3>;
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan6";
++ phy-handle = <&phy_port4>;
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "lan7";
++ phy-handle = <&phy_port5>;
++ };
++ };
++ };
++ };
++ };
++};
++
++&srab {
++ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
++ status = "okay";
++ dsa,member = <0 0>;
++
++ ports {
++ port@0 {
++ label = "wan1";
++ reg = <0>;
++ };
++
++ port@1 {
++ label = "wan2";
++ reg = <1>;
++ };
++
++ sgmii0: port@4 {
++ label = "sw0";
++ reg = <4>;
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++
++ sgmii1: port@5 {
++ label = "sw1";
++ reg = <5>;
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++
++ port@8 {
++ ethernet = <&amac2>;
++ reg = <8>;
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx65.dts
+@@ -0,0 +1,24 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX65.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-alamo.dtsi"
++
++/ {
++ model = "Cisco Meraki MX65";
++ compatible = "meraki,mx65", "brcm,bcm58625", "brcm,nsp";
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@60000000 {
++ device_type = "memory";
++ reg = <0x60000000 0x80000000>;
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm958625-meraki-mx65w.dts
+@@ -0,0 +1,32 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device Tree Bindings for Cisco Meraki MX65W.
++ *
++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "bcm958625-meraki-alamo.dtsi"
++
++/ {
++ model = "Cisco Meraki MX65W";
++ compatible = "meraki,mx65w", "brcm,bcm58625", "brcm,nsp";
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@60000000 {
++ device_type = "memory";
++ reg = <0x60000000 0x80000000>;
++ };
++};
++
++&pcie0 {
++ status = "okay";
++};
++
++&pcie1 {
++ status = "okay";
++};
--- /dev/null
+From 0e89c0d8e8edece7f8e4607841ca6651885d23b1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 19 Aug 2021 08:57:00 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix nodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This fixes following errors for all BCM5301X dts files:
+chipcommonA@18000000: $nodename:0: 'chipcommonA@18000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
+mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
+mdio-bus-mux@18003000: $nodename:0: 'mdio-bus-mux@18003000' does not match '^mdio-mux[\\-@]?'
+dmu@1800c000: $nodename:0: 'dmu@1800c000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 2 +-
+ arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -129,7 +129,7 @@
+ };
+ };
+
+- mdio-bus-mux@18003000 {
++ mdio-mux@18003000 {
+
+ /* BIT(9) = 1 => external mdio */
+ mdio@200 {
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -19,7 +19,7 @@
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+- chipcommonA@18000000 {
++ chipcommon-a-bus@18000000 {
+ compatible = "simple-bus";
+ ranges = <0x00000000 0x18000000 0x00001000>;
+ #address-cells = <1>;
+@@ -44,7 +44,7 @@
+ };
+ };
+
+- mpcore@19000000 {
++ mpcore-bus@19000000 {
+ compatible = "simple-bus";
+ ranges = <0x00000000 0x19000000 0x00023000>;
+ #address-cells = <1>;
+@@ -369,7 +369,7 @@
+ #address-cells = <1>;
+ };
+
+- mdio-bus-mux@18003000 {
++ mdio-mux@18003000 {
+ compatible = "mdio-mux-mmioreg";
+ mdio-parent-bus = <&mdio>;
+ #address-cells = <1>;
+@@ -415,7 +415,7 @@
+ status = "disabled";
+ };
+
+- dmu@1800c000 {
++ dmu-bus@1800c000 {
+ compatible = "simple-bus";
+ ranges = <0 0x1800c000 0x1000>;
+ #address-cells = <1>;
--- /dev/null
+From 75a5646c26895c4cfadc8d54aa53ac5455947895 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 19 Aug 2021 08:57:01 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix MDIO mux binding
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This fixes following error for all BCM5301X dts files:
+mdio-bus-mux@18003000: compatible: ['mdio-mux-mmioreg'] is too short
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -370,7 +370,7 @@
+ };
+
+ mdio-mux@18003000 {
+- compatible = "mdio-mux-mmioreg";
++ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio>;
+ #address-cells = <1>;
+ #size-cells = <0>;
--- /dev/null
+From def3d0357e0539e6f6b82f079ff156def6ec2107 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 19 Aug 2021 08:57:02 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix memory nodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Thix fixes:
+arch/arm/boot/dts/bcm4708-netgear-r6250.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 402653184]]}
+arch/arm/boot/dts/bcm4709-linksys-ea9200.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-netgear-r7000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-netgear-r8000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
+arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 402653184]]}
+arch/arm/boot/dts/bcm53016-meraki-mr32.dt.yaml: /: memory: False schema does not allow {'reg': [[0, 134217728]], 'device_type': ['memory']}
+arch/arm/boot/dts/bcm94708.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
+arch/arm/boot/dts/bcm94709.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 2 +-
+ arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 2 +-
+ arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 2 +-
+ arch/arm/boot/dts/bcm94708.dts | 2 +-
+ arch/arm/boot/dts/bcm94709.dts | 2 +-
+ 11 files changed, 11 insertions(+), 11 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
++++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+@@ -20,7 +20,7 @@
+ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
++++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+@@ -19,7 +19,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
++++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+@@ -19,7 +19,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x18000000>;
+--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
++++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+@@ -16,7 +16,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
++++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+@@ -19,7 +19,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
++++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+@@ -30,7 +30,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
++++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
+@@ -15,7 +15,7 @@
+ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>;
+ };
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+@@ -16,7 +16,7 @@
+ bootargs = "earlycon";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x18000000>;
+--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
++++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+@@ -20,7 +20,7 @@
+ bootargs = " console=ttyS0,115200n8 earlycon";
+ };
+
+- memory {
++ memory@0 {
+ reg = <0x00000000 0x08000000>;
+ device_type = "memory";
+ };
+--- a/arch/arm/boot/dts/bcm94708.dts
++++ b/arch/arm/boot/dts/bcm94708.dts
+@@ -38,7 +38,7 @@
+ model = "NorthStar SVK (BCM94708)";
+ compatible = "brcm,bcm94708", "brcm,bcm4708";
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>;
+ };
+--- a/arch/arm/boot/dts/bcm94709.dts
++++ b/arch/arm/boot/dts/bcm94709.dts
+@@ -38,7 +38,7 @@
+ model = "NorthStar SVK (BCM94709)";
+ compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708";
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>;
+ };
+ bootargs = "console=ttyS0,115200 earlycon";
};
- memory {
+ memory@0 {
--- /dev/null
+From b660269cba748dfd07eb5551a88ff34d5ea0b86e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 16 Apr 2021 15:37:48 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix NAND nodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This matches nand-controller.yaml requirements.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+@@ -24,8 +24,8 @@
+ reg = <0x00000000 0x08000000>;
+ };
+
+- nand: nand@18028000 {
+- nandcs@0 {
++ nand_controller: nand-controller@18028000 {
++ nand@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
++++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+@@ -25,8 +25,8 @@
+ <0x88000000 0x08000000>;
+ };
+
+- nand: nand@18028000 {
+- nandcs@0 {
++ nand_controller: nand-controller@18028000 {
++ nand@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
++++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
+@@ -6,8 +6,8 @@
+ */
+
+ / {
+- nand@18028000 {
+- nandcs: nandcs@0 {
++ nand-controller@18028000 {
++ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -500,7 +500,7 @@
+ reg = <0x18004000 0x14>;
+ };
+
+- nand: nand@18028000 {
++ nand_controller: nand-controller@18028000 {
+ compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
+ reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
+ reg-names = "nand", "iproc-idm", "iproc-ext";
+--- a/arch/arm/boot/dts/bcm953012k.dts
++++ b/arch/arm/boot/dts/bcm953012k.dts
+@@ -49,8 +49,8 @@
+ };
+ };
+
+-&nand {
+- nandcs@0 {
++&nand_controller {
++ nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
--- /dev/null
+From bb95d7d440fefd104c593d9cb20da6d34a474e97 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 21 Apr 2021 11:00:06 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix pinmux subnodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This matches pinmux-node.yaml requirements.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094.dtsi | 2 +-
+ arch/arm/boot/dts/bcm5301x.dtsi | 6 +++---
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47094.dtsi
++++ b/arch/arm/boot/dts/bcm47094.dtsi
+@@ -11,7 +11,7 @@
+ &pinctrl {
+ compatible = "brcm,bcm4709-pinmux";
+
+- pinmux_mdio: mdio {
++ pinmux_mdio: mdio-pins {
+ groups = "mdio_grp";
+ function = "mdio";
+ };
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -438,18 +438,18 @@
+ function = "spi";
+ };
+
+- pinmux_i2c: i2c {
++ pinmux_i2c: i2c-pins {
+ groups = "i2c_grp";
+ function = "i2c";
+ };
+
+- pinmux_pwm: pwm {
++ pinmux_pwm: pwm-pins {
+ groups = "pwm0_grp", "pwm1_grp",
+ "pwm2_grp", "pwm3_grp";
+ function = "pwm";
+ };
+
+- pinmux_uart1: uart1 {
++ pinmux_uart1: uart1-pins {
+ groups = "uart1_grp";
+ function = "uart1";
+ };
--- /dev/null
+From 0e89c0d8e8edece7f8e4607841ca6651885d23b1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 19 Aug 2021 08:57:00 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix nodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This fixes following errors for all BCM5301X dts files:
+chipcommonA@18000000: $nodename:0: 'chipcommonA@18000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
+mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
+mdio-bus-mux@18003000: $nodename:0: 'mdio-bus-mux@18003000' does not match '^mdio-mux[\\-@]?'
+dmu@1800c000: $nodename:0: 'dmu@1800c000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 2 +-
+ arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -129,7 +129,7 @@
+ };
+ };
+
+- mdio-bus-mux@18003000 {
++ mdio-mux@18003000 {
+
+ /* BIT(9) = 1 => external mdio */
+ mdio@200 {
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -19,7 +19,7 @@
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+- chipcommonA@18000000 {
++ chipcommon-a-bus@18000000 {
+ compatible = "simple-bus";
+ ranges = <0x00000000 0x18000000 0x00001000>;
+ #address-cells = <1>;
+@@ -44,7 +44,7 @@
+ };
+ };
+
+- mpcore@19000000 {
++ mpcore-bus@19000000 {
+ compatible = "simple-bus";
+ ranges = <0x00000000 0x19000000 0x00023000>;
+ #address-cells = <1>;
+@@ -369,7 +369,7 @@
+ #address-cells = <1>;
+ };
+
+- mdio-bus-mux@18003000 {
++ mdio-mux@18003000 {
+ compatible = "mdio-mux-mmioreg";
+ mdio-parent-bus = <&mdio>;
+ #address-cells = <1>;
+@@ -415,7 +415,7 @@
+ status = "disabled";
+ };
+
+- dmu@1800c000 {
++ dmu-bus@1800c000 {
+ compatible = "simple-bus";
+ ranges = <0 0x1800c000 0x1000>;
+ #address-cells = <1>;
--- /dev/null
+From 75a5646c26895c4cfadc8d54aa53ac5455947895 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 19 Aug 2021 08:57:01 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix MDIO mux binding
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This fixes following error for all BCM5301X dts files:
+mdio-bus-mux@18003000: compatible: ['mdio-mux-mmioreg'] is too short
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -370,7 +370,7 @@
+ };
+
+ mdio-mux@18003000 {
+- compatible = "mdio-mux-mmioreg";
++ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio>;
+ #address-cells = <1>;
+ #size-cells = <0>;
--- /dev/null
+From def3d0357e0539e6f6b82f079ff156def6ec2107 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 19 Aug 2021 08:57:02 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix memory nodes names
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Thix fixes:
+arch/arm/boot/dts/bcm4708-netgear-r6250.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 402653184]]}
+arch/arm/boot/dts/bcm4709-linksys-ea9200.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-netgear-r7000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-netgear-r8000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
+arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
+arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 402653184]]}
+arch/arm/boot/dts/bcm53016-meraki-mr32.dt.yaml: /: memory: False schema does not allow {'reg': [[0, 134217728]], 'device_type': ['memory']}
+arch/arm/boot/dts/bcm94708.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
+arch/arm/boot/dts/bcm94709.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 2 +-
+ arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 2 +-
+ arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 2 +-
+ arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 2 +-
+ arch/arm/boot/dts/bcm94708.dts | 2 +-
+ arch/arm/boot/dts/bcm94709.dts | 2 +-
+ 11 files changed, 11 insertions(+), 11 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
++++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+@@ -20,7 +20,7 @@
+ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
++++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+@@ -19,7 +19,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
++++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+@@ -19,7 +19,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x18000000>;
+--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
++++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+@@ -16,7 +16,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
++++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+@@ -19,7 +19,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
++++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+@@ -30,7 +30,7 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
+--- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
++++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
+@@ -15,7 +15,7 @@
+ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>;
+ };
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+@@ -16,7 +16,7 @@
+ bootargs = "earlycon";
+ };
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x18000000>;
+--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
++++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+@@ -20,7 +20,7 @@
+ bootargs = " console=ttyS0,115200n8 earlycon";
+ };
+
+- memory {
++ memory@0 {
+ reg = <0x00000000 0x08000000>;
+ device_type = "memory";
+ };
+--- a/arch/arm/boot/dts/bcm94708.dts
++++ b/arch/arm/boot/dts/bcm94708.dts
+@@ -38,7 +38,7 @@
+ model = "NorthStar SVK (BCM94708)";
+ compatible = "brcm,bcm94708", "brcm,bcm4708";
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>;
+ };
+--- a/arch/arm/boot/dts/bcm94709.dts
++++ b/arch/arm/boot/dts/bcm94709.dts
+@@ -38,7 +38,7 @@
+ model = "NorthStar SVK (BCM94709)";
+ compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708";
+
+- memory {
++ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>;
+ };
+ bootargs = "console=ttyS0,115200 earlycon";
};
- memory {
+ memory@0 {
projects / openwrt / staging / mkresin.git / commitdiff