target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m300.dts

   1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
   2 /*
   3  * WatchGuard Firebox M300 Device Tree Source
   4  * Based on t2081qds.dts from Linux 5.10
   5  *
   6  * Copyright 2013 - 2015 Freescale Semiconductor Inc.
   7  * Copyright 2020 - 2021 Stijn Tintel <stijn@linux-ipv6.be>
   8  */
   9
  10 /include/ "t208xsi-pre.dtsi"
  11 /include/ "t208xqds.dtsi"
  12
  13 / {
  14         model = "WatchGuard Firebox M300";
  15         compatible = "watchguard,firebox-m300", "fsl,T2081QDS";
  16
  17         interrupt-parent = <&mpic>;
  18
  19         aliases {
  20                 /delete-property/ ethernet0;
  21                 /delete-property/ ethernet1;
  22                 /delete-property/ ethernet2;
  23                 /delete-property/ ethernet3;
  24                 /delete-property/ ethernet4;
  25                 /delete-property/ ethernet5;
  26                 /delete-property/ ethernet6;
  27                 /delete-property/ ethernet7;
  28
  29                 ethernet0 = &enet7;
  30                 ethernet1 = &enet0;
  31                 ethernet2 = &enet1;
  32                 ethernet3 = &enet2;
  33                 ethernet4 = &enet3;
  34         };
  35 };
  36
  37 &soc {
  38 // Include first to make this the first interface
  39 /include/ "qoriq-fman3-0-10g-1.dtsi"
  40 };
  41
  42 // mdio-mux under &boardctrl + its aliases removed. causes crash:
  43 // Oops: Machine check, sig: 7 [#1]
  44
  45 /include/ "t2081si-post.dtsi"
  46
  47 // add stuff below the include to make sure we override whatever is there
  48
  49 &enet0 {
  50         phy-connection-type = "sgmii";
  51         phy-handle = <&phy1>;
  52 };
  53
  54 &enet1 {
  55         phy-connection-type = "sgmii";
  56         phy-handle = <&phy2>;
  57 };
  58
  59 &enet2 {
  60         phy-connection-type = "rgmii";
  61
  62         fixed-link {
  63                 speed = <1000>;
  64                 full-duplex;
  65         };
  66 };
  67
  68 &enet3 {
  69         phy-connection-type = "rgmii";
  70
  71         fixed-link {
  72                 speed = <1000>;
  73                 full-duplex;
  74         };
  75 };
  76
  77 &enet4 {
  78         status = "disabled";
  79 };
  80
  81 &enet5 {
  82         status = "disabled";
  83 };
  84
  85 &enet6 {
  86         status = "disabled";
  87 };
  88
  89 &enet7 {
  90         phy-connection-type = "sgmii";
  91         phy-handle = <&phy0>;
  92 };
  93
  94 &ifc {
  95         ranges = <0x00 0x00 0x0f 0xefc00000 0x400000>;
  96
  97         nor@0,0 {
  98                 reg = <0x00 0x00 0x400000>;
  99
 100                 partition@0{
 101                         reg = <0x0 0x10000>;
 102                         label = "qoriq-rcw";
 103                         read-only;
 104                 };
 105
 106                 partition@10000 {
 107                         reg = <0x10000 0x20000>;
 108                         label = "wg_cfg0";
 109                         read-only;
 110                 };
 111
 112                 partition@30000 {
 113                         reg = <0x30000 0x10000>;
 114                         label = "wg_cfg1";
 115                         read-only;
 116                 };
 117
 118                 partition@40000 {
 119                         reg = <0x40000 0x10000>;
 120                         label = "wg_mfg_data";
 121                         read-only;
 122                 };
 123
 124                 partition@50000 {
 125                         reg = <0x50000 0xb0000>;
 126                         label = "wg_bootopt_data_and_reserved";
 127                         read-only;
 128                 };
 129
 130                 partition@100000 {
 131                         reg = <0x100000 0xb0000>;
 132                         label = "wg_extra_reserved_1";
 133                         read-only;
 134                 };
 135
 136                 partition@1B0000 {
 137                         reg = <0x1b0000 0xb0000>;
 138                         label = "wg_extra_reserved_2";
 139                         read-only;
 140                 };
 141
 142                 partition@260000 {
 143                         reg = <0x260000 0xc0000>;
 144                         label = "wg_u-boot_failsafe";
 145                         read-only;
 146                 };
 147
 148                 partition@320000 {
 149                         reg = <0x320000 0x10000>;
 150                         label = "qoriq-fman";
 151                         read-only;
 152                 };
 153
 154                 partition@330000 {
 155                         reg = <0x330000 0x10000>;
 156                         label = "u-boot-env";
 157                 };
 158
 159                 partition@340000 {
 160                         reg = <0x340000 0xc0000>;
 161                         label = "u-boot";
 162                         read-only;
 163                 };
 164         };
 165
 166         nand@2,0 {
 167                 status = "disabled";
 168         };
 169 };
 170
 171 &mdio0 {
 172         // m300 ethernet port 0
 173         phy0: ethernet-phy@0 {
 174                 reg = <0x00>;
 175         };
 176
 177         // m300 ethernet port 1
 178         phy1: ethernet-phy@1 {
 179                 reg = <0x01>;
 180         };
 181
 182         phy2: ethernet-phy@2 {
 183                 reg = <0x02>;
 184         };
 185
 186         phy3: ethernet-phy@3 {
 187                 reg = <0x03>;
 188         };
 189
 190         switch0: switch@10 {
 191                 compatible = "marvell,mv88e6085";
 192                 reg = <0x10>;
 193
 194                 mdio {
 195                         #address-cells = <1>;
 196                         #size-cells = <0>;
 197
 198                         switch0phy0: switch0phy0@0 {
 199                                 reg = <0x00>;
 200                                 interrupt-parent = <&switch0>;
 201                         };
 202
 203                         switch0phy1: switch0phy1@1 {
 204                                 reg = <0x01>;
 205                                 interrupt-parent = <&switch0>;
 206                         };
 207
 208                         switch0phy2: switch0phy2@2 {
 209                                 reg = <0x02>;
 210                                 interrupt-parent = <&switch0>;
 211                         };
 212
 213                         switch0phy3: switch0phy3@3 {
 214                                 reg = <0x03>;
 215                                 interrupt-parent = <&switch0>;
 216                         };
 217
 218                         switch0phy4: switch0phy4@4 {
 219                                 reg = <0x04>;
 220                                 interrupt-parent = <&switch0>;
 221                         };
 222                 };
 223
 224                 ports {
 225                         #address-cells = <1>;
 226                         #size-cells = <0>;
 227
 228                         port@0 {
 229                                 reg = <0>;
 230                                 label = "sweth3";
 231                                 phy-handle = <&switch0phy0>;
 232                         };
 233
 234                         port@1 {
 235                                 reg = <1>;
 236                                 label = "sweth4";
 237                                 phy-handle = <&switch0phy1>;
 238                         };
 239
 240                         port@2 {
 241                                 reg = <2>;
 242                                 label = "sweth5";
 243                                 phy-handle = <&switch0phy2>;
 244                         };
 245
 246                         port@3 {
 247                                 reg = <3>;
 248                                 label = "sweth6";
 249                                 phy-handle = <&switch0phy3>;
 250                         };
 251
 252                         port@4 {
 253                                 reg = <4>;
 254                                 label = "sweth7";
 255                                 phy-handle = <&switch0phy4>;
 256                         };
 257
 258                         // OEM bootlog suggests multiple ports are attached to switch
 259                         // Keep this until OEM supplies GPL sources
 260                         port@5 {
 261                                 status = "disabled";
 262
 263                                 reg = "<5>";
 264                                 label = "cpu";
 265                                 ethernet = <&enet2>;
 266                                 phy-mode = "rgmii-id";
 267
 268                                 fixed-link {
 269                                         speed = <1000>;
 270                                         full-duplex;
 271                                 };
 272                         };
 273
 274                         port@6 {
 275                                 reg = <6>;
 276                                 label = "cpu";
 277                                 ethernet = <&enet3>;
 278                                 phy-mode = "rgmii-id";
 279
 280                                 fixed-link {
 281                                         speed = <1000>;
 282                                         full-duplex;
 283                                 };
 284                         };
 285                 };
 286         };
 287 };
 288
 289 &soc {
 290         i2c@118000 {
 291                 tpm@29 {
 292                         compatible = "tpm,tpm_i2c_atmel";
 293                         reg = <0x29>;
 294                 };
 295                 hwmon@2c {
 296                         compatible = "winbond,w83793";
 297                         reg = <0x2c>;
 298                 };
 299                 hwmon@2d {
 300                         compatible = "winbond,w83793";
 301                         reg = <0x2d>;
 302                 };
 303                 rtc@32 {
 304                         compatible = "ricoh,rs5c372a";
 305                         reg = <0x32>;
 306                 };
 307                 pca9547@77 {
 308                         status = "disabled";
 309                 };
 310         };
 311
 312         spi@110000 {
 313                 // DTS decompiled from OEM DTB contains flash@0 but doesn't work
 314                 // spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
 315                 // disable for now
 316                 flash@0 {
 317                         status = "disabled";
 318                 };
 319
 320                 flash@1 {
 321                         status = "disabled";
 322                 };
 323
 324                 flash@2 {
 325                         status = "disabled";
 326                 };
 327         };
 328 };