target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6
   7 #include "mt7622.dtsi"
   8 #include "mt6380.dtsi"
   9
  10 / {
  11         compatible = "linksys,e8450", "mediatek,mt7622";
  12
  13         aliases {
  14                 serial0 = &uart0;
  15                 led-boot = &led_power;
  16                 led-failsafe = &led_power;
  17                 led-running = &led_power;
  18                 led-upgrade = &led_power;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial0:115200n8";
  23                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
  24         };
  25
  26         cpus {
  27                 cpu@0 {
  28                         proc-supply = <&mt6380_vcpu_reg>;
  29                         sram-supply = <&mt6380_vm_reg>;
  30                 };
  31
  32                 cpu@1 {
  33                         proc-supply = <&mt6380_vcpu_reg>;
  34                         sram-supply = <&mt6380_vm_reg>;
  35                 };
  36         };
  37
  38         gpio-keys {
  39                 compatible = "gpio-keys";
  40
  41                 factory {
  42                         label = "reset";
  43                         linux,code = <KEY_RESTART>;
  44                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  45                 };
  46
  47                 wps {
  48                         label = "wps";
  49                         linux,code = <KEY_WPS_BUTTON>;
  50                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53
  54         gpio-leds {
  55                 compatible = "gpio-leds";
  56
  57                 led_power: power_blue {
  58                         label = "power:blue";
  59                         gpios = <&pio 95 GPIO_ACTIVE_LOW>;
  60                         default-state = "on";
  61                 };
  62
  63                 power_orange {
  64                         label = "power:orange";
  65                         gpios = <&pio 96 GPIO_ACTIVE_LOW>;
  66                         default-state = "off";
  67                 };
  68
  69                 inet_blue {
  70                         label = "inet:blue";
  71                         gpios = <&pio 97 GPIO_ACTIVE_LOW>;
  72                         default-state = "off";
  73                 };
  74
  75                 inet_orange {
  76                         label = "inet:orange";
  77                         gpios = <&pio 98 GPIO_ACTIVE_LOW>;
  78                         default-state = "off";
  79                 };
  80         };
  81
  82         memory {
  83                 reg = <0 0x40000000 0 0x40000000>;
  84         };
  85
  86         reg_1p8v: regulator-1p8v {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "fixed-1.8V";
  89                 regulator-min-microvolt = <1800000>;
  90                 regulator-max-microvolt = <1800000>;
  91                 regulator-always-on;
  92         };
  93
  94         reg_3p3v: regulator-3p3v {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "fixed-3.3V";
  97                 regulator-min-microvolt = <3300000>;
  98                 regulator-max-microvolt = <3300000>;
  99                 regulator-boot-on;
 100                 regulator-always-on;
 101         };
 102
 103         reg_5v: regulator-5v {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "fixed-5V";
 106                 regulator-min-microvolt = <5000000>;
 107                 regulator-max-microvolt = <5000000>;
 108                 regulator-boot-on;
 109                 regulator-always-on;
 110         };
 111 };
 112
 113 &btif {
 114         status = "okay";
 115 };
 116
 117 &cir {
 118         pinctrl-names = "default";
 119         pinctrl-0 = <&irrx_pins>;
 120         status = "okay";
 121 };
 122
 123 &eth {
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&eth_pins>;
 126         status = "okay";
 127
 128         gmac0: mac@0 {
 129                 compatible = "mediatek,eth-mac";
 130                 reg = <0>;
 131                 phy-mode = "2500base-x";
 132
 133                 fixed-link {
 134                         speed = <2500>;
 135                         full-duplex;
 136                         pause;
 137                 };
 138         };
 139
 140         mdio-bus {
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143
 144                 switch@0 {
 145                         compatible = "mediatek,mt7531";
 146                         reg = <0>;
 147                         interrupt-controller;
 148                         #interrupt-cells = <1>;
 149                         interrupt-parent = <&pio>;
 150                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 151                         reset-gpios = <&pio 54 0>;
 152
 153                         ports {
 154                                 #address-cells = <1>;
 155                                 #size-cells = <0>;
 156
 157                                 port@0 {
 158                                         reg = <0>;
 159                                         label = "lan1";
 160                                 };
 161
 162                                 port@1 {
 163                                         reg = <1>;
 164                                         label = "lan2";
 165                                 };
 166
 167                                 port@2 {
 168                                         reg = <2>;
 169                                         label = "lan3";
 170                                 };
 171
 172                                 port@3 {
 173                                         reg = <3>;
 174                                         label = "lan4";
 175                                 };
 176
 177                                 wan: port@4 {
 178                                         reg = <4>;
 179                                         label = "wan";
 180                                 };
 181
 182                                 port@6 {
 183                                         reg = <6>;
 184                                         label = "cpu";
 185                                         ethernet = <&gmac0>;
 186                                         phy-mode = "2500base-x";
 187
 188                                         fixed-link {
 189                                                 speed = <2500>;
 190                                                 full-duplex;
 191                                                 pause;
 192                                         };
 193                                 };
 194                         };
 195                 };
 196
 197         };
 198 };
 199
 200 &pcie0 {
 201         pinctrl-names = "default";
 202         pinctrl-0 = <&pcie0_pins>;
 203         status = "okay";
 204 };
 205
 206 &pcie1 {
 207         pinctrl-names = "default";
 208         pinctrl-0 = <&pcie1_pins>;
 209         status = "okay";
 210 };
 211
 212 &pio {
 213         eth_pins: eth-pins {
 214                 mux {
 215                         function = "eth";
 216                         groups = "mdc_mdio", "rgmii_via_gmac2";
 217                 };
 218         };
 219
 220         irrx_pins: irrx-pins {
 221                 mux {
 222                         function = "ir";
 223                         groups =  "ir_1_rx";
 224                 };
 225         };
 226
 227         irtx_pins: irtx-pins {
 228                 mux {
 229                         function = "ir";
 230                         groups =  "ir_1_tx";
 231                 };
 232         };
 233
 234         pcie0_pins: pcie0-pins {
 235                 mux {
 236                         function = "pcie";
 237                         groups = "pcie0_pad_perst",
 238                                  "pcie0_1_waken",
 239                                  "pcie0_1_clkreq";
 240                 };
 241         };
 242
 243         pcie1_pins: pcie1-pins {
 244                 mux {
 245                         function = "pcie";
 246                         groups = "pcie1_pad_perst",
 247                                  "pcie1_0_waken",
 248                                  "pcie1_0_clkreq";
 249                 };
 250         };
 251
 252         pmic_bus_pins: pmic-bus-pins {
 253                 mux {
 254                         function = "pmic";
 255                         groups = "pmic_bus";
 256                 };
 257         };
 258
 259         pwm7_pins: pwm1-2-pins {
 260                 mux {
 261                         function = "pwm";
 262                         groups = "pwm_ch7_2";
 263                 };
 264         };
 265
 266         wled_pins: wled-pins {
 267                 mux {
 268                         function = "led";
 269                         groups = "wled";
 270                 };
 271         };
 272
 273         /* Serial NAND is shared pin with SPI-NOR */
 274         serial_nand_pins: serial-nand-pins {
 275                 mux {
 276                         function = "flash";
 277                         groups = "snfi";
 278                 };
 279         };
 280
 281         spic0_pins: spic0-pins {
 282                 mux {
 283                         function = "spi";
 284                         groups = "spic0_0";
 285                 };
 286         };
 287
 288         spic1_pins: spic1-pins {
 289                 mux {
 290                         function = "spi";
 291                         groups = "spic1_0";
 292                 };
 293         };
 294
 295         uart0_pins: uart0-pins {
 296                 mux {
 297                         function = "uart";
 298                         groups = "uart0_0_tx_rx" ;
 299                 };
 300         };
 301
 302         uart2_pins: uart2-pins {
 303                 mux {
 304                         function = "uart";
 305                         groups = "uart2_1_tx_rx" ;
 306                 };
 307         };
 308
 309         watchdog_pins: watchdog-pins {
 310                 mux {
 311                         function = "watchdog";
 312                         groups = "watchdog";
 313                 };
 314         };
 315 };
 316
 317 &pwm {
 318         pinctrl-names = "default";
 319         pinctrl-0 = <&pwm7_pins>;
 320         status = "okay";
 321 };
 322
 323 &pwrap {
 324         pinctrl-names = "default";
 325         pinctrl-0 = <&pmic_bus_pins>;
 326
 327         status = "okay";
 328 };
 329
 330 &sata {
 331         status = "disabled";
 332 };
 333
 334 &sata_phy {
 335         status = "disabled";
 336 };
 337
 338 &slot0 {
 339         wmac1: mt7915@0,0 {
 340                 reg = <0x0000 0 0 0 0>;
 341                 ieee80211-freq-limit = <5000000 6000000>;
 342         };
 343 };
 344
 345 &bch {
 346         status = "okay";
 347 };
 348
 349 &snfi {
 350         pinctrl-names = "default";
 351         pinctrl-0 = <&serial_nand_pins>;
 352         status = "okay";
 353
 354         snand: flash@0 {
 355                 compatible = "spi-nand";
 356                 reg = <0>;
 357                 spi-tx-bus-width = <4>;
 358                 spi-rx-bus-width = <4>;
 359                 nand-ecc-engine = <&snfi>;
 360         };
 361 };
 362
 363 &spi0 {
 364         pinctrl-names = "default";
 365         pinctrl-0 = <&spic0_pins>;
 366         status = "okay";
 367 };
 368
 369 &spi1 {
 370         pinctrl-names = "default";
 371         pinctrl-0 = <&spic1_pins>;
 372         status = "okay";
 373 };
 374
 375 &ssusb {
 376         vusb33-supply = <&reg_3p3v>;
 377         vbus-supply = <&reg_5v>;
 378         status = "okay";
 379 };
 380
 381 &u3phy {
 382         status = "okay";
 383 };
 384
 385 &uart0 {
 386         pinctrl-names = "default";
 387         pinctrl-0 = <&uart0_pins>;
 388         status = "okay";
 389 };
 390
 391 &uart2 {
 392         pinctrl-names = "default";
 393         pinctrl-0 = <&uart2_pins>;
 394         status = "okay";
 395 };
 396
 397 &rtc {
 398         status = "disabled";
 399 };
 400
 401 &watchdog {
 402         pinctrl-names = "default";
 403         pinctrl-0 = <&watchdog_pins>;
 404         status = "okay";
 405 };