projects / openwrt / staging / mkresin.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
layerscape: update kernel patches
[openwrt/staging/mkresin.git] / target / linux / layerscape / patches-4.9 / 704-fsl-mc-layerscape-support.patch
1 From afb7254de9f03c3efaf4e306dcf5f88e1873fc6b Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Mon, 25 Sep 2017 12:06:25 +0800
4 Subject: [PATCH] fsl-mc: layerscape support
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 This is a integrated patch for layerscape mc-bus support.
10
11 Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
12 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
13 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
14 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
15 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
16 Signed-off-by: Shiva Kerdel <shiva@exdev.nl>
17 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
18 Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
19 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
20 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
21 ---
22 drivers/staging/fsl-mc/bus/Kconfig | 41 +-
23 drivers/staging/fsl-mc/bus/Makefile | 10 +-
24 drivers/staging/fsl-mc/bus/dpbp-cmd.h | 80 ++
25 drivers/staging/fsl-mc/bus/dpbp.c | 450 +--------
26 drivers/staging/fsl-mc/bus/dpcon-cmd.h | 85 ++
27 drivers/staging/fsl-mc/bus/dpcon.c | 317 ++++++
28 drivers/staging/fsl-mc/bus/dpio/Makefile | 11 +
29 .../{include/dpcon-cmd.h => bus/dpio/dpio-cmd.h} | 73 +-
30 drivers/staging/fsl-mc/bus/dpio/dpio-driver.c | 296 ++++++
31 drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt | 135 +++
32 drivers/staging/fsl-mc/bus/dpio/dpio-service.c | 693 +++++++++++++
33 drivers/staging/fsl-mc/bus/dpio/dpio.c | 224 +++++
34 drivers/staging/fsl-mc/bus/dpio/dpio.h | 109 ++
35 drivers/staging/fsl-mc/bus/dpio/qbman-portal.c | 1049 ++++++++++++++++++++
36 drivers/staging/fsl-mc/bus/dpio/qbman-portal.h | 662 ++++++++++++
37 drivers/staging/fsl-mc/bus/dpio/qbman_debug.c | 853 ++++++++++++++++
38 drivers/staging/fsl-mc/bus/dpio/qbman_debug.h | 136 +++
39 drivers/staging/fsl-mc/bus/dpio/qbman_private.h | 171 ++++
40 drivers/staging/fsl-mc/bus/dpmcp-cmd.h | 112 +--
41 drivers/staging/fsl-mc/bus/dpmcp.c | 374 +------
42 drivers/staging/fsl-mc/bus/dpmcp.h | 127 +--
43 drivers/staging/fsl-mc/bus/dpmng-cmd.h | 14 +-
44 drivers/staging/fsl-mc/bus/dpmng.c | 37 +-
45 drivers/staging/fsl-mc/bus/dprc-cmd.h | 82 +-
46 drivers/staging/fsl-mc/bus/dprc-driver.c | 38 +-
47 drivers/staging/fsl-mc/bus/dprc.c | 629 +-----------
48 drivers/staging/fsl-mc/bus/fsl-mc-allocator.c | 78 +-
49 drivers/staging/fsl-mc/bus/fsl-mc-bus.c | 318 +++---
50 drivers/staging/fsl-mc/bus/fsl-mc-iommu.c | 104 ++
51 drivers/staging/fsl-mc/bus/fsl-mc-msi.c | 3 +-
52 drivers/staging/fsl-mc/bus/fsl-mc-private.h | 6 +-
53 .../staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c | 11 +-
54 drivers/staging/fsl-mc/bus/mc-io.c | 4 +-
55 drivers/staging/fsl-mc/bus/mc-ioctl.h | 22 +
56 drivers/staging/fsl-mc/bus/mc-restool.c | 405 ++++++++
57 drivers/staging/fsl-mc/bus/mc-sys.c | 14 +-
58 drivers/staging/fsl-mc/include/dpaa2-fd.h | 706 +++++++++++++
59 drivers/staging/fsl-mc/include/dpaa2-global.h | 202 ++++
60 drivers/staging/fsl-mc/include/dpaa2-io.h | 190 ++++
61 drivers/staging/fsl-mc/include/dpbp-cmd.h | 185 ----
62 drivers/staging/fsl-mc/include/dpbp.h | 158 +--
63 drivers/staging/fsl-mc/include/dpcon.h | 115 +++
64 drivers/staging/fsl-mc/include/dpmng.h | 16 +-
65 drivers/staging/fsl-mc/include/dpopr.h | 110 ++
66 drivers/staging/fsl-mc/include/dprc.h | 470 +++------
67 drivers/staging/fsl-mc/include/mc-bus.h | 7 +-
68 drivers/staging/fsl-mc/include/mc-cmd.h | 44 +-
69 drivers/staging/fsl-mc/include/mc-sys.h | 3 +-
70 drivers/staging/fsl-mc/include/mc.h | 17 +-
71 49 files changed, 7384 insertions(+), 2612 deletions(-)
72 create mode 100644 drivers/staging/fsl-mc/bus/dpbp-cmd.h
73 create mode 100644 drivers/staging/fsl-mc/bus/dpcon-cmd.h
74 create mode 100644 drivers/staging/fsl-mc/bus/dpcon.c
75 create mode 100644 drivers/staging/fsl-mc/bus/dpio/Makefile
76 rename drivers/staging/fsl-mc/{include/dpcon-cmd.h => bus/dpio/dpio-cmd.h} (64%)
77 create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-driver.c
78 create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt
79 create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-service.c
80 create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio.c
81 create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio.h
82 create mode 100644 drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
83 create mode 100644 drivers/staging/fsl-mc/bus/dpio/qbman-portal.h
84 create mode 100644 drivers/staging/fsl-mc/bus/dpio/qbman_debug.c
85 create mode 100644 drivers/staging/fsl-mc/bus/dpio/qbman_debug.h
86 create mode 100644 drivers/staging/fsl-mc/bus/dpio/qbman_private.h
87 create mode 100644 drivers/staging/fsl-mc/bus/fsl-mc-iommu.c
88 create mode 100644 drivers/staging/fsl-mc/bus/mc-ioctl.h
89 create mode 100644 drivers/staging/fsl-mc/bus/mc-restool.c
90 create mode 100644 drivers/staging/fsl-mc/include/dpaa2-fd.h
91 create mode 100644 drivers/staging/fsl-mc/include/dpaa2-global.h
92 create mode 100644 drivers/staging/fsl-mc/include/dpaa2-io.h
93 delete mode 100644 drivers/staging/fsl-mc/include/dpbp-cmd.h
94 create mode 100644 drivers/staging/fsl-mc/include/dpcon.h
95 create mode 100644 drivers/staging/fsl-mc/include/dpopr.h
96
97 diff --git a/drivers/staging/fsl-mc/bus/Kconfig b/drivers/staging/fsl-mc/bus/Kconfig
98 index 1f959339..67847c0e 100644
99 --- a/drivers/staging/fsl-mc/bus/Kconfig
100 +++ b/drivers/staging/fsl-mc/bus/Kconfig
101 @@ -1,25 +1,40 @@
102 #
103 -# Freescale Management Complex (MC) bus drivers
104 +# DPAA2 fsl-mc bus
105 #
106 -# Copyright (C) 2014 Freescale Semiconductor, Inc.
107 +# Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
108 #
109 # This file is released under the GPLv2
110 #
111
112 config FSL_MC_BUS
113 - bool "Freescale Management Complex (MC) bus driver"
114 - depends on OF && ARM64
115 + bool "QorIQ DPAA2 fsl-mc bus driver"
116 + depends on OF && ARCH_LAYERSCAPE
117 select GENERIC_MSI_IRQ_DOMAIN
118 help
119 - Driver to enable the bus infrastructure for the Freescale
120 - QorIQ Management Complex (fsl-mc). The fsl-mc is a hardware
121 - module of the QorIQ LS2 SoCs, that does resource management
122 - for hardware building-blocks in the SoC that can be used
123 - to dynamically create networking hardware objects such as
124 - network interfaces (NICs), crypto accelerator instances,
125 - or L2 switches.
126 + Driver to enable the bus infrastructure for the QorIQ DPAA2
127 + architecture. The fsl-mc bus driver handles discovery of
128 + DPAA2 objects (which are represented as Linux devices) and
129 + binding objects to drivers.
130
131 - Only enable this option when building the kernel for
132 - Freescale QorQIQ LS2xxxx SoCs.
133 +config FSL_MC_DPIO
134 + tristate "QorIQ DPAA2 DPIO driver"
135 + depends on FSL_MC_BUS
136 + help
137 + Driver for the DPAA2 DPIO object. A DPIO provides queue and
138 + buffer management facilities for software to interact with
139 + other DPAA2 objects. This driver does not expose the DPIO
140 + objects individually, but groups them under a service layer
141 + API.
142
143 +config FSL_QBMAN_DEBUG
144 + tristate "Freescale QBMAN Debug APIs"
145 + depends on FSL_MC_DPIO
146 + help
147 + QBMan debug assistant APIs.
148
149 +config FSL_MC_RESTOOL
150 + tristate "Freescale Management Complex (MC) restool driver"
151 + depends on FSL_MC_BUS
152 + help
153 + Driver that provides kernel support for the Freescale Management
154 + Complex resource manager user-space tool.
155 diff --git a/drivers/staging/fsl-mc/bus/Makefile b/drivers/staging/fsl-mc/bus/Makefile
156 index 38716fd5..e7e2239c 100644
157 --- a/drivers/staging/fsl-mc/bus/Makefile
158 +++ b/drivers/staging/fsl-mc/bus/Makefile
159 @@ -17,4 +17,12 @@ mc-bus-driver-objs := fsl-mc-bus.o \
160 fsl-mc-msi.o \
161 irq-gic-v3-its-fsl-mc-msi.o \
162 dpmcp.o \
163 - dpbp.o
164 + dpbp.o \
165 + dpcon.o \
166 + fsl-mc-iommu.o
167 +
168 +# MC DPIO driver
169 +obj-$(CONFIG_FSL_MC_DPIO) += dpio/
170 +
171 +# MC restool kernel support
172 +obj-$(CONFIG_FSL_MC_RESTOOL) += mc-restool.o
173 diff --git a/drivers/staging/fsl-mc/bus/dpbp-cmd.h b/drivers/staging/fsl-mc/bus/dpbp-cmd.h
174 new file mode 100644
175 index 00000000..8aa65452
176 --- /dev/null
177 +++ b/drivers/staging/fsl-mc/bus/dpbp-cmd.h
178 @@ -0,0 +1,80 @@
179 +/*
180 + * Copyright 2013-2016 Freescale Semiconductor Inc.
181 + *
182 + * Redistribution and use in source and binary forms, with or without
183 + * modification, are permitted provided that the following conditions are met:
184 + * * Redistributions of source code must retain the above copyright
185 + * notice, this list of conditions and the following disclaimer.
186 + * * Redistributions in binary form must reproduce the above copyright
187 + * notice, this list of conditions and the following disclaimer in the
188 + * documentation and/or other materials provided with the distribution.
189 + * * Neither the name of the above-listed copyright holders nor the
190 + * names of any contributors may be used to endorse or promote products
191 + * derived from this software without specific prior written permission.
192 + *
193 + * ALTERNATIVELY, this software may be distributed under the terms of the
194 + * GNU General Public License ("GPL") as published by the Free Software
195 + * Foundation, either version 2 of that License or (at your option) any
196 + * later version.
197 + *
198 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
199 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
200 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
201 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
202 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
203 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
204 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
205 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
206 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
207 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
208 + * POSSIBILITY OF SUCH DAMAGE.
209 + */
210 +#ifndef _FSL_DPBP_CMD_H
211 +#define _FSL_DPBP_CMD_H
212 +
213 +/* DPBP Version */
214 +#define DPBP_VER_MAJOR 3
215 +#define DPBP_VER_MINOR 2
216 +
217 +/* Command versioning */
218 +#define DPBP_CMD_BASE_VERSION 1
219 +#define DPBP_CMD_ID_OFFSET 4
220 +
221 +#define DPBP_CMD(id) ((id << DPBP_CMD_ID_OFFSET) | DPBP_CMD_BASE_VERSION)
222 +
223 +/* Command IDs */
224 +#define DPBP_CMDID_CLOSE DPBP_CMD(0x800)
225 +#define DPBP_CMDID_OPEN DPBP_CMD(0x804)
226 +#define DPBP_CMDID_GET_API_VERSION DPBP_CMD(0xa04)
227 +
228 +#define DPBP_CMDID_ENABLE DPBP_CMD(0x002)
229 +#define DPBP_CMDID_DISABLE DPBP_CMD(0x003)
230 +#define DPBP_CMDID_GET_ATTR DPBP_CMD(0x004)
231 +#define DPBP_CMDID_RESET DPBP_CMD(0x005)
232 +#define DPBP_CMDID_IS_ENABLED DPBP_CMD(0x006)
233 +
234 +struct dpbp_cmd_open {
235 + __le32 dpbp_id;
236 +};
237 +
238 +struct dpbp_cmd_destroy {
239 + __le32 object_id;
240 +};
241 +
242 +#define DPBP_ENABLE 0x1
243 +
244 +struct dpbp_rsp_is_enabled {
245 + u8 enabled;
246 +};
247 +
248 +struct dpbp_rsp_get_attributes {
249 + /* response word 0 */
250 + __le16 pad;
251 + __le16 bpid;
252 + __le32 id;
253 + /* response word 1 */
254 + __le16 version_major;
255 + __le16 version_minor;
256 +};
257 +
258 +#endif /* _FSL_DPBP_CMD_H */
259 diff --git a/drivers/staging/fsl-mc/bus/dpbp.c b/drivers/staging/fsl-mc/bus/dpbp.c
260 index 5d4cd812..d9e450a6 100644
261 --- a/drivers/staging/fsl-mc/bus/dpbp.c
262 +++ b/drivers/staging/fsl-mc/bus/dpbp.c
263 @@ -1,4 +1,5 @@
264 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
265 +/*
266 + * Copyright 2013-2016 Freescale Semiconductor Inc.
267 *
268 * Redistribution and use in source and binary forms, with or without
269 * modification, are permitted provided that the following conditions are met:
270 @@ -11,7 +12,6 @@
271 * names of any contributors may be used to endorse or promote products
272 * derived from this software without specific prior written permission.
273 *
274 - *
275 * ALTERNATIVELY, this software may be distributed under the terms of the
276 * GNU General Public License ("GPL") as published by the Free Software
277 * Foundation, either version 2 of that License or (at your option) any
278 @@ -32,7 +32,8 @@
279 #include "../include/mc-sys.h"
280 #include "../include/mc-cmd.h"
281 #include "../include/dpbp.h"
282 -#include "../include/dpbp-cmd.h"
283 +
284 +#include "dpbp-cmd.h"
285
286 /**
287 * dpbp_open() - Open a control session for the specified object.
288 @@ -104,74 +105,6 @@ int dpbp_close(struct fsl_mc_io *mc_io,
289 }
290 EXPORT_SYMBOL(dpbp_close);
291
292 -/**
293 - * dpbp_create() - Create the DPBP object.
294 - * @mc_io: Pointer to MC portal's I/O object
295 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
296 - * @cfg: Configuration structure
297 - * @token: Returned token; use in subsequent API calls
298 - *
299 - * Create the DPBP object, allocate required resources and
300 - * perform required initialization.
301 - *
302 - * The object can be created either by declaring it in the
303 - * DPL file, or by calling this function.
304 - * This function returns a unique authentication token,
305 - * associated with the specific object ID and the specific MC
306 - * portal; this token must be used in all subsequent calls to
307 - * this specific object. For objects that are created using the
308 - * DPL file, call dpbp_open function to get an authentication
309 - * token first.
310 - *
311 - * Return: '0' on Success; Error code otherwise.
312 - */
313 -int dpbp_create(struct fsl_mc_io *mc_io,
314 - u32 cmd_flags,
315 - const struct dpbp_cfg *cfg,
316 - u16 *token)
317 -{
318 - struct mc_command cmd = { 0 };
319 - int err;
320 -
321 - (void)(cfg); /* unused */
322 -
323 - /* prepare command */
324 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_CREATE,
325 - cmd_flags, 0);
326 -
327 - /* send command to mc*/
328 - err = mc_send_command(mc_io, &cmd);
329 - if (err)
330 - return err;
331 -
332 - /* retrieve response parameters */
333 - *token = mc_cmd_hdr_read_token(&cmd);
334 -
335 - return 0;
336 -}
337 -
338 -/**
339 - * dpbp_destroy() - Destroy the DPBP object and release all its resources.
340 - * @mc_io: Pointer to MC portal's I/O object
341 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
342 - * @token: Token of DPBP object
343 - *
344 - * Return: '0' on Success; error code otherwise.
345 - */
346 -int dpbp_destroy(struct fsl_mc_io *mc_io,
347 - u32 cmd_flags,
348 - u16 token)
349 -{
350 - struct mc_command cmd = { 0 };
351 -
352 - /* prepare command */
353 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_DESTROY,
354 - cmd_flags, token);
355 -
356 - /* send command to mc*/
357 - return mc_send_command(mc_io, &cmd);
358 -}
359 -
360 /**
361 * dpbp_enable() - Enable the DPBP.
362 * @mc_io: Pointer to MC portal's I/O object
363 @@ -250,6 +183,7 @@ int dpbp_is_enabled(struct fsl_mc_io *mc_io,
364
365 return 0;
366 }
367 +EXPORT_SYMBOL(dpbp_is_enabled);
368
369 /**
370 * dpbp_reset() - Reset the DPBP, returns the object to initial state.
371 @@ -272,310 +206,7 @@ int dpbp_reset(struct fsl_mc_io *mc_io,
372 /* send command to mc*/
373 return mc_send_command(mc_io, &cmd);
374 }
375 -
376 -/**
377 - * dpbp_set_irq() - Set IRQ information for the DPBP to trigger an interrupt.
378 - * @mc_io: Pointer to MC portal's I/O object
379 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
380 - * @token: Token of DPBP object
381 - * @irq_index: Identifies the interrupt index to configure
382 - * @irq_cfg: IRQ configuration
383 - *
384 - * Return: '0' on Success; Error code otherwise.
385 - */
386 -int dpbp_set_irq(struct fsl_mc_io *mc_io,
387 - u32 cmd_flags,
388 - u16 token,
389 - u8 irq_index,
390 - struct dpbp_irq_cfg *irq_cfg)
391 -{
392 - struct mc_command cmd = { 0 };
393 - struct dpbp_cmd_set_irq *cmd_params;
394 -
395 - /* prepare command */
396 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ,
397 - cmd_flags, token);
398 - cmd_params = (struct dpbp_cmd_set_irq *)cmd.params;
399 - cmd_params->irq_index = irq_index;
400 - cmd_params->irq_val = cpu_to_le32(irq_cfg->val);
401 - cmd_params->irq_addr = cpu_to_le64(irq_cfg->addr);
402 - cmd_params->irq_num = cpu_to_le32(irq_cfg->irq_num);
403 -
404 - /* send command to mc*/
405 - return mc_send_command(mc_io, &cmd);
406 -}
407 -
408 -/**
409 - * dpbp_get_irq() - Get IRQ information from the DPBP.
410 - * @mc_io: Pointer to MC portal's I/O object
411 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
412 - * @token: Token of DPBP object
413 - * @irq_index: The interrupt index to configure
414 - * @type: Interrupt type: 0 represents message interrupt
415 - * type (both irq_addr and irq_val are valid)
416 - * @irq_cfg: IRQ attributes
417 - *
418 - * Return: '0' on Success; Error code otherwise.
419 - */
420 -int dpbp_get_irq(struct fsl_mc_io *mc_io,
421 - u32 cmd_flags,
422 - u16 token,
423 - u8 irq_index,
424 - int *type,
425 - struct dpbp_irq_cfg *irq_cfg)
426 -{
427 - struct mc_command cmd = { 0 };
428 - struct dpbp_cmd_get_irq *cmd_params;
429 - struct dpbp_rsp_get_irq *rsp_params;
430 - int err;
431 -
432 - /* prepare command */
433 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ,
434 - cmd_flags, token);
435 - cmd_params = (struct dpbp_cmd_get_irq *)cmd.params;
436 - cmd_params->irq_index = irq_index;
437 -
438 - /* send command to mc*/
439 - err = mc_send_command(mc_io, &cmd);
440 - if (err)
441 - return err;
442 -
443 - /* retrieve response parameters */
444 - rsp_params = (struct dpbp_rsp_get_irq *)cmd.params;
445 - irq_cfg->val = le32_to_cpu(rsp_params->irq_val);
446 - irq_cfg->addr = le64_to_cpu(rsp_params->irq_addr);
447 - irq_cfg->irq_num = le32_to_cpu(rsp_params->irq_num);
448 - *type = le32_to_cpu(rsp_params->type);
449 -
450 - return 0;
451 -}
452 -
453 -/**
454 - * dpbp_set_irq_enable() - Set overall interrupt state.
455 - * @mc_io: Pointer to MC portal's I/O object
456 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
457 - * @token: Token of DPBP object
458 - * @irq_index: The interrupt index to configure
459 - * @en: Interrupt state - enable = 1, disable = 0
460 - *
461 - * Allows GPP software to control when interrupts are generated.
462 - * Each interrupt can have up to 32 causes. The enable/disable control's the
463 - * overall interrupt state. if the interrupt is disabled no causes will cause
464 - * an interrupt.
465 - *
466 - * Return: '0' on Success; Error code otherwise.
467 - */
468 -int dpbp_set_irq_enable(struct fsl_mc_io *mc_io,
469 - u32 cmd_flags,
470 - u16 token,
471 - u8 irq_index,
472 - u8 en)
473 -{
474 - struct mc_command cmd = { 0 };
475 - struct dpbp_cmd_set_irq_enable *cmd_params;
476 -
477 - /* prepare command */
478 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_ENABLE,
479 - cmd_flags, token);
480 - cmd_params = (struct dpbp_cmd_set_irq_enable *)cmd.params;
481 - cmd_params->enable = en & DPBP_ENABLE;
482 - cmd_params->irq_index = irq_index;
483 -
484 - /* send command to mc*/
485 - return mc_send_command(mc_io, &cmd);
486 -}
487 -
488 -/**
489 - * dpbp_get_irq_enable() - Get overall interrupt state
490 - * @mc_io: Pointer to MC portal's I/O object
491 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
492 - * @token: Token of DPBP object
493 - * @irq_index: The interrupt index to configure
494 - * @en: Returned interrupt state - enable = 1, disable = 0
495 - *
496 - * Return: '0' on Success; Error code otherwise.
497 - */
498 -int dpbp_get_irq_enable(struct fsl_mc_io *mc_io,
499 - u32 cmd_flags,
500 - u16 token,
501 - u8 irq_index,
502 - u8 *en)
503 -{
504 - struct mc_command cmd = { 0 };
505 - struct dpbp_cmd_get_irq_enable *cmd_params;
506 - struct dpbp_rsp_get_irq_enable *rsp_params;
507 - int err;
508 -
509 - /* prepare command */
510 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_ENABLE,
511 - cmd_flags, token);
512 - cmd_params = (struct dpbp_cmd_get_irq_enable *)cmd.params;
513 - cmd_params->irq_index = irq_index;
514 -
515 - /* send command to mc*/
516 - err = mc_send_command(mc_io, &cmd);
517 - if (err)
518 - return err;
519 -
520 - /* retrieve response parameters */
521 - rsp_params = (struct dpbp_rsp_get_irq_enable *)cmd.params;
522 - *en = rsp_params->enabled & DPBP_ENABLE;
523 - return 0;
524 -}
525 -
526 -/**
527 - * dpbp_set_irq_mask() - Set interrupt mask.
528 - * @mc_io: Pointer to MC portal's I/O object
529 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
530 - * @token: Token of DPBP object
531 - * @irq_index: The interrupt index to configure
532 - * @mask: Event mask to trigger interrupt;
533 - * each bit:
534 - * 0 = ignore event
535 - * 1 = consider event for asserting IRQ
536 - *
537 - * Every interrupt can have up to 32 causes and the interrupt model supports
538 - * masking/unmasking each cause independently
539 - *
540 - * Return: '0' on Success; Error code otherwise.
541 - */
542 -int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
543 - u32 cmd_flags,
544 - u16 token,
545 - u8 irq_index,
546 - u32 mask)
547 -{
548 - struct mc_command cmd = { 0 };
549 - struct dpbp_cmd_set_irq_mask *cmd_params;
550 -
551 - /* prepare command */
552 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_MASK,
553 - cmd_flags, token);
554 - cmd_params = (struct dpbp_cmd_set_irq_mask *)cmd.params;
555 - cmd_params->mask = cpu_to_le32(mask);
556 - cmd_params->irq_index = irq_index;
557 -
558 - /* send command to mc*/
559 - return mc_send_command(mc_io, &cmd);
560 -}
561 -
562 -/**
563 - * dpbp_get_irq_mask() - Get interrupt mask.
564 - * @mc_io: Pointer to MC portal's I/O object
565 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
566 - * @token: Token of DPBP object
567 - * @irq_index: The interrupt index to configure
568 - * @mask: Returned event mask to trigger interrupt
569 - *
570 - * Every interrupt can have up to 32 causes and the interrupt model supports
571 - * masking/unmasking each cause independently
572 - *
573 - * Return: '0' on Success; Error code otherwise.
574 - */
575 -int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
576 - u32 cmd_flags,
577 - u16 token,
578 - u8 irq_index,
579 - u32 *mask)
580 -{
581 - struct mc_command cmd = { 0 };
582 - struct dpbp_cmd_get_irq_mask *cmd_params;
583 - struct dpbp_rsp_get_irq_mask *rsp_params;
584 - int err;
585 -
586 - /* prepare command */
587 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_MASK,
588 - cmd_flags, token);
589 - cmd_params = (struct dpbp_cmd_get_irq_mask *)cmd.params;
590 - cmd_params->irq_index = irq_index;
591 -
592 - /* send command to mc*/
593 - err = mc_send_command(mc_io, &cmd);
594 - if (err)
595 - return err;
596 -
597 - /* retrieve response parameters */
598 - rsp_params = (struct dpbp_rsp_get_irq_mask *)cmd.params;
599 - *mask = le32_to_cpu(rsp_params->mask);
600 -
601 - return 0;
602 -}
603 -
604 -/**
605 - * dpbp_get_irq_status() - Get the current status of any pending interrupts.
606 - *
607 - * @mc_io: Pointer to MC portal's I/O object
608 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
609 - * @token: Token of DPBP object
610 - * @irq_index: The interrupt index to configure
611 - * @status: Returned interrupts status - one bit per cause:
612 - * 0 = no interrupt pending
613 - * 1 = interrupt pending
614 - *
615 - * Return: '0' on Success; Error code otherwise.
616 - */
617 -int dpbp_get_irq_status(struct fsl_mc_io *mc_io,
618 - u32 cmd_flags,
619 - u16 token,
620 - u8 irq_index,
621 - u32 *status)
622 -{
623 - struct mc_command cmd = { 0 };
624 - struct dpbp_cmd_get_irq_status *cmd_params;
625 - struct dpbp_rsp_get_irq_status *rsp_params;
626 - int err;
627 -
628 - /* prepare command */
629 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_STATUS,
630 - cmd_flags, token);
631 - cmd_params = (struct dpbp_cmd_get_irq_status *)cmd.params;
632 - cmd_params->status = cpu_to_le32(*status);
633 - cmd_params->irq_index = irq_index;
634 -
635 - /* send command to mc*/
636 - err = mc_send_command(mc_io, &cmd);
637 - if (err)
638 - return err;
639 -
640 - /* retrieve response parameters */
641 - rsp_params = (struct dpbp_rsp_get_irq_status *)cmd.params;
642 - *status = le32_to_cpu(rsp_params->status);
643 -
644 - return 0;
645 -}
646 -
647 -/**
648 - * dpbp_clear_irq_status() - Clear a pending interrupt's status
649 - *
650 - * @mc_io: Pointer to MC portal's I/O object
651 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
652 - * @token: Token of DPBP object
653 - * @irq_index: The interrupt index to configure
654 - * @status: Bits to clear (W1C) - one bit per cause:
655 - * 0 = don't change
656 - * 1 = clear status bit
657 - *
658 - * Return: '0' on Success; Error code otherwise.
659 - */
660 -int dpbp_clear_irq_status(struct fsl_mc_io *mc_io,
661 - u32 cmd_flags,
662 - u16 token,
663 - u8 irq_index,
664 - u32 status)
665 -{
666 - struct mc_command cmd = { 0 };
667 - struct dpbp_cmd_clear_irq_status *cmd_params;
668 -
669 - /* prepare command */
670 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLEAR_IRQ_STATUS,
671 - cmd_flags, token);
672 - cmd_params = (struct dpbp_cmd_clear_irq_status *)cmd.params;
673 - cmd_params->status = cpu_to_le32(status);
674 - cmd_params->irq_index = irq_index;
675 -
676 - /* send command to mc*/
677 - return mc_send_command(mc_io, &cmd);
678 -}
679 +EXPORT_SYMBOL(dpbp_reset);
680
681 /**
682 * dpbp_get_attributes - Retrieve DPBP attributes.
683 @@ -609,83 +240,40 @@ int dpbp_get_attributes(struct fsl_mc_io *mc_io,
684 rsp_params = (struct dpbp_rsp_get_attributes *)cmd.params;
685 attr->bpid = le16_to_cpu(rsp_params->bpid);
686 attr->id = le32_to_cpu(rsp_params->id);
687 - attr->version.major = le16_to_cpu(rsp_params->version_major);
688 - attr->version.minor = le16_to_cpu(rsp_params->version_minor);
689
690 return 0;
691 }
692 EXPORT_SYMBOL(dpbp_get_attributes);
693
694 /**
695 - * dpbp_set_notifications() - Set notifications towards software
696 - * @mc_io: Pointer to MC portal's I/O object
697 + * dpbp_get_api_version - Get Data Path Buffer Pool API version
698 + * @mc_io: Pointer to Mc portal's I/O object
699 * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
700 - * @token: Token of DPBP object
701 - * @cfg: notifications configuration
702 + * @major_ver: Major version of Buffer Pool API
703 + * @minor_ver: Minor version of Buffer Pool API
704 *
705 * Return: '0' on Success; Error code otherwise.
706 */
707 -int dpbp_set_notifications(struct fsl_mc_io *mc_io,
708 - u32 cmd_flags,
709 - u16 token,
710 - struct dpbp_notification_cfg *cfg)
711 +int dpbp_get_api_version(struct fsl_mc_io *mc_io,
712 + u32 cmd_flags,
713 + u16 *major_ver,
714 + u16 *minor_ver)
715 {
716 struct mc_command cmd = { 0 };
717 - struct dpbp_cmd_set_notifications *cmd_params;
718 -
719 - /* prepare command */
720 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_NOTIFICATIONS,
721 - cmd_flags, token);
722 - cmd_params = (struct dpbp_cmd_set_notifications *)cmd.params;
723 - cmd_params->depletion_entry = cpu_to_le32(cfg->depletion_entry);
724 - cmd_params->depletion_exit = cpu_to_le32(cfg->depletion_exit);
725 - cmd_params->surplus_entry = cpu_to_le32(cfg->surplus_entry);
726 - cmd_params->surplus_exit = cpu_to_le32(cfg->surplus_exit);
727 - cmd_params->options = cpu_to_le16(cfg->options);
728 - cmd_params->message_ctx = cpu_to_le64(cfg->message_ctx);
729 - cmd_params->message_iova = cpu_to_le64(cfg->message_iova);
730 -
731 - /* send command to mc*/
732 - return mc_send_command(mc_io, &cmd);
733 -}
734 -
735 -/**
736 - * dpbp_get_notifications() - Get the notifications configuration
737 - * @mc_io: Pointer to MC portal's I/O object
738 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
739 - * @token: Token of DPBP object
740 - * @cfg: notifications configuration
741 - *
742 - * Return: '0' on Success; Error code otherwise.
743 - */
744 -int dpbp_get_notifications(struct fsl_mc_io *mc_io,
745 - u32 cmd_flags,
746 - u16 token,
747 - struct dpbp_notification_cfg *cfg)
748 -{
749 - struct mc_command cmd = { 0 };
750 - struct dpbp_rsp_get_notifications *rsp_params;
751 int err;
752
753 /* prepare command */
754 - cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_NOTIFICATIONS,
755 - cmd_flags,
756 - token);
757 + cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_API_VERSION,
758 + cmd_flags, 0);
759
760 - /* send command to mc*/
761 + /* send command to mc */
762 err = mc_send_command(mc_io, &cmd);
763 if (err)
764 return err;
765
766 /* retrieve response parameters */
767 - rsp_params = (struct dpbp_rsp_get_notifications *)cmd.params;
768 - cfg->depletion_entry = le32_to_cpu(rsp_params->depletion_entry);
769 - cfg->depletion_exit = le32_to_cpu(rsp_params->depletion_exit);
770 - cfg->surplus_entry = le32_to_cpu(rsp_params->surplus_entry);
771 - cfg->surplus_exit = le32_to_cpu(rsp_params->surplus_exit);
772 - cfg->options = le16_to_cpu(rsp_params->options);
773 - cfg->message_ctx = le64_to_cpu(rsp_params->message_ctx);
774 - cfg->message_iova = le64_to_cpu(rsp_params->message_iova);
775 + mc_cmd_read_api_version(&cmd, major_ver, minor_ver);
776
777 return 0;
778 }
779 +EXPORT_SYMBOL(dpbp_get_api_version);
780 diff --git a/drivers/staging/fsl-mc/bus/dpcon-cmd.h b/drivers/staging/fsl-mc/bus/dpcon-cmd.h
781 new file mode 100644
782 index 00000000..2bb66988
783 --- /dev/null
784 +++ b/drivers/staging/fsl-mc/bus/dpcon-cmd.h
785 @@ -0,0 +1,85 @@
786 +/*
787 + * Copyright 2013-2016 Freescale Semiconductor Inc.
788 + *
789 + * Redistribution and use in source and binary forms, with or without
790 + * modification, are permitted provided that the following conditions are met:
791 + * * Redistributions of source code must retain the above copyright
792 + * notice, this list of conditions and the following disclaimer.
793 + * * Redistributions in binary form must reproduce the above copyright
794 + * notice, this list of conditions and the following disclaimer in the
795 + * documentation and/or other materials provided with the distribution.
796 + * * Neither the name of the above-listed copyright holders nor the
797 + * names of any contributors may be used to endorse or promote products
798 + * derived from this software without specific prior written permission.
799 + *
800 + * ALTERNATIVELY, this software may be distributed under the terms of the
801 + * GNU General Public License ("GPL") as published by the Free Software
802 + * Foundation, either version 2 of that License or (at your option) any
803 + * later version.
804 + *
805 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
806 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
807 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
808 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
809 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
810 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
811 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
812 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
813 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
814 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
815 + * POSSIBILITY OF SUCH DAMAGE.
816 + */
817 +#ifndef _FSL_DPCON_CMD_H
818 +#define _FSL_DPCON_CMD_H
819 +
820 +/* DPCON Version */
821 +#define DPCON_VER_MAJOR 3
822 +#define DPCON_VER_MINOR 2
823 +
824 +/* Command versioning */
825 +#define DPCON_CMD_BASE_VERSION 1
826 +#define DPCON_CMD_ID_OFFSET 4
827 +
828 +#define DPCON_CMD(id) (((id) << DPCON_CMD_ID_OFFSET) | DPCON_CMD_BASE_VERSION)
829 +
830 +/* Command IDs */
831 +#define DPCON_CMDID_CLOSE DPCON_CMD(0x800)
832 +#define DPCON_CMDID_OPEN DPCON_CMD(0x808)
833 +#define DPCON_CMDID_GET_API_VERSION DPCON_CMD(0xa08)
834 +
835 +#define DPCON_CMDID_ENABLE DPCON_CMD(0x002)
836 +#define DPCON_CMDID_DISABLE DPCON_CMD(0x003)
837 +#define DPCON_CMDID_GET_ATTR DPCON_CMD(0x004)
838 +#define DPCON_CMDID_RESET DPCON_CMD(0x005)
839 +#define DPCON_CMDID_IS_ENABLED DPCON_CMD(0x006)
840 +
841 +#define DPCON_CMDID_SET_NOTIFICATION DPCON_CMD(0x100)
842 +
843 +struct dpcon_cmd_open {
844 + __le32 dpcon_id;
845 +};
846 +
847 +#define DPCON_ENABLE 1
848 +
849 +struct dpcon_rsp_is_enabled {
850 + u8 enabled;
851 +};
852 +
853 +struct dpcon_rsp_get_attr {
854 + /* response word 0 */
855 + __le32 id;
856 + __le16 qbman_ch_id;
857 + u8 num_priorities;
858 + u8 pad;
859 +};
860 +
861 +struct dpcon_cmd_set_notification {
862 + /* cmd word 0 */
863 + __le32 dpio_id;
864 + u8 priority;
865 + u8 pad[3];
866 + /* cmd word 1 */
867 + __le64 user_ctx;
868 +};
869 +
870 +#endif /* _FSL_DPCON_CMD_H */
871 diff --git a/drivers/staging/fsl-mc/bus/dpcon.c b/drivers/staging/fsl-mc/bus/dpcon.c
872 new file mode 100644
873 index 00000000..eb713578
874 --- /dev/null
875 +++ b/drivers/staging/fsl-mc/bus/dpcon.c
876 @@ -0,0 +1,317 @@
877 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
878 + *
879 + * Redistribution and use in source and binary forms, with or without
880 + * modification, are permitted provided that the following conditions are met:
881 + * * Redistributions of source code must retain the above copyright
882 + * notice, this list of conditions and the following disclaimer.
883 + * * Redistributions in binary form must reproduce the above copyright
884 + * notice, this list of conditions and the following disclaimer in the
885 + * documentation and/or other materials provided with the distribution.
886 + * * Neither the name of the above-listed copyright holders nor the
887 + * names of any contributors may be used to endorse or promote products
888 + * derived from this software without specific prior written permission.
889 + *
890 + *
891 + * ALTERNATIVELY, this software may be distributed under the terms of the
892 + * GNU General Public License ("GPL") as published by the Free Software
893 + * Foundation, either version 2 of that License or (at your option) any
894 + * later version.
895 + *
896 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
897 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
898 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
899 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
900 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
901 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
902 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
903 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
904 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
905 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
906 + * POSSIBILITY OF SUCH DAMAGE.
907 + */
908 +#include "../include/mc-sys.h"
909 +#include "../include/mc-cmd.h"
910 +#include "../include/dpcon.h"
911 +
912 +#include "dpcon-cmd.h"
913 +
914 +/**
915 + * dpcon_open() - Open a control session for the specified object
916 + * @mc_io: Pointer to MC portal's I/O object
917 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
918 + * @dpcon_id: DPCON unique ID
919 + * @token: Returned token; use in subsequent API calls
920 + *
921 + * This function can be used to open a control session for an
922 + * already created object; an object may have been declared in
923 + * the DPL or by calling the dpcon_create() function.
924 + * This function returns a unique authentication token,
925 + * associated with the specific object ID and the specific MC
926 + * portal; this token must be used in all subsequent commands for
927 + * this specific object.
928 + *
929 + * Return: '0' on Success; Error code otherwise.
930 + */
931 +int dpcon_open(struct fsl_mc_io *mc_io,
932 + u32 cmd_flags,
933 + int dpcon_id,
934 + u16 *token)
935 +{
936 + struct mc_command cmd = { 0 };
937 + struct dpcon_cmd_open *dpcon_cmd;
938 + int err;
939 +
940 + /* prepare command */
941 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_OPEN,
942 + cmd_flags,
943 + 0);
944 + dpcon_cmd = (struct dpcon_cmd_open *)cmd.params;
945 + dpcon_cmd->dpcon_id = cpu_to_le32(dpcon_id);
946 +
947 + /* send command to mc*/
948 + err = mc_send_command(mc_io, &cmd);
949 + if (err)
950 + return err;
951 +
952 + /* retrieve response parameters */
953 + *token = mc_cmd_hdr_read_token(&cmd);
954 +
955 + return 0;
956 +}
957 +EXPORT_SYMBOL(dpcon_open);
958 +
959 +/**
960 + * dpcon_close() - Close the control session of the object
961 + * @mc_io: Pointer to MC portal's I/O object
962 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
963 + * @token: Token of DPCON object
964 + *
965 + * After this function is called, no further operations are
966 + * allowed on the object without opening a new control session.
967 + *
968 + * Return: '0' on Success; Error code otherwise.
969 + */
970 +int dpcon_close(struct fsl_mc_io *mc_io,
971 + u32 cmd_flags,
972 + u16 token)
973 +{
974 + struct mc_command cmd = { 0 };
975 +
976 + /* prepare command */
977 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_CLOSE,
978 + cmd_flags,
979 + token);
980 +
981 + /* send command to mc*/
982 + return mc_send_command(mc_io, &cmd);
983 +}
984 +EXPORT_SYMBOL(dpcon_close);
985 +
986 +/**
987 + * dpcon_enable() - Enable the DPCON
988 + * @mc_io: Pointer to MC portal's I/O object
989 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
990 + * @token: Token of DPCON object
991 + *
992 + * Return: '0' on Success; Error code otherwise
993 + */
994 +int dpcon_enable(struct fsl_mc_io *mc_io,
995 + u32 cmd_flags,
996 + u16 token)
997 +{
998 + struct mc_command cmd = { 0 };
999 +
1000 + /* prepare command */
1001 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_ENABLE,
1002 + cmd_flags,
1003 + token);
1004 +
1005 + /* send command to mc*/
1006 + return mc_send_command(mc_io, &cmd);
1007 +}
1008 +EXPORT_SYMBOL(dpcon_enable);
1009 +
1010 +/**
1011 + * dpcon_disable() - Disable the DPCON
1012 + * @mc_io: Pointer to MC portal's I/O object
1013 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
1014 + * @token: Token of DPCON object
1015 + *
1016 + * Return: '0' on Success; Error code otherwise
1017 + */
1018 +int dpcon_disable(struct fsl_mc_io *mc_io,
1019 + u32 cmd_flags,
1020 + u16 token)
1021 +{
1022 + struct mc_command cmd = { 0 };
1023 +
1024 + /* prepare command */
1025 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_DISABLE,
1026 + cmd_flags,
1027 + token);
1028 +
1029 + /* send command to mc*/
1030 + return mc_send_command(mc_io, &cmd);
1031 +}
1032 +EXPORT_SYMBOL(dpcon_disable);
1033 +
1034 +/**
1035 + * dpcon_is_enabled() - Check if the DPCON is enabled.
1036 + * @mc_io: Pointer to MC portal's I/O object
1037 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
1038 + * @token: Token of DPCON object
1039 + * @en: Returns '1' if object is enabled; '0' otherwise
1040 + *
1041 + * Return: '0' on Success; Error code otherwise.
1042 + */
1043 +int dpcon_is_enabled(struct fsl_mc_io *mc_io,
1044 + u32 cmd_flags,
1045 + u16 token,
1046 + int *en)
1047 +{
1048 + struct mc_command cmd = { 0 };
1049 + struct dpcon_rsp_is_enabled *dpcon_rsp;
1050 + int err;
1051 +
1052 + /* prepare command */
1053 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_IS_ENABLED,
1054 + cmd_flags,
1055 + token);
1056 +
1057 + /* send command to mc*/
1058 + err = mc_send_command(mc_io, &cmd);
1059 + if (err)
1060 + return err;
1061 +
1062 + /* retrieve response parameters */
1063 + dpcon_rsp = (struct dpcon_rsp_is_enabled *)cmd.params;
1064 + *en = dpcon_rsp->enabled & DPCON_ENABLE;
1065 +
1066 + return 0;
1067 +}
1068 +EXPORT_SYMBOL(dpcon_is_enabled);
1069 +
1070 +/**
1071 + * dpcon_reset() - Reset the DPCON, returns the object to initial state.
1072 + * @mc_io: Pointer to MC portal's I/O object
1073 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
1074 + * @token: Token of DPCON object
1075 + *
1076 + * Return: '0' on Success; Error code otherwise.
1077 + */
1078 +int dpcon_reset(struct fsl_mc_io *mc_io,
1079 + u32 cmd_flags,
1080 + u16 token)
1081 +{
1082 + struct mc_command cmd = { 0 };
1083 +
1084 + /* prepare command */
1085 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_RESET,
1086 + cmd_flags, token);
1087 +
1088 + /* send command to mc*/
1089 + return mc_send_command(mc_io, &cmd);
1090 +}
1091 +EXPORT_SYMBOL(dpcon_reset);
1092 +
1093 +/**
1094 + * dpcon_get_attributes() - Retrieve DPCON attributes.
1095 + * @mc_io: Pointer to MC portal's I/O object
1096 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
1097 + * @token: Token of DPCON object
1098 + * @attr: Object's attributes
1099 + *
1100 + * Return: '0' on Success; Error code otherwise.
1101 + */
1102 +int dpcon_get_attributes(struct fsl_mc_io *mc_io,
1103 + u32 cmd_flags,
1104 + u16 token,
1105 + struct dpcon_attr *attr)
1106 +{
1107 + struct mc_command cmd = { 0 };
1108 + struct dpcon_rsp_get_attr *dpcon_rsp;
1109 + int err;
1110 +
1111 + /* prepare command */
1112 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_ATTR,
1113 + cmd_flags,
1114 + token);
1115 +
1116 + /* send command to mc*/
1117 + err = mc_send_command(mc_io, &cmd);
1118 + if (err)
1119 + return err;
1120 +
1121 + /* retrieve response parameters */
1122 + dpcon_rsp = (struct dpcon_rsp_get_attr *)cmd.params;
1123 + attr->id = le32_to_cpu(dpcon_rsp->id);
1124 + attr->qbman_ch_id = le16_to_cpu(dpcon_rsp->qbman_ch_id);
1125 + attr->num_priorities = dpcon_rsp->num_priorities;
1126 +
1127 + return 0;
1128 +}
1129 +EXPORT_SYMBOL(dpcon_get_attributes);
1130 +
1131 +/**
1132 + * dpcon_set_notification() - Set DPCON notification destination
1133 + * @mc_io: Pointer to MC portal's I/O object
1134 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
1135 + * @token: Token of DPCON object
1136 + * @cfg: Notification parameters
1137 + *
1138 + * Return: '0' on Success; Error code otherwise
1139 + */
1140 +int dpcon_set_notification(struct fsl_mc_io *mc_io,
1141 + u32 cmd_flags,
1142 + u16 token,
1143 + struct dpcon_notification_cfg *cfg)
1144 +{
1145 + struct mc_command cmd = { 0 };
1146 + struct dpcon_cmd_set_notification *dpcon_cmd;
1147 +
1148 + /* prepare command */
1149 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_SET_NOTIFICATION,
1150 + cmd_flags,
1151 + token);
1152 + dpcon_cmd = (struct dpcon_cmd_set_notification *)cmd.params;
1153 + dpcon_cmd->dpio_id = cpu_to_le32(cfg->dpio_id);
1154 + dpcon_cmd->priority = cfg->priority;
1155 + dpcon_cmd->user_ctx = cpu_to_le64(cfg->user_ctx);
1156 +
1157 + /* send command to mc*/
1158 + return mc_send_command(mc_io, &cmd);
1159 +}
1160 +EXPORT_SYMBOL(dpcon_set_notification);
1161 +
1162 +/**
1163 + * dpcon_get_api_version - Get Data Path Concentrator API version
1164 + * @mc_io: Pointer to MC portal's DPCON object
1165 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
1166 + * @major_ver: Major version of DPCON API
1167 + * @minor_ver: Minor version of DPCON API
1168 + *
1169 + * Return: '0' on Success; Error code otherwise
1170 + */
1171 +int dpcon_get_api_version(struct fsl_mc_io *mc_io,
1172 + u32 cmd_flags,
1173 + u16 *major_ver,
1174 + u16 *minor_ver)
1175 +{
1176 + struct mc_command cmd = { 0 };
1177 + int err;
1178 +
1179 + /* prepare command */
1180 + cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_API_VERSION,
1181 + cmd_flags, 0);
1182 +
1183 + /* send command to mc */
1184 + err = mc_send_command(mc_io, &cmd);
1185 + if (err)
1186 + return err;
1187 +
1188 + /* retrieve response parameters */
1189 + mc_cmd_read_api_version(&cmd, major_ver, minor_ver);
1190 +
1191 + return 0;
1192 +}
1193 +EXPORT_SYMBOL(dpcon_get_api_version);
1194 diff --git a/drivers/staging/fsl-mc/bus/dpio/Makefile b/drivers/staging/fsl-mc/bus/dpio/Makefile
1195 new file mode 100644
1196 index 00000000..1c28794e
1197 --- /dev/null
1198 +++ b/drivers/staging/fsl-mc/bus/dpio/Makefile
1199 @@ -0,0 +1,11 @@
1200 +#
1201 +# QorIQ DPAA2 DPIO driver
1202 +#
1203 +
1204 +subdir-ccflags-y := -Werror
1205 +
1206 +obj-$(CONFIG_FSL_MC_DPIO) += fsl-mc-dpio.o
1207 +
1208 +fsl-mc-dpio-objs := dpio.o qbman-portal.o dpio-service.o dpio-driver.o
1209 +
1210 +obj-$(CONFIG_FSL_QBMAN_DEBUG) += qbman_debug.o
1211 diff --git a/drivers/staging/fsl-mc/include/dpcon-cmd.h b/drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h
1212 similarity index 64%
1213 rename from drivers/staging/fsl-mc/include/dpcon-cmd.h
1214 rename to drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h
1215 index 536b2ef1..b2dc6e76 100644
1216 --- a/drivers/staging/fsl-mc/include/dpcon-cmd.h
1217 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h
1218 @@ -1,4 +1,6 @@
1219 -/* Copyright 2013-2015 Freescale Semiconductor Inc.
1220 +/*
1221 + * Copyright 2013-2016 Freescale Semiconductor Inc.
1222 + * Copyright 2016 NXP
1223 *
1224 * Redistribution and use in source and binary forms, with or without
1225 * modification, are permitted provided that the following conditions are met:
1226 @@ -11,7 +13,6 @@
1227 * names of any contributors may be used to endorse or promote products
1228 * derived from this software without specific prior written permission.
1229 *
1230 - *
1231 * ALTERNATIVELY, this software may be distributed under the terms of the
1232 * GNU General Public License ("GPL") as published by the Free Software
1233 * Foundation, either version 2 of that License or (at your option) any
1234 @@ -29,34 +30,46 @@
1235 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1236 * POSSIBILITY OF SUCH DAMAGE.
1237 */
1238 -#ifndef _FSL_DPCON_CMD_H
1239 -#define _FSL_DPCON_CMD_H
1240 +#ifndef _FSL_DPIO_CMD_H
1241 +#define _FSL_DPIO_CMD_H
1242 +
1243 +/* DPIO Version */
1244 +#define DPIO_VER_MAJOR 4
1245 +#define DPIO_VER_MINOR 2
1246 +
1247 +/* Command Versioning */
1248 +
1249 +#define DPIO_CMD_ID_OFFSET 4
1250 +#define DPIO_CMD_BASE_VERSION 1
1251
1252 -/* DPCON Version */
1253 -#define DPCON_VER_MAJOR 2
1254 -#define DPCON_VER_MINOR 1
1255 +#define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION)
1256
1257 /* Command IDs */
1258 -#define DPCON_CMDID_CLOSE 0x800
1259 -#define DPCON_CMDID_OPEN 0x808
1260 -#define DPCON_CMDID_CREATE 0x908
1261 -#define DPCON_CMDID_DESTROY 0x900
1262 -
1263 -#define DPCON_CMDID_ENABLE 0x002
1264 -#define DPCON_CMDID_DISABLE 0x003
1265 -#define DPCON_CMDID_GET_ATTR 0x004
1266 -#define DPCON_CMDID_RESET 0x005
1267 -#define DPCON_CMDID_IS_ENABLED 0x006
1268 -
1269 -#define DPCON_CMDID_SET_IRQ 0x010
1270 -#define DPCON_CMDID_GET_IRQ 0x011
1271 -#define DPCON_CMDID_SET_IRQ_ENABLE 0x012
1272 -#define DPCON_CMDID_GET_IRQ_ENABLE 0x013
1273 -#define DPCON_CMDID_SET_IRQ_MASK 0x014
1274 -#define DPCON_CMDID_GET_IRQ_MASK 0x015
1275 -#define DPCON_CMDID_GET_IRQ_STATUS 0x016
1276 -#define DPCON_CMDID_CLEAR_IRQ_STATUS 0x017
1277 -
1278 -#define DPCON_CMDID_SET_NOTIFICATION 0x100
1279 -
1280 -#endif /* _FSL_DPCON_CMD_H */
1281 +#define DPIO_CMDID_CLOSE DPIO_CMD(0x800)
1282 +#define DPIO_CMDID_OPEN DPIO_CMD(0x803)
1283 +#define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03)
1284 +#define DPIO_CMDID_ENABLE DPIO_CMD(0x002)
1285 +#define DPIO_CMDID_DISABLE DPIO_CMD(0x003)
1286 +#define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004)
1287 +
1288 +struct dpio_cmd_open {
1289 + __le32 dpio_id;
1290 +};
1291 +
1292 +#define DPIO_CHANNEL_MODE_MASK 0x3
1293 +
1294 +struct dpio_rsp_get_attr {
1295 + /* cmd word 0 */
1296 + __le32 id;
1297 + __le16 qbman_portal_id;
1298 + u8 num_priorities;
1299 + u8 channel_mode;
1300 + /* cmd word 1 */
1301 + __le64 qbman_portal_ce_addr;
1302 + /* cmd word 2 */
1303 + __le64 qbman_portal_ci_addr;
1304 + /* cmd word 3 */
1305 + __le32 qbman_version;
1306 +};
1307 +
1308 +#endif /* _FSL_DPIO_CMD_H */
1309 diff --git a/drivers/staging/fsl-mc/bus/dpio/dpio-driver.c b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.c
1310 new file mode 100644
1311 index 00000000..8c8244a1
1312 --- /dev/null
1313 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.c
1314 @@ -0,0 +1,296 @@
1315 +/*
1316 + * Copyright 2014-2016 Freescale Semiconductor Inc.
1317 + * Copyright 2016 NXP
1318 + *
1319 + * Redistribution and use in source and binary forms, with or without
1320 + * modification, are permitted provided that the following conditions are met:
1321 + * * Redistributions of source code must retain the above copyright
1322 + * notice, this list of conditions and the following disclaimer.
1323 + * * Redistributions in binary form must reproduce the above copyright
1324 + * notice, this list of conditions and the following disclaimer in the
1325 + * documentation and/or other materials provided with the distribution.
1326 + * * Neither the name of Freescale Semiconductor nor the
1327 + * names of its contributors may be used to endorse or promote products
1328 + * derived from this software without specific prior written permission.
1329 + *
1330 + * ALTERNATIVELY, this software may be distributed under the terms of the
1331 + * GNU General Public License ("GPL") as published by the Free Software
1332 + * Foundation, either version 2 of that License or (at your option) any
1333 + * later version.
1334 + *
1335 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
1336 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
1337 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
1338 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
1339 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
1340 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
1341 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1342 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1343 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1344 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1345 + */
1346 +
1347 +#include <linux/types.h>
1348 +#include <linux/init.h>
1349 +#include <linux/module.h>
1350 +#include <linux/platform_device.h>
1351 +#include <linux/interrupt.h>
1352 +#include <linux/msi.h>
1353 +#include <linux/dma-mapping.h>
1354 +#include <linux/delay.h>
1355 +
1356 +#include "../../include/mc.h"
1357 +#include "../../include/dpaa2-io.h"
1358 +
1359 +#include "qbman-portal.h"
1360 +#include "dpio.h"
1361 +#include "dpio-cmd.h"
1362 +
1363 +MODULE_LICENSE("Dual BSD/GPL");
1364 +MODULE_AUTHOR("Freescale Semiconductor, Inc");
1365 +MODULE_DESCRIPTION("DPIO Driver");
1366 +
1367 +struct dpio_priv {
1368 + struct dpaa2_io *io;
1369 +};
1370 +
1371 +static irqreturn_t dpio_irq_handler(int irq_num, void *arg)
1372 +{
1373 + struct device *dev = (struct device *)arg;
1374 + struct dpio_priv *priv = dev_get_drvdata(dev);
1375 +
1376 + return dpaa2_io_irq(priv->io);
1377 +}
1378 +
1379 +static void unregister_dpio_irq_handlers(struct fsl_mc_device *dpio_dev)
1380 +{
1381 + struct fsl_mc_device_irq *irq;
1382 +
1383 + irq = dpio_dev->irqs[0];
1384 +
1385 + /* clear the affinity hint */
1386 + irq_set_affinity_hint(irq->msi_desc->irq, NULL);
1387 +}
1388 +
1389 +static int register_dpio_irq_handlers(struct fsl_mc_device *dpio_dev, int cpu)
1390 +{
1391 + struct dpio_priv *priv;
1392 + int error;
1393 + struct fsl_mc_device_irq *irq;
1394 + cpumask_t mask;
1395 +
1396 + priv = dev_get_drvdata(&dpio_dev->dev);
1397 +
1398 + irq = dpio_dev->irqs[0];
1399 + error = devm_request_irq(&dpio_dev->dev,
1400 + irq->msi_desc->irq,
1401 + dpio_irq_handler,
1402 + 0,
1403 + dev_name(&dpio_dev->dev),
1404 + &dpio_dev->dev);
1405 + if (error < 0) {
1406 + dev_err(&dpio_dev->dev,
1407 + "devm_request_irq() failed: %d\n",
1408 + error);
1409 + return error;
1410 + }
1411 +
1412 + /* set the affinity hint */
1413 + cpumask_clear(&mask);
1414 + cpumask_set_cpu(cpu, &mask);
1415 + if (irq_set_affinity_hint(irq->msi_desc->irq, &mask))
1416 + dev_err(&dpio_dev->dev,
1417 + "irq_set_affinity failed irq %d cpu %d\n",
1418 + irq->msi_desc->irq, cpu);
1419 +
1420 + return 0;
1421 +}
1422 +
1423 +static int dpaa2_dpio_probe(struct fsl_mc_device *dpio_dev)
1424 +{
1425 + struct dpio_attr dpio_attrs;
1426 + struct dpaa2_io_desc desc;
1427 + struct dpio_priv *priv;
1428 + int err = -ENOMEM;
1429 + struct device *dev = &dpio_dev->dev;
1430 + static int next_cpu = -1;
1431 +
1432 + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
1433 + if (!priv)
1434 + goto err_priv_alloc;
1435 +
1436 + dev_set_drvdata(dev, priv);
1437 +
1438 + err = fsl_mc_portal_allocate(dpio_dev, 0, &dpio_dev->mc_io);
1439 + if (err) {
1440 + dev_dbg(dev, "MC portal allocation failed\n");
1441 + err = -EPROBE_DEFER;
1442 + goto err_mcportal;
1443 + }
1444 +
1445 + err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id,
1446 + &dpio_dev->mc_handle);
1447 + if (err) {
1448 + dev_err(dev, "dpio_open() failed\n");
1449 + goto err_open;
1450 + }
1451 +
1452 + err = dpio_get_attributes(dpio_dev->mc_io, 0, dpio_dev->mc_handle,
1453 + &dpio_attrs);
1454 + if (err) {
1455 + dev_err(dev, "dpio_get_attributes() failed %d\n", err);
1456 + goto err_get_attr;
1457 + }
1458 + desc.qman_version = dpio_attrs.qbman_version;
1459 +
1460 + err = dpio_enable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
1461 + if (err) {
1462 + dev_err(dev, "dpio_enable() failed %d\n", err);
1463 + goto err_get_attr;
1464 + }
1465 +
1466 + /* initialize DPIO descriptor */
1467 + desc.receives_notifications = dpio_attrs.num_priorities ? 1 : 0;
1468 + desc.has_8prio = dpio_attrs.num_priorities == 8 ? 1 : 0;
1469 + desc.dpio_id = dpio_dev->obj_desc.id;
1470 +
1471 + /* get the cpu to use for the affinity hint */
1472 + if (next_cpu == -1)
1473 + next_cpu = cpumask_first(cpu_online_mask);
1474 + else
1475 + next_cpu = cpumask_next(next_cpu, cpu_online_mask);
1476 +
1477 + if (!cpu_possible(next_cpu)) {
1478 + dev_err(dev, "probe failed. Number of DPIOs exceeds NR_CPUS.\n");
1479 + err = -ERANGE;
1480 + goto err_allocate_irqs;
1481 + }
1482 + desc.cpu = next_cpu;
1483 +
1484 + /*
1485 + * Set the CENA regs to be the cache enabled area of the portal to
1486 + * achieve the best performance.
1487 + */
1488 + desc.regs_cena = ioremap_cache_ns(dpio_dev->regions[0].start,
1489 + resource_size(&dpio_dev->regions[0]));
1490 + desc.regs_cinh = ioremap(dpio_dev->regions[1].start,
1491 + resource_size(&dpio_dev->regions[1]));
1492 +
1493 + err = fsl_mc_allocate_irqs(dpio_dev);
1494 + if (err) {
1495 + dev_err(dev, "fsl_mc_allocate_irqs failed. err=%d\n", err);
1496 + goto err_allocate_irqs;
1497 + }
1498 +
1499 + err = register_dpio_irq_handlers(dpio_dev, desc.cpu);
1500 + if (err)
1501 + goto err_register_dpio_irq;
1502 +
1503 + priv->io = dpaa2_io_create(&desc);
1504 + if (!priv->io) {
1505 + dev_err(dev, "dpaa2_io_create failed\n");
1506 + goto err_dpaa2_io_create;
1507 + }
1508 +
1509 + dev_info(dev, "probed\n");
1510 + dev_dbg(dev, " receives_notifications = %d\n",
1511 + desc.receives_notifications);
1512 + dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
1513 + fsl_mc_portal_free(dpio_dev->mc_io);
1514 +
1515 + return 0;
1516 +
1517 +err_dpaa2_io_create:
1518 + unregister_dpio_irq_handlers(dpio_dev);
1519 +err_register_dpio_irq:
1520 + fsl_mc_free_irqs(dpio_dev);
1521 +err_allocate_irqs:
1522 + dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
1523 +err_get_attr:
1524 + dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
1525 +err_open:
1526 + fsl_mc_portal_free(dpio_dev->mc_io);
1527 +err_mcportal:
1528 + dev_set_drvdata(dev, NULL);
1529 +err_priv_alloc:
1530 + return err;
1531 +}
1532 +
1533 +/* Tear down interrupts for a given DPIO object */
1534 +static void dpio_teardown_irqs(struct fsl_mc_device *dpio_dev)
1535 +{
1536 + unregister_dpio_irq_handlers(dpio_dev);
1537 + fsl_mc_free_irqs(dpio_dev);
1538 +}
1539 +
1540 +static int dpaa2_dpio_remove(struct fsl_mc_device *dpio_dev)
1541 +{
1542 + struct device *dev;
1543 + struct dpio_priv *priv;
1544 + int err;
1545 +
1546 + dev = &dpio_dev->dev;
1547 + priv = dev_get_drvdata(dev);
1548 +
1549 + dpaa2_io_down(priv->io);
1550 +
1551 + dpio_teardown_irqs(dpio_dev);
1552 +
1553 + err = fsl_mc_portal_allocate(dpio_dev, 0, &dpio_dev->mc_io);
1554 + if (err) {
1555 + dev_err(dev, "MC portal allocation failed\n");
1556 + goto err_mcportal;
1557 + }
1558 +
1559 + err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id,
1560 + &dpio_dev->mc_handle);
1561 + if (err) {
1562 + dev_err(dev, "dpio_open() failed\n");
1563 + goto err_open;
1564 + }
1565 +
1566 + dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
1567 +
1568 + dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
1569 +
1570 + fsl_mc_portal_free(dpio_dev->mc_io);
1571 +
1572 + dev_set_drvdata(dev, NULL);
1573 +
1574 + return 0;
1575 +
1576 +err_open:
1577 + fsl_mc_portal_free(dpio_dev->mc_io);
1578 +err_mcportal:
1579 + return err;
1580 +}
1581 +
1582 +static const struct fsl_mc_device_id dpaa2_dpio_match_id_table[] = {
1583 + {
1584 + .vendor = FSL_MC_VENDOR_FREESCALE,
1585 + .obj_type = "dpio",
1586 + },
1587 + { .vendor = 0x0 }
1588 +};
1589 +
1590 +static struct fsl_mc_driver dpaa2_dpio_driver = {
1591 + .driver = {
1592 + .name = KBUILD_MODNAME,
1593 + .owner = THIS_MODULE,
1594 + },
1595 + .probe = dpaa2_dpio_probe,
1596 + .remove = dpaa2_dpio_remove,
1597 + .match_id_table = dpaa2_dpio_match_id_table
1598 +};
1599 +
1600 +static int dpio_driver_init(void)
1601 +{
1602 + return fsl_mc_driver_register(&dpaa2_dpio_driver);
1603 +}
1604 +
1605 +static void dpio_driver_exit(void)
1606 +{
1607 + fsl_mc_driver_unregister(&dpaa2_dpio_driver);
1608 +}
1609 +module_init(dpio_driver_init);
1610 +module_exit(dpio_driver_exit);
1611 diff --git a/drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt
1612 new file mode 100644
1613 index 00000000..0ba67716
1614 --- /dev/null
1615 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt
1616 @@ -0,0 +1,135 @@
1617 +Copyright 2016 NXP
1618 +
1619 +Introduction
1620 +------------
1621 +
1622 +A DPAA2 DPIO (Data Path I/O) is a hardware object that provides
1623 +interfaces to enqueue and dequeue frames to/from network interfaces
1624 +and other accelerators. A DPIO also provides hardware buffer
1625 +pool management for network interfaces.
1626 +
1627 +This document provides an overview the Linux DPIO driver, its
1628 +subcomponents, and its APIs.
1629 +
1630 +See Documentation/dpaa2/overview.txt for a general overview of DPAA2
1631 +and the general DPAA2 driver architecture in Linux.
1632 +
1633 +Driver Overview
1634 +---------------
1635 +
1636 +The DPIO driver is bound to DPIO objects discovered on the fsl-mc bus and
1637 +provides services that:
1638 + A) allow other drivers, such as the Ethernet driver, to enqueue and dequeue
1639 + frames for their respective objects
1640 + B) allow drivers to register callbacks for data availability notifications
1641 + when data becomes available on a queue or channel
1642 + C) allow drivers to manage hardware buffer pools
1643 +
1644 +The Linux DPIO driver consists of 3 primary components--
1645 + DPIO object driver-- fsl-mc driver that manages the DPIO object
1646 + DPIO service-- provides APIs to other Linux drivers for services
1647 + QBman portal interface-- sends portal commands, gets responses
1648 +
1649 + fsl-mc other
1650 + bus drivers
1651 + | |
1652 + +---+----+ +------+-----+
1653 + |DPIO obj| |DPIO service|
1654 + | driver |---| (DPIO) |
1655 + +--------+ +------+-----+
1656 + |
1657 + +------+-----+
1658 + | QBman |
1659 + | portal i/f |
1660 + +------------+
1661 + |
1662 + hardware
1663 +
1664 +The diagram below shows how the DPIO driver components fit with the other
1665 +DPAA2 Linux driver components:
1666 + +------------+
1667 + | OS Network |
1668 + | Stack |
1669 + +------------+ +------------+
1670 + | Allocator |. . . . . . . | Ethernet |
1671 + |(DPMCP,DPBP)| | (DPNI) |
1672 + +-.----------+ +---+---+----+
1673 + . . ^ |
1674 + . . <data avail, | |<enqueue,
1675 + . . tx confirm> | | dequeue>
1676 + +-------------+ . | |
1677 + | DPRC driver | . +--------+ +------------+
1678 + | (DPRC) | . . |DPIO obj| |DPIO service|
1679 + +----------+--+ | driver |-| (DPIO) |
1680 + | +--------+ +------+-----+
1681 + |<dev add/remove> +------|-----+
1682 + | | QBman |
1683 + +----+--------------+ | portal i/f |
1684 + | MC-bus driver | +------------+
1685 + | | |
1686 + | /soc/fsl-mc | |
1687 + +-------------------+ |
1688 + |
1689 + =========================================|=========|========================
1690 + +-+--DPIO---|-----------+
1691 + | | |
1692 + | QBman Portal |
1693 + +-----------------------+
1694 +
1695 + ============================================================================
1696 +
1697 +
1698 +DPIO Object Driver (dpio-driver.c)
1699 +----------------------------------
1700 +
1701 + The dpio-driver component registers with the fsl-mc bus to handle objects of
1702 + type "dpio". The implementation of probe() handles basic initialization
1703 + of the DPIO including mapping of the DPIO regions (the QBman SW portal)
1704 + and initializing interrupts and registering irq handlers. The dpio-driver
1705 + registers the probed DPIO with dpio-service.
1706 +
1707 +DPIO service (dpio-service.c, dpaa2-io.h)
1708 +------------------------------------------
1709 +
1710 + The dpio service component provides queuing, notification, and buffers
1711 + management services to DPAA2 drivers, such as the Ethernet driver. A system
1712 + will typically allocate 1 DPIO object per CPU to allow queuing operations
1713 + to happen simultaneously across all CPUs.
1714 +
1715 + Notification handling
1716 + dpaa2_io_service_register()
1717 + dpaa2_io_service_deregister()
1718 + dpaa2_io_service_rearm()
1719 +
1720 + Queuing
1721 + dpaa2_io_service_pull_fq()
1722 + dpaa2_io_service_pull_channel()
1723 + dpaa2_io_service_enqueue_fq()
1724 + dpaa2_io_service_enqueue_qd()
1725 + dpaa2_io_store_create()
1726 + dpaa2_io_store_destroy()
1727 + dpaa2_io_store_next()
1728 +
1729 + Buffer pool management
1730 + dpaa2_io_service_release()
1731 + dpaa2_io_service_acquire()
1732 +
1733 +QBman portal interface (qbman-portal.c)
1734 +---------------------------------------
1735 +
1736 + The qbman-portal component provides APIs to do the low level hardware
1737 + bit twiddling for operations such as:
1738 + -initializing Qman software portals
1739 + -building and sending portal commands
1740 + -portal interrupt configuration and processing
1741 +
1742 + The qbman-portal APIs are not public to other drivers, and are
1743 + only used by dpio-service.
1744 +
1745 +Other (dpaa2-fd.h, dpaa2-global.h)
1746 +----------------------------------
1747 +
1748 + Frame descriptor and scatter-gather definitions and the APIs used to
1749 + manipulate them are defined in dpaa2-fd.h.
1750 +
1751 + Dequeue result struct and parsing APIs are defined in dpaa2-global.h.
1752 diff --git a/drivers/staging/fsl-mc/bus/dpio/dpio-service.c b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
1753 new file mode 100644
1754 index 00000000..8449d988
1755 --- /dev/null
1756 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
1757 @@ -0,0 +1,693 @@
1758 +/*
1759 + * Copyright 2014-2016 Freescale Semiconductor Inc.
1760 + * Copyright 2016 NXP
1761 + *
1762 + * Redistribution and use in source and binary forms, with or without
1763 + * modification, are permitted provided that the following conditions are met:
1764 + * * Redistributions of source code must retain the above copyright
1765 + * notice, this list of conditions and the following disclaimer.
1766 + * * Redistributions in binary form must reproduce the above copyright
1767 + * notice, this list of conditions and the following disclaimer in the
1768 + * documentation and/or other materials provided with the distribution.
1769 + * * Neither the name of Freescale Semiconductor nor the
1770 + * names of its contributors may be used to endorse or promote products
1771 + * derived from this software without specific prior written permission.
1772 + *
1773 + * ALTERNATIVELY, this software may be distributed under the terms of the
1774 + * GNU General Public License ("GPL") as published by the Free Software
1775 + * Foundation, either version 2 of that License or (at your option) any
1776 + * later version.
1777 + *
1778 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
1779 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
1780 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
1781 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
1782 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
1783 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
1784 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1785 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1786 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1787 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1788 + */
1789 +#include <linux/types.h>
1790 +#include "../../include/mc.h"
1791 +#include "../../include/dpaa2-io.h"
1792 +#include <linux/init.h>
1793 +#include <linux/module.h>
1794 +#include <linux/platform_device.h>
1795 +#include <linux/interrupt.h>
1796 +#include <linux/dma-mapping.h>
1797 +#include <linux/slab.h>
1798 +
1799 +#include "dpio.h"
1800 +#include "qbman-portal.h"
1801 +#include "qbman_debug.h"
1802 +
1803 +struct dpaa2_io {
1804 + atomic_t refs;
1805 + struct dpaa2_io_desc dpio_desc;
1806 + struct qbman_swp_desc swp_desc;
1807 + struct qbman_swp *swp;
1808 + struct list_head node;
1809 + /* protect against multiple management commands */
1810 + spinlock_t lock_mgmt_cmd;
1811 + /* protect notifications list */
1812 + spinlock_t lock_notifications;
1813 + struct list_head notifications;
1814 +};
1815 +
1816 +struct dpaa2_io_store {
1817 + unsigned int max;
1818 + dma_addr_t paddr;
1819 + struct dpaa2_dq *vaddr;
1820 + void *alloced_addr; /* unaligned value from kmalloc() */
1821 + unsigned int idx; /* position of the next-to-be-returned entry */
1822 + struct qbman_swp *swp; /* portal used to issue VDQCR */
1823 + struct device *dev; /* device used for DMA mapping */
1824 +};
1825 +
1826 +/* keep a per cpu array of DPIOs for fast access */
1827 +static struct dpaa2_io *dpio_by_cpu[NR_CPUS];
1828 +static struct list_head dpio_list = LIST_HEAD_INIT(dpio_list);
1829 +static DEFINE_SPINLOCK(dpio_list_lock);
1830 +
1831 +static inline struct dpaa2_io *service_select_by_cpu(struct dpaa2_io *d,
1832 + int cpu)
1833 +{
1834 + if (d)
1835 + return d;
1836 +
1837 + if (unlikely(cpu >= (int)num_possible_cpus()))
1838 + return NULL;
1839 +
1840 + /*
1841 + * If cpu == -1, choose the current cpu, with no guarantees about
1842 + * potentially being migrated away.
1843 + */
1844 + if (cpu < 0)
1845 + cpu = smp_processor_id();
1846 +
1847 + /* If a specific cpu was requested, pick it up immediately */
1848 + return dpio_by_cpu[cpu];
1849 +}
1850 +
1851 +static inline struct dpaa2_io *service_select(struct dpaa2_io *d)
1852 +{
1853 + if (d)
1854 + return d;
1855 +
1856 + d = service_select_by_cpu(d, -1);
1857 + if (d)
1858 + return d;
1859 +
1860 + spin_lock(&dpio_list_lock);
1861 + d = list_entry(dpio_list.next, struct dpaa2_io, node);
1862 + list_del(&d->node);
1863 + list_add_tail(&d->node, &dpio_list);
1864 + spin_unlock(&dpio_list_lock);
1865 +
1866 + return d;
1867 +}
1868 +
1869 +/**
1870 + * dpaa2_io_create() - create a dpaa2_io object.
1871 + * @desc: the dpaa2_io descriptor
1872 + *
1873 + * Activates a "struct dpaa2_io" corresponding to the given config of an actual
1874 + * DPIO object.
1875 + *
1876 + * Return a valid dpaa2_io object for success, or NULL for failure.
1877 + */
1878 +struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc)
1879 +{
1880 + struct dpaa2_io *obj = kmalloc(sizeof(*obj), GFP_KERNEL);
1881 +
1882 + if (!obj)
1883 + return NULL;
1884 +
1885 + /* check if CPU is out of range (-1 means any cpu) */
1886 + if (desc->cpu >= (int)num_possible_cpus()) {
1887 + kfree(obj);
1888 + return NULL;
1889 + }
1890 +
1891 + atomic_set(&obj->refs, 1);
1892 + obj->dpio_desc = *desc;
1893 + obj->swp_desc.cena_bar = obj->dpio_desc.regs_cena;
1894 + obj->swp_desc.cinh_bar = obj->dpio_desc.regs_cinh;
1895 + obj->swp_desc.qman_version = obj->dpio_desc.qman_version;
1896 + obj->swp = qbman_swp_init(&obj->swp_desc);
1897 +
1898 + if (!obj->swp) {
1899 + kfree(obj);
1900 + return NULL;
1901 + }
1902 +
1903 + INIT_LIST_HEAD(&obj->node);
1904 + spin_lock_init(&obj->lock_mgmt_cmd);
1905 + spin_lock_init(&obj->lock_notifications);
1906 + INIT_LIST_HEAD(&obj->notifications);
1907 +
1908 + /* For now only enable DQRR interrupts */
1909 + qbman_swp_interrupt_set_trigger(obj->swp,
1910 + QBMAN_SWP_INTERRUPT_DQRI);
1911 + qbman_swp_interrupt_clear_status(obj->swp, 0xffffffff);
1912 + if (obj->dpio_desc.receives_notifications)
1913 + qbman_swp_push_set(obj->swp, 0, 1);
1914 +
1915 + spin_lock(&dpio_list_lock);
1916 + list_add_tail(&obj->node, &dpio_list);
1917 + if (desc->cpu >= 0 && !dpio_by_cpu[desc->cpu])
1918 + dpio_by_cpu[desc->cpu] = obj;
1919 + spin_unlock(&dpio_list_lock);
1920 +
1921 + return obj;
1922 +}
1923 +EXPORT_SYMBOL(dpaa2_io_create);
1924 +
1925 +/**
1926 + * dpaa2_io_down() - release the dpaa2_io object.
1927 + * @d: the dpaa2_io object to be released.
1928 + *
1929 + * The "struct dpaa2_io" type can represent an individual DPIO object (as
1930 + * described by "struct dpaa2_io_desc") or an instance of a "DPIO service",
1931 + * which can be used to group/encapsulate multiple DPIO objects. In all cases,
1932 + * each handle obtained should be released using this function.
1933 + */
1934 +void dpaa2_io_down(struct dpaa2_io *d)
1935 +{
1936 + if (!atomic_dec_and_test(&d->refs))
1937 + return;
1938 + kfree(d);
1939 +}
1940 +EXPORT_SYMBOL(dpaa2_io_down);
1941 +
1942 +#define DPAA_POLL_MAX 32
1943 +
1944 +/**
1945 + * dpaa2_io_irq() - ISR for DPIO interrupts
1946 + *
1947 + * @obj: the given DPIO object.
1948 + *
1949 + * Return IRQ_HANDLED for success or IRQ_NONE if there
1950 + * were no pending interrupts.
1951 + */
1952 +irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj)
1953 +{
1954 + const struct dpaa2_dq *dq;
1955 + int max = 0;
1956 + struct qbman_swp *swp;
1957 + u32 status;
1958 +
1959 + swp = obj->swp;
1960 + status = qbman_swp_interrupt_read_status(swp);
1961 + if (!status)
1962 + return IRQ_NONE;
1963 +
1964 + dq = qbman_swp_dqrr_next(swp);
1965 + while (dq) {
1966 + if (qbman_result_is_SCN(dq)) {
1967 + struct dpaa2_io_notification_ctx *ctx;
1968 + u64 q64;
1969 +
1970 + q64 = qbman_result_SCN_ctx(dq);
1971 + ctx = (void *)q64;
1972 + ctx->cb(ctx);
1973 + } else {
1974 + pr_crit("fsl-mc-dpio: Unrecognised/ignored DQRR entry\n");
1975 + }
1976 + qbman_swp_dqrr_consume(swp, dq);
1977 + ++max;
1978 + if (max > DPAA_POLL_MAX)
1979 + goto done;
1980 + dq = qbman_swp_dqrr_next(swp);
1981 + }
1982 +done:
1983 + qbman_swp_interrupt_clear_status(swp, status);
1984 + qbman_swp_interrupt_set_inhibit(swp, 0);
1985 + return IRQ_HANDLED;
1986 +}
1987 +EXPORT_SYMBOL(dpaa2_io_irq);
1988 +
1989 +/**
1990 + * dpaa2_io_service_register() - Prepare for servicing of FQDAN or CDAN
1991 + * notifications on the given DPIO service.
1992 + * @d: the given DPIO service.
1993 + * @ctx: the notification context.
1994 + *
1995 + * The caller should make the MC command to attach a DPAA2 object to
1996 + * a DPIO after this function completes successfully. In that way:
1997 + * (a) The DPIO service is "ready" to handle a notification arrival
1998 + * (which might happen before the "attach" command to MC has
1999 + * returned control of execution back to the caller)
2000 + * (b) The DPIO service can provide back to the caller the 'dpio_id' and
2001 + * 'qman64' parameters that it should pass along in the MC command
2002 + * in order for the object to be configured to produce the right
2003 + * notification fields to the DPIO service.
2004 + *
2005 + * Return 0 for success, or -ENODEV for failure.
2006 + */
2007 +int dpaa2_io_service_register(struct dpaa2_io *d,
2008 + struct dpaa2_io_notification_ctx *ctx)
2009 +{
2010 + unsigned long irqflags;
2011 +
2012 + d = service_select_by_cpu(d, ctx->desired_cpu);
2013 + if (!d)
2014 + return -ENODEV;
2015 +
2016 + ctx->dpio_id = d->dpio_desc.dpio_id;
2017 + ctx->qman64 = (u64)ctx;
2018 + ctx->dpio_private = d;
2019 + spin_lock_irqsave(&d->lock_notifications, irqflags);
2020 + list_add(&ctx->node, &d->notifications);
2021 + spin_unlock_irqrestore(&d->lock_notifications, irqflags);
2022 +
2023 + /* Enable the generation of CDAN notifications */
2024 + if (ctx->is_cdan)
2025 + qbman_swp_CDAN_set_context_enable(d->swp,
2026 + (u16)ctx->id,
2027 + ctx->qman64);
2028 + return 0;
2029 +}
2030 +EXPORT_SYMBOL(dpaa2_io_service_register);
2031 +
2032 +/**
2033 + * dpaa2_io_service_deregister - The opposite of 'register'.
2034 + * @service: the given DPIO service.
2035 + * @ctx: the notification context.
2036 + *
2037 + * This function should be called only after sending the MC command to
2038 + * to detach the notification-producing device from the DPIO.
2039 + */
2040 +void dpaa2_io_service_deregister(struct dpaa2_io *service,
2041 + struct dpaa2_io_notification_ctx *ctx)
2042 +{
2043 + struct dpaa2_io *d = ctx->dpio_private;
2044 + unsigned long irqflags;
2045 +
2046 + if (ctx->is_cdan)
2047 + qbman_swp_CDAN_disable(d->swp, (u16)ctx->id);
2048 +
2049 + spin_lock_irqsave(&d->lock_notifications, irqflags);
2050 + list_del(&ctx->node);
2051 + spin_unlock_irqrestore(&d->lock_notifications, irqflags);
2052 +}
2053 +EXPORT_SYMBOL(dpaa2_io_service_deregister);
2054 +
2055 +/**
2056 + * dpaa2_io_service_rearm() - Rearm the notification for the given DPIO service.
2057 + * @d: the given DPIO service.
2058 + * @ctx: the notification context.
2059 + *
2060 + * Once a FQDAN/CDAN has been produced, the corresponding FQ/channel is
2061 + * considered "disarmed". Ie. the user can issue pull dequeue operations on that
2062 + * traffic source for as long as it likes. Eventually it may wish to "rearm"
2063 + * that source to allow it to produce another FQDAN/CDAN, that's what this
2064 + * function achieves.
2065 + *
2066 + * Return 0 for success.
2067 + */
2068 +int dpaa2_io_service_rearm(struct dpaa2_io *d,
2069 + struct dpaa2_io_notification_ctx *ctx)
2070 +{
2071 + unsigned long irqflags;
2072 + int err;
2073 +
2074 + d = service_select_by_cpu(d, ctx->desired_cpu);
2075 + if (!unlikely(d))
2076 + return -ENODEV;
2077 +
2078 + spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags);
2079 + if (ctx->is_cdan)
2080 + err = qbman_swp_CDAN_enable(d->swp, (u16)ctx->id);
2081 + else
2082 + err = qbman_swp_fq_schedule(d->swp, ctx->id);
2083 + spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags);
2084 +
2085 + return err;
2086 +}
2087 +EXPORT_SYMBOL(dpaa2_io_service_rearm);
2088 +
2089 +/**
2090 + * dpaa2_io_service_pull_fq() - pull dequeue functions from a fq.
2091 + * @d: the given DPIO service.
2092 + * @fqid: the given frame queue id.
2093 + * @s: the dpaa2_io_store object for the result.
2094 + *
2095 + * Return 0 for success, or error code for failure.
2096 + */
2097 +int dpaa2_io_service_pull_fq(struct dpaa2_io *d, u32 fqid,
2098 + struct dpaa2_io_store *s)
2099 +{
2100 + struct qbman_pull_desc pd;
2101 + int err;
2102 +
2103 + qbman_pull_desc_clear(&pd);
2104 + qbman_pull_desc_set_storage(&pd, s->vaddr, s->paddr, 1);
2105 + qbman_pull_desc_set_numframes(&pd, (u8)s->max);
2106 + qbman_pull_desc_set_fq(&pd, fqid);
2107 +
2108 + d = service_select(d);
2109 + if (!d)
2110 + return -ENODEV;
2111 + s->swp = d->swp;
2112 + err = qbman_swp_pull(d->swp, &pd);
2113 + if (err)
2114 + s->swp = NULL;
2115 +
2116 + return err;
2117 +}
2118 +EXPORT_SYMBOL(dpaa2_io_service_pull_fq);
2119 +
2120 +/**
2121 + * dpaa2_io_service_pull_channel() - pull dequeue functions from a channel.
2122 + * @d: the given DPIO service.
2123 + * @channelid: the given channel id.
2124 + * @s: the dpaa2_io_store object for the result.
2125 + *
2126 + * Return 0 for success, or error code for failure.
2127 + */
2128 +int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid,
2129 + struct dpaa2_io_store *s)
2130 +{
2131 + struct qbman_pull_desc pd;
2132 + int err;
2133 +
2134 + qbman_pull_desc_clear(&pd);
2135 + qbman_pull_desc_set_storage(&pd, s->vaddr, s->paddr, 1);
2136 + qbman_pull_desc_set_numframes(&pd, (u8)s->max);
2137 + qbman_pull_desc_set_channel(&pd, channelid, qbman_pull_type_prio);
2138 +
2139 + d = service_select(d);
2140 + if (!d)
2141 + return -ENODEV;
2142 +
2143 + s->swp = d->swp;
2144 + err = qbman_swp_pull(d->swp, &pd);
2145 + if (err)
2146 + s->swp = NULL;
2147 +
2148 + return err;
2149 +}
2150 +EXPORT_SYMBOL(dpaa2_io_service_pull_channel);
2151 +
2152 +/**
2153 + * dpaa2_io_service_enqueue_fq() - Enqueue a frame to a frame queue.
2154 + * @d: the given DPIO service.
2155 + * @fqid: the given frame queue id.
2156 + * @fd: the frame descriptor which is enqueued.
2157 + *
2158 + * Return 0 for successful enqueue, -EBUSY if the enqueue ring is not ready,
2159 + * or -ENODEV if there is no dpio service.
2160 + */
2161 +int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d,
2162 + u32 fqid,
2163 + const struct dpaa2_fd *fd)
2164 +{
2165 + struct qbman_eq_desc ed;
2166 +
2167 + d = service_select(d);
2168 + if (!d)
2169 + return -ENODEV;
2170 +
2171 + qbman_eq_desc_clear(&ed);
2172 + qbman_eq_desc_set_no_orp(&ed, 0);
2173 + qbman_eq_desc_set_fq(&ed, fqid);
2174 +
2175 + return qbman_swp_enqueue(d->swp, &ed, fd);
2176 +}
2177 +EXPORT_SYMBOL(dpaa2_io_service_enqueue_fq);
2178 +
2179 +/**
2180 + * dpaa2_io_service_enqueue_qd() - Enqueue a frame to a QD.
2181 + * @d: the given DPIO service.
2182 + * @qdid: the given queuing destination id.
2183 + * @prio: the given queuing priority.
2184 + * @qdbin: the given queuing destination bin.
2185 + * @fd: the frame descriptor which is enqueued.
2186 + *
2187 + * Return 0 for successful enqueue, or -EBUSY if the enqueue ring is not ready,
2188 + * or -ENODEV if there is no dpio service.
2189 + */
2190 +int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d,
2191 + u32 qdid, u8 prio, u16 qdbin,
2192 + const struct dpaa2_fd *fd)
2193 +{
2194 + struct qbman_eq_desc ed;
2195 +
2196 + d = service_select(d);
2197 + if (!d)
2198 + return -ENODEV;
2199 +
2200 + qbman_eq_desc_clear(&ed);
2201 + qbman_eq_desc_set_no_orp(&ed, 0);
2202 + qbman_eq_desc_set_qd(&ed, qdid, qdbin, prio);
2203 +
2204 + return qbman_swp_enqueue(d->swp, &ed, fd);
2205 +}
2206 +EXPORT_SYMBOL(dpaa2_io_service_enqueue_qd);
2207 +
2208 +/**
2209 + * dpaa2_io_service_release() - Release buffers to a buffer pool.
2210 + * @d: the given DPIO object.
2211 + * @bpid: the buffer pool id.
2212 + * @buffers: the buffers to be released.
2213 + * @num_buffers: the number of the buffers to be released.
2214 + *
2215 + * Return 0 for success, and negative error code for failure.
2216 + */
2217 +int dpaa2_io_service_release(struct dpaa2_io *d,
2218 + u32 bpid,
2219 + const u64 *buffers,
2220 + unsigned int num_buffers)
2221 +{
2222 + struct qbman_release_desc rd;
2223 +
2224 + d = service_select(d);
2225 + if (!d)
2226 + return -ENODEV;
2227 +
2228 + qbman_release_desc_clear(&rd);
2229 + qbman_release_desc_set_bpid(&rd, bpid);
2230 +
2231 + return qbman_swp_release(d->swp, &rd, buffers, num_buffers);
2232 +}
2233 +EXPORT_SYMBOL(dpaa2_io_service_release);
2234 +
2235 +/**
2236 + * dpaa2_io_service_acquire() - Acquire buffers from a buffer pool.
2237 + * @d: the given DPIO object.
2238 + * @bpid: the buffer pool id.
2239 + * @buffers: the buffer addresses for acquired buffers.
2240 + * @num_buffers: the expected number of the buffers to acquire.
2241 + *
2242 + * Return a negative error code if the command failed, otherwise it returns
2243 + * the number of buffers acquired, which may be less than the number requested.
2244 + * Eg. if the buffer pool is empty, this will return zero.
2245 + */
2246 +int dpaa2_io_service_acquire(struct dpaa2_io *d,
2247 + u32 bpid,
2248 + u64 *buffers,
2249 + unsigned int num_buffers)
2250 +{
2251 + unsigned long irqflags;
2252 + int err;
2253 +
2254 + d = service_select(d);
2255 + if (!d)
2256 + return -ENODEV;
2257 +
2258 + spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags);
2259 + err = qbman_swp_acquire(d->swp, bpid, buffers, num_buffers);
2260 + spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags);
2261 +
2262 + return err;
2263 +}
2264 +EXPORT_SYMBOL(dpaa2_io_service_acquire);
2265 +
2266 +/*
2267 + * 'Stores' are reusable memory blocks for holding dequeue results, and to
2268 + * assist with parsing those results.
2269 + */
2270 +
2271 +/**
2272 + * dpaa2_io_store_create() - Create the dma memory storage for dequeue result.
2273 + * @max_frames: the maximum number of dequeued result for frames, must be <= 16.
2274 + * @dev: the device to allow mapping/unmapping the DMAable region.
2275 + *
2276 + * The size of the storage is "max_frames*sizeof(struct dpaa2_dq)".
2277 + * The 'dpaa2_io_store' returned is a DPIO service managed object.
2278 + *
2279 + * Return pointer to dpaa2_io_store struct for successfuly created storage
2280 + * memory, or NULL on error.
2281 + */
2282 +struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
2283 + struct device *dev)
2284 +{
2285 + struct dpaa2_io_store *ret;
2286 + size_t size;
2287 +
2288 + if (!max_frames || (max_frames > 16))
2289 + return NULL;
2290 +
2291 + ret = kmalloc(sizeof(*ret), GFP_KERNEL);
2292 + if (!ret)
2293 + return NULL;
2294 +
2295 + ret->max = max_frames;
2296 + size = max_frames * sizeof(struct dpaa2_dq) + 64;
2297 + ret->alloced_addr = kzalloc(size, GFP_KERNEL);
2298 + if (!ret->alloced_addr) {
2299 + kfree(ret);
2300 + return NULL;
2301 + }
2302 +
2303 + ret->vaddr = PTR_ALIGN(ret->alloced_addr, 64);
2304 + ret->paddr = dma_map_single(dev, ret->vaddr,
2305 + sizeof(struct dpaa2_dq) * max_frames,
2306 + DMA_FROM_DEVICE);
2307 + if (dma_mapping_error(dev, ret->paddr)) {
2308 + kfree(ret->alloced_addr);
2309 + kfree(ret);
2310 + return NULL;
2311 + }
2312 +
2313 + ret->idx = 0;
2314 + ret->dev = dev;
2315 +
2316 + return ret;
2317 +}
2318 +EXPORT_SYMBOL(dpaa2_io_store_create);
2319 +
2320 +/**
2321 + * dpaa2_io_store_destroy() - Frees the dma memory storage for dequeue
2322 + * result.
2323 + * @s: the storage memory to be destroyed.
2324 + */
2325 +void dpaa2_io_store_destroy(struct dpaa2_io_store *s)
2326 +{
2327 + dma_unmap_single(s->dev, s->paddr, sizeof(struct dpaa2_dq) * s->max,
2328 + DMA_FROM_DEVICE);
2329 + kfree(s->alloced_addr);
2330 + kfree(s);
2331 +}
2332 +EXPORT_SYMBOL(dpaa2_io_store_destroy);
2333 +
2334 +/**
2335 + * dpaa2_io_store_next() - Determine when the next dequeue result is available.
2336 + * @s: the dpaa2_io_store object.
2337 + * @is_last: indicate whether this is the last frame in the pull command.
2338 + *
2339 + * When an object driver performs dequeues to a dpaa2_io_store, this function
2340 + * can be used to determine when the next frame result is available. Once
2341 + * this function returns non-NULL, a subsequent call to it will try to find
2342 + * the next dequeue result.
2343 + *
2344 + * Note that if a pull-dequeue has a NULL result because the target FQ/channel
2345 + * was empty, then this function will also return NULL (rather than expecting
2346 + * the caller to always check for this. As such, "is_last" can be used to
2347 + * differentiate between "end-of-empty-dequeue" and "still-waiting".
2348 + *
2349 + * Return dequeue result for a valid dequeue result, or NULL for empty dequeue.
2350 + */
2351 +struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last)
2352 +{
2353 + int match;
2354 + struct dpaa2_dq *ret = &s->vaddr[s->idx];
2355 +
2356 + match = qbman_result_has_new_result(s->swp, ret);
2357 + if (!match) {
2358 + *is_last = 0;
2359 + return NULL;
2360 + }
2361 +
2362 + s->idx++;
2363 +
2364 + if (dpaa2_dq_is_pull_complete(ret)) {
2365 + *is_last = 1;
2366 + s->idx = 0;
2367 + /*
2368 + * If we get an empty dequeue result to terminate a zero-results
2369 + * vdqcr, return NULL to the caller rather than expecting him to
2370 + * check non-NULL results every time.
2371 + */
2372 + if (!(dpaa2_dq_flags(ret) & DPAA2_DQ_STAT_VALIDFRAME))
2373 + ret = NULL;
2374 + } else {
2375 + *is_last = 0;
2376 + }
2377 +
2378 + return ret;
2379 +}
2380 +EXPORT_SYMBOL(dpaa2_io_store_next);
2381 +
2382 +#ifdef CONFIG_FSL_QBMAN_DEBUG
2383 +/**
2384 + * dpaa2_io_query_fq_count() - Get the frame and byte count for a given fq.
2385 + * @d: the given DPIO object.
2386 + * @fqid: the id of frame queue to be queried.
2387 + * @fcnt: the queried frame count.
2388 + * @bcnt: the queried byte count.
2389 + *
2390 + * Knowing the FQ count at run-time can be useful in debugging situations.
2391 + * The instantaneous frame- and byte-count are hereby returned.
2392 + *
2393 + * Return 0 for a successful query, and negative error code if query fails.
2394 + */
2395 +int dpaa2_io_query_fq_count(struct dpaa2_io *d, uint32_t fqid,
2396 + u32 *fcnt, u32 *bcnt)
2397 +{
2398 + struct qbman_attr state;
2399 + struct qbman_swp *swp;
2400 + unsigned long irqflags;
2401 + int ret;
2402 +
2403 + d = service_select(d);
2404 + if (!d)
2405 + return -ENODEV;
2406 +
2407 + swp = d->swp;
2408 + spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags);
2409 + ret = qbman_fq_query_state(swp, fqid, &state);
2410 + spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags);
2411 + if (ret)
2412 + return ret;
2413 + *fcnt = qbman_fq_state_frame_count(&state);
2414 + *bcnt = qbman_fq_state_byte_count(&state);
2415 +
2416 + return 0;
2417 +}
2418 +EXPORT_SYMBOL(dpaa2_io_query_fq_count);
2419 +
2420 +/**
2421 + * dpaa2_io_query_bp_count() - Query the number of buffers currenty in a
2422 + * buffer pool.
2423 + * @d: the given DPIO object.
2424 + * @bpid: the index of buffer pool to be queried.
2425 + * @num: the queried number of buffers in the buffer pool.
2426 + *
2427 + * Return 0 for a sucessful query, and negative error code if query fails.
2428 + */
2429 +int dpaa2_io_query_bp_count(struct dpaa2_io *d, uint32_t bpid, u32 *num)
2430 +{
2431 + struct qbman_attr state;
2432 + struct qbman_swp *swp;
2433 + unsigned long irqflags;
2434 + int ret;
2435 +
2436 + d = service_select(d);
2437 + if (!d)
2438 + return -ENODEV;
2439 +
2440 + swp = d->swp;
2441 + spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags);
2442 + ret = qbman_bp_query(swp, bpid, &state);
2443 + spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags);
2444 + if (ret)
2445 + return ret;
2446 + *num = qbman_bp_info_num_free_bufs(&state);
2447 + return 0;
2448 +}
2449 +EXPORT_SYMBOL(dpaa2_io_query_bp_count);
2450 +#endif
2451 diff --git a/drivers/staging/fsl-mc/bus/dpio/dpio.c b/drivers/staging/fsl-mc/bus/dpio/dpio.c
2452 new file mode 100644
2453 index 00000000..d81e0232
2454 --- /dev/null
2455 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio.c
2456 @@ -0,0 +1,224 @@
2457 +/*
2458 + * Copyright 2013-2016 Freescale Semiconductor Inc.
2459 + * Copyright 2016 NXP
2460 + *
2461 + * Redistribution and use in source and binary forms, with or without
2462 + * modification, are permitted provided that the following conditions are met:
2463 + * * Redistributions of source code must retain the above copyright
2464 + * notice, this list of conditions and the following disclaimer.
2465 + * * Redistributions in binary form must reproduce the above copyright
2466 + * notice, this list of conditions and the following disclaimer in the
2467 + * documentation and/or other materials provided with the distribution.
2468 + * * Neither the name of the above-listed copyright holders nor the
2469 + * names of any contributors may be used to endorse or promote products
2470 + * derived from this software without specific prior written permission.
2471 + *
2472 + * ALTERNATIVELY, this software may be distributed under the terms of the
2473 + * GNU General Public License ("GPL") as published by the Free Software
2474 + * Foundation, either version 2 of that License or (at your option) any
2475 + * later version.
2476 + *
2477 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2478 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2479 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2480 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2481 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2482 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2483 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2484 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2485 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2486 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2487 + * POSSIBILITY OF SUCH DAMAGE.
2488 + */
2489 +#include "../../include/mc-sys.h"
2490 +#include "../../include/mc-cmd.h"
2491 +
2492 +#include "dpio.h"
2493 +#include "dpio-cmd.h"
2494 +
2495 +/*
2496 + * Data Path I/O Portal API
2497 + * Contains initialization APIs and runtime control APIs for DPIO
2498 + */
2499 +
2500 +/**
2501 + * dpio_open() - Open a control session for the specified object
2502 + * @mc_io: Pointer to MC portal's I/O object
2503 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
2504 + * @dpio_id: DPIO unique ID
2505 + * @token: Returned token; use in subsequent API calls
2506 + *
2507 + * This function can be used to open a control session for an
2508 + * already created object; an object may have been declared in
2509 + * the DPL or by calling the dpio_create() function.
2510 + * This function returns a unique authentication token,
2511 + * associated with the specific object ID and the specific MC
2512 + * portal; this token must be used in all subsequent commands for
2513 + * this specific object.
2514 + *
2515 + * Return: '0' on Success; Error code otherwise.
2516 + */
2517 +int dpio_open(struct fsl_mc_io *mc_io,
2518 + u32 cmd_flags,
2519 + int dpio_id,
2520 + u16 *token)
2521 +{
2522 + struct mc_command cmd = { 0 };
2523 + struct dpio_cmd_open *dpio_cmd;
2524 + int err;
2525 +
2526 + /* prepare command */
2527 + cmd.header = mc_encode_cmd_header(DPIO_CMDID_OPEN,
2528 + cmd_flags,
2529 + 0);
2530 + dpio_cmd = (struct dpio_cmd_open *)cmd.params;
2531 + dpio_cmd->dpio_id = cpu_to_le32(dpio_id);
2532 +
2533 + err = mc_send_command(mc_io, &cmd);
2534 + if (err)
2535 + return err;
2536 +
2537 + /* retrieve response parameters */
2538 + *token = mc_cmd_hdr_read_token(&cmd);
2539 +
2540 + return 0;
2541 +}
2542 +
2543 +/**
2544 + * dpio_close() - Close the control session of the object
2545 + * @mc_io: Pointer to MC portal's I/O object
2546 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
2547 + * @token: Token of DPIO object
2548 + *
2549 + * Return: '0' on Success; Error code otherwise.
2550 + */
2551 +int dpio_close(struct fsl_mc_io *mc_io,
2552 + u32 cmd_flags,
2553 + u16 token)
2554 +{
2555 + struct mc_command cmd = { 0 };
2556 +
2557 + /* prepare command */
2558 + cmd.header = mc_encode_cmd_header(DPIO_CMDID_CLOSE,
2559 + cmd_flags,
2560 + token);
2561 +
2562 + return mc_send_command(mc_io, &cmd);
2563 +}
2564 +
2565 +/**
2566 + * dpio_enable() - Enable the DPIO, allow I/O portal operations.
2567 + * @mc_io: Pointer to MC portal's I/O object
2568 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
2569 + * @token: Token of DPIO object
2570 + *
2571 + * Return: '0' on Success; Error code otherwise
2572 + */
2573 +int dpio_enable(struct fsl_mc_io *mc_io,
2574 + u32 cmd_flags,
2575 + u16 token)
2576 +{
2577 + struct mc_command cmd = { 0 };
2578 +
2579 + /* prepare command */
2580 + cmd.header = mc_encode_cmd_header(DPIO_CMDID_ENABLE,
2581 + cmd_flags,
2582 + token);
2583 +
2584 + return mc_send_command(mc_io, &cmd);
2585 +}
2586 +
2587 +/**
2588 + * dpio_disable() - Disable the DPIO, stop any I/O portal operation.
2589 + * @mc_io: Pointer to MC portal's I/O object
2590 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
2591 + * @token: Token of DPIO object
2592 + *
2593 + * Return: '0' on Success; Error code otherwise
2594 + */
2595 +int dpio_disable(struct fsl_mc_io *mc_io,
2596 + u32 cmd_flags,
2597 + u16 token)
2598 +{
2599 + struct mc_command cmd = { 0 };
2600 +
2601 + /* prepare command */
2602 + cmd.header = mc_encode_cmd_header(DPIO_CMDID_DISABLE,
2603 + cmd_flags,
2604 + token);
2605 +
2606 + return mc_send_command(mc_io, &cmd);
2607 +}
2608 +
2609 +/**
2610 + * dpio_get_attributes() - Retrieve DPIO attributes
2611 + * @mc_io: Pointer to MC portal's I/O object
2612 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
2613 + * @token: Token of DPIO object
2614 + * @attr: Returned object's attributes
2615 + *
2616 + * Return: '0' on Success; Error code otherwise
2617 + */
2618 +int dpio_get_attributes(struct fsl_mc_io *mc_io,
2619 + u32 cmd_flags,
2620 + u16 token,
2621 + struct dpio_attr *attr)
2622 +{
2623 + struct mc_command cmd = { 0 };
2624 + struct dpio_rsp_get_attr *dpio_rsp;
2625 + int err;
2626 +
2627 + /* prepare command */
2628 + cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_ATTR,
2629 + cmd_flags,
2630 + token);
2631 +
2632 + err = mc_send_command(mc_io, &cmd);
2633 + if (err)
2634 + return err;
2635 +
2636 + /* retrieve response parameters */
2637 + dpio_rsp = (struct dpio_rsp_get_attr *)cmd.params;
2638 + attr->id = le32_to_cpu(dpio_rsp->id);
2639 + attr->qbman_portal_id = le16_to_cpu(dpio_rsp->qbman_portal_id);
2640 + attr->num_priorities = dpio_rsp->num_priorities;
2641 + attr->channel_mode = dpio_rsp->channel_mode & DPIO_CHANNEL_MODE_MASK;
2642 + attr->qbman_portal_ce_offset =
2643 + le64_to_cpu(dpio_rsp->qbman_portal_ce_addr);
2644 + attr->qbman_portal_ci_offset =
2645 + le64_to_cpu(dpio_rsp->qbman_portal_ci_addr);
2646 + attr->qbman_version = le32_to_cpu(dpio_rsp->qbman_version);
2647 +
2648 + return 0;
2649 +}
2650 +
2651 +/**
2652 + * dpio_get_api_version - Get Data Path I/O API version
2653 + * @mc_io: Pointer to MC portal's DPIO object
2654 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
2655 + * @major_ver: Major version of DPIO API
2656 + * @minor_ver: Minor version of DPIO API
2657 + *
2658 + * Return: '0' on Success; Error code otherwise
2659 + */
2660 +int dpio_get_api_version(struct fsl_mc_io *mc_io,
2661 + u32 cmd_flags,
2662 + u16 *major_ver,
2663 + u16 *minor_ver)
2664 +{
2665 + struct mc_command cmd = { 0 };
2666 + int err;
2667 +
2668 + /* prepare command */
2669 + cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_API_VERSION,
2670 + cmd_flags, 0);
2671 +
2672 + err = mc_send_command(mc_io, &cmd);
2673 + if (err)
2674 + return err;
2675 +
2676 + /* retrieve response parameters */
2677 + mc_cmd_read_api_version(&cmd, major_ver, minor_ver);
2678 +
2679 + return 0;
2680 +}
2681 diff --git a/drivers/staging/fsl-mc/bus/dpio/dpio.h b/drivers/staging/fsl-mc/bus/dpio/dpio.h
2682 new file mode 100644
2683 index 00000000..ced1103d
2684 --- /dev/null
2685 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio.h
2686 @@ -0,0 +1,109 @@
2687 +/*
2688 + * Copyright 2013-2016 Freescale Semiconductor Inc.
2689 + * Copyright 2016 NXP
2690 + *
2691 + * Redistribution and use in source and binary forms, with or without
2692 + * modification, are permitted provided that the following conditions are met:
2693 + * * Redistributions of source code must retain the above copyright
2694 + * notice, this list of conditions and the following disclaimer.
2695 + * * Redistributions in binary form must reproduce the above copyright
2696 + * notice, this list of conditions and the following disclaimer in the
2697 + * documentation and/or other materials provided with the distribution.
2698 + * * Neither the name of the above-listed copyright holders nor the
2699 + * names of any contributors may be used to endorse or promote products
2700 + * derived from this software without specific prior written permission.
2701 + *
2702 + * ALTERNATIVELY, this software may be distributed under the terms of the
2703 + * GNU General Public License ("GPL") as published by the Free Software
2704 + * Foundation, either version 2 of that License or (at your option) any
2705 + * later version.
2706 + *
2707 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2708 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2709 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2710 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2711 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2712 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2713 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2714 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2715 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2716 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2717 + * POSSIBILITY OF SUCH DAMAGE.
2718 + */
2719 +#ifndef __FSL_DPIO_H
2720 +#define __FSL_DPIO_H
2721 +
2722 +struct fsl_mc_io;
2723 +
2724 +int dpio_open(struct fsl_mc_io *mc_io,
2725 + u32 cmd_flags,
2726 + int dpio_id,
2727 + u16 *token);
2728 +
2729 +int dpio_close(struct fsl_mc_io *mc_io,
2730 + u32 cmd_flags,
2731 + u16 token);
2732 +
2733 +/**
2734 + * enum dpio_channel_mode - DPIO notification channel mode
2735 + * @DPIO_NO_CHANNEL: No support for notification channel
2736 + * @DPIO_LOCAL_CHANNEL: Notifications on data availability can be received by a
2737 + * dedicated channel in the DPIO; user should point the queue's
2738 + * destination in the relevant interface to this DPIO
2739 + */
2740 +enum dpio_channel_mode {
2741 + DPIO_NO_CHANNEL = 0,
2742 + DPIO_LOCAL_CHANNEL = 1,
2743 +};
2744 +
2745 +/**
2746 + * struct dpio_cfg - Structure representing DPIO configuration
2747 + * @channel_mode: Notification channel mode
2748 + * @num_priorities: Number of priorities for the notification channel (1-8);
2749 + * relevant only if 'channel_mode = DPIO_LOCAL_CHANNEL'
2750 + */
2751 +struct dpio_cfg {
2752 + enum dpio_channel_mode channel_mode;
2753 + u8 num_priorities;
2754 +};
2755 +
2756 +int dpio_enable(struct fsl_mc_io *mc_io,
2757 + u32 cmd_flags,
2758 + u16 token);
2759 +
2760 +int dpio_disable(struct fsl_mc_io *mc_io,
2761 + u32 cmd_flags,
2762 + u16 token);
2763 +
2764 +/**
2765 + * struct dpio_attr - Structure representing DPIO attributes
2766 + * @id: DPIO object ID
2767 + * @qbman_portal_ce_offset: offset of the software portal cache-enabled area
2768 + * @qbman_portal_ci_offset: offset of the software portal cache-inhibited area
2769 + * @qbman_portal_id: Software portal ID
2770 + * @channel_mode: Notification channel mode
2771 + * @num_priorities: Number of priorities for the notification channel (1-8);
2772 + * relevant only if 'channel_mode = DPIO_LOCAL_CHANNEL'
2773 + * @qbman_version: QBMAN version
2774 + */
2775 +struct dpio_attr {
2776 + int id;
2777 + u64 qbman_portal_ce_offset;
2778 + u64 qbman_portal_ci_offset;
2779 + u16 qbman_portal_id;
2780 + enum dpio_channel_mode channel_mode;
2781 + u8 num_priorities;
2782 + u32 qbman_version;
2783 +};
2784 +
2785 +int dpio_get_attributes(struct fsl_mc_io *mc_io,
2786 + u32 cmd_flags,
2787 + u16 token,
2788 + struct dpio_attr *attr);
2789 +
2790 +int dpio_get_api_version(struct fsl_mc_io *mc_io,
2791 + u32 cmd_flags,
2792 + u16 *major_ver,
2793 + u16 *minor_ver);
2794 +
2795 +#endif /* __FSL_DPIO_H */
2796 diff --git a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
2797 new file mode 100644
2798 index 00000000..e14fb65b
2799 --- /dev/null
2800 +++ b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
2801 @@ -0,0 +1,1049 @@
2802 +/*
2803 + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
2804 + * Copyright 2016 NXP
2805 + *
2806 + * Redistribution and use in source and binary forms, with or without
2807 + * modification, are permitted provided that the following conditions are met:
2808 + * * Redistributions of source code must retain the above copyright
2809 + * notice, this list of conditions and the following disclaimer.
2810 + * * Redistributions in binary form must reproduce the above copyright
2811 + * notice, this list of conditions and the following disclaimer in the
2812 + * documentation and/or other materials provided with the distribution.
2813 + * * Neither the name of Freescale Semiconductor nor the
2814 + * names of its contributors may be used to endorse or promote products
2815 + * derived from this software without specific prior written permission.
2816 + *
2817 + * ALTERNATIVELY, this software may be distributed under the terms of the
2818 + * GNU General Public License ("GPL") as published by the Free Software
2819 + * Foundation, either version 2 of that License or (at your option) any
2820 + * later version.
2821 + *
2822 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
2823 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
2824 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
2825 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
2826 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2827 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2828 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
2829 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2830 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2831 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2832 + */
2833 +
2834 +#include <asm/cacheflush.h>
2835 +#include <linux/io.h>
2836 +#include <linux/slab.h>
2837 +#include "../../include/dpaa2-global.h"
2838 +
2839 +#include "qbman-portal.h"
2840 +
2841 +struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
2842 +struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
2843 +
2844 +#define QMAN_REV_4000 0x04000000
2845 +#define QMAN_REV_4100 0x04010000
2846 +#define QMAN_REV_4101 0x04010001
2847 +#define QMAN_REV_MASK 0xffff0000
2848 +
2849 +/* All QBMan command and result structures use this "valid bit" encoding */
2850 +#define QB_VALID_BIT ((u32)0x80)
2851 +
2852 +/* QBMan portal management command codes */
2853 +#define QBMAN_MC_ACQUIRE 0x30
2854 +#define QBMAN_WQCHAN_CONFIGURE 0x46
2855 +
2856 +/* CINH register offsets */
2857 +#define QBMAN_CINH_SWP_EQAR 0x8c0
2858 +#define QBMAN_CINH_SWP_DQPI 0xa00
2859 +#define QBMAN_CINH_SWP_DCAP 0xac0
2860 +#define QBMAN_CINH_SWP_SDQCR 0xb00
2861 +#define QBMAN_CINH_SWP_RAR 0xcc0
2862 +#define QBMAN_CINH_SWP_ISR 0xe00
2863 +#define QBMAN_CINH_SWP_IER 0xe40
2864 +#define QBMAN_CINH_SWP_ISDR 0xe80
2865 +#define QBMAN_CINH_SWP_IIR 0xec0
2866 +
2867 +/* CENA register offsets */
2868 +#define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((u32)(n) << 6))
2869 +#define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((u32)(n) << 6))
2870 +#define QBMAN_CENA_SWP_RCR(n) (0x400 + ((u32)(n) << 6))
2871 +#define QBMAN_CENA_SWP_CR 0x600
2872 +#define QBMAN_CENA_SWP_RR(vb) (0x700 + ((u32)(vb) >> 1))
2873 +#define QBMAN_CENA_SWP_VDQCR 0x780
2874 +
2875 +/* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
2876 +#define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)(p) & 0x1ff) >> 6)
2877 +
2878 +/* Define token used to determine if response written to memory is valid */
2879 +#define QMAN_DQ_TOKEN_VALID 1
2880 +
2881 +/* SDQCR attribute codes */
2882 +#define QB_SDQCR_FC_SHIFT 29
2883 +#define QB_SDQCR_FC_MASK 0x1
2884 +#define QB_SDQCR_DCT_SHIFT 24
2885 +#define QB_SDQCR_DCT_MASK 0x3
2886 +#define QB_SDQCR_TOK_SHIFT 16
2887 +#define QB_SDQCR_TOK_MASK 0xff
2888 +#define QB_SDQCR_SRC_SHIFT 0
2889 +#define QB_SDQCR_SRC_MASK 0xffff
2890 +
2891 +/* opaque token for static dequeues */
2892 +#define QMAN_SDQCR_TOKEN 0xbb
2893 +
2894 +enum qbman_sdqcr_dct {
2895 + qbman_sdqcr_dct_null = 0,
2896 + qbman_sdqcr_dct_prio_ics,
2897 + qbman_sdqcr_dct_active_ics,
2898 + qbman_sdqcr_dct_active
2899 +};
2900 +
2901 +enum qbman_sdqcr_fc {
2902 + qbman_sdqcr_fc_one = 0,
2903 + qbman_sdqcr_fc_up_to_3 = 1
2904 +};
2905 +
2906 +#define dccvac(p) { asm volatile("dc cvac, %0;" : : "r" (p) : "memory"); }
2907 +#define dcivac(p) { asm volatile("dc ivac, %0" : : "r"(p) : "memory"); }
2908 +static inline void qbman_inval_prefetch(struct qbman_swp *p, uint32_t offset)
2909 +{
2910 + dcivac(p->addr_cena + offset);
2911 + prefetch(p->addr_cena + offset);
2912 +}
2913 +
2914 +/* Portal Access */
2915 +
2916 +static inline u32 qbman_read_register(struct qbman_swp *p, u32 offset)
2917 +{
2918 + return readl_relaxed(p->addr_cinh + offset);
2919 +}
2920 +
2921 +static inline void qbman_write_register(struct qbman_swp *p, u32 offset,
2922 + u32 value)
2923 +{
2924 + writel_relaxed(value, p->addr_cinh + offset);
2925 +}
2926 +
2927 +static inline void *qbman_get_cmd(struct qbman_swp *p, u32 offset)
2928 +{
2929 + return p->addr_cena + offset;
2930 +}
2931 +
2932 +#define QBMAN_CINH_SWP_CFG 0xd00
2933 +
2934 +#define SWP_CFG_DQRR_MF_SHIFT 20
2935 +#define SWP_CFG_EST_SHIFT 16
2936 +#define SWP_CFG_WN_SHIFT 14
2937 +#define SWP_CFG_RPM_SHIFT 12
2938 +#define SWP_CFG_DCM_SHIFT 10
2939 +#define SWP_CFG_EPM_SHIFT 8
2940 +#define SWP_CFG_SD_SHIFT 5
2941 +#define SWP_CFG_SP_SHIFT 4
2942 +#define SWP_CFG_SE_SHIFT 3
2943 +#define SWP_CFG_DP_SHIFT 2
2944 +#define SWP_CFG_DE_SHIFT 1
2945 +#define SWP_CFG_EP_SHIFT 0
2946 +
2947 +static inline u32 qbman_set_swp_cfg(u8 max_fill, u8 wn, u8 est, u8 rpm, u8 dcm,
2948 + u8 epm, int sd, int sp, int se,
2949 + int dp, int de, int ep)
2950 +{
2951 + return cpu_to_le32 (max_fill << SWP_CFG_DQRR_MF_SHIFT |
2952 + est << SWP_CFG_EST_SHIFT |
2953 + wn << SWP_CFG_WN_SHIFT |
2954 + rpm << SWP_CFG_RPM_SHIFT |
2955 + dcm << SWP_CFG_DCM_SHIFT |
2956 + epm << SWP_CFG_EPM_SHIFT |
2957 + sd << SWP_CFG_SD_SHIFT |
2958 + sp << SWP_CFG_SP_SHIFT |
2959 + se << SWP_CFG_SE_SHIFT |
2960 + dp << SWP_CFG_DP_SHIFT |
2961 + de << SWP_CFG_DE_SHIFT |
2962 + ep << SWP_CFG_EP_SHIFT);
2963 +}
2964 +
2965 +/**
2966 + * qbman_swp_init() - Create a functional object representing the given
2967 + * QBMan portal descriptor.
2968 + * @d: the given qbman swp descriptor
2969 + *
2970 + * Return qbman_swp portal for success, NULL if the object cannot
2971 + * be created.
2972 + */
2973 +struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
2974 +{
2975 + struct qbman_swp *p = kmalloc(sizeof(*p), GFP_KERNEL);
2976 + u32 reg;
2977 +
2978 + if (!p)
2979 + return NULL;
2980 + p->desc = d;
2981 + p->mc.valid_bit = QB_VALID_BIT;
2982 + p->sdq = 0;
2983 + p->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT;
2984 + p->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT;
2985 + p->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT;
2986 +
2987 + atomic_set(&p->vdq.available, 1);
2988 + p->vdq.valid_bit = QB_VALID_BIT;
2989 + p->dqrr.next_idx = 0;
2990 + p->dqrr.valid_bit = QB_VALID_BIT;
2991 +
2992 + if ((p->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_4100) {
2993 + p->dqrr.dqrr_size = 4;
2994 + p->dqrr.reset_bug = 1;
2995 + } else {
2996 + p->dqrr.dqrr_size = 8;
2997 + p->dqrr.reset_bug = 0;
2998 + }
2999 +
3000 + p->addr_cena = d->cena_bar;
3001 + p->addr_cinh = d->cinh_bar;
3002 +
3003 + reg = qbman_set_swp_cfg(p->dqrr.dqrr_size,
3004 + 0, /* Writes cacheable */
3005 + 0, /* EQCR_CI stashing threshold */
3006 + 3, /* RPM: Valid bit mode, RCR in array mode */
3007 + 2, /* DCM: Discrete consumption ack mode */
3008 + 3, /* EPM: Valid bit mode, EQCR in array mode */
3009 + 0, /* mem stashing drop enable == FALSE */
3010 + 1, /* mem stashing priority == TRUE */
3011 + 0, /* mem stashing enable == FALSE */
3012 + 1, /* dequeue stashing priority == TRUE */
3013 + 0, /* dequeue stashing enable == FALSE */
3014 + 0); /* EQCR_CI stashing priority == FALSE */
3015 +
3016 + qbman_write_register(p, QBMAN_CINH_SWP_CFG, reg);
3017 + reg = qbman_read_register(p, QBMAN_CINH_SWP_CFG);
3018 + if (!reg) {
3019 + pr_err("qbman: the portal is not enabled!\n");
3020 + return NULL;
3021 + }
3022 +
3023 + /*
3024 + * SDQCR needs to be initialized to 0 when no channels are
3025 + * being dequeued from or else the QMan HW will indicate an
3026 + * error. The values that were calculated above will be
3027 + * applied when dequeues from a specific channel are enabled.
3028 + */
3029 + qbman_write_register(p, QBMAN_CINH_SWP_SDQCR, 0);
3030 + return p;
3031 +}
3032 +
3033 +/**
3034 + * qbman_swp_finish() - Create and destroy a functional object representing
3035 + * the given QBMan portal descriptor.
3036 + * @p: the qbman_swp object to be destroyed
3037 + */
3038 +void qbman_swp_finish(struct qbman_swp *p)
3039 +{
3040 + kfree(p);
3041 +}
3042 +
3043 +/**
3044 + * qbman_swp_interrupt_read_status()
3045 + * @p: the given software portal
3046 + *
3047 + * Return the value in the SWP_ISR register.
3048 + */
3049 +u32 qbman_swp_interrupt_read_status(struct qbman_swp *p)
3050 +{
3051 + return qbman_read_register(p, QBMAN_CINH_SWP_ISR);
3052 +}
3053 +
3054 +/**
3055 + * qbman_swp_interrupt_clear_status()
3056 + * @p: the given software portal
3057 + * @mask: The mask to clear in SWP_ISR register
3058 + */
3059 +void qbman_swp_interrupt_clear_status(struct qbman_swp *p, u32 mask)
3060 +{
3061 + qbman_write_register(p, QBMAN_CINH_SWP_ISR, mask);
3062 +}
3063 +
3064 +/**
3065 + * qbman_swp_interrupt_get_trigger() - read interrupt enable register
3066 + * @p: the given software portal
3067 + *
3068 + * Return the value in the SWP_IER register.
3069 + */
3070 +u32 qbman_swp_interrupt_get_trigger(struct qbman_swp *p)
3071 +{
3072 + return qbman_read_register(p, QBMAN_CINH_SWP_IER);
3073 +}
3074 +
3075 +/**
3076 + * qbman_swp_interrupt_set_trigger() - enable interrupts for a swp
3077 + * @p: the given software portal
3078 + * @mask: The mask of bits to enable in SWP_IER
3079 + */
3080 +void qbman_swp_interrupt_set_trigger(struct qbman_swp *p, u32 mask)
3081 +{
3082 + qbman_write_register(p, QBMAN_CINH_SWP_IER, mask);
3083 +}
3084 +
3085 +/**
3086 + * qbman_swp_interrupt_get_inhibit() - read interrupt mask register
3087 + * @p: the given software portal object
3088 + *
3089 + * Return the value in the SWP_IIR register.
3090 + */
3091 +int qbman_swp_interrupt_get_inhibit(struct qbman_swp *p)
3092 +{
3093 + return qbman_read_register(p, QBMAN_CINH_SWP_IIR);
3094 +}
3095 +
3096 +/**
3097 + * qbman_swp_interrupt_set_inhibit() - write interrupt mask register
3098 + * @p: the given software portal object
3099 + * @mask: The mask to set in SWP_IIR register
3100 + */
3101 +void qbman_swp_interrupt_set_inhibit(struct qbman_swp *p, int inhibit)
3102 +{
3103 + qbman_write_register(p, QBMAN_CINH_SWP_IIR, inhibit ? 0xffffffff : 0);
3104 +}
3105 +
3106 +/*
3107 + * Different management commands all use this common base layer of code to issue
3108 + * commands and poll for results.
3109 + */
3110 +
3111 +/*
3112 + * Returns a pointer to where the caller should fill in their management command
3113 + * (caller should ignore the verb byte)
3114 + */
3115 +void *qbman_swp_mc_start(struct qbman_swp *p)
3116 +{
3117 + return qbman_get_cmd(p, QBMAN_CENA_SWP_CR);
3118 +}
3119 +
3120 +/*
3121 + * Commits merges in the caller-supplied command verb (which should not include
3122 + * the valid-bit) and submits the command to hardware
3123 + */
3124 +void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, u8 cmd_verb)
3125 +{
3126 + u8 *v = cmd;
3127 +
3128 + dma_wmb();
3129 + *v = cmd_verb | p->mc.valid_bit;
3130 + dccvac(cmd);
3131 +}
3132 +
3133 +/*
3134 + * Checks for a completed response (returns non-NULL if only if the response
3135 + * is complete).
3136 + */
3137 +void *qbman_swp_mc_result(struct qbman_swp *p)
3138 +{
3139 + u32 *ret, verb;
3140 +
3141 + qbman_inval_prefetch(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
3142 + ret = qbman_get_cmd(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
3143 +
3144 + /* Remove the valid-bit - command completed if the rest is non-zero */
3145 + verb = ret[0] & ~QB_VALID_BIT;
3146 + if (!verb)
3147 + return NULL;
3148 + p->mc.valid_bit ^= QB_VALID_BIT;
3149 + return ret;
3150 +}
3151 +
3152 +#define QB_ENQUEUE_CMD_OPTIONS_SHIFT 0
3153 +enum qb_enqueue_commands {
3154 + enqueue_empty = 0,
3155 + enqueue_response_always = 1,
3156 + enqueue_rejects_to_fq = 2
3157 +};
3158 +
3159 +#define QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT 2
3160 +#define QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT 3
3161 +#define QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT 4
3162 +
3163 +/**
3164 + * qbman_eq_desc_clear() - Clear the contents of a descriptor to
3165 + * default/starting state.
3166 + */
3167 +void qbman_eq_desc_clear(struct qbman_eq_desc *d)
3168 +{
3169 + memset(d, 0, sizeof(*d));
3170 +}
3171 +
3172 +/**
3173 + * qbman_eq_desc_set_no_orp() - Set enqueue descriptor without orp
3174 + * @d: the enqueue descriptor.
3175 + * @response_success: 1 = enqueue with response always; 0 = enqueue with
3176 + * rejections returned on a FQ.
3177 + */
3178 +void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
3179 +{
3180 + d->verb &= ~(1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT);
3181 + if (respond_success)
3182 + d->verb |= enqueue_response_always;
3183 + else
3184 + d->verb |= enqueue_rejects_to_fq;
3185 +}
3186 +
3187 +/*
3188 + * Exactly one of the following descriptor "targets" should be set. (Calling any
3189 + * one of these will replace the effect of any prior call to one of these.)
3190 + * -enqueue to a frame queue
3191 + * -enqueue to a queuing destination
3192 + */
3193 +
3194 +/**
3195 + * qbman_eq_desc_set_fq() - set the FQ for the enqueue command
3196 + * @d: the enqueue descriptor
3197 + * @fqid: the id of the frame queue to be enqueued
3198 + */
3199 +void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, u32 fqid)
3200 +{
3201 + d->verb &= ~(1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT);
3202 + d->tgtid = cpu_to_le32(fqid);
3203 +}
3204 +
3205 +/**
3206 + * qbman_eq_desc_set_qd() - Set Queuing Destination for the enqueue command
3207 + * @d: the enqueue descriptor
3208 + * @qdid: the id of the queuing destination to be enqueued
3209 + * @qd_bin: the queuing destination bin
3210 + * @qd_prio: the queuing destination priority
3211 + */
3212 +void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, u32 qdid,
3213 + u32 qd_bin, u32 qd_prio)
3214 +{
3215 + d->verb |= 1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT;
3216 + d->tgtid = cpu_to_le32(qdid);
3217 + d->qdbin = cpu_to_le16(qd_bin);
3218 + d->qpri = qd_prio;
3219 +}
3220 +
3221 +#define EQAR_IDX(eqar) ((eqar) & 0x7)
3222 +#define EQAR_VB(eqar) ((eqar) & 0x80)
3223 +#define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
3224 +
3225 +/**
3226 + * qbman_swp_enqueue() - Issue an enqueue command
3227 + * @s: the software portal used for enqueue
3228 + * @d: the enqueue descriptor
3229 + * @fd: the frame descriptor to be enqueued
3230 + *
3231 + * Please note that 'fd' should only be NULL if the "action" of the
3232 + * descriptor is "orp_hole" or "orp_nesn".
3233 + *
3234 + * Return 0 for successful enqueue, -EBUSY if the EQCR is not ready.
3235 + */
3236 +int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
3237 + const struct dpaa2_fd *fd)
3238 +{
3239 + struct qbman_eq_desc *p;
3240 + u32 eqar = qbman_read_register(s, QBMAN_CINH_SWP_EQAR);
3241 +
3242 + if (!EQAR_SUCCESS(eqar))
3243 + return -EBUSY;
3244 +
3245 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
3246 + memcpy(&p->dca, &d->dca, 31);
3247 + memcpy(&p->fd, fd, sizeof(*fd));
3248 +
3249 + /* Set the verb byte, have to substitute in the valid-bit */
3250 + dma_wmb();
3251 + p->verb = d->verb | EQAR_VB(eqar);
3252 + dccvac(p);
3253 +
3254 + return 0;
3255 +}
3256 +
3257 +/* Static (push) dequeue */
3258 +
3259 +/**
3260 + * qbman_swp_push_get() - Get the push dequeue setup
3261 + * @p: the software portal object
3262 + * @channel_idx: the channel index to query
3263 + * @enabled: returned boolean to show whether the push dequeue is enabled
3264 + * for the given channel
3265 + */
3266 +void qbman_swp_push_get(struct qbman_swp *s, u8 channel_idx, int *enabled)
3267 +{
3268 + u16 src = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;
3269 +
3270 + WARN_ON(channel_idx > 15);
3271 + *enabled = src | (1 << channel_idx);
3272 +}
3273 +
3274 +/**
3275 + * qbman_swp_push_set() - Enable or disable push dequeue
3276 + * @p: the software portal object
3277 + * @channel_idx: the channel index (0 to 15)
3278 + * @enable: enable or disable push dequeue
3279 + */
3280 +void qbman_swp_push_set(struct qbman_swp *s, u8 channel_idx, int enable)
3281 +{
3282 + u16 dqsrc;
3283 +
3284 + WARN_ON(channel_idx > 15);
3285 + if (enable)
3286 + s->sdq |= 1 << channel_idx;
3287 + else
3288 + s->sdq &= ~(1 << channel_idx);
3289 +
3290 + /* Read make the complete src map. If no channels are enabled
3291 + * the SDQCR must be 0 or else QMan will assert errors
3292 + */
3293 + dqsrc = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;
3294 + if (dqsrc != 0)
3295 + qbman_write_register(s, QBMAN_CINH_SWP_SDQCR, s->sdq);
3296 + else
3297 + qbman_write_register(s, QBMAN_CINH_SWP_SDQCR, 0);
3298 +}
3299 +
3300 +#define QB_VDQCR_VERB_DCT_SHIFT 0
3301 +#define QB_VDQCR_VERB_DT_SHIFT 2
3302 +#define QB_VDQCR_VERB_RLS_SHIFT 4
3303 +#define QB_VDQCR_VERB_WAE_SHIFT 5
3304 +
3305 +enum qb_pull_dt_e {
3306 + qb_pull_dt_channel,
3307 + qb_pull_dt_workqueue,
3308 + qb_pull_dt_framequeue
3309 +};
3310 +
3311 +/**
3312 + * qbman_pull_desc_clear() - Clear the contents of a descriptor to
3313 + * default/starting state
3314 + * @d: the pull dequeue descriptor to be cleared
3315 + */
3316 +void qbman_pull_desc_clear(struct qbman_pull_desc *d)
3317 +{
3318 + memset(d, 0, sizeof(*d));
3319 +}
3320 +
3321 +/**
3322 + * qbman_pull_desc_set_storage()- Set the pull dequeue storage
3323 + * @d: the pull dequeue descriptor to be set
3324 + * @storage: the pointer of the memory to store the dequeue result
3325 + * @storage_phys: the physical address of the storage memory
3326 + * @stash: to indicate whether write allocate is enabled
3327 + *
3328 + * If not called, or if called with 'storage' as NULL, the result pull dequeues
3329 + * will produce results to DQRR. If 'storage' is non-NULL, then results are
3330 + * produced to the given memory location (using the DMA address which
3331 + * the caller provides in 'storage_phys'), and 'stash' controls whether or not
3332 + * those writes to main-memory express a cache-warming attribute.
3333 + */
3334 +void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
3335 + struct dpaa2_dq *storage,
3336 + dma_addr_t storage_phys,
3337 + int stash)
3338 +{
3339 + /* save the virtual address */
3340 + d->rsp_addr_virt = (u64)storage;
3341 +
3342 + if (!storage) {
3343 + d->verb &= ~(1 << QB_VDQCR_VERB_RLS_SHIFT);
3344 + return;
3345 + }
3346 + d->verb |= 1 << QB_VDQCR_VERB_RLS_SHIFT;
3347 + if (stash)
3348 + d->verb |= 1 << QB_VDQCR_VERB_WAE_SHIFT;
3349 + else
3350 + d->verb &= ~(1 << QB_VDQCR_VERB_WAE_SHIFT);
3351 +
3352 + d->rsp_addr = cpu_to_le64(storage_phys);
3353 +}
3354 +
3355 +/**
3356 + * qbman_pull_desc_set_numframes() - Set the number of frames to be dequeued
3357 + * @d: the pull dequeue descriptor to be set
3358 + * @numframes: number of frames to be set, must be between 1 and 16, inclusive
3359 + */
3360 +void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, u8 numframes)
3361 +{
3362 + d->numf = numframes - 1;
3363 +}
3364 +
3365 +void qbman_pull_desc_set_token(struct qbman_pull_desc *d, u8 token)
3366 +{
3367 + d->tok = token;
3368 +}
3369 +
3370 +/*
3371 + * Exactly one of the following descriptor "actions" should be set. (Calling any
3372 + * one of these will replace the effect of any prior call to one of these.)
3373 + * - pull dequeue from the given frame queue (FQ)
3374 + * - pull dequeue from any FQ in the given work queue (WQ)
3375 + * - pull dequeue from any FQ in any WQ in the given channel
3376 + */
3377 +
3378 +/**
3379 + * qbman_pull_desc_set_fq() - Set fqid from which the dequeue command dequeues
3380 + * @fqid: the frame queue index of the given FQ
3381 + */
3382 +void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, u32 fqid)
3383 +{
3384 + d->verb |= 1 << QB_VDQCR_VERB_DCT_SHIFT;
3385 + d->verb |= qb_pull_dt_framequeue << QB_VDQCR_VERB_DT_SHIFT;
3386 + d->dq_src = cpu_to_le32(fqid);
3387 +}
3388 +
3389 +/**
3390 + * qbman_pull_desc_set_wq() - Set wqid from which the dequeue command dequeues
3391 + * @wqid: composed of channel id and wqid within the channel
3392 + * @dct: the dequeue command type
3393 + */
3394 +void qbman_pull_desc_set_wq(struct qbman_pull_desc *d, u32 wqid,
3395 + enum qbman_pull_type_e dct)
3396 +{
3397 + d->verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;
3398 + d->verb |= qb_pull_dt_workqueue << QB_VDQCR_VERB_DT_SHIFT;
3399 + d->dq_src = cpu_to_le32(wqid);
3400 +}
3401 +
3402 +/**
3403 + * qbman_pull_desc_set_channel() - Set channelid from which the dequeue command
3404 + * dequeues
3405 + * @chid: the channel id to be dequeued
3406 + * @dct: the dequeue command type
3407 + */
3408 +void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, u32 chid,
3409 + enum qbman_pull_type_e dct)
3410 +{
3411 + d->verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;
3412 + d->verb |= qb_pull_dt_channel << QB_VDQCR_VERB_DT_SHIFT;
3413 + d->dq_src = cpu_to_le32(chid);
3414 +}
3415 +
3416 +/**
3417 + * qbman_swp_pull() - Issue the pull dequeue command
3418 + * @s: the software portal object
3419 + * @d: the software portal descriptor which has been configured with
3420 + * the set of qbman_pull_desc_set_*() calls
3421 + *
3422 + * Return 0 for success, and -EBUSY if the software portal is not ready
3423 + * to do pull dequeue.
3424 + */
3425 +int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
3426 +{
3427 + struct qbman_pull_desc *p;
3428 +
3429 + if (!atomic_dec_and_test(&s->vdq.available)) {
3430 + atomic_inc(&s->vdq.available);
3431 + return -EBUSY;
3432 + }
3433 + s->vdq.storage = (void *)d->rsp_addr_virt;
3434 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_VDQCR);
3435 + p->numf = d->numf;
3436 + p->tok = QMAN_DQ_TOKEN_VALID;
3437 + p->dq_src = d->dq_src;
3438 + p->rsp_addr = d->rsp_addr;
3439 + p->rsp_addr_virt = d->rsp_addr_virt;
3440 + dma_wmb();
3441 +
3442 + /* Set the verb byte, have to substitute in the valid-bit */
3443 + p->verb = d->verb | s->vdq.valid_bit;
3444 + s->vdq.valid_bit ^= QB_VALID_BIT;
3445 + dccvac(p);
3446 +
3447 + return 0;
3448 +}
3449 +
3450 +#define QMAN_DQRR_PI_MASK 0xf
3451 +
3452 +/**
3453 + * qbman_swp_dqrr_next() - Get an valid DQRR entry
3454 + * @s: the software portal object
3455 + *
3456 + * Return NULL if there are no unconsumed DQRR entries. Return a DQRR entry
3457 + * only once, so repeated calls can return a sequence of DQRR entries, without
3458 + * requiring they be consumed immediately or in any particular order.
3459 + */
3460 +const struct dpaa2_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
3461 +{
3462 + u32 verb;
3463 + u32 response_verb;
3464 + u32 flags;
3465 + struct dpaa2_dq *p;
3466 +
3467 + /* Before using valid-bit to detect if something is there, we have to
3468 + * handle the case of the DQRR reset bug...
3469 + */
3470 + if (unlikely(s->dqrr.reset_bug)) {
3471 + /*
3472 + * We pick up new entries by cache-inhibited producer index,
3473 + * which means that a non-coherent mapping would require us to
3474 + * invalidate and read *only* once that PI has indicated that
3475 + * there's an entry here. The first trip around the DQRR ring
3476 + * will be much less efficient than all subsequent trips around
3477 + * it...
3478 + */
3479 + u8 pi = qbman_read_register(s, QBMAN_CINH_SWP_DQPI) &
3480 + QMAN_DQRR_PI_MASK;
3481 +
3482 + /* there are new entries if pi != next_idx */
3483 + if (pi == s->dqrr.next_idx)
3484 + return NULL;
3485 +
3486 + /*
3487 + * if next_idx is/was the last ring index, and 'pi' is
3488 + * different, we can disable the workaround as all the ring
3489 + * entries have now been DMA'd to so valid-bit checking is
3490 + * repaired. Note: this logic needs to be based on next_idx
3491 + * (which increments one at a time), rather than on pi (which
3492 + * can burst and wrap-around between our snapshots of it).
3493 + */
3494 + if (s->dqrr.next_idx == (s->dqrr.dqrr_size - 1)) {
3495 + pr_debug("next_idx=%d, pi=%d, clear reset bug\n",
3496 + s->dqrr.next_idx, pi);
3497 + s->dqrr.reset_bug = 0;
3498 + }
3499 + qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
3500 + }
3501 +
3502 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
3503 + verb = p->dq.verb;
3504 +
3505 + /*
3506 + * If the valid-bit isn't of the expected polarity, nothing there. Note,
3507 + * in the DQRR reset bug workaround, we shouldn't need to skip these
3508 + * check, because we've already determined that a new entry is available
3509 + * and we've invalidated the cacheline before reading it, so the
3510 + * valid-bit behaviour is repaired and should tell us what we already
3511 + * knew from reading PI.
3512 + */
3513 + if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
3514 + qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
3515 + return NULL;
3516 + }
3517 + /*
3518 + * There's something there. Move "next_idx" attention to the next ring
3519 + * entry (and prefetch it) before returning what we found.
3520 + */
3521 + s->dqrr.next_idx++;
3522 + s->dqrr.next_idx &= s->dqrr.dqrr_size - 1; /* Wrap around */
3523 + if (!s->dqrr.next_idx)
3524 + s->dqrr.valid_bit ^= QB_VALID_BIT;
3525 +
3526 + /*
3527 + * If this is the final response to a volatile dequeue command
3528 + * indicate that the vdq is available
3529 + */
3530 + flags = p->dq.stat;
3531 + response_verb = verb & QBMAN_RESULT_MASK;
3532 + if ((response_verb == QBMAN_RESULT_DQ) &&
3533 + (flags & DPAA2_DQ_STAT_VOLATILE) &&
3534 + (flags & DPAA2_DQ_STAT_EXPIRED))
3535 + atomic_inc(&s->vdq.available);
3536 +
3537 + qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
3538 +
3539 + return p;
3540 +}
3541 +
3542 +/**
3543 + * qbman_swp_dqrr_consume() - Consume DQRR entries previously returned from
3544 + * qbman_swp_dqrr_next().
3545 + * @s: the software portal object
3546 + * @dq: the DQRR entry to be consumed
3547 + */
3548 +void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct dpaa2_dq *dq)
3549 +{
3550 + qbman_write_register(s, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
3551 +}
3552 +
3553 +/**
3554 + * qbman_result_has_new_result() - Check and get the dequeue response from the
3555 + * dq storage memory set in pull dequeue command
3556 + * @s: the software portal object
3557 + * @dq: the dequeue result read from the memory
3558 + *
3559 + * Return 1 for getting a valid dequeue result, or 0 for not getting a valid
3560 + * dequeue result.
3561 + *
3562 + * Only used for user-provided storage of dequeue results, not DQRR. For
3563 + * efficiency purposes, the driver will perform any required endianness
3564 + * conversion to ensure that the user's dequeue result storage is in host-endian
3565 + * format. As such, once the user has called qbman_result_has_new_result() and
3566 + * been returned a valid dequeue result, they should not call it again on
3567 + * the same memory location (except of course if another dequeue command has
3568 + * been executed to produce a new result to that location).
3569 + */
3570 +int qbman_result_has_new_result(struct qbman_swp *s, const struct dpaa2_dq *dq)
3571 +{
3572 + if (dq->dq.tok != QMAN_DQ_TOKEN_VALID)
3573 + return 0;
3574 +
3575 + /*
3576 + * Set token to be 0 so we will detect change back to 1
3577 + * next time the looping is traversed. Const is cast away here
3578 + * as we want users to treat the dequeue responses as read only.
3579 + */
3580 + ((struct dpaa2_dq *)dq)->dq.tok = 0;
3581 +
3582 + /*
3583 + * Determine whether VDQCR is available based on whether the
3584 + * current result is sitting in the first storage location of
3585 + * the busy command.
3586 + */
3587 + if (s->vdq.storage == dq) {
3588 + s->vdq.storage = NULL;
3589 + atomic_inc(&s->vdq.available);
3590 + }
3591 +
3592 + return 1;
3593 +}
3594 +
3595 +/**
3596 + * qbman_release_desc_clear() - Clear the contents of a descriptor to
3597 + * default/starting state.
3598 + */
3599 +void qbman_release_desc_clear(struct qbman_release_desc *d)
3600 +{
3601 + memset(d, 0, sizeof(*d));
3602 + d->verb = 1 << 5; /* Release Command Valid */
3603 +}
3604 +
3605 +/**
3606 + * qbman_release_desc_set_bpid() - Set the ID of the buffer pool to release to
3607 + */
3608 +void qbman_release_desc_set_bpid(struct qbman_release_desc *d, u16 bpid)
3609 +{
3610 + d->bpid = cpu_to_le16(bpid);
3611 +}
3612 +
3613 +/**
3614 + * qbman_release_desc_set_rcdi() - Determines whether or not the portal's RCDI
3615 + * interrupt source should be asserted after the release command is completed.
3616 + */
3617 +void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable)
3618 +{
3619 + if (enable)
3620 + d->verb |= 1 << 6;
3621 + else
3622 + d->verb &= ~(1 << 6);
3623 +}
3624 +
3625 +#define RAR_IDX(rar) ((rar) & 0x7)
3626 +#define RAR_VB(rar) ((rar) & 0x80)
3627 +#define RAR_SUCCESS(rar) ((rar) & 0x100)
3628 +
3629 +/**
3630 + * qbman_swp_release() - Issue a buffer release command
3631 + * @s: the software portal object
3632 + * @d: the release descriptor
3633 + * @buffers: a pointer pointing to the buffer address to be released
3634 + * @num_buffers: number of buffers to be released, must be less than 8
3635 + *
3636 + * Return 0 for success, -EBUSY if the release command ring is not ready.
3637 + */
3638 +int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
3639 + const u64 *buffers, unsigned int num_buffers)
3640 +{
3641 + int i;
3642 + struct qbman_release_desc *p;
3643 + u32 rar;
3644 +
3645 + if (!num_buffers || (num_buffers > 7))
3646 + return -EINVAL;
3647 +
3648 + rar = qbman_read_register(s, QBMAN_CINH_SWP_RAR);
3649 + if (!RAR_SUCCESS(rar))
3650 + return -EBUSY;
3651 +
3652 + /* Start the release command */
3653 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
3654 + /* Copy the caller's buffer pointers to the command */
3655 + for (i = 0; i < num_buffers; i++)
3656 + p->buf[i] = cpu_to_le64(buffers[i]);
3657 + p->bpid = d->bpid;
3658 +
3659 + /*
3660 + * Set the verb byte, have to substitute in the valid-bit and the number
3661 + * of buffers.
3662 + */
3663 + dma_wmb();
3664 + p->verb = d->verb | RAR_VB(rar) | num_buffers;
3665 + dccvac(p);
3666 +
3667 + return 0;
3668 +}
3669 +
3670 +struct qbman_acquire_desc {
3671 + u8 verb;
3672 + u8 reserved;
3673 + u16 bpid;
3674 + u8 num;
3675 + u8 reserved2[59];
3676 +};
3677 +
3678 +struct qbman_acquire_rslt {
3679 + u8 verb;
3680 + u8 rslt;
3681 + u16 reserved;
3682 + u8 num;
3683 + u8 reserved2[3];
3684 + u64 buf[7];
3685 +};
3686 +
3687 +/**
3688 + * qbman_swp_acquire() - Issue a buffer acquire command
3689 + * @s: the software portal object
3690 + * @bpid: the buffer pool index
3691 + * @buffers: a pointer pointing to the acquired buffer addresses
3692 + * @num_buffers: number of buffers to be acquired, must be less than 8
3693 + *
3694 + * Return 0 for success, or negative error code if the acquire command
3695 + * fails.
3696 + */
3697 +int qbman_swp_acquire(struct qbman_swp *s, u16 bpid, u64 *buffers,
3698 + unsigned int num_buffers)
3699 +{
3700 + struct qbman_acquire_desc *p;
3701 + struct qbman_acquire_rslt *r;
3702 + int i;
3703 +
3704 + if (!num_buffers || (num_buffers > 7))
3705 + return -EINVAL;
3706 +
3707 + /* Start the management command */
3708 + p = qbman_swp_mc_start(s);
3709 +
3710 + if (!p)
3711 + return -EBUSY;
3712 +
3713 + /* Encode the caller-provided attributes */
3714 + p->bpid = cpu_to_le16(bpid);
3715 + p->num = num_buffers;
3716 +
3717 + /* Complete the management command */
3718 + r = qbman_swp_mc_complete(s, p, QBMAN_MC_ACQUIRE);
3719 + if (unlikely(!r)) {
3720 + pr_err("qbman: acquire from BPID %d failed, no response\n",
3721 + bpid);
3722 + return -EIO;
3723 + }
3724 +
3725 + /* Decode the outcome */
3726 + WARN_ON((r->verb & 0x7f) != QBMAN_MC_ACQUIRE);
3727 +
3728 + /* Determine success or failure */
3729 + if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
3730 + pr_err("qbman: acquire from BPID 0x%x failed, code=0x%02x\n",
3731 + bpid, r->rslt);
3732 + return -EIO;
3733 + }
3734 +
3735 + WARN_ON(r->num > num_buffers);
3736 +
3737 + /* Copy the acquired buffers to the caller's array */
3738 + for (i = 0; i < r->num; i++)
3739 + buffers[i] = le64_to_cpu(r->buf[i]);
3740 +
3741 + return (int)r->num;
3742 +}
3743 +
3744 +struct qbman_alt_fq_state_desc {
3745 + u8 verb;
3746 + u8 reserved[3];
3747 + u32 fqid;
3748 + u8 reserved2[56];
3749 +};
3750 +
3751 +struct qbman_alt_fq_state_rslt {
3752 + u8 verb;
3753 + u8 rslt;
3754 + u8 reserved[62];
3755 +};
3756 +
3757 +#define ALT_FQ_FQID_MASK 0x00FFFFFF
3758 +
3759 +int qbman_swp_alt_fq_state(struct qbman_swp *s, u32 fqid,
3760 + u8 alt_fq_verb)
3761 +{
3762 + struct qbman_alt_fq_state_desc *p;
3763 + struct qbman_alt_fq_state_rslt *r;
3764 +
3765 + /* Start the management command */
3766 + p = qbman_swp_mc_start(s);
3767 + if (!p)
3768 + return -EBUSY;
3769 +
3770 + p->fqid = cpu_to_le32(fqid) & ALT_FQ_FQID_MASK;
3771 +
3772 + /* Complete the management command */
3773 + r = qbman_swp_mc_complete(s, p, alt_fq_verb);
3774 + if (unlikely(!r)) {
3775 + pr_err("qbman: mgmt cmd failed, no response (verb=0x%x)\n",
3776 + alt_fq_verb);
3777 + return -EIO;
3778 + }
3779 +
3780 + /* Decode the outcome */
3781 + WARN_ON((r->verb & QBMAN_RESULT_MASK) != alt_fq_verb);
3782 +
3783 + /* Determine success or failure */
3784 + if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
3785 + pr_err("qbman: ALT FQID %d failed: verb = 0x%08x code = 0x%02x\n",
3786 + fqid, r->verb, r->rslt);
3787 + return -EIO;
3788 + }
3789 +
3790 + return 0;
3791 +}
3792 +
3793 +struct qbman_cdan_ctrl_desc {
3794 + u8 verb;
3795 + u8 reserved;
3796 + u16 ch;
3797 + u8 we;
3798 + u8 ctrl;
3799 + u16 reserved2;
3800 + u64 cdan_ctx;
3801 + u8 reserved3[48];
3802 +
3803 +};
3804 +
3805 +struct qbman_cdan_ctrl_rslt {
3806 + u8 verb;
3807 + u8 rslt;
3808 + u16 ch;
3809 + u8 reserved[60];
3810 +};
3811 +
3812 +int qbman_swp_CDAN_set(struct qbman_swp *s, u16 channelid,
3813 + u8 we_mask, u8 cdan_en,
3814 + u64 ctx)
3815 +{
3816 + struct qbman_cdan_ctrl_desc *p = NULL;
3817 + struct qbman_cdan_ctrl_rslt *r = NULL;
3818 +
3819 + /* Start the management command */
3820 + p = qbman_swp_mc_start(s);
3821 + if (!p)
3822 + return -EBUSY;
3823 +
3824 + /* Encode the caller-provided attributes */
3825 + p->ch = cpu_to_le16(channelid);
3826 + p->we = we_mask;
3827 + if (cdan_en)
3828 + p->ctrl = 1;
3829 + else
3830 + p->ctrl = 0;
3831 + p->cdan_ctx = cpu_to_le64(ctx);
3832 +
3833 + /* Complete the management command */
3834 + r = qbman_swp_mc_complete(s, p, QBMAN_WQCHAN_CONFIGURE);
3835 + if (unlikely(!r)) {
3836 + pr_err("qbman: wqchan config failed, no response\n");
3837 + return -EIO;
3838 + }
3839 +
3840 + WARN_ON((r->verb & 0x7f) != QBMAN_WQCHAN_CONFIGURE);
3841 +
3842 + /* Determine success or failure */
3843 + if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
3844 + pr_err("qbman: CDAN cQID %d failed: code = 0x%02x\n",
3845 + channelid, r->rslt);
3846 + return -EIO;
3847 + }
3848 +
3849 + return 0;
3850 +}
3851 diff --git a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.h b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.h
3852 new file mode 100644
3853 index 00000000..4254034c
3854 --- /dev/null
3855 +++ b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.h
3856 @@ -0,0 +1,662 @@
3857 +/*
3858 + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
3859 + * Copyright 2016 NXP
3860 + *
3861 + * Redistribution and use in source and binary forms, with or without
3862 + * modification, are permitted provided that the following conditions are met:
3863 + * * Redistributions of source code must retain the above copyright
3864 + * notice, this list of conditions and the following disclaimer.
3865 + * * Redistributions in binary form must reproduce the above copyright
3866 + * notice, this list of conditions and the following disclaimer in the
3867 + * documentation and/or other materials provided with the distribution.
3868 + * * Neither the name of Freescale Semiconductor nor the
3869 + * names of its contributors may be used to endorse or promote products
3870 + * derived from this software without specific prior written permission.
3871 + *
3872 + * ALTERNATIVELY, this software may be distributed under the terms of the
3873 + * GNU General Public License ("GPL") as published by the Free Software
3874 + * Foundation, either version 2 of that License or (at your option) any
3875 + * later version.
3876 + *
3877 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
3878 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
3879 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
3880 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
3881 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
3882 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
3883 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
3884 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3885 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
3886 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3887 + */
3888 +#ifndef __FSL_QBMAN_PORTAL_H
3889 +#define __FSL_QBMAN_PORTAL_H
3890 +
3891 +#include "qbman_private.h"
3892 +#include "../../include/dpaa2-fd.h"
3893 +
3894 +struct dpaa2_dq;
3895 +struct qbman_swp;
3896 +
3897 +/* qbman software portal descriptor structure */
3898 +struct qbman_swp_desc {
3899 + void *cena_bar; /* Cache-enabled portal base address */
3900 + void *cinh_bar; /* Cache-inhibited portal base address */
3901 + u32 qman_version;
3902 +};
3903 +
3904 +#define QBMAN_SWP_INTERRUPT_EQRI 0x01
3905 +#define QBMAN_SWP_INTERRUPT_EQDI 0x02
3906 +#define QBMAN_SWP_INTERRUPT_DQRI 0x04
3907 +#define QBMAN_SWP_INTERRUPT_RCRI 0x08
3908 +#define QBMAN_SWP_INTERRUPT_RCDI 0x10
3909 +#define QBMAN_SWP_INTERRUPT_VDCI 0x20
3910 +
3911 +/* the structure for pull dequeue descriptor */
3912 +struct qbman_pull_desc {
3913 + u8 verb;
3914 + u8 numf;
3915 + u8 tok;
3916 + u8 reserved;
3917 + u32 dq_src;
3918 + u64 rsp_addr;
3919 + u64 rsp_addr_virt;
3920 + u8 padding[40];
3921 +};
3922 +
3923 +enum qbman_pull_type_e {
3924 + /* dequeue with priority precedence, respect intra-class scheduling */
3925 + qbman_pull_type_prio = 1,
3926 + /* dequeue with active FQ precedence, respect ICS */
3927 + qbman_pull_type_active,
3928 + /* dequeue with active FQ precedence, no ICS */
3929 + qbman_pull_type_active_noics
3930 +};
3931 +
3932 +/* Definitions for parsing dequeue entries */
3933 +#define QBMAN_RESULT_MASK 0x7f
3934 +#define QBMAN_RESULT_DQ 0x60
3935 +#define QBMAN_RESULT_FQRN 0x21
3936 +#define QBMAN_RESULT_FQRNI 0x22
3937 +#define QBMAN_RESULT_FQPN 0x24
3938 +#define QBMAN_RESULT_FQDAN 0x25
3939 +#define QBMAN_RESULT_CDAN 0x26
3940 +#define QBMAN_RESULT_CSCN_MEM 0x27
3941 +#define QBMAN_RESULT_CGCU 0x28
3942 +#define QBMAN_RESULT_BPSCN 0x29
3943 +#define QBMAN_RESULT_CSCN_WQ 0x2a
3944 +
3945 +/* QBMan FQ management command codes */
3946 +#define QBMAN_FQ_SCHEDULE 0x48
3947 +#define QBMAN_FQ_FORCE 0x49
3948 +#define QBMAN_FQ_XON 0x4d
3949 +#define QBMAN_FQ_XOFF 0x4e
3950 +
3951 +/* structure of enqueue descriptor */
3952 +struct qbman_eq_desc {
3953 + u8 verb;
3954 + u8 dca;
3955 + u16 seqnum;
3956 + u16 orpid;
3957 + u16 reserved1;
3958 + u32 tgtid;
3959 + u32 tag;
3960 + u16 qdbin;
3961 + u8 qpri;
3962 + u8 reserved[3];
3963 + u8 wae;
3964 + u8 rspid;
3965 + u64 rsp_addr;
3966 + u8 fd[32];
3967 +};
3968 +
3969 +/* buffer release descriptor */
3970 +struct qbman_release_desc {
3971 + u8 verb;
3972 + u8 reserved;
3973 + u16 bpid;
3974 + u32 reserved2;
3975 + u64 buf[7];
3976 +};
3977 +
3978 +/* Management command result codes */
3979 +#define QBMAN_MC_RSLT_OK 0xf0
3980 +
3981 +#define CODE_CDAN_WE_EN 0x1
3982 +#define CODE_CDAN_WE_CTX 0x4
3983 +
3984 +/* portal data structure */
3985 +struct qbman_swp {
3986 + const struct qbman_swp_desc *desc;
3987 + void __iomem *addr_cena;
3988 + void __iomem *addr_cinh;
3989 +
3990 + /* Management commands */
3991 + struct {
3992 + u32 valid_bit; /* 0x00 or 0x80 */
3993 + } mc;
3994 +
3995 + /* Push dequeues */
3996 + u32 sdq;
3997 +
3998 + /* Volatile dequeues */
3999 + struct {
4000 + atomic_t available; /* indicates if a command can be sent */
4001 + u32 valid_bit; /* 0x00 or 0x80 */
4002 + struct dpaa2_dq *storage; /* NULL if DQRR */
4003 + } vdq;
4004 +
4005 + /* DQRR */
4006 + struct {
4007 + u32 next_idx;
4008 + u32 valid_bit;
4009 + u8 dqrr_size;
4010 + int reset_bug; /* indicates dqrr reset workaround is needed */
4011 + } dqrr;
4012 +};
4013 +
4014 +struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d);
4015 +void qbman_swp_finish(struct qbman_swp *p);
4016 +u32 qbman_swp_interrupt_read_status(struct qbman_swp *p);
4017 +void qbman_swp_interrupt_clear_status(struct qbman_swp *p, u32 mask);
4018 +u32 qbman_swp_interrupt_get_trigger(struct qbman_swp *p);
4019 +void qbman_swp_interrupt_set_trigger(struct qbman_swp *p, u32 mask);
4020 +int qbman_swp_interrupt_get_inhibit(struct qbman_swp *p);
4021 +void qbman_swp_interrupt_set_inhibit(struct qbman_swp *p, int inhibit);
4022 +
4023 +void qbman_swp_push_get(struct qbman_swp *p, u8 channel_idx, int *enabled);
4024 +void qbman_swp_push_set(struct qbman_swp *p, u8 channel_idx, int enable);
4025 +
4026 +void qbman_pull_desc_clear(struct qbman_pull_desc *d);
4027 +void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
4028 + struct dpaa2_dq *storage,
4029 + dma_addr_t storage_phys,
4030 + int stash);
4031 +void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, u8 numframes);
4032 +void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, u32 fqid);
4033 +void qbman_pull_desc_set_wq(struct qbman_pull_desc *d, u32 wqid,
4034 + enum qbman_pull_type_e dct);
4035 +void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, u32 chid,
4036 + enum qbman_pull_type_e dct);
4037 +
4038 +int qbman_swp_pull(struct qbman_swp *p, struct qbman_pull_desc *d);
4039 +
4040 +const struct dpaa2_dq *qbman_swp_dqrr_next(struct qbman_swp *s);
4041 +void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct dpaa2_dq *dq);
4042 +
4043 +int qbman_result_has_new_result(struct qbman_swp *p, const struct dpaa2_dq *dq);
4044 +
4045 +void qbman_eq_desc_clear(struct qbman_eq_desc *d);
4046 +void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success);
4047 +void qbman_eq_desc_set_token(struct qbman_eq_desc *d, u8 token);
4048 +void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, u32 fqid);
4049 +void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, u32 qdid,
4050 + u32 qd_bin, u32 qd_prio);
4051 +
4052 +int qbman_swp_enqueue(struct qbman_swp *p, const struct qbman_eq_desc *d,
4053 + const struct dpaa2_fd *fd);
4054 +
4055 +void qbman_release_desc_clear(struct qbman_release_desc *d);
4056 +void qbman_release_desc_set_bpid(struct qbman_release_desc *d, u16 bpid);
4057 +void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable);
4058 +
4059 +int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
4060 + const u64 *buffers, unsigned int num_buffers);
4061 +int qbman_swp_acquire(struct qbman_swp *s, u16 bpid, u64 *buffers,
4062 + unsigned int num_buffers);
4063 +int qbman_swp_alt_fq_state(struct qbman_swp *s, u32 fqid,
4064 + u8 alt_fq_verb);
4065 +int qbman_swp_CDAN_set(struct qbman_swp *s, u16 channelid,
4066 + u8 we_mask, u8 cdan_en,
4067 + u64 ctx);
4068 +
4069 +void *qbman_swp_mc_start(struct qbman_swp *p);
4070 +void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, u8 cmd_verb);
4071 +void *qbman_swp_mc_result(struct qbman_swp *p);
4072 +
4073 +/**
4074 + * qbman_result_is_DQ() - check if the dequeue result is a dequeue response
4075 + * @dq: the dequeue result to be checked
4076 + *
4077 + * DQRR entries may contain non-dequeue results, ie. notifications
4078 + */
4079 +static inline int qbman_result_is_DQ(const struct dpaa2_dq *dq)
4080 +{
4081 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_DQ);
4082 +}
4083 +
4084 +/**
4085 + * qbman_result_is_SCN() - Check the dequeue result is notification or not
4086 + * @dq: the dequeue result to be checked
4087 + *
4088 + */
4089 +static inline int qbman_result_is_SCN(const struct dpaa2_dq *dq)
4090 +{
4091 + return !qbman_result_is_DQ(dq);
4092 +}
4093 +
4094 +/* FQ Data Availability */
4095 +static inline int qbman_result_is_FQDAN(const struct dpaa2_dq *dq)
4096 +{
4097 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_FQDAN);
4098 +}
4099 +
4100 +/* Channel Data Availability */
4101 +static inline int qbman_result_is_CDAN(const struct dpaa2_dq *dq)
4102 +{
4103 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_CDAN);
4104 +}
4105 +
4106 +/* Congestion State Change */
4107 +static inline int qbman_result_is_CSCN(const struct dpaa2_dq *dq)
4108 +{
4109 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_CSCN_WQ);
4110 +}
4111 +
4112 +/* Buffer Pool State Change */
4113 +static inline int qbman_result_is_BPSCN(const struct dpaa2_dq *dq)
4114 +{
4115 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_BPSCN);
4116 +}
4117 +
4118 +/* Congestion Group Count Update */
4119 +static inline int qbman_result_is_CGCU(const struct dpaa2_dq *dq)
4120 +{
4121 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_CGCU);
4122 +}
4123 +
4124 +/* Retirement */
4125 +static inline int qbman_result_is_FQRN(const struct dpaa2_dq *dq)
4126 +{
4127 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_FQRN);
4128 +}
4129 +
4130 +/* Retirement Immediate */
4131 +static inline int qbman_result_is_FQRNI(const struct dpaa2_dq *dq)
4132 +{
4133 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_FQRNI);
4134 +}
4135 +
4136 + /* Park */
4137 +static inline int qbman_result_is_FQPN(const struct dpaa2_dq *dq)
4138 +{
4139 + return ((dq->dq.verb & QBMAN_RESULT_MASK) == QBMAN_RESULT_FQPN);
4140 +}
4141 +
4142 +/**
4143 + * qbman_result_SCN_state() - Get the state field in State-change notification
4144 + */
4145 +static inline u8 qbman_result_SCN_state(const struct dpaa2_dq *scn)
4146 +{
4147 + return scn->scn.state;
4148 +}
4149 +
4150 +#define SCN_RID_MASK 0x00FFFFFF
4151 +
4152 +/**
4153 + * qbman_result_SCN_rid() - Get the resource id in State-change notification
4154 + */
4155 +static inline u32 qbman_result_SCN_rid(const struct dpaa2_dq *scn)
4156 +{
4157 + return le32_to_cpu(scn->scn.rid_tok) & SCN_RID_MASK;
4158 +}
4159 +
4160 +/**
4161 + * qbman_result_SCN_ctx() - Get the context data in State-change notification
4162 + */
4163 +static inline u64 qbman_result_SCN_ctx(const struct dpaa2_dq *scn)
4164 +{
4165 + return le64_to_cpu(scn->scn.ctx);
4166 +}
4167 +
4168 +/**
4169 + * qbman_swp_fq_schedule() - Move the fq to the scheduled state
4170 + * @s: the software portal object
4171 + * @fqid: the index of frame queue to be scheduled
4172 + *
4173 + * There are a couple of different ways that a FQ can end up parked state,
4174 + * This schedules it.
4175 + *
4176 + * Return 0 for success, or negative error code for failure.
4177 + */
4178 +static inline int qbman_swp_fq_schedule(struct qbman_swp *s, u32 fqid)
4179 +{
4180 + return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_SCHEDULE);
4181 +}
4182 +
4183 +/**
4184 + * qbman_swp_fq_force() - Force the FQ to fully scheduled state
4185 + * @s: the software portal object
4186 + * @fqid: the index of frame queue to be forced
4187 + *
4188 + * Force eligible will force a tentatively-scheduled FQ to be fully-scheduled
4189 + * and thus be available for selection by any channel-dequeuing behaviour (push
4190 + * or pull). If the FQ is subsequently "dequeued" from the channel and is still
4191 + * empty at the time this happens, the resulting dq_entry will have no FD.
4192 + * (qbman_result_DQ_fd() will return NULL.)
4193 + *
4194 + * Return 0 for success, or negative error code for failure.
4195 + */
4196 +static inline int qbman_swp_fq_force(struct qbman_swp *s, u32 fqid)
4197 +{
4198 + return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_FORCE);
4199 +}
4200 +
4201 +/**
4202 + * qbman_swp_fq_xon() - sets FQ flow-control to XON
4203 + * @s: the software portal object
4204 + * @fqid: the index of frame queue
4205 + *
4206 + * This setting doesn't affect enqueues to the FQ, just dequeues.
4207 + *
4208 + * Return 0 for success, or negative error code for failure.
4209 + */
4210 +static inline int qbman_swp_fq_xon(struct qbman_swp *s, u32 fqid)
4211 +{
4212 + return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_XON);
4213 +}
4214 +
4215 +/**
4216 + * qbman_swp_fq_xoff() - sets FQ flow-control to XOFF
4217 + * @s: the software portal object
4218 + * @fqid: the index of frame queue
4219 + *
4220 + * This setting doesn't affect enqueues to the FQ, just dequeues.
4221 + * XOFF FQs will remain in the tenatively-scheduled state, even when
4222 + * non-empty, meaning they won't be selected for scheduled dequeuing.
4223 + * If a FQ is changed to XOFF after it had already become truly-scheduled
4224 + * to a channel, and a pull dequeue of that channel occurs that selects
4225 + * that FQ for dequeuing, then the resulting dq_entry will have no FD.
4226 + * (qbman_result_DQ_fd() will return NULL.)
4227 + *
4228 + * Return 0 for success, or negative error code for failure.
4229 + */
4230 +static inline int qbman_swp_fq_xoff(struct qbman_swp *s, u32 fqid)
4231 +{
4232 + return qbman_swp_alt_fq_state(s, fqid, QBMAN_FQ_XOFF);
4233 +}
4234 +
4235 +/* If the user has been allocated a channel object that is going to generate
4236 + * CDANs to another channel, then the qbman_swp_CDAN* functions will be
4237 + * necessary.
4238 + *
4239 + * CDAN-enabled channels only generate a single CDAN notification, after which
4240 + * they need to be reenabled before they'll generate another. The idea is
4241 + * that pull dequeuing will occur in reaction to the CDAN, followed by a
4242 + * reenable step. Each function generates a distinct command to hardware, so a
4243 + * combination function is provided if the user wishes to modify the "context"
4244 + * (which shows up in each CDAN message) each time they reenable, as a single
4245 + * command to hardware.
4246 + */
4247 +
4248 +/**
4249 + * qbman_swp_CDAN_set_context() - Set CDAN context
4250 + * @s: the software portal object
4251 + * @channelid: the channel index
4252 + * @ctx: the context to be set in CDAN
4253 + *
4254 + * Return 0 for success, or negative error code for failure.
4255 + */
4256 +static inline int qbman_swp_CDAN_set_context(struct qbman_swp *s, u16 channelid,
4257 + u64 ctx)
4258 +{
4259 + return qbman_swp_CDAN_set(s, channelid,
4260 + CODE_CDAN_WE_CTX,
4261 + 0, ctx);
4262 +}
4263 +
4264 +/**
4265 + * qbman_swp_CDAN_enable() - Enable CDAN for the channel
4266 + * @s: the software portal object
4267 + * @channelid: the index of the channel to generate CDAN
4268 + *
4269 + * Return 0 for success, or negative error code for failure.
4270 + */
4271 +static inline int qbman_swp_CDAN_enable(struct qbman_swp *s, u16 channelid)
4272 +{
4273 + return qbman_swp_CDAN_set(s, channelid,
4274 + CODE_CDAN_WE_EN,
4275 + 1, 0);
4276 +}
4277 +
4278 +/**
4279 + * qbman_swp_CDAN_disable() - disable CDAN for the channel
4280 + * @s: the software portal object
4281 + * @channelid: the index of the channel to generate CDAN
4282 + *
4283 + * Return 0 for success, or negative error code for failure.
4284 + */
4285 +static inline int qbman_swp_CDAN_disable(struct qbman_swp *s, u16 channelid)
4286 +{
4287 + return qbman_swp_CDAN_set(s, channelid,
4288 + CODE_CDAN_WE_EN,
4289 + 0, 0);
4290 +}
4291 +
4292 +/**
4293 + * qbman_swp_CDAN_set_context_enable() - Set CDAN contest and enable CDAN
4294 + * @s: the software portal object
4295 + * @channelid: the index of the channel to generate CDAN
4296 + * @ctx:i the context set in CDAN
4297 + *
4298 + * Return 0 for success, or negative error code for failure.
4299 + */
4300 +static inline int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s,
4301 + u16 channelid,
4302 + u64 ctx)
4303 +{
4304 + return qbman_swp_CDAN_set(s, channelid,
4305 + CODE_CDAN_WE_EN | CODE_CDAN_WE_CTX,
4306 + 1, ctx);
4307 +}
4308 +
4309 +/* Wraps up submit + poll-for-result */
4310 +static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
4311 + u8 cmd_verb)
4312 +{
4313 + int loopvar = 1000;
4314 +
4315 + qbman_swp_mc_submit(swp, cmd, cmd_verb);
4316 +
4317 + do {
4318 + cmd = qbman_swp_mc_result(swp);
4319 + } while (!cmd && loopvar--);
4320 +
4321 + WARN_ON(!loopvar);
4322 +
4323 + return cmd;
4324 +}
4325 +
4326 +/* ------------ */
4327 +/* qb_attr_code */
4328 +/* ------------ */
4329 +
4330 +/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
4331 + * is either serving as a configuration command or a query result. The
4332 + * representation is inherently little-endian, as the indexing of the words is
4333 + * itself little-endian in nature and layerscape is little endian for anything
4334 + * that crosses a word boundary too (64-bit fields are the obvious examples).
4335 + */
4336 +struct qb_attr_code {
4337 + unsigned int word; /* which u32[] array member encodes the field */
4338 + unsigned int lsoffset; /* encoding offset from ls-bit */
4339 + unsigned int width; /* encoding width. (bool must be 1.) */
4340 +};
4341 +
4342 +/* Some pre-defined codes */
4343 +extern struct qb_attr_code code_generic_verb;
4344 +extern struct qb_attr_code code_generic_rslt;
4345 +
4346 +/* Macros to define codes */
4347 +#define QB_CODE(a, b, c) { a, b, c}
4348 +#define QB_CODE_NULL \
4349 + QB_CODE((unsigned int)-1, (unsigned int)-1, (unsigned int)-1)
4350 +
4351 +/* Rotate a code "ms", meaning that it moves from less-significant bytes to
4352 + * more-significant, from less-significant words to more-significant, etc. The
4353 + * "ls" version does the inverse, from more-significant towards
4354 + * less-significant.
4355 + */
4356 +static inline void qb_attr_code_rotate_ms(struct qb_attr_code *code,
4357 + unsigned int bits)
4358 +{
4359 + code->lsoffset += bits;
4360 + while (code->lsoffset > 31) {
4361 + code->word++;
4362 + code->lsoffset -= 32;
4363 + }
4364 +}
4365 +
4366 +static inline void qb_attr_code_rotate_ls(struct qb_attr_code *code,
4367 + unsigned int bits)
4368 +{
4369 + /* Don't be fooled, this trick should work because the types are
4370 + * unsigned. So the case that interests the while loop (the rotate has
4371 + * gone too far and the word count needs to compensate for it), is
4372 + * manifested when lsoffset is negative. But that equates to a really
4373 + * large unsigned value, starting with lots of "F"s. As such, we can
4374 + * continue adding 32 back to it until it wraps back round above zero,
4375 + * to a value of 31 or less...
4376 + */
4377 + code->lsoffset -= bits;
4378 + while (code->lsoffset > 31) {
4379 + code->word--;
4380 + code->lsoffset += 32;
4381 + }
4382 +}
4383 +
4384 +/* Implement a loop of code rotations until 'expr' evaluates to FALSE (0). */
4385 +#define qb_attr_code_for_ms(code, bits, expr) \
4386 + for (; expr; qb_attr_code_rotate_ms(code, bits))
4387 +#define qb_attr_code_for_ls(code, bits, expr) \
4388 + for (; expr; qb_attr_code_rotate_ls(code, bits))
4389 +
4390 +static inline void word_copy(void *d, const void *s, unsigned int cnt)
4391 +{
4392 + u32 *dd = d;
4393 + const u32 *ss = s;
4394 +
4395 + while (cnt--)
4396 + *(dd++) = *(ss++);
4397 +}
4398 +
4399 +/*
4400 + * Currently, the CENA support code expects each 32-bit word to be written in
4401 + * host order, and these are converted to hardware (little-endian) order on
4402 + * command submission. However, 64-bit quantities are must be written (and read)
4403 + * as two 32-bit words with the least-significant word first, irrespective of
4404 + * host endianness.
4405 + */
4406 +static inline void u64_to_le32_copy(void *d, const u64 *s,
4407 + unsigned int cnt)
4408 +{
4409 + u32 *dd = d;
4410 + const u32 *ss = (const u32 *)s;
4411 +
4412 + while (cnt--) {
4413 + /*
4414 + * TBD: the toolchain was choking on the use of 64-bit types up
4415 + * until recently so this works entirely with 32-bit variables.
4416 + * When 64-bit types become usable again, investigate better
4417 + * ways of doing this.
4418 + */
4419 +#if defined(__BIG_ENDIAN)
4420 + *(dd++) = ss[1];
4421 + *(dd++) = ss[0];
4422 + ss += 2;
4423 +#else
4424 + *(dd++) = *(ss++);
4425 + *(dd++) = *(ss++);
4426 +#endif
4427 + }
4428 +}
4429 +
4430 +static inline void u64_from_le32_copy(u64 *d, const void *s,
4431 + unsigned int cnt)
4432 +{
4433 + const u32 *ss = s;
4434 + u32 *dd = (u32 *)d;
4435 +
4436 + while (cnt--) {
4437 +#if defined(__BIG_ENDIAN)
4438 + dd[1] = *(ss++);
4439 + dd[0] = *(ss++);
4440 + dd += 2;
4441 +#else
4442 + *(dd++) = *(ss++);
4443 + *(dd++) = *(ss++);
4444 +#endif
4445 + }
4446 +}
4447 +
4448 +/* decode a field from a cacheline */
4449 +static inline u32 qb_attr_code_decode(const struct qb_attr_code *code,
4450 + const u32 *cacheline)
4451 +{
4452 + return d32_u32(code->lsoffset, code->width, cacheline[code->word]);
4453 +}
4454 +
4455 +static inline u64 qb_attr_code_decode_64(const struct qb_attr_code *code,
4456 + const u64 *cacheline)
4457 +{
4458 + u64 res;
4459 +
4460 + u64_from_le32_copy(&res, &cacheline[code->word / 2], 1);
4461 + return res;
4462 +}
4463 +
4464 +/* encode a field to a cacheline */
4465 +static inline void qb_attr_code_encode(const struct qb_attr_code *code,
4466 + u32 *cacheline, u32 val)
4467 +{
4468 + cacheline[code->word] =
4469 + r32_u32(code->lsoffset, code->width, cacheline[code->word])
4470 + | e32_u32(code->lsoffset, code->width, val);
4471 +}
4472 +
4473 +static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
4474 + u64 *cacheline, u64 val)
4475 +{
4476 + u64_to_le32_copy(&cacheline[code->word / 2], &val, 1);
4477 +}
4478 +
4479 +/* Small-width signed values (two's-complement) will decode into medium-width
4480 + * positives. (Eg. for an 8-bit signed field, which stores values from -128 to
4481 + * +127, a setting of -7 would appear to decode to the 32-bit unsigned value
4482 + * 249. Likewise -120 would decode as 136.) This function allows the caller to
4483 + * "re-sign" such fields to 32-bit signed. (Eg. -7, which was 249 with an 8-bit
4484 + * encoding, will become 0xfffffff9 if you cast the return value to u32).
4485 + */
4486 +static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,
4487 + u32 val)
4488 +{
4489 + WARN_ON(val >= (1 << code->width));
4490 + /* If the high bit was set, it was encoding a negative */
4491 + if (val >= (1 << (code->width - 1)))
4492 + return (int32_t)0 - (int32_t)(((u32)1 << code->width) -
4493 + val);
4494 + /* Otherwise, it was encoding a positive */
4495 + return (int32_t)val;
4496 +}
4497 +
4498 +/* ---------------------- */
4499 +/* Descriptors/cachelines */
4500 +/* ---------------------- */
4501 +
4502 +/* To avoid needless dynamic allocation, the driver API often gives the caller
4503 + * a "descriptor" type that the caller can instantiate however they like.
4504 + * Ultimately though, it is just a cacheline of binary storage (or something
4505 + * smaller when it is known that the descriptor doesn't need all 64 bytes) for
4506 + * holding pre-formatted pieces of hardware commands. The performance-critical
4507 + * code can then copy these descriptors directly into hardware command
4508 + * registers more efficiently than trying to construct/format commands
4509 + * on-the-fly. The API user sees the descriptor as an array of 32-bit words in
4510 + * order for the compiler to know its size, but the internal details are not
4511 + * exposed. The following macro is used within the driver for converting *any*
4512 + * descriptor pointer to a usable array pointer. The use of a macro (instead of
4513 + * an inline) is necessary to work with different descriptor types and to work
4514 + * correctly with const and non-const inputs (and similarly-qualified outputs).
4515 + */
4516 +#define qb_cl(d) (&(d)->dont_manipulate_directly[0])
4517 +
4518 +#endif /* __FSL_QBMAN_PORTAL_H */
4519 diff --git a/drivers/staging/fsl-mc/bus/dpio/qbman_debug.c b/drivers/staging/fsl-mc/bus/dpio/qbman_debug.c
4520 new file mode 100644
4521 index 00000000..1c77fa6a
4522 --- /dev/null
4523 +++ b/drivers/staging/fsl-mc/bus/dpio/qbman_debug.c
4524 @@ -0,0 +1,853 @@
4525 +/* Copyright (C) 2015 Freescale Semiconductor, Inc.
4526 + *
4527 + * Redistribution and use in source and binary forms, with or without
4528 + * modification, are permitted provided that the following conditions are met:
4529 + * * Redistributions of source code must retain the above copyright
4530 + * notice, this list of conditions and the following disclaimer.
4531 + * * Redistributions in binary form must reproduce the above copyright
4532 + * notice, this list of conditions and the following disclaimer in the
4533 + * documentation and/or other materials provided with the distribution.
4534 + * * Neither the name of Freescale Semiconductor nor the
4535 + * names of its contributors may be used to endorse or promote products
4536 + * derived from this software without specific prior written permission.
4537 + *
4538 + *
4539 + * ALTERNATIVELY, this software may be distributed under the terms of the
4540 + * GNU General Public License ("GPL") as published by the Free Software
4541 + * Foundation, either version 2 of that License or (at your option) any
4542 + * later version.
4543 + *
4544 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
4545 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
4546 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
4547 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
4548 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
4549 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
4550 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
4551 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4552 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
4553 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4554 + */
4555 +
4556 +#include <linux/errno.h>
4557 +
4558 +#include "../../include/dpaa2-global.h"
4559 +#include "qbman-portal.h"
4560 +#include "qbman_debug.h"
4561 +
4562 +/* QBMan portal management command code */
4563 +#define QBMAN_BP_QUERY 0x32
4564 +#define QBMAN_FQ_QUERY 0x44
4565 +#define QBMAN_FQ_QUERY_NP 0x45
4566 +#define QBMAN_CGR_QUERY 0x51
4567 +#define QBMAN_WRED_QUERY 0x54
4568 +#define QBMAN_CGR_STAT_QUERY 0x55
4569 +#define QBMAN_CGR_STAT_QUERY_CLR 0x56
4570 +
4571 +enum qbman_attr_usage_e {
4572 + qbman_attr_usage_fq,
4573 + qbman_attr_usage_bpool,
4574 + qbman_attr_usage_cgr,
4575 +};
4576 +
4577 +struct int_qbman_attr {
4578 + u32 words[32];
4579 + enum qbman_attr_usage_e usage;
4580 +};
4581 +
4582 +#define attr_type_set(a, e) \
4583 +{ \
4584 + struct qbman_attr *__attr = a; \
4585 + enum qbman_attr_usage_e __usage = e; \
4586 + ((struct int_qbman_attr *)__attr)->usage = __usage; \
4587 +}
4588 +
4589 +#define ATTR32(d) (&(d)->dont_manipulate_directly[0])
4590 +#define ATTR32_1(d) (&(d)->dont_manipulate_directly[16])
4591 +
4592 +static struct qb_attr_code code_bp_bpid = QB_CODE(0, 16, 16);
4593 +static struct qb_attr_code code_bp_bdi = QB_CODE(1, 16, 1);
4594 +static struct qb_attr_code code_bp_va = QB_CODE(1, 17, 1);
4595 +static struct qb_attr_code code_bp_wae = QB_CODE(1, 18, 1);
4596 +static struct qb_attr_code code_bp_swdet = QB_CODE(4, 0, 16);
4597 +static struct qb_attr_code code_bp_swdxt = QB_CODE(4, 16, 16);
4598 +static struct qb_attr_code code_bp_hwdet = QB_CODE(5, 0, 16);
4599 +static struct qb_attr_code code_bp_hwdxt = QB_CODE(5, 16, 16);
4600 +static struct qb_attr_code code_bp_swset = QB_CODE(6, 0, 16);
4601 +static struct qb_attr_code code_bp_swsxt = QB_CODE(6, 16, 16);
4602 +static struct qb_attr_code code_bp_vbpid = QB_CODE(7, 0, 14);
4603 +static struct qb_attr_code code_bp_icid = QB_CODE(7, 16, 15);
4604 +static struct qb_attr_code code_bp_pl = QB_CODE(7, 31, 1);
4605 +static struct qb_attr_code code_bp_bpscn_addr_lo = QB_CODE(8, 0, 32);
4606 +static struct qb_attr_code code_bp_bpscn_addr_hi = QB_CODE(9, 0, 32);
4607 +static struct qb_attr_code code_bp_bpscn_ctx_lo = QB_CODE(10, 0, 32);
4608 +static struct qb_attr_code code_bp_bpscn_ctx_hi = QB_CODE(11, 0, 32);
4609 +static struct qb_attr_code code_bp_hw_targ = QB_CODE(12, 0, 16);
4610 +static struct qb_attr_code code_bp_state = QB_CODE(1, 24, 3);
4611 +static struct qb_attr_code code_bp_fill = QB_CODE(2, 0, 32);
4612 +static struct qb_attr_code code_bp_hdptr = QB_CODE(3, 0, 32);
4613 +static struct qb_attr_code code_bp_sdcnt = QB_CODE(13, 0, 8);
4614 +static struct qb_attr_code code_bp_hdcnt = QB_CODE(13, 1, 8);
4615 +static struct qb_attr_code code_bp_sscnt = QB_CODE(13, 2, 8);
4616 +
4617 +void qbman_bp_attr_clear(struct qbman_attr *a)
4618 +{
4619 + memset(a, 0, sizeof(*a));
4620 + attr_type_set(a, qbman_attr_usage_bpool);
4621 +}
4622 +
4623 +int qbman_bp_query(struct qbman_swp *s, u32 bpid,
4624 + struct qbman_attr *a)
4625 +{
4626 + u32 *p;
4627 + u32 verb, rslt;
4628 + u32 *attr = ATTR32(a);
4629 +
4630 + qbman_bp_attr_clear(a);
4631 +
4632 + /* Start the management command */
4633 + p = qbman_swp_mc_start(s);
4634 + if (!p)
4635 + return -EBUSY;
4636 +
4637 + /* Encode the caller-provided attributes */
4638 + qb_attr_code_encode(&code_bp_bpid, p, bpid);
4639 +
4640 + /* Complete the management command */
4641 + p = qbman_swp_mc_complete(s, p, QBMAN_BP_QUERY);
4642 +
4643 + /* Decode the outcome */
4644 + verb = qb_attr_code_decode(&code_generic_verb, p);
4645 + rslt = qb_attr_code_decode(&code_generic_rslt, p);
4646 + WARN_ON(verb != QBMAN_BP_QUERY);
4647 +
4648 + /* Determine success or failure */
4649 + if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
4650 + pr_err("Query of BPID 0x%x failed, code=0x%02x\n", bpid, rslt);
4651 + return -EIO;
4652 + }
4653 +
4654 + /* For the query, word[0] of the result contains only the
4655 + * verb/rslt fields, so skip word[0].
4656 + */
4657 + word_copy(&attr[1], &p[1], 15);
4658 + return 0;
4659 +}
4660 +
4661 +void qbman_bp_attr_get_bdi(struct qbman_attr *a, int *bdi, int *va, int *wae)
4662 +{
4663 + u32 *p = ATTR32(a);
4664 +
4665 + *bdi = !!qb_attr_code_decode(&code_bp_bdi, p);
4666 + *va = !!qb_attr_code_decode(&code_bp_va, p);
4667 + *wae = !!qb_attr_code_decode(&code_bp_wae, p);
4668 +}
4669 +
4670 +static u32 qbman_bp_thresh_to_value(u32 val)
4671 +{
4672 + return (val & 0xff) << ((val & 0xf00) >> 8);
4673 +}
4674 +
4675 +void qbman_bp_attr_get_swdet(struct qbman_attr *a, u32 *swdet)
4676 +{
4677 + u32 *p = ATTR32(a);
4678 +
4679 + *swdet = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swdet,
4680 + p));
4681 +}
4682 +
4683 +void qbman_bp_attr_get_swdxt(struct qbman_attr *a, u32 *swdxt)
4684 +{
4685 + u32 *p = ATTR32(a);
4686 +
4687 + *swdxt = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swdxt,
4688 + p));
4689 +}
4690 +
4691 +void qbman_bp_attr_get_hwdet(struct qbman_attr *a, u32 *hwdet)
4692 +{
4693 + u32 *p = ATTR32(a);
4694 +
4695 + *hwdet = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_hwdet,
4696 + p));
4697 +}
4698 +
4699 +void qbman_bp_attr_get_hwdxt(struct qbman_attr *a, u32 *hwdxt)
4700 +{
4701 + u32 *p = ATTR32(a);
4702 +
4703 + *hwdxt = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_hwdxt,
4704 + p));
4705 +}
4706 +
4707 +void qbman_bp_attr_get_swset(struct qbman_attr *a, u32 *swset)
4708 +{
4709 + u32 *p = ATTR32(a);
4710 +
4711 + *swset = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swset,
4712 + p));
4713 +}
4714 +
4715 +void qbman_bp_attr_get_swsxt(struct qbman_attr *a, u32 *swsxt)
4716 +{
4717 + u32 *p = ATTR32(a);
4718 +
4719 + *swsxt = qbman_bp_thresh_to_value(qb_attr_code_decode(&code_bp_swsxt,
4720 + p));
4721 +}
4722 +
4723 +void qbman_bp_attr_get_vbpid(struct qbman_attr *a, u32 *vbpid)
4724 +{
4725 + u32 *p = ATTR32(a);
4726 +
4727 + *vbpid = qb_attr_code_decode(&code_bp_vbpid, p);
4728 +}
4729 +
4730 +void qbman_bp_attr_get_icid(struct qbman_attr *a, u32 *icid, int *pl)
4731 +{
4732 + u32 *p = ATTR32(a);
4733 +
4734 + *icid = qb_attr_code_decode(&code_bp_icid, p);
4735 + *pl = !!qb_attr_code_decode(&code_bp_pl, p);
4736 +}
4737 +
4738 +void qbman_bp_attr_get_bpscn_addr(struct qbman_attr *a, u64 *bpscn_addr)
4739 +{
4740 + u32 *p = ATTR32(a);
4741 +
4742 + *bpscn_addr = ((u64)qb_attr_code_decode(&code_bp_bpscn_addr_hi,
4743 + p) << 32) |
4744 + (u64)qb_attr_code_decode(&code_bp_bpscn_addr_lo,
4745 + p);
4746 +}
4747 +
4748 +void qbman_bp_attr_get_bpscn_ctx(struct qbman_attr *a, u64 *bpscn_ctx)
4749 +{
4750 + u32 *p = ATTR32(a);
4751 +
4752 + *bpscn_ctx = ((u64)qb_attr_code_decode(&code_bp_bpscn_ctx_hi, p)
4753 + << 32) |
4754 + (u64)qb_attr_code_decode(&code_bp_bpscn_ctx_lo,
4755 + p);
4756 +}
4757 +
4758 +void qbman_bp_attr_get_hw_targ(struct qbman_attr *a, u32 *hw_targ)
4759 +{
4760 + u32 *p = ATTR32(a);
4761 +
4762 + *hw_targ = qb_attr_code_decode(&code_bp_hw_targ, p);
4763 +}
4764 +
4765 +int qbman_bp_info_has_free_bufs(struct qbman_attr *a)
4766 +{
4767 + u32 *p = ATTR32(a);
4768 +
4769 + return !(int)(qb_attr_code_decode(&code_bp_state, p) & 0x1);
4770 +}
4771 +
4772 +int qbman_bp_info_is_depleted(struct qbman_attr *a)
4773 +{
4774 + u32 *p = ATTR32(a);
4775 +
4776 + return (int)(qb_attr_code_decode(&code_bp_state, p) & 0x2);
4777 +}
4778 +
4779 +int qbman_bp_info_is_surplus(struct qbman_attr *a)
4780 +{
4781 + u32 *p = ATTR32(a);
4782 +
4783 + return (int)(qb_attr_code_decode(&code_bp_state, p) & 0x4);
4784 +}
4785 +
4786 +u32 qbman_bp_info_num_free_bufs(struct qbman_attr *a)
4787 +{
4788 + u32 *p = ATTR32(a);
4789 +
4790 + return qb_attr_code_decode(&code_bp_fill, p);
4791 +}
4792 +
4793 +u32 qbman_bp_info_hdptr(struct qbman_attr *a)
4794 +{
4795 + u32 *p = ATTR32(a);
4796 +
4797 + return qb_attr_code_decode(&code_bp_hdptr, p);
4798 +}
4799 +
4800 +u32 qbman_bp_info_sdcnt(struct qbman_attr *a)
4801 +{
4802 + u32 *p = ATTR32(a);
4803 +
4804 + return qb_attr_code_decode(&code_bp_sdcnt, p);
4805 +}
4806 +
4807 +u32 qbman_bp_info_hdcnt(struct qbman_attr *a)
4808 +{
4809 + u32 *p = ATTR32(a);
4810 +
4811 + return qb_attr_code_decode(&code_bp_hdcnt, p);
4812 +}
4813 +
4814 +u32 qbman_bp_info_sscnt(struct qbman_attr *a)
4815 +{
4816 + u32 *p = ATTR32(a);
4817 +
4818 + return qb_attr_code_decode(&code_bp_sscnt, p);
4819 +}
4820 +
4821 +static struct qb_attr_code code_fq_fqid = QB_CODE(1, 0, 24);
4822 +static struct qb_attr_code code_fq_cgrid = QB_CODE(2, 16, 16);
4823 +static struct qb_attr_code code_fq_destwq = QB_CODE(3, 0, 15);
4824 +static struct qb_attr_code code_fq_fqctrl = QB_CODE(3, 24, 8);
4825 +static struct qb_attr_code code_fq_icscred = QB_CODE(4, 0, 15);
4826 +static struct qb_attr_code code_fq_tdthresh = QB_CODE(4, 16, 13);
4827 +static struct qb_attr_code code_fq_oa_len = QB_CODE(5, 0, 12);
4828 +static struct qb_attr_code code_fq_oa_ics = QB_CODE(5, 14, 1);
4829 +static struct qb_attr_code code_fq_oa_cgr = QB_CODE(5, 15, 1);
4830 +static struct qb_attr_code code_fq_mctl_bdi = QB_CODE(5, 24, 1);
4831 +static struct qb_attr_code code_fq_mctl_ff = QB_CODE(5, 25, 1);
4832 +static struct qb_attr_code code_fq_mctl_va = QB_CODE(5, 26, 1);
4833 +static struct qb_attr_code code_fq_mctl_ps = QB_CODE(5, 27, 1);
4834 +static struct qb_attr_code code_fq_ctx_lower32 = QB_CODE(6, 0, 32);
4835 +static struct qb_attr_code code_fq_ctx_upper32 = QB_CODE(7, 0, 32);
4836 +static struct qb_attr_code code_fq_icid = QB_CODE(8, 0, 15);
4837 +static struct qb_attr_code code_fq_pl = QB_CODE(8, 15, 1);
4838 +static struct qb_attr_code code_fq_vfqid = QB_CODE(9, 0, 24);
4839 +static struct qb_attr_code code_fq_erfqid = QB_CODE(10, 0, 24);
4840 +
4841 +void qbman_fq_attr_clear(struct qbman_attr *a)
4842 +{
4843 + memset(a, 0, sizeof(*a));
4844 + attr_type_set(a, qbman_attr_usage_fq);
4845 +}
4846 +
4847 +/* FQ query function for programmable fields */
4848 +int qbman_fq_query(struct qbman_swp *s, u32 fqid, struct qbman_attr *desc)
4849 +{
4850 + u32 *p;
4851 + u32 verb, rslt;
4852 + u32 *d = ATTR32(desc);
4853 +
4854 + qbman_fq_attr_clear(desc);
4855 +
4856 + p = qbman_swp_mc_start(s);
4857 + if (!p)
4858 + return -EBUSY;
4859 + qb_attr_code_encode(&code_fq_fqid, p, fqid);
4860 + p = qbman_swp_mc_complete(s, p, QBMAN_FQ_QUERY);
4861 +
4862 + /* Decode the outcome */
4863 + verb = qb_attr_code_decode(&code_generic_verb, p);
4864 + rslt = qb_attr_code_decode(&code_generic_rslt, p);
4865 + WARN_ON(verb != QBMAN_FQ_QUERY);
4866 +
4867 + /* Determine success or failure */
4868 + if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
4869 + pr_err("Query of FQID 0x%x failed, code=0x%02x\n",
4870 + fqid, rslt);
4871 + return -EIO;
4872 + }
4873 + /*
4874 + * For the configure, word[0] of the command contains only the WE-mask.
4875 + * For the query, word[0] of the result contains only the verb/rslt
4876 + * fields. Skip word[0] in the latter case.
4877 + */
4878 + word_copy(&d[1], &p[1], 15);
4879 + return 0;
4880 +}
4881 +
4882 +void qbman_fq_attr_get_fqctrl(struct qbman_attr *d, u32 *fqctrl)
4883 +{
4884 + u32 *p = ATTR32(d);
4885 +
4886 + *fqctrl = qb_attr_code_decode(&code_fq_fqctrl, p);
4887 +}
4888 +
4889 +void qbman_fq_attr_get_cgrid(struct qbman_attr *d, u32 *cgrid)
4890 +{
4891 + u32 *p = ATTR32(d);
4892 +
4893 + *cgrid = qb_attr_code_decode(&code_fq_cgrid, p);
4894 +}
4895 +
4896 +void qbman_fq_attr_get_destwq(struct qbman_attr *d, u32 *destwq)
4897 +{
4898 + u32 *p = ATTR32(d);
4899 +
4900 + *destwq = qb_attr_code_decode(&code_fq_destwq, p);
4901 +}
4902 +
4903 +void qbman_fq_attr_get_icscred(struct qbman_attr *d, u32 *icscred)
4904 +{
4905 + u32 *p = ATTR32(d);
4906 +
4907 + *icscred = qb_attr_code_decode(&code_fq_icscred, p);
4908 +}
4909 +
4910 +static struct qb_attr_code code_tdthresh_exp = QB_CODE(0, 0, 5);
4911 +static struct qb_attr_code code_tdthresh_mant = QB_CODE(0, 5, 8);
4912 +static u32 qbman_thresh_to_value(u32 val)
4913 +{
4914 + u32 m, e;
4915 +
4916 + m = qb_attr_code_decode(&code_tdthresh_mant, &val);
4917 + e = qb_attr_code_decode(&code_tdthresh_exp, &val);
4918 + return m << e;
4919 +}
4920 +
4921 +void qbman_fq_attr_get_tdthresh(struct qbman_attr *d, u32 *tdthresh)
4922 +{
4923 + u32 *p = ATTR32(d);
4924 +
4925 + *tdthresh = qbman_thresh_to_value(qb_attr_code_decode(&code_fq_tdthresh,
4926 + p));
4927 +}
4928 +
4929 +void qbman_fq_attr_get_oa(struct qbman_attr *d,
4930 + int *oa_ics, int *oa_cgr, int32_t *oa_len)
4931 +{
4932 + u32 *p = ATTR32(d);
4933 +
4934 + *oa_ics = !!qb_attr_code_decode(&code_fq_oa_ics, p);
4935 + *oa_cgr = !!qb_attr_code_decode(&code_fq_oa_cgr, p);
4936 + *oa_len = qb_attr_code_makesigned(&code_fq_oa_len,
4937 + qb_attr_code_decode(&code_fq_oa_len, p));
4938 +}
4939 +
4940 +void qbman_fq_attr_get_mctl(struct qbman_attr *d,
4941 + int *bdi, int *ff, int *va, int *ps)
4942 +{
4943 + u32 *p = ATTR32(d);
4944 +
4945 + *bdi = !!qb_attr_code_decode(&code_fq_mctl_bdi, p);
4946 + *ff = !!qb_attr_code_decode(&code_fq_mctl_ff, p);
4947 + *va = !!qb_attr_code_decode(&code_fq_mctl_va, p);
4948 + *ps = !!qb_attr_code_decode(&code_fq_mctl_ps, p);
4949 +}
4950 +
4951 +void qbman_fq_attr_get_ctx(struct qbman_attr *d, u32 *hi, u32 *lo)
4952 +{
4953 + u32 *p = ATTR32(d);
4954 +
4955 + *hi = qb_attr_code_decode(&code_fq_ctx_upper32, p);
4956 + *lo = qb_attr_code_decode(&code_fq_ctx_lower32, p);
4957 +}
4958 +
4959 +void qbman_fq_attr_get_icid(struct qbman_attr *d, u32 *icid, int *pl)
4960 +{
4961 + u32 *p = ATTR32(d);
4962 +
4963 + *icid = qb_attr_code_decode(&code_fq_icid, p);
4964 + *pl = !!qb_attr_code_decode(&code_fq_pl, p);
4965 +}
4966 +
4967 +void qbman_fq_attr_get_vfqid(struct qbman_attr *d, u32 *vfqid)
4968 +{
4969 + u32 *p = ATTR32(d);
4970 +
4971 + *vfqid = qb_attr_code_decode(&code_fq_vfqid, p);
4972 +}
4973 +
4974 +void qbman_fq_attr_get_erfqid(struct qbman_attr *d, u32 *erfqid)
4975 +{
4976 + u32 *p = ATTR32(d);
4977 +
4978 + *erfqid = qb_attr_code_decode(&code_fq_erfqid, p);
4979 +}
4980 +
4981 +/* Query FQ Non-Programmalbe Fields */
4982 +static struct qb_attr_code code_fq_np_state = QB_CODE(0, 16, 3);
4983 +static struct qb_attr_code code_fq_np_fe = QB_CODE(0, 19, 1);
4984 +static struct qb_attr_code code_fq_np_x = QB_CODE(0, 20, 1);
4985 +static struct qb_attr_code code_fq_np_r = QB_CODE(0, 21, 1);
4986 +static struct qb_attr_code code_fq_np_oe = QB_CODE(0, 22, 1);
4987 +static struct qb_attr_code code_fq_np_frm_cnt = QB_CODE(6, 0, 24);
4988 +static struct qb_attr_code code_fq_np_byte_cnt = QB_CODE(7, 0, 32);
4989 +
4990 +int qbman_fq_query_state(struct qbman_swp *s, u32 fqid,
4991 + struct qbman_attr *state)
4992 +{
4993 + u32 *p;
4994 + u32 verb, rslt;
4995 + u32 *d = ATTR32(state);
4996 +
4997 + qbman_fq_attr_clear(state);
4998 +
4999 + p = qbman_swp_mc_start(s);
5000 + if (!p)
5001 + return -EBUSY;
5002 + qb_attr_code_encode(&code_fq_fqid, p, fqid);
5003 + p = qbman_swp_mc_complete(s, p, QBMAN_FQ_QUERY_NP);
5004 +
5005 + /* Decode the outcome */
5006 + verb = qb_attr_code_decode(&code_generic_verb, p);
5007 + rslt = qb_attr_code_decode(&code_generic_rslt, p);
5008 + WARN_ON(verb != QBMAN_FQ_QUERY_NP);
5009 +
5010 + /* Determine success or failure */
5011 + if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
5012 + pr_err("Query NP fields of FQID 0x%x failed, code=0x%02x\n",
5013 + fqid, rslt);
5014 + return -EIO;
5015 + }
5016 + word_copy(&d[0], &p[0], 16);
5017 + return 0;
5018 +}
5019 +
5020 +u32 qbman_fq_state_schedstate(const struct qbman_attr *state)
5021 +{
5022 + const u32 *p = ATTR32(state);
5023 +
5024 + return qb_attr_code_decode(&code_fq_np_state, p);
5025 +}
5026 +
5027 +int qbman_fq_state_force_eligible(const struct qbman_attr *state)
5028 +{
5029 + const u32 *p = ATTR32(state);
5030 +
5031 + return !!qb_attr_code_decode(&code_fq_np_fe, p);
5032 +}
5033 +
5034 +int qbman_fq_state_xoff(const struct qbman_attr *state)
5035 +{
5036 + const u32 *p = ATTR32(state);
5037 +
5038 + return !!qb_attr_code_decode(&code_fq_np_x, p);
5039 +}
5040 +
5041 +int qbman_fq_state_retirement_pending(const struct qbman_attr *state)
5042 +{
5043 + const u32 *p = ATTR32(state);
5044 +
5045 + return !!qb_attr_code_decode(&code_fq_np_r, p);
5046 +}
5047 +
5048 +int qbman_fq_state_overflow_error(const struct qbman_attr *state)
5049 +{
5050 + const u32 *p = ATTR32(state);
5051 +
5052 + return !!qb_attr_code_decode(&code_fq_np_oe, p);
5053 +}
5054 +
5055 +u32 qbman_fq_state_frame_count(const struct qbman_attr *state)
5056 +{
5057 + const u32 *p = ATTR32(state);
5058 +
5059 + return qb_attr_code_decode(&code_fq_np_frm_cnt, p);
5060 +}
5061 +
5062 +u32 qbman_fq_state_byte_count(const struct qbman_attr *state)
5063 +{
5064 + const u32 *p = ATTR32(state);
5065 +
5066 + return qb_attr_code_decode(&code_fq_np_byte_cnt, p);
5067 +}
5068 +
5069 +/* Query CGR */
5070 +static struct qb_attr_code code_cgr_cgid = QB_CODE(0, 16, 16);
5071 +static struct qb_attr_code code_cgr_cscn_wq_en_enter = QB_CODE(2, 0, 1);
5072 +static struct qb_attr_code code_cgr_cscn_wq_en_exit = QB_CODE(2, 1, 1);
5073 +static struct qb_attr_code code_cgr_cscn_wq_icd = QB_CODE(2, 2, 1);
5074 +static struct qb_attr_code code_cgr_mode = QB_CODE(3, 16, 2);
5075 +static struct qb_attr_code code_cgr_rej_cnt_mode = QB_CODE(3, 18, 1);
5076 +static struct qb_attr_code code_cgr_cscn_bdi = QB_CODE(3, 19, 1);
5077 +static struct qb_attr_code code_cgr_cscn_wr_en_enter = QB_CODE(3, 24, 1);
5078 +static struct qb_attr_code code_cgr_cscn_wr_en_exit = QB_CODE(3, 25, 1);
5079 +static struct qb_attr_code code_cgr_cg_wr_ae = QB_CODE(3, 26, 1);
5080 +static struct qb_attr_code code_cgr_cscn_dcp_en = QB_CODE(3, 27, 1);
5081 +static struct qb_attr_code code_cgr_cg_wr_va = QB_CODE(3, 28, 1);
5082 +static struct qb_attr_code code_cgr_i_cnt_wr_en = QB_CODE(4, 0, 1);
5083 +static struct qb_attr_code code_cgr_i_cnt_wr_bnd = QB_CODE(4, 1, 5);
5084 +static struct qb_attr_code code_cgr_td_en = QB_CODE(4, 8, 1);
5085 +static struct qb_attr_code code_cgr_cs_thres = QB_CODE(4, 16, 13);
5086 +static struct qb_attr_code code_cgr_cs_thres_x = QB_CODE(5, 0, 13);
5087 +static struct qb_attr_code code_cgr_td_thres = QB_CODE(5, 16, 13);
5088 +static struct qb_attr_code code_cgr_cscn_tdcp = QB_CODE(6, 0, 16);
5089 +static struct qb_attr_code code_cgr_cscn_wqid = QB_CODE(6, 16, 16);
5090 +static struct qb_attr_code code_cgr_cscn_vcgid = QB_CODE(7, 0, 16);
5091 +static struct qb_attr_code code_cgr_cg_icid = QB_CODE(7, 16, 15);
5092 +static struct qb_attr_code code_cgr_cg_pl = QB_CODE(7, 31, 1);
5093 +static struct qb_attr_code code_cgr_cg_wr_addr_lo = QB_CODE(8, 0, 32);
5094 +static struct qb_attr_code code_cgr_cg_wr_addr_hi = QB_CODE(9, 0, 32);
5095 +static struct qb_attr_code code_cgr_cscn_ctx_lo = QB_CODE(10, 0, 32);
5096 +static struct qb_attr_code code_cgr_cscn_ctx_hi = QB_CODE(11, 0, 32);
5097 +
5098 +void qbman_cgr_attr_clear(struct qbman_attr *a)
5099 +{
5100 + memset(a, 0, sizeof(*a));
5101 + attr_type_set(a, qbman_attr_usage_cgr);
5102 +}
5103 +
5104 +int qbman_cgr_query(struct qbman_swp *s, u32 cgid, struct qbman_attr *attr)
5105 +{
5106 + u32 *p;
5107 + u32 verb, rslt;
5108 + u32 *d[2];
5109 + int i;
5110 + u32 query_verb;
5111 +
5112 + d[0] = ATTR32(attr);
5113 + d[1] = ATTR32_1(attr);
5114 +
5115 + qbman_cgr_attr_clear(attr);
5116 +
5117 + for (i = 0; i < 2; i++) {
5118 + p = qbman_swp_mc_start(s);
5119 + if (!p)
5120 + return -EBUSY;
5121 + query_verb = i ? QBMAN_WRED_QUERY : QBMAN_CGR_QUERY;
5122 +
5123 + qb_attr_code_encode(&code_cgr_cgid, p, cgid);
5124 + p = qbman_swp_mc_complete(s, p, p[0] | query_verb);
5125 +
5126 + /* Decode the outcome */
5127 + verb = qb_attr_code_decode(&code_generic_verb, p);
5128 + rslt = qb_attr_code_decode(&code_generic_rslt, p);
5129 + WARN_ON(verb != query_verb);
5130 +
5131 + /* Determine success or failure */
5132 + if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
5133 + pr_err("Query CGID 0x%x failed,", cgid);
5134 + pr_err(" verb=0x%02x, code=0x%02x\n", verb, rslt);
5135 + return -EIO;
5136 + }
5137 + /* For the configure, word[0] of the command contains only the
5138 + * verb/cgid. For the query, word[0] of the result contains
5139 + * only the verb/rslt fields. Skip word[0] in the latter case.
5140 + */
5141 + word_copy(&d[i][1], &p[1], 15);
5142 + }
5143 + return 0;
5144 +}
5145 +
5146 +void qbman_cgr_attr_get_ctl1(struct qbman_attr *d, int *cscn_wq_en_enter,
5147 + int *cscn_wq_en_exit, int *cscn_wq_icd)
5148 + {
5149 + u32 *p = ATTR32(d);
5150 + *cscn_wq_en_enter = !!qb_attr_code_decode(&code_cgr_cscn_wq_en_enter,
5151 + p);
5152 + *cscn_wq_en_exit = !!qb_attr_code_decode(&code_cgr_cscn_wq_en_exit, p);
5153 + *cscn_wq_icd = !!qb_attr_code_decode(&code_cgr_cscn_wq_icd, p);
5154 +}
5155 +
5156 +void qbman_cgr_attr_get_mode(struct qbman_attr *d, u32 *mode,
5157 + int *rej_cnt_mode, int *cscn_bdi)
5158 +{
5159 + u32 *p = ATTR32(d);
5160 + *mode = qb_attr_code_decode(&code_cgr_mode, p);
5161 + *rej_cnt_mode = !!qb_attr_code_decode(&code_cgr_rej_cnt_mode, p);
5162 + *cscn_bdi = !!qb_attr_code_decode(&code_cgr_cscn_bdi, p);
5163 +}
5164 +
5165 +void qbman_cgr_attr_get_ctl2(struct qbman_attr *d, int *cscn_wr_en_enter,
5166 + int *cscn_wr_en_exit, int *cg_wr_ae,
5167 + int *cscn_dcp_en, int *cg_wr_va)
5168 +{
5169 + u32 *p = ATTR32(d);
5170 + *cscn_wr_en_enter = !!qb_attr_code_decode(&code_cgr_cscn_wr_en_enter,
5171 + p);
5172 + *cscn_wr_en_exit = !!qb_attr_code_decode(&code_cgr_cscn_wr_en_exit, p);
5173 + *cg_wr_ae = !!qb_attr_code_decode(&code_cgr_cg_wr_ae, p);
5174 + *cscn_dcp_en = !!qb_attr_code_decode(&code_cgr_cscn_dcp_en, p);
5175 + *cg_wr_va = !!qb_attr_code_decode(&code_cgr_cg_wr_va, p);
5176 +}
5177 +
5178 +void qbman_cgr_attr_get_iwc(struct qbman_attr *d, int *i_cnt_wr_en,
5179 + u32 *i_cnt_wr_bnd)
5180 +{
5181 + u32 *p = ATTR32(d);
5182 + *i_cnt_wr_en = !!qb_attr_code_decode(&code_cgr_i_cnt_wr_en, p);
5183 + *i_cnt_wr_bnd = qb_attr_code_decode(&code_cgr_i_cnt_wr_bnd, p);
5184 +}
5185 +
5186 +void qbman_cgr_attr_get_tdc(struct qbman_attr *d, int *td_en)
5187 +{
5188 + u32 *p = ATTR32(d);
5189 + *td_en = !!qb_attr_code_decode(&code_cgr_td_en, p);
5190 +}
5191 +
5192 +void qbman_cgr_attr_get_cs_thres(struct qbman_attr *d, u32 *cs_thres)
5193 +{
5194 + u32 *p = ATTR32(d);
5195 + *cs_thres = qbman_thresh_to_value(qb_attr_code_decode(
5196 + &code_cgr_cs_thres, p));
5197 +}
5198 +
5199 +void qbman_cgr_attr_get_cs_thres_x(struct qbman_attr *d,
5200 + u32 *cs_thres_x)
5201 +{
5202 + u32 *p = ATTR32(d);
5203 + *cs_thres_x = qbman_thresh_to_value(qb_attr_code_decode(
5204 + &code_cgr_cs_thres_x, p));
5205 +}
5206 +
5207 +void qbman_cgr_attr_get_td_thres(struct qbman_attr *d, u32 *td_thres)
5208 +{
5209 + u32 *p = ATTR32(d);
5210 + *td_thres = qbman_thresh_to_value(qb_attr_code_decode(
5211 + &code_cgr_td_thres, p));
5212 +}
5213 +
5214 +void qbman_cgr_attr_get_cscn_tdcp(struct qbman_attr *d, u32 *cscn_tdcp)
5215 +{
5216 + u32 *p = ATTR32(d);
5217 + *cscn_tdcp = qb_attr_code_decode(&code_cgr_cscn_tdcp, p);
5218 +}
5219 +
5220 +void qbman_cgr_attr_get_cscn_wqid(struct qbman_attr *d, u32 *cscn_wqid)
5221 +{
5222 + u32 *p = ATTR32(d);
5223 + *cscn_wqid = qb_attr_code_decode(&code_cgr_cscn_wqid, p);
5224 +}
5225 +
5226 +void qbman_cgr_attr_get_cscn_vcgid(struct qbman_attr *d,
5227 + u32 *cscn_vcgid)
5228 +{
5229 + u32 *p = ATTR32(d);
5230 + *cscn_vcgid = qb_attr_code_decode(&code_cgr_cscn_vcgid, p);
5231 +}
5232 +
5233 +void qbman_cgr_attr_get_cg_icid(struct qbman_attr *d, u32 *icid,
5234 + int *pl)
5235 +{
5236 + u32 *p = ATTR32(d);
5237 + *icid = qb_attr_code_decode(&code_cgr_cg_icid, p);
5238 + *pl = !!qb_attr_code_decode(&code_cgr_cg_pl, p);
5239 +}
5240 +
5241 +void qbman_cgr_attr_get_cg_wr_addr(struct qbman_attr *d,
5242 + u64 *cg_wr_addr)
5243 +{
5244 + u32 *p = ATTR32(d);
5245 + *cg_wr_addr = ((u64)qb_attr_code_decode(&code_cgr_cg_wr_addr_hi,
5246 + p) << 32) |
5247 + (u64)qb_attr_code_decode(&code_cgr_cg_wr_addr_lo,
5248 + p);
5249 +}
5250 +
5251 +void qbman_cgr_attr_get_cscn_ctx(struct qbman_attr *d, u64 *cscn_ctx)
5252 +{
5253 + u32 *p = ATTR32(d);
5254 + *cscn_ctx = ((u64)qb_attr_code_decode(&code_cgr_cscn_ctx_hi, p)
5255 + << 32) |
5256 + (u64)qb_attr_code_decode(&code_cgr_cscn_ctx_lo, p);
5257 +}
5258 +
5259 +#define WRED_EDP_WORD(n) (18 + (n) / 4)
5260 +#define WRED_EDP_OFFSET(n) (8 * ((n) % 4))
5261 +#define WRED_PARM_DP_WORD(n) ((n) + 20)
5262 +#define WRED_WE_EDP(n) (16 + (n) * 2)
5263 +#define WRED_WE_PARM_DP(n) (17 + (n) * 2)
5264 +void qbman_cgr_attr_wred_get_edp(struct qbman_attr *d, u32 idx,
5265 + int *edp)
5266 +{
5267 + u32 *p = ATTR32(d);
5268 + struct qb_attr_code code_wred_edp = QB_CODE(WRED_EDP_WORD(idx),
5269 + WRED_EDP_OFFSET(idx), 8);
5270 + *edp = (int)qb_attr_code_decode(&code_wred_edp, p);
5271 +}
5272 +
5273 +void qbman_cgr_attr_wred_dp_decompose(u32 dp, u64 *minth,
5274 + u64 *maxth, u8 *maxp)
5275 +{
5276 + u8 ma, mn, step_i, step_s, pn;
5277 +
5278 + ma = (u8)(dp >> 24);
5279 + mn = (u8)(dp >> 19) & 0x1f;
5280 + step_i = (u8)(dp >> 11);
5281 + step_s = (u8)(dp >> 6) & 0x1f;
5282 + pn = (u8)dp & 0x3f;
5283 +
5284 + *maxp = ((pn << 2) * 100) / 256;
5285 +
5286 + if (mn == 0)
5287 + *maxth = ma;
5288 + else
5289 + *maxth = ((ma + 256) * (1 << (mn - 1)));
5290 +
5291 + if (step_s == 0)
5292 + *minth = *maxth - step_i;
5293 + else
5294 + *minth = *maxth - (256 + step_i) * (1 << (step_s - 1));
5295 +}
5296 +
5297 +void qbman_cgr_attr_wred_get_parm_dp(struct qbman_attr *d, u32 idx,
5298 + u32 *dp)
5299 +{
5300 + u32 *p = ATTR32(d);
5301 + struct qb_attr_code code_wred_parm_dp = QB_CODE(WRED_PARM_DP_WORD(idx),
5302 + 0, 8);
5303 + *dp = qb_attr_code_decode(&code_wred_parm_dp, p);
5304 +}
5305 +
5306 +/* Query CGR/CCGR/CQ statistics */
5307 +static struct qb_attr_code code_cgr_stat_ct = QB_CODE(4, 0, 32);
5308 +static struct qb_attr_code code_cgr_stat_frame_cnt_lo = QB_CODE(4, 0, 32);
5309 +static struct qb_attr_code code_cgr_stat_frame_cnt_hi = QB_CODE(5, 0, 8);
5310 +static struct qb_attr_code code_cgr_stat_byte_cnt_lo = QB_CODE(6, 0, 32);
5311 +static struct qb_attr_code code_cgr_stat_byte_cnt_hi = QB_CODE(7, 0, 16);
5312 +static int qbman_cgr_statistics_query(struct qbman_swp *s, u32 cgid,
5313 + int clear, u32 command_type,
5314 + u64 *frame_cnt, u64 *byte_cnt)
5315 +{
5316 + u32 *p;
5317 + u32 verb, rslt;
5318 + u32 query_verb;
5319 + u32 hi, lo;
5320 +
5321 + p = qbman_swp_mc_start(s);
5322 + if (!p)
5323 + return -EBUSY;
5324 +
5325 + qb_attr_code_encode(&code_cgr_cgid, p, cgid);
5326 + if (command_type < 2)
5327 + qb_attr_code_encode(&code_cgr_stat_ct, p, command_type);
5328 + query_verb = clear ?
5329 + QBMAN_CGR_STAT_QUERY_CLR : QBMAN_CGR_STAT_QUERY;
5330 + p = qbman_swp_mc_complete(s, p, p[0] | query_verb);
5331 +
5332 + /* Decode the outcome */
5333 + verb = qb_attr_code_decode(&code_generic_verb, p);
5334 + rslt = qb_attr_code_decode(&code_generic_rslt, p);
5335 + WARN_ON(verb != query_verb);
5336 +
5337 + /* Determine success or failure */
5338 + if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
5339 + pr_err("Query statistics of CGID 0x%x failed,", cgid);
5340 + pr_err(" verb=0x%02x code=0x%02x\n", verb, rslt);
5341 + return -EIO;
5342 + }
5343 +
5344 + if (*frame_cnt) {
5345 + hi = qb_attr_code_decode(&code_cgr_stat_frame_cnt_hi, p);
5346 + lo = qb_attr_code_decode(&code_cgr_stat_frame_cnt_lo, p);
5347 + *frame_cnt = ((u64)hi << 32) | (u64)lo;
5348 + }
5349 + if (*byte_cnt) {
5350 + hi = qb_attr_code_decode(&code_cgr_stat_byte_cnt_hi, p);
5351 + lo = qb_attr_code_decode(&code_cgr_stat_byte_cnt_lo, p);
5352 + *byte_cnt = ((u64)hi << 32) | (u64)lo;
5353 + }
5354 +
5355 + return 0;
5356 +}
5357 +
5358 +int qbman_cgr_reject_statistics(struct qbman_swp *s, u32 cgid, int clear,
5359 + u64 *frame_cnt, u64 *byte_cnt)
5360 +{
5361 + return qbman_cgr_statistics_query(s, cgid, clear, 0xff,
5362 + frame_cnt, byte_cnt);
5363 +}
5364 +
5365 +int qbman_ccgr_reject_statistics(struct qbman_swp *s, u32 cgid, int clear,
5366 + u64 *frame_cnt, u64 *byte_cnt)
5367 +{
5368 + return qbman_cgr_statistics_query(s, cgid, clear, 1,
5369 + frame_cnt, byte_cnt);
5370 +}
5371 +
5372 +int qbman_cq_dequeue_statistics(struct qbman_swp *s, u32 cgid, int clear,
5373 + u64 *frame_cnt, u64 *byte_cnt)
5374 +{
5375 + return qbman_cgr_statistics_query(s, cgid, clear, 0,
5376 + frame_cnt, byte_cnt);
5377 +}
5378 diff --git a/drivers/staging/fsl-mc/bus/dpio/qbman_debug.h b/drivers/staging/fsl-mc/bus/dpio/qbman_debug.h
5379 new file mode 100644
5380 index 00000000..0a247a49
5381 --- /dev/null
5382 +++ b/drivers/staging/fsl-mc/bus/dpio/qbman_debug.h
5383 @@ -0,0 +1,136 @@
5384 +/* Copyright (C) 2015 Freescale Semiconductor, Inc.
5385 + *
5386 + * Redistribution and use in source and binary forms, with or without
5387 + * modification, are permitted provided that the following conditions are met:
5388 + * * Redistributions of source code must retain the above copyright
5389 + * notice, this list of conditions and the following disclaimer.
5390 + * * Redistributions in binary form must reproduce the above copyright
5391 + * notice, this list of conditions and the following disclaimer in the
5392 + * documentation and/or other materials provided with the distribution.
5393 + * * Neither the name of Freescale Semiconductor nor the
5394 + * names of its contributors may be used to endorse or promote products
5395 + * derived from this software without specific prior written permission.
5396 + *
5397 + *
5398 + * ALTERNATIVELY, this software may be distributed under the terms of the
5399 + * GNU General Public License ("GPL") as published by the Free Software
5400 + * Foundation, either version 2 of that License or (at your option) any
5401 + * later version.
5402 + *
5403 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
5404 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
5405 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
5406 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
5407 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
5408 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
5409 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
5410 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
5411 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
5412 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
5413 + */
5414 +
5415 +struct qbman_attr {
5416 + u32 dont_manipulate_directly[40];
5417 +};
5418 +
5419 +/* Buffer pool query commands */
5420 +int qbman_bp_query(struct qbman_swp *s, u32 bpid,
5421 + struct qbman_attr *a);
5422 +void qbman_bp_attr_get_bdi(struct qbman_attr *a, int *bdi, int *va, int *wae);
5423 +void qbman_bp_attr_get_swdet(struct qbman_attr *a, u32 *swdet);
5424 +void qbman_bp_attr_get_swdxt(struct qbman_attr *a, u32 *swdxt);
5425 +void qbman_bp_attr_get_hwdet(struct qbman_attr *a, u32 *hwdet);
5426 +void qbman_bp_attr_get_hwdxt(struct qbman_attr *a, u32 *hwdxt);
5427 +void qbman_bp_attr_get_swset(struct qbman_attr *a, u32 *swset);
5428 +void qbman_bp_attr_get_swsxt(struct qbman_attr *a, u32 *swsxt);
5429 +void qbman_bp_attr_get_vbpid(struct qbman_attr *a, u32 *vbpid);
5430 +void qbman_bp_attr_get_icid(struct qbman_attr *a, u32 *icid, int *pl);
5431 +void qbman_bp_attr_get_bpscn_addr(struct qbman_attr *a, u64 *bpscn_addr);
5432 +void qbman_bp_attr_get_bpscn_ctx(struct qbman_attr *a, u64 *bpscn_ctx);
5433 +void qbman_bp_attr_get_hw_targ(struct qbman_attr *a, u32 *hw_targ);
5434 +int qbman_bp_info_has_free_bufs(struct qbman_attr *a);
5435 +int qbman_bp_info_is_depleted(struct qbman_attr *a);
5436 +int qbman_bp_info_is_surplus(struct qbman_attr *a);
5437 +u32 qbman_bp_info_num_free_bufs(struct qbman_attr *a);
5438 +u32 qbman_bp_info_hdptr(struct qbman_attr *a);
5439 +u32 qbman_bp_info_sdcnt(struct qbman_attr *a);
5440 +u32 qbman_bp_info_hdcnt(struct qbman_attr *a);
5441 +u32 qbman_bp_info_sscnt(struct qbman_attr *a);
5442 +
5443 +/* FQ query function for programmable fields */
5444 +int qbman_fq_query(struct qbman_swp *s, u32 fqid,
5445 + struct qbman_attr *desc);
5446 +void qbman_fq_attr_get_fqctrl(struct qbman_attr *d, u32 *fqctrl);
5447 +void qbman_fq_attr_get_cgrid(struct qbman_attr *d, u32 *cgrid);
5448 +void qbman_fq_attr_get_destwq(struct qbman_attr *d, u32 *destwq);
5449 +void qbman_fq_attr_get_icscred(struct qbman_attr *d, u32 *icscred);
5450 +void qbman_fq_attr_get_tdthresh(struct qbman_attr *d, u32 *tdthresh);
5451 +void qbman_fq_attr_get_oa(struct qbman_attr *d,
5452 + int *oa_ics, int *oa_cgr, int32_t *oa_len);
5453 +void qbman_fq_attr_get_mctl(struct qbman_attr *d,
5454 + int *bdi, int *ff, int *va, int *ps);
5455 +void qbman_fq_attr_get_ctx(struct qbman_attr *d, u32 *hi, u32 *lo);
5456 +void qbman_fq_attr_get_icid(struct qbman_attr *d, u32 *icid, int *pl);
5457 +void qbman_fq_attr_get_vfqid(struct qbman_attr *d, u32 *vfqid);
5458 +void qbman_fq_attr_get_erfqid(struct qbman_attr *d, u32 *erfqid);
5459 +
5460 +/* FQ query command for non-programmable fields*/
5461 +enum qbman_fq_schedstate_e {
5462 + qbman_fq_schedstate_oos = 0,
5463 + qbman_fq_schedstate_retired,
5464 + qbman_fq_schedstate_tentatively_scheduled,
5465 + qbman_fq_schedstate_truly_scheduled,
5466 + qbman_fq_schedstate_parked,
5467 + qbman_fq_schedstate_held_active,
5468 +};
5469 +
5470 +int qbman_fq_query_state(struct qbman_swp *s, u32 fqid,
5471 + struct qbman_attr *state);
5472 +u32 qbman_fq_state_schedstate(const struct qbman_attr *state);
5473 +int qbman_fq_state_force_eligible(const struct qbman_attr *state);
5474 +int qbman_fq_state_xoff(const struct qbman_attr *state);
5475 +int qbman_fq_state_retirement_pending(const struct qbman_attr *state);
5476 +int qbman_fq_state_overflow_error(const struct qbman_attr *state);
5477 +u32 qbman_fq_state_frame_count(const struct qbman_attr *state);
5478 +u32 qbman_fq_state_byte_count(const struct qbman_attr *state);
5479 +
5480 +/* CGR query */
5481 +int qbman_cgr_query(struct qbman_swp *s, u32 cgid,
5482 + struct qbman_attr *attr);
5483 +void qbman_cgr_attr_get_ctl1(struct qbman_attr *d, int *cscn_wq_en_enter,
5484 + int *cscn_wq_en_exit, int *cscn_wq_icd);
5485 +void qbman_cgr_attr_get_mode(struct qbman_attr *d, u32 *mode,
5486 + int *rej_cnt_mode, int *cscn_bdi);
5487 +void qbman_cgr_attr_get_ctl2(struct qbman_attr *d, int *cscn_wr_en_enter,
5488 + int *cscn_wr_en_exit, int *cg_wr_ae,
5489 + int *cscn_dcp_en, int *cg_wr_va);
5490 +void qbman_cgr_attr_get_iwc(struct qbman_attr *d, int *i_cnt_wr_en,
5491 + u32 *i_cnt_wr_bnd);
5492 +void qbman_cgr_attr_get_tdc(struct qbman_attr *d, int *td_en);
5493 +void qbman_cgr_attr_get_cs_thres(struct qbman_attr *d, u32 *cs_thres);
5494 +void qbman_cgr_attr_get_cs_thres_x(struct qbman_attr *d,
5495 + u32 *cs_thres_x);
5496 +void qbman_cgr_attr_get_td_thres(struct qbman_attr *d, u32 *td_thres);
5497 +void qbman_cgr_attr_get_cscn_tdcp(struct qbman_attr *d, u32 *cscn_tdcp);
5498 +void qbman_cgr_attr_get_cscn_wqid(struct qbman_attr *d, u32 *cscn_wqid);
5499 +void qbman_cgr_attr_get_cscn_vcgid(struct qbman_attr *d,
5500 + u32 *cscn_vcgid);
5501 +void qbman_cgr_attr_get_cg_icid(struct qbman_attr *d, u32 *icid,
5502 + int *pl);
5503 +void qbman_cgr_attr_get_cg_wr_addr(struct qbman_attr *d,
5504 + u64 *cg_wr_addr);
5505 +void qbman_cgr_attr_get_cscn_ctx(struct qbman_attr *d, u64 *cscn_ctx);
5506 +void qbman_cgr_attr_wred_get_edp(struct qbman_attr *d, u32 idx,
5507 + int *edp);
5508 +void qbman_cgr_attr_wred_dp_decompose(u32 dp, u64 *minth,
5509 + u64 *maxth, u8 *maxp);
5510 +void qbman_cgr_attr_wred_get_parm_dp(struct qbman_attr *d, u32 idx,
5511 + u32 *dp);
5512 +
5513 +/* CGR/CCGR/CQ statistics query */
5514 +int qbman_cgr_reject_statistics(struct qbman_swp *s, u32 cgid, int clear,
5515 + u64 *frame_cnt, u64 *byte_cnt);
5516 +int qbman_ccgr_reject_statistics(struct qbman_swp *s, u32 cgid, int clear,
5517 + u64 *frame_cnt, u64 *byte_cnt);
5518 +int qbman_cq_dequeue_statistics(struct qbman_swp *s, u32 cgid, int clear,
5519 + u64 *frame_cnt, u64 *byte_cnt);
5520 diff --git a/drivers/staging/fsl-mc/bus/dpio/qbman_private.h b/drivers/staging/fsl-mc/bus/dpio/qbman_private.h
5521 new file mode 100644
5522 index 00000000..98a64be2
5523 --- /dev/null
5524 +++ b/drivers/staging/fsl-mc/bus/dpio/qbman_private.h
5525 @@ -0,0 +1,171 @@
5526 +/* Copyright (C) 2014 Freescale Semiconductor, Inc.
5527 + *
5528 + * Redistribution and use in source and binary forms, with or without
5529 + * modification, are permitted provided that the following conditions are met:
5530 + * * Redistributions of source code must retain the above copyright
5531 + * notice, this list of conditions and the following disclaimer.
5532 + * * Redistributions in binary form must reproduce the above copyright
5533 + * notice, this list of conditions and the following disclaimer in the
5534 + * documentation and/or other materials provided with the distribution.
5535 + * * Neither the name of Freescale Semiconductor nor the
5536 + * names of its contributors may be used to endorse or promote products
5537 + * derived from this software without specific prior written permission.
5538 + *
5539 + *
5540 + * ALTERNATIVELY, this software may be distributed under the terms of the
5541 + * GNU General Public License ("GPL") as published by the Free Software
5542 + * Foundation, either version 2 of that License or (at your option) any
5543 + * later version.
5544 + *
5545 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
5546 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
5547 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
5548 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
5549 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
5550 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
5551 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
5552 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
5553 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
5554 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
5555 + */
5556 +
5557 +/* Perform extra checking */
5558 +#define QBMAN_CHECKING
5559 +
5560 +/* To maximise the amount of logic that is common between the Linux driver and
5561 + * other targets (such as the embedded MC firmware), we pivot here between the
5562 + * inclusion of two platform-specific headers.
5563 + *
5564 + * The first, qbman_sys_decl.h, includes any and all required system headers as
5565 + * well as providing any definitions for the purposes of compatibility. The
5566 + * second, qbman_sys.h, is where platform-specific routines go.
5567 + *
5568 + * The point of the split is that the platform-independent code (including this
5569 + * header) may depend on platform-specific declarations, yet other
5570 + * platform-specific routines may depend on platform-independent definitions.
5571 + */
5572 +
5573 +#define QMAN_REV_4000 0x04000000
5574 +#define QMAN_REV_4100 0x04010000
5575 +#define QMAN_REV_4101 0x04010001
5576 +
5577 +/* When things go wrong, it is a convenient trick to insert a few FOO()
5578 + * statements in the code to trace progress. TODO: remove this once we are
5579 + * hacking the code less actively.
5580 + */
5581 +#define FOO() fsl_os_print("FOO: %s:%d\n", __FILE__, __LINE__)
5582 +
5583 +/* Any time there is a register interface which we poll on, this provides a
5584 + * "break after x iterations" scheme for it. It's handy for debugging, eg.
5585 + * where you don't want millions of lines of log output from a polling loop
5586 + * that won't, because such things tend to drown out the earlier log output
5587 + * that might explain what caused the problem. (NB: put ";" after each macro!)
5588 + * TODO: we should probably remove this once we're done sanitising the
5589 + * simulator...
5590 + */
5591 +#define DBG_POLL_START(loopvar) (loopvar = 1000)
5592 +#define DBG_POLL_CHECK(loopvar) \
5593 + do {if (!((loopvar)--)) WARN_ON(1); } while (0)
5594 +
5595 +/* For CCSR or portal-CINH registers that contain fields at arbitrary offsets
5596 + * and widths, these macro-generated encode/decode/isolate/remove inlines can
5597 + * be used.
5598 + *
5599 + * Eg. to "d"ecode a 14-bit field out of a register (into a "u16" type),
5600 + * where the field is located 3 bits "up" from the least-significant bit of the
5601 + * register (ie. the field location within the 32-bit register corresponds to a
5602 + * mask of 0x0001fff8), you would do;
5603 + * u16 field = d32_u16(3, 14, reg_value);
5604 + *
5605 + * Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE,
5606 + * non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!"
5607 + * operator) into a register at bit location 0x00080000 (19 bits "in" from the
5608 + * LS bit), do;
5609 + * reg_value |= e32_int(19, 1, !!field);
5610 + *
5611 + * If you wish to read-modify-write a register, such that you leave the 14-bit
5612 + * field as-is but have all other fields set to zero, then "i"solate the 14-bit
5613 + * value using;
5614 + * reg_value = i32_u16(3, 14, reg_value);
5615 + *
5616 + * Alternatively, you could "r"emove the 1-bit boolean field (setting it to
5617 + * zero) but leaving all other fields as-is;
5618 + * reg_val = r32_int(19, 1, reg_value);
5619 + *
5620 + */
5621 +#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
5622 + (u32)((1 << width) - 1))
5623 +#define DECLARE_CODEC32(t) \
5624 +static inline u32 e32_##t(u32 lsoffset, u32 width, t val) \
5625 +{ \
5626 + WARN_ON(width > (sizeof(t) * 8)); \
5627 + return ((u32)val & MAKE_MASK32(width)) << lsoffset; \
5628 +} \
5629 +static inline t d32_##t(u32 lsoffset, u32 width, u32 val) \
5630 +{ \
5631 + WARN_ON(width > (sizeof(t) * 8)); \
5632 + return (t)((val >> lsoffset) & MAKE_MASK32(width)); \
5633 +} \
5634 +static inline u32 i32_##t(u32 lsoffset, u32 width, \
5635 + u32 val) \
5636 +{ \
5637 + WARN_ON(width > (sizeof(t) * 8)); \
5638 + return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \
5639 +} \
5640 +static inline u32 r32_##t(u32 lsoffset, u32 width, \
5641 + u32 val) \
5642 +{ \
5643 + WARN_ON(width > (sizeof(t) * 8)); \
5644 + return ~(MAKE_MASK32(width) << lsoffset) & val; \
5645 +}
5646 +DECLARE_CODEC32(u32)
5647 +DECLARE_CODEC32(u16)
5648 +DECLARE_CODEC32(u8)
5649 +DECLARE_CODEC32(int)
5650 +
5651 + /*********************/
5652 + /* Debugging assists */
5653 + /*********************/
5654 +
5655 +static inline void __hexdump(unsigned long start, unsigned long end,
5656 + unsigned long p, size_t sz,
5657 + const unsigned char *c)
5658 +{
5659 + while (start < end) {
5660 + unsigned int pos = 0;
5661 + char buf[64];
5662 + int nl = 0;
5663 +
5664 + pos += sprintf(buf + pos, "%08lx: ", start);
5665 + do {
5666 + if ((start < p) || (start >= (p + sz)))
5667 + pos += sprintf(buf + pos, "..");
5668 + else
5669 + pos += sprintf(buf + pos, "%02x", *(c++));
5670 + if (!(++start & 15)) {
5671 + buf[pos++] = '\n';
5672 + nl = 1;
5673 + } else {
5674 + nl = 0;
5675 + if (!(start & 1))
5676 + buf[pos++] = ' ';
5677 + if (!(start & 3))
5678 + buf[pos++] = ' ';
5679 + }
5680 + } while (start & 15);
5681 + if (!nl)
5682 + buf[pos++] = '\n';
5683 + buf[pos] = '\0';
5684 + pr_info("%s", buf);
5685 + }
5686 +}
5687 +
5688 +static inline void hexdump(const void *ptr, size_t sz)
5689 +{
5690 + unsigned long p = (unsigned long)ptr;
5691 + unsigned long start = p & ~15ul;
5692 + unsigned long end = (p + sz + 15) & ~15ul;
5693 + const unsigned char *c = ptr;
5694 +
5695 + __hexdump(start, end, p, sz, c);
5696 +}
5697 diff --git a/drivers/staging/fsl-mc/bus/dpmcp-cmd.h b/drivers/staging/fsl-mc/bus/dpmcp-cmd.h
5698 index d098a6d8..384a13d0 100644
5699 --- a/drivers/staging/fsl-mc/bus/dpmcp-cmd.h
5700 +++ b/drivers/staging/fsl-mc/bus/dpmcp-cmd.h
5701 @@ -1,4 +1,5 @@
5702 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
5703 +/*
5704 + * Copyright 2013-2016 Freescale Semiconductor Inc.
5705 *
5706 * Redistribution and use in source and binary forms, with or without
5707 * modification, are permitted provided that the following conditions are met:
5708 @@ -11,7 +12,6 @@
5709 * names of any contributors may be used to endorse or promote products
5710 * derived from this software without specific prior written permission.
5711 *
5712 - *
5713 * ALTERNATIVELY, this software may be distributed under the terms of the
5714 * GNU General Public License ("GPL") as published by the Free Software
5715 * Foundation, either version 2 of that License or (at your option) any
5716 @@ -33,108 +33,24 @@
5717 #define _FSL_DPMCP_CMD_H
5718
5719 /* Minimal supported DPMCP Version */
5720 -#define DPMCP_MIN_VER_MAJOR 3
5721 -#define DPMCP_MIN_VER_MINOR 0
5722 +#define DPMCP_MIN_VER_MAJOR 3
5723 +#define DPMCP_MIN_VER_MINOR 0
5724
5725 -/* Command IDs */
5726 -#define DPMCP_CMDID_CLOSE 0x800
5727 -#define DPMCP_CMDID_OPEN 0x80b
5728 -#define DPMCP_CMDID_CREATE 0x90b
5729 -#define DPMCP_CMDID_DESTROY 0x900
5730 +/* Command versioning */
5731 +#define DPMCP_CMD_BASE_VERSION 1
5732 +#define DPMCP_CMD_ID_OFFSET 4
5733
5734 -#define DPMCP_CMDID_GET_ATTR 0x004
5735 -#define DPMCP_CMDID_RESET 0x005
5736 +#define DPMCP_CMD(id) ((id << DPMCP_CMD_ID_OFFSET) | DPMCP_CMD_BASE_VERSION)
5737 +
5738 +/* Command IDs */
5739 +#define DPMCP_CMDID_CLOSE DPMCP_CMD(0x800)
5740 +#define DPMCP_CMDID_OPEN DPMCP_CMD(0x80b)
5741 +#define DPMCP_CMDID_GET_API_VERSION DPMCP_CMD(0xa0b)
5742
5743 -#define DPMCP_CMDID_SET_IRQ 0x010
5744 -#define DPMCP_CMDID_GET_IRQ 0x011
5745 -#define DPMCP_CMDID_SET_IRQ_ENABLE 0x012
5746 -#define DPMCP_CMDID_GET_IRQ_ENABLE 0x013
5747 -#define DPMCP_CMDID_SET_IRQ_MASK 0x014
5748 -#define DPMCP_CMDID_GET_IRQ_MASK 0x015
5749 -#define DPMCP_CMDID_GET_IRQ_STATUS 0x016
5750 +#define DPMCP_CMDID_RESET DPMCP_CMD(0x005)
5751
5752 struct dpmcp_cmd_open {
5753 __le32 dpmcp_id;
5754 };
5755
5756 -struct dpmcp_cmd_create {
5757 - __le32 portal_id;
5758 -};
5759 -
5760 -struct dpmcp_cmd_set_irq {
5761 - /* cmd word 0 */
5762 - u8 irq_index;
5763 - u8 pad[3];
5764 - __le32 irq_val;
5765 - /* cmd word 1 */
5766 - __le64 irq_addr;
5767 - /* cmd word 2 */
5768 - __le32 irq_num;
5769 -};
5770 -
5771 -struct dpmcp_cmd_get_irq {
5772 - __le32 pad;
5773 - u8 irq_index;
5774 -};
5775 -
5776 -struct dpmcp_rsp_get_irq {
5777 - /* cmd word 0 */
5778 - __le32 irq_val;
5779 - __le32 pad;
5780 - /* cmd word 1 */
5781 - __le64 irq_paddr;
5782 - /* cmd word 2 */
5783 - __le32 irq_num;
5784 - __le32 type;
5785 -};
5786 -
5787 -#define DPMCP_ENABLE 0x1
5788 -
5789 -struct dpmcp_cmd_set_irq_enable {
5790 - u8 enable;
5791 - u8 pad[3];
5792 - u8 irq_index;
5793 -};
5794 -
5795 -struct dpmcp_cmd_get_irq_enable {
5796 - __le32 pad;
5797 - u8 irq_index;
5798 -};
5799 -
5800 -struct dpmcp_rsp_get_irq_enable {
5801 - u8 enabled;
5802 -};
5803 -
5804 -struct dpmcp_cmd_set_irq_mask {
5805 - __le32 mask;
5806 - u8 irq_index;
5807 -};
5808 -
5809 -struct dpmcp_cmd_get_irq_mask {
5810 - __le32 pad;
5811 - u8 irq_index;
5812 -};
5813 -
5814 -struct dpmcp_rsp_get_irq_mask {
5815 - __le32 mask;
5816 -};
5817 -
5818 -struct dpmcp_cmd_get_irq_status {
5819 - __le32 status;
5820 - u8 irq_index;
5821 -};
5822 -
5823 -struct dpmcp_rsp_get_irq_status {
5824 - __le32 status;
5825 -};
5826 -
5827 -struct dpmcp_rsp_get_attributes {
5828 - /* response word 0 */
5829 - __le32 pad;
5830 - __le32 id;
5831 - /* response word 1 */
5832 - __le16 version_major;
5833 - __le16 version_minor;
5834 -};
5835 -
5836 #endif /* _FSL_DPMCP_CMD_H */
5837 diff --git a/drivers/staging/fsl-mc/bus/dpmcp.c b/drivers/staging/fsl-mc/bus/dpmcp.c
5838 index 55766f78..ad4c8b43 100644
5839 --- a/drivers/staging/fsl-mc/bus/dpmcp.c
5840 +++ b/drivers/staging/fsl-mc/bus/dpmcp.c
5841 @@ -1,4 +1,5 @@
5842 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
5843 +/*
5844 + * Copyright 2013-2016 Freescale Semiconductor Inc.
5845 *
5846 * Redistribution and use in source and binary forms, with or without
5847 * modification, are permitted provided that the following conditions are met:
5848 @@ -11,7 +12,6 @@
5849 * names of any contributors may be used to endorse or promote products
5850 * derived from this software without specific prior written permission.
5851 *
5852 - *
5853 * ALTERNATIVELY, this software may be distributed under the terms of the
5854 * GNU General Public License ("GPL") as published by the Free Software
5855 * Foundation, either version 2 of that License or (at your option) any
5856 @@ -103,76 +103,6 @@ int dpmcp_close(struct fsl_mc_io *mc_io,
5857 return mc_send_command(mc_io, &cmd);
5858 }
5859
5860 -/**
5861 - * dpmcp_create() - Create the DPMCP object.
5862 - * @mc_io: Pointer to MC portal's I/O object
5863 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
5864 - * @cfg: Configuration structure
5865 - * @token: Returned token; use in subsequent API calls
5866 - *
5867 - * Create the DPMCP object, allocate required resources and
5868 - * perform required initialization.
5869 - *
5870 - * The object can be created either by declaring it in the
5871 - * DPL file, or by calling this function.
5872 - * This function returns a unique authentication token,
5873 - * associated with the specific object ID and the specific MC
5874 - * portal; this token must be used in all subsequent calls to
5875 - * this specific object. For objects that are created using the
5876 - * DPL file, call dpmcp_open function to get an authentication
5877 - * token first.
5878 - *
5879 - * Return: '0' on Success; Error code otherwise.
5880 - */
5881 -int dpmcp_create(struct fsl_mc_io *mc_io,
5882 - u32 cmd_flags,
5883 - const struct dpmcp_cfg *cfg,
5884 - u16 *token)
5885 -{
5886 - struct mc_command cmd = { 0 };
5887 - struct dpmcp_cmd_create *cmd_params;
5888 -
5889 - int err;
5890 -
5891 - /* prepare command */
5892 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CREATE,
5893 - cmd_flags, 0);
5894 - cmd_params = (struct dpmcp_cmd_create *)cmd.params;
5895 - cmd_params->portal_id = cpu_to_le32(cfg->portal_id);
5896 -
5897 - /* send command to mc*/
5898 - err = mc_send_command(mc_io, &cmd);
5899 - if (err)
5900 - return err;
5901 -
5902 - /* retrieve response parameters */
5903 - *token = mc_cmd_hdr_read_token(&cmd);
5904 -
5905 - return 0;
5906 -}
5907 -
5908 -/**
5909 - * dpmcp_destroy() - Destroy the DPMCP object and release all its resources.
5910 - * @mc_io: Pointer to MC portal's I/O object
5911 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
5912 - * @token: Token of DPMCP object
5913 - *
5914 - * Return: '0' on Success; error code otherwise.
5915 - */
5916 -int dpmcp_destroy(struct fsl_mc_io *mc_io,
5917 - u32 cmd_flags,
5918 - u16 token)
5919 -{
5920 - struct mc_command cmd = { 0 };
5921 -
5922 - /* prepare command */
5923 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_DESTROY,
5924 - cmd_flags, token);
5925 -
5926 - /* send command to mc*/
5927 - return mc_send_command(mc_io, &cmd);
5928 -}
5929 -
5930 /**
5931 * dpmcp_reset() - Reset the DPMCP, returns the object to initial state.
5932 * @mc_io: Pointer to MC portal's I/O object
5933 @@ -196,309 +126,33 @@ int dpmcp_reset(struct fsl_mc_io *mc_io,
5934 }
5935
5936 /**
5937 - * dpmcp_set_irq() - Set IRQ information for the DPMCP to trigger an interrupt.
5938 - * @mc_io: Pointer to MC portal's I/O object
5939 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
5940 - * @token: Token of DPMCP object
5941 - * @irq_index: Identifies the interrupt index to configure
5942 - * @irq_cfg: IRQ configuration
5943 - *
5944 - * Return: '0' on Success; Error code otherwise.
5945 - */
5946 -int dpmcp_set_irq(struct fsl_mc_io *mc_io,
5947 - u32 cmd_flags,
5948 - u16 token,
5949 - u8 irq_index,
5950 - struct dpmcp_irq_cfg *irq_cfg)
5951 -{
5952 - struct mc_command cmd = { 0 };
5953 - struct dpmcp_cmd_set_irq *cmd_params;
5954 -
5955 - /* prepare command */
5956 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ,
5957 - cmd_flags, token);
5958 - cmd_params = (struct dpmcp_cmd_set_irq *)cmd.params;
5959 - cmd_params->irq_index = irq_index;
5960 - cmd_params->irq_val = cpu_to_le32(irq_cfg->val);
5961 - cmd_params->irq_addr = cpu_to_le64(irq_cfg->paddr);
5962 - cmd_params->irq_num = cpu_to_le32(irq_cfg->irq_num);
5963 -
5964 - /* send command to mc*/
5965 - return mc_send_command(mc_io, &cmd);
5966 -}
5967 -
5968 -/**
5969 - * dpmcp_get_irq() - Get IRQ information from the DPMCP.
5970 - * @mc_io: Pointer to MC portal's I/O object
5971 + * dpmcp_get_api_version - Get Data Path Management Command Portal API version
5972 + * @mc_io: Pointer to Mc portal's I/O object
5973 * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
5974 - * @token: Token of DPMCP object
5975 - * @irq_index: The interrupt index to configure
5976 - * @type: Interrupt type: 0 represents message interrupt
5977 - * type (both irq_addr and irq_val are valid)
5978 - * @irq_cfg: IRQ attributes
5979 + * @major_ver: Major version of Data Path Management Command Portal API
5980 + * @minor_ver: Minor version of Data Path Management Command Portal API
5981 *
5982 * Return: '0' on Success; Error code otherwise.
5983 */
5984 -int dpmcp_get_irq(struct fsl_mc_io *mc_io,
5985 - u32 cmd_flags,
5986 - u16 token,
5987 - u8 irq_index,
5988 - int *type,
5989 - struct dpmcp_irq_cfg *irq_cfg)
5990 +int dpmcp_get_api_version(struct fsl_mc_io *mc_io,
5991 + u32 cmd_flags,
5992 + u16 *major_ver,
5993 + u16 *minor_ver)
5994 {
5995 struct mc_command cmd = { 0 };
5996 - struct dpmcp_cmd_get_irq *cmd_params;
5997 - struct dpmcp_rsp_get_irq *rsp_params;
5998 int err;
5999
6000 /* prepare command */
6001 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ,
6002 - cmd_flags, token);
6003 - cmd_params = (struct dpmcp_cmd_get_irq *)cmd.params;
6004 - cmd_params->irq_index = irq_index;
6005 -
6006 - /* send command to mc*/
6007 - err = mc_send_command(mc_io, &cmd);
6008 - if (err)
6009 - return err;
6010 -
6011 - /* retrieve response parameters */
6012 - rsp_params = (struct dpmcp_rsp_get_irq *)cmd.params;
6013 - irq_cfg->val = le32_to_cpu(rsp_params->irq_val);
6014 - irq_cfg->paddr = le64_to_cpu(rsp_params->irq_paddr);
6015 - irq_cfg->irq_num = le32_to_cpu(rsp_params->irq_num);
6016 - *type = le32_to_cpu(rsp_params->type);
6017 - return 0;
6018 -}
6019 -
6020 -/**
6021 - * dpmcp_set_irq_enable() - Set overall interrupt state.
6022 - * @mc_io: Pointer to MC portal's I/O object
6023 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6024 - * @token: Token of DPMCP object
6025 - * @irq_index: The interrupt index to configure
6026 - * @en: Interrupt state - enable = 1, disable = 0
6027 - *
6028 - * Allows GPP software to control when interrupts are generated.
6029 - * Each interrupt can have up to 32 causes. The enable/disable control's the
6030 - * overall interrupt state. if the interrupt is disabled no causes will cause
6031 - * an interrupt.
6032 - *
6033 - * Return: '0' on Success; Error code otherwise.
6034 - */
6035 -int dpmcp_set_irq_enable(struct fsl_mc_io *mc_io,
6036 - u32 cmd_flags,
6037 - u16 token,
6038 - u8 irq_index,
6039 - u8 en)
6040 -{
6041 - struct mc_command cmd = { 0 };
6042 - struct dpmcp_cmd_set_irq_enable *cmd_params;
6043 -
6044 - /* prepare command */
6045 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_ENABLE,
6046 - cmd_flags, token);
6047 - cmd_params = (struct dpmcp_cmd_set_irq_enable *)cmd.params;
6048 - cmd_params->enable = en & DPMCP_ENABLE;
6049 - cmd_params->irq_index = irq_index;
6050 -
6051 - /* send command to mc*/
6052 - return mc_send_command(mc_io, &cmd);
6053 -}
6054 -
6055 -/**
6056 - * dpmcp_get_irq_enable() - Get overall interrupt state
6057 - * @mc_io: Pointer to MC portal's I/O object
6058 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6059 - * @token: Token of DPMCP object
6060 - * @irq_index: The interrupt index to configure
6061 - * @en: Returned interrupt state - enable = 1, disable = 0
6062 - *
6063 - * Return: '0' on Success; Error code otherwise.
6064 - */
6065 -int dpmcp_get_irq_enable(struct fsl_mc_io *mc_io,
6066 - u32 cmd_flags,
6067 - u16 token,
6068 - u8 irq_index,
6069 - u8 *en)
6070 -{
6071 - struct mc_command cmd = { 0 };
6072 - struct dpmcp_cmd_get_irq_enable *cmd_params;
6073 - struct dpmcp_rsp_get_irq_enable *rsp_params;
6074 - int err;
6075 -
6076 - /* prepare command */
6077 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_ENABLE,
6078 - cmd_flags, token);
6079 - cmd_params = (struct dpmcp_cmd_get_irq_enable *)cmd.params;
6080 - cmd_params->irq_index = irq_index;
6081 -
6082 - /* send command to mc*/
6083 - err = mc_send_command(mc_io, &cmd);
6084 - if (err)
6085 - return err;
6086 -
6087 - /* retrieve response parameters */
6088 - rsp_params = (struct dpmcp_rsp_get_irq_enable *)cmd.params;
6089 - *en = rsp_params->enabled & DPMCP_ENABLE;
6090 - return 0;
6091 -}
6092 -
6093 -/**
6094 - * dpmcp_set_irq_mask() - Set interrupt mask.
6095 - * @mc_io: Pointer to MC portal's I/O object
6096 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6097 - * @token: Token of DPMCP object
6098 - * @irq_index: The interrupt index to configure
6099 - * @mask: Event mask to trigger interrupt;
6100 - * each bit:
6101 - * 0 = ignore event
6102 - * 1 = consider event for asserting IRQ
6103 - *
6104 - * Every interrupt can have up to 32 causes and the interrupt model supports
6105 - * masking/unmasking each cause independently
6106 - *
6107 - * Return: '0' on Success; Error code otherwise.
6108 - */
6109 -int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
6110 - u32 cmd_flags,
6111 - u16 token,
6112 - u8 irq_index,
6113 - u32 mask)
6114 -{
6115 - struct mc_command cmd = { 0 };
6116 - struct dpmcp_cmd_set_irq_mask *cmd_params;
6117 -
6118 - /* prepare command */
6119 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_MASK,
6120 - cmd_flags, token);
6121 - cmd_params = (struct dpmcp_cmd_set_irq_mask *)cmd.params;
6122 - cmd_params->mask = cpu_to_le32(mask);
6123 - cmd_params->irq_index = irq_index;
6124 -
6125 - /* send command to mc*/
6126 - return mc_send_command(mc_io, &cmd);
6127 -}
6128 -
6129 -/**
6130 - * dpmcp_get_irq_mask() - Get interrupt mask.
6131 - * @mc_io: Pointer to MC portal's I/O object
6132 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6133 - * @token: Token of DPMCP object
6134 - * @irq_index: The interrupt index to configure
6135 - * @mask: Returned event mask to trigger interrupt
6136 - *
6137 - * Every interrupt can have up to 32 causes and the interrupt model supports
6138 - * masking/unmasking each cause independently
6139 - *
6140 - * Return: '0' on Success; Error code otherwise.
6141 - */
6142 -int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
6143 - u32 cmd_flags,
6144 - u16 token,
6145 - u8 irq_index,
6146 - u32 *mask)
6147 -{
6148 - struct mc_command cmd = { 0 };
6149 - struct dpmcp_cmd_get_irq_mask *cmd_params;
6150 - struct dpmcp_rsp_get_irq_mask *rsp_params;
6151 -
6152 - int err;
6153 -
6154 - /* prepare command */
6155 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_MASK,
6156 - cmd_flags, token);
6157 - cmd_params = (struct dpmcp_cmd_get_irq_mask *)cmd.params;
6158 - cmd_params->irq_index = irq_index;
6159 -
6160 - /* send command to mc*/
6161 - err = mc_send_command(mc_io, &cmd);
6162 - if (err)
6163 - return err;
6164 -
6165 - /* retrieve response parameters */
6166 - rsp_params = (struct dpmcp_rsp_get_irq_mask *)cmd.params;
6167 - *mask = le32_to_cpu(rsp_params->mask);
6168 -
6169 - return 0;
6170 -}
6171 -
6172 -/**
6173 - * dpmcp_get_irq_status() - Get the current status of any pending interrupts.
6174 - *
6175 - * @mc_io: Pointer to MC portal's I/O object
6176 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6177 - * @token: Token of DPMCP object
6178 - * @irq_index: The interrupt index to configure
6179 - * @status: Returned interrupts status - one bit per cause:
6180 - * 0 = no interrupt pending
6181 - * 1 = interrupt pending
6182 - *
6183 - * Return: '0' on Success; Error code otherwise.
6184 - */
6185 -int dpmcp_get_irq_status(struct fsl_mc_io *mc_io,
6186 - u32 cmd_flags,
6187 - u16 token,
6188 - u8 irq_index,
6189 - u32 *status)
6190 -{
6191 - struct mc_command cmd = { 0 };
6192 - struct dpmcp_cmd_get_irq_status *cmd_params;
6193 - struct dpmcp_rsp_get_irq_status *rsp_params;
6194 - int err;
6195 -
6196 - /* prepare command */
6197 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_STATUS,
6198 - cmd_flags, token);
6199 - cmd_params = (struct dpmcp_cmd_get_irq_status *)cmd.params;
6200 - cmd_params->status = cpu_to_le32(*status);
6201 - cmd_params->irq_index = irq_index;
6202 -
6203 - /* send command to mc*/
6204 - err = mc_send_command(mc_io, &cmd);
6205 - if (err)
6206 - return err;
6207 -
6208 - /* retrieve response parameters */
6209 - rsp_params = (struct dpmcp_rsp_get_irq_status *)cmd.params;
6210 - *status = le32_to_cpu(rsp_params->status);
6211 -
6212 - return 0;
6213 -}
6214 -
6215 -/**
6216 - * dpmcp_get_attributes - Retrieve DPMCP attributes.
6217 - *
6218 - * @mc_io: Pointer to MC portal's I/O object
6219 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6220 - * @token: Token of DPMCP object
6221 - * @attr: Returned object's attributes
6222 - *
6223 - * Return: '0' on Success; Error code otherwise.
6224 - */
6225 -int dpmcp_get_attributes(struct fsl_mc_io *mc_io,
6226 - u32 cmd_flags,
6227 - u16 token,
6228 - struct dpmcp_attr *attr)
6229 -{
6230 - struct mc_command cmd = { 0 };
6231 - struct dpmcp_rsp_get_attributes *rsp_params;
6232 - int err;
6233 -
6234 - /* prepare command */
6235 - cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_ATTR,
6236 - cmd_flags, token);
6237 + cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_API_VERSION,
6238 + cmd_flags, 0);
6239
6240 - /* send command to mc*/
6241 + /* send command to mc */
6242 err = mc_send_command(mc_io, &cmd);
6243 if (err)
6244 return err;
6245
6246 /* retrieve response parameters */
6247 - rsp_params = (struct dpmcp_rsp_get_attributes *)cmd.params;
6248 - attr->id = le32_to_cpu(rsp_params->id);
6249 - attr->version.major = le16_to_cpu(rsp_params->version_major);
6250 - attr->version.minor = le16_to_cpu(rsp_params->version_minor);
6251 + mc_cmd_read_api_version(&cmd, major_ver, minor_ver);
6252
6253 return 0;
6254 }
6255 diff --git a/drivers/staging/fsl-mc/bus/dpmcp.h b/drivers/staging/fsl-mc/bus/dpmcp.h
6256 index fe79d4d9..f616031e 100644
6257 --- a/drivers/staging/fsl-mc/bus/dpmcp.h
6258 +++ b/drivers/staging/fsl-mc/bus/dpmcp.h
6259 @@ -1,4 +1,5 @@
6260 -/* Copyright 2013-2015 Freescale Semiconductor Inc.
6261 +/*
6262 + * Copyright 2013-2016 Freescale Semiconductor Inc.
6263 *
6264 * Redistribution and use in source and binary forms, with or without
6265 * modification, are permitted provided that the following conditions are met:
6266 @@ -11,7 +12,6 @@
6267 * names of any contributors may be used to endorse or promote products
6268 * derived from this software without specific prior written permission.
6269 *
6270 - *
6271 * ALTERNATIVELY, this software may be distributed under the terms of the
6272 * GNU General Public License ("GPL") as published by the Free Software
6273 * Foundation, either version 2 of that License or (at your option) any
6274 @@ -32,128 +32,29 @@
6275 #ifndef __FSL_DPMCP_H
6276 #define __FSL_DPMCP_H
6277
6278 -/* Data Path Management Command Portal API
6279 +/*
6280 + * Data Path Management Command Portal API
6281 * Contains initialization APIs and runtime control APIs for DPMCP
6282 */
6283
6284 struct fsl_mc_io;
6285
6286 int dpmcp_open(struct fsl_mc_io *mc_io,
6287 - uint32_t cmd_flags,
6288 + u32 cmd_flags,
6289 int dpmcp_id,
6290 - uint16_t *token);
6291 -
6292 -/* Get portal ID from pool */
6293 -#define DPMCP_GET_PORTAL_ID_FROM_POOL (-1)
6294 + u16 *token);
6295
6296 int dpmcp_close(struct fsl_mc_io *mc_io,
6297 - uint32_t cmd_flags,
6298 - uint16_t token);
6299 -
6300 -/**
6301 - * struct dpmcp_cfg - Structure representing DPMCP configuration
6302 - * @portal_id: Portal ID; 'DPMCP_GET_PORTAL_ID_FROM_POOL' to get the portal ID
6303 - * from pool
6304 - */
6305 -struct dpmcp_cfg {
6306 - int portal_id;
6307 -};
6308 -
6309 -int dpmcp_create(struct fsl_mc_io *mc_io,
6310 - uint32_t cmd_flags,
6311 - const struct dpmcp_cfg *cfg,
6312 - uint16_t *token);
6313 + u32 cmd_flags,
6314 + u16 token);
6315
6316 -int dpmcp_destroy(struct fsl_mc_io *mc_io,
6317 - uint32_t cmd_flags,
6318 - uint16_t token);
6319 +int dpmcp_get_api_version(struct fsl_mc_io *mc_io,
6320 + u32 cmd_flags,
6321 + u16 *major_ver,
6322 + u16 *minor_ver);
6323
6324 int dpmcp_reset(struct fsl_mc_io *mc_io,
6325 - uint32_t cmd_flags,
6326 - uint16_t token);
6327 -
6328 -/* IRQ */
6329 -/* IRQ Index */
6330 -#define DPMCP_IRQ_INDEX 0
6331 -/* irq event - Indicates that the link state changed */
6332 -#define DPMCP_IRQ_EVENT_CMD_DONE 0x00000001
6333 -
6334 -/**
6335 - * struct dpmcp_irq_cfg - IRQ configuration
6336 - * @paddr: Address that must be written to signal a message-based interrupt
6337 - * @val: Value to write into irq_addr address
6338 - * @irq_num: A user defined number associated with this IRQ
6339 - */
6340 -struct dpmcp_irq_cfg {
6341 - uint64_t paddr;
6342 - uint32_t val;
6343 - int irq_num;
6344 -};
6345 -
6346 -int dpmcp_set_irq(struct fsl_mc_io *mc_io,
6347 - uint32_t cmd_flags,
6348 - uint16_t token,
6349 - uint8_t irq_index,
6350 - struct dpmcp_irq_cfg *irq_cfg);
6351 -
6352 -int dpmcp_get_irq(struct fsl_mc_io *mc_io,
6353 - uint32_t cmd_flags,
6354 - uint16_t token,
6355 - uint8_t irq_index,
6356 - int *type,
6357 - struct dpmcp_irq_cfg *irq_cfg);
6358 -
6359 -int dpmcp_set_irq_enable(struct fsl_mc_io *mc_io,
6360 - uint32_t cmd_flags,
6361 - uint16_t token,
6362 - uint8_t irq_index,
6363 - uint8_t en);
6364 -
6365 -int dpmcp_get_irq_enable(struct fsl_mc_io *mc_io,
6366 - uint32_t cmd_flags,
6367 - uint16_t token,
6368 - uint8_t irq_index,
6369 - uint8_t *en);
6370 -
6371 -int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
6372 - uint32_t cmd_flags,
6373 - uint16_t token,
6374 - uint8_t irq_index,
6375 - uint32_t mask);
6376 -
6377 -int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
6378 - uint32_t cmd_flags,
6379 - uint16_t token,
6380 - uint8_t irq_index,
6381 - uint32_t *mask);
6382 -
6383 -int dpmcp_get_irq_status(struct fsl_mc_io *mc_io,
6384 - uint32_t cmd_flags,
6385 - uint16_t token,
6386 - uint8_t irq_index,
6387 - uint32_t *status);
6388 -
6389 -/**
6390 - * struct dpmcp_attr - Structure representing DPMCP attributes
6391 - * @id: DPMCP object ID
6392 - * @version: DPMCP version
6393 - */
6394 -struct dpmcp_attr {
6395 - int id;
6396 - /**
6397 - * struct version - Structure representing DPMCP version
6398 - * @major: DPMCP major version
6399 - * @minor: DPMCP minor version
6400 - */
6401 - struct {
6402 - uint16_t major;
6403 - uint16_t minor;
6404 - } version;
6405 -};
6406 -
6407 -int dpmcp_get_attributes(struct fsl_mc_io *mc_io,
6408 - uint32_t cmd_flags,
6409 - uint16_t token,
6410 - struct dpmcp_attr *attr);
6411 + u32 cmd_flags,
6412 + u16 token);
6413
6414 #endif /* __FSL_DPMCP_H */
6415 diff --git a/drivers/staging/fsl-mc/bus/dpmng-cmd.h b/drivers/staging/fsl-mc/bus/dpmng-cmd.h
6416 index a7b77d58..cdddfb80 100644
6417 --- a/drivers/staging/fsl-mc/bus/dpmng-cmd.h
6418 +++ b/drivers/staging/fsl-mc/bus/dpmng-cmd.h
6419 @@ -12,7 +12,6 @@
6420 * names of any contributors may be used to endorse or promote products
6421 * derived from this software without specific prior written permission.
6422 *
6423 - *
6424 * ALTERNATIVELY, this software may be distributed under the terms of the
6425 * GNU General Public License ("GPL") as published by the Free Software
6426 * Foundation, either version 2 of that License or (at your option) any
6427 @@ -41,13 +40,14 @@
6428 #ifndef __FSL_DPMNG_CMD_H
6429 #define __FSL_DPMNG_CMD_H
6430
6431 -/* Command IDs */
6432 -#define DPMNG_CMDID_GET_CONT_ID 0x830
6433 -#define DPMNG_CMDID_GET_VERSION 0x831
6434 +/* Command versioning */
6435 +#define DPMNG_CMD_BASE_VERSION 1
6436 +#define DPMNG_CMD_ID_OFFSET 4
6437
6438 -struct dpmng_rsp_get_container_id {
6439 - __le32 container_id;
6440 -};
6441 +#define DPMNG_CMD(id) ((id << DPMNG_CMD_ID_OFFSET) | DPMNG_CMD_BASE_VERSION)
6442 +
6443 +/* Command IDs */
6444 +#define DPMNG_CMDID_GET_VERSION DPMNG_CMD(0x831)
6445
6446 struct dpmng_rsp_get_version {
6447 __le32 revision;
6448 diff --git a/drivers/staging/fsl-mc/bus/dpmng.c b/drivers/staging/fsl-mc/bus/dpmng.c
6449 index 96b1d677..ad5d5bbe 100644
6450 --- a/drivers/staging/fsl-mc/bus/dpmng.c
6451 +++ b/drivers/staging/fsl-mc/bus/dpmng.c
6452 @@ -1,4 +1,5 @@
6453 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
6454 +/*
6455 + * Copyright 2013-2016 Freescale Semiconductor Inc.
6456 *
6457 * Redistribution and use in source and binary forms, with or without
6458 * modification, are permitted provided that the following conditions are met:
6459 @@ -11,7 +12,6 @@
6460 * names of any contributors may be used to endorse or promote products
6461 * derived from this software without specific prior written permission.
6462 *
6463 - *
6464 * ALTERNATIVELY, this software may be distributed under the terms of the
6465 * GNU General Public License ("GPL") as published by the Free Software
6466 * Foundation, either version 2 of that License or (at your option) any
6467 @@ -72,36 +72,3 @@ int mc_get_version(struct fsl_mc_io *mc_io,
6468 }
6469 EXPORT_SYMBOL(mc_get_version);
6470
6471 -/**
6472 - * dpmng_get_container_id() - Get container ID associated with a given portal.
6473 - * @mc_io: Pointer to MC portal's I/O object
6474 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6475 - * @container_id: Requested container ID
6476 - *
6477 - * Return: '0' on Success; Error code otherwise.
6478 - */
6479 -int dpmng_get_container_id(struct fsl_mc_io *mc_io,
6480 - u32 cmd_flags,
6481 - int *container_id)
6482 -{
6483 - struct mc_command cmd = { 0 };
6484 - struct dpmng_rsp_get_container_id *rsp_params;
6485 - int err;
6486 -
6487 - /* prepare command */
6488 - cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_CONT_ID,
6489 - cmd_flags,
6490 - 0);
6491 -
6492 - /* send command to mc*/
6493 - err = mc_send_command(mc_io, &cmd);
6494 - if (err)
6495 - return err;
6496 -
6497 - /* retrieve response parameters */
6498 - rsp_params = (struct dpmng_rsp_get_container_id *)cmd.params;
6499 - *container_id = le32_to_cpu(rsp_params->container_id);
6500 -
6501 - return 0;
6502 -}
6503 -
6504 diff --git a/drivers/staging/fsl-mc/bus/dprc-cmd.h b/drivers/staging/fsl-mc/bus/dprc-cmd.h
6505 index 009d6567..b7d8c345 100644
6506 --- a/drivers/staging/fsl-mc/bus/dprc-cmd.h
6507 +++ b/drivers/staging/fsl-mc/bus/dprc-cmd.h
6508 @@ -12,7 +12,6 @@
6509 * names of any contributors may be used to endorse or promote products
6510 * derived from this software without specific prior written permission.
6511 *
6512 - *
6513 * ALTERNATIVELY, this software may be distributed under the terms of the
6514 * GNU General Public License ("GPL") as published by the Free Software
6515 * Foundation, either version 2 of that License or (at your option) any
6516 @@ -42,48 +41,39 @@
6517 #define _FSL_DPRC_CMD_H
6518
6519 /* Minimal supported DPRC Version */
6520 -#define DPRC_MIN_VER_MAJOR 5
6521 +#define DPRC_MIN_VER_MAJOR 6
6522 #define DPRC_MIN_VER_MINOR 0
6523
6524 +/* Command versioning */
6525 +#define DPRC_CMD_BASE_VERSION 1
6526 +#define DPRC_CMD_ID_OFFSET 4
6527 +
6528 +#define DPRC_CMD(id) ((id << DPRC_CMD_ID_OFFSET) | DPRC_CMD_BASE_VERSION)
6529 +
6530 /* Command IDs */
6531 -#define DPRC_CMDID_CLOSE 0x800
6532 -#define DPRC_CMDID_OPEN 0x805
6533 -#define DPRC_CMDID_CREATE 0x905
6534 -
6535 -#define DPRC_CMDID_GET_ATTR 0x004
6536 -#define DPRC_CMDID_RESET_CONT 0x005
6537 -
6538 -#define DPRC_CMDID_SET_IRQ 0x010
6539 -#define DPRC_CMDID_GET_IRQ 0x011
6540 -#define DPRC_CMDID_SET_IRQ_ENABLE 0x012
6541 -#define DPRC_CMDID_GET_IRQ_ENABLE 0x013
6542 -#define DPRC_CMDID_SET_IRQ_MASK 0x014
6543 -#define DPRC_CMDID_GET_IRQ_MASK 0x015
6544 -#define DPRC_CMDID_GET_IRQ_STATUS 0x016
6545 -#define DPRC_CMDID_CLEAR_IRQ_STATUS 0x017
6546 -
6547 -#define DPRC_CMDID_CREATE_CONT 0x151
6548 -#define DPRC_CMDID_DESTROY_CONT 0x152
6549 -#define DPRC_CMDID_SET_RES_QUOTA 0x155
6550 -#define DPRC_CMDID_GET_RES_QUOTA 0x156
6551 -#define DPRC_CMDID_ASSIGN 0x157
6552 -#define DPRC_CMDID_UNASSIGN 0x158
6553 -#define DPRC_CMDID_GET_OBJ_COUNT 0x159
6554 -#define DPRC_CMDID_GET_OBJ 0x15A
6555 -#define DPRC_CMDID_GET_RES_COUNT 0x15B
6556 -#define DPRC_CMDID_GET_RES_IDS 0x15C
6557 -#define DPRC_CMDID_GET_OBJ_REG 0x15E
6558 -#define DPRC_CMDID_SET_OBJ_IRQ 0x15F
6559 -#define DPRC_CMDID_GET_OBJ_IRQ 0x160
6560 -#define DPRC_CMDID_SET_OBJ_LABEL 0x161
6561 -#define DPRC_CMDID_GET_OBJ_DESC 0x162
6562 -
6563 -#define DPRC_CMDID_CONNECT 0x167
6564 -#define DPRC_CMDID_DISCONNECT 0x168
6565 -#define DPRC_CMDID_GET_POOL 0x169
6566 -#define DPRC_CMDID_GET_POOL_COUNT 0x16A
6567 -
6568 -#define DPRC_CMDID_GET_CONNECTION 0x16C
6569 +#define DPRC_CMDID_CLOSE DPRC_CMD(0x800)
6570 +#define DPRC_CMDID_OPEN DPRC_CMD(0x805)
6571 +#define DPRC_CMDID_GET_API_VERSION DPRC_CMD(0xa05)
6572 +
6573 +#define DPRC_CMDID_GET_ATTR DPRC_CMD(0x004)
6574 +#define DPRC_CMDID_RESET_CONT DPRC_CMD(0x005)
6575 +
6576 +#define DPRC_CMDID_SET_IRQ DPRC_CMD(0x010)
6577 +#define DPRC_CMDID_GET_IRQ DPRC_CMD(0x011)
6578 +#define DPRC_CMDID_SET_IRQ_ENABLE DPRC_CMD(0x012)
6579 +#define DPRC_CMDID_GET_IRQ_ENABLE DPRC_CMD(0x013)
6580 +#define DPRC_CMDID_SET_IRQ_MASK DPRC_CMD(0x014)
6581 +#define DPRC_CMDID_GET_IRQ_MASK DPRC_CMD(0x015)
6582 +#define DPRC_CMDID_GET_IRQ_STATUS DPRC_CMD(0x016)
6583 +#define DPRC_CMDID_CLEAR_IRQ_STATUS DPRC_CMD(0x017)
6584 +
6585 +#define DPRC_CMDID_GET_CONT_ID DPRC_CMD(0x830)
6586 +#define DPRC_CMDID_GET_OBJ_COUNT DPRC_CMD(0x159)
6587 +#define DPRC_CMDID_GET_OBJ DPRC_CMD(0x15A)
6588 +#define DPRC_CMDID_GET_RES_COUNT DPRC_CMD(0x15B)
6589 +#define DPRC_CMDID_GET_OBJ_REG DPRC_CMD(0x15E)
6590 +#define DPRC_CMDID_SET_OBJ_IRQ DPRC_CMD(0x15F)
6591 +#define DPRC_CMDID_GET_OBJ_IRQ DPRC_CMD(0x160)
6592
6593 struct dprc_cmd_open {
6594 __le32 container_id;
6595 @@ -199,9 +189,6 @@ struct dprc_rsp_get_attributes {
6596 /* response word 1 */
6597 __le32 options;
6598 __le32 portal_id;
6599 - /* response word 2 */
6600 - __le16 version_major;
6601 - __le16 version_minor;
6602 };
6603
6604 struct dprc_cmd_set_res_quota {
6605 @@ -367,11 +354,16 @@ struct dprc_cmd_get_obj_region {
6606
6607 struct dprc_rsp_get_obj_region {
6608 /* response word 0 */
6609 - __le64 pad;
6610 + __le64 pad0;
6611 /* response word 1 */
6612 - __le64 base_addr;
6613 + __le32 base_addr;
6614 + __le32 pad1;
6615 /* response word 2 */
6616 __le32 size;
6617 + u8 type;
6618 + u8 pad2[3];
6619 + /* response word 3 */
6620 + __le32 flags;
6621 };
6622
6623 struct dprc_cmd_set_obj_label {
6624 diff --git a/drivers/staging/fsl-mc/bus/dprc-driver.c b/drivers/staging/fsl-mc/bus/dprc-driver.c
6625 index c5ee4639..f6e6211b 100644
6626 --- a/drivers/staging/fsl-mc/bus/dprc-driver.c
6627 +++ b/drivers/staging/fsl-mc/bus/dprc-driver.c
6628 @@ -1,7 +1,7 @@
6629 /*
6630 * Freescale data path resource container (DPRC) driver
6631 *
6632 - * Copyright (C) 2014 Freescale Semiconductor, Inc.
6633 + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
6634 * Author: German Rivera <German.Rivera@freescale.com>
6635 *
6636 * This file is licensed under the terms of the GNU General Public
6637 @@ -160,6 +160,8 @@ static void check_plugged_state_change(struct fsl_mc_device *mc_dev,
6638 * dprc_add_new_devices - Adds devices to the logical bus for a DPRC
6639 *
6640 * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
6641 + * @driver_override: driver override to apply to new objects found in the
6642 + * DPRC, or NULL, if none.
6643 * @obj_desc_array: array of device descriptors for child devices currently
6644 * present in the physical DPRC.
6645 * @num_child_objects_in_mc: number of entries in obj_desc_array
6646 @@ -169,6 +171,7 @@ static void check_plugged_state_change(struct fsl_mc_device *mc_dev,
6647 * in the physical DPRC.
6648 */
6649 static void dprc_add_new_devices(struct fsl_mc_device *mc_bus_dev,
6650 + const char *driver_override,
6651 struct dprc_obj_desc *obj_desc_array,
6652 int num_child_objects_in_mc)
6653 {
6654 @@ -188,11 +191,12 @@ static void dprc_add_new_devices(struct fsl_mc_device *mc_bus_dev,
6655 child_dev = fsl_mc_device_lookup(obj_desc, mc_bus_dev);
6656 if (child_dev) {
6657 check_plugged_state_change(child_dev, obj_desc);
6658 + put_device(&child_dev->dev);
6659 continue;
6660 }
6661
6662 error = fsl_mc_device_add(obj_desc, NULL, &mc_bus_dev->dev,
6663 - &child_dev);
6664 + driver_override, &child_dev);
6665 if (error < 0)
6666 continue;
6667 }
6668 @@ -202,6 +206,8 @@ static void dprc_add_new_devices(struct fsl_mc_device *mc_bus_dev,
6669 * dprc_scan_objects - Discover objects in a DPRC
6670 *
6671 * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
6672 + * @driver_override: driver override to apply to new objects found in the
6673 + * DPRC, or NULL, if none.
6674 * @total_irq_count: total number of IRQs needed by objects in the DPRC.
6675 *
6676 * Detects objects added and removed from a DPRC and synchronizes the
6677 @@ -217,6 +223,7 @@ static void dprc_add_new_devices(struct fsl_mc_device *mc_bus_dev,
6678 * of the device drivers for the non-allocatable devices.
6679 */
6680 int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev,
6681 + const char *driver_override,
6682 unsigned int *total_irq_count)
6683 {
6684 int num_child_objects;
6685 @@ -297,7 +304,7 @@ int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev,
6686 dprc_remove_devices(mc_bus_dev, child_obj_desc_array,
6687 num_child_objects);
6688
6689 - dprc_add_new_devices(mc_bus_dev, child_obj_desc_array,
6690 + dprc_add_new_devices(mc_bus_dev, driver_override, child_obj_desc_array,
6691 num_child_objects);
6692
6693 if (child_obj_desc_array)
6694 @@ -328,7 +335,7 @@ int dprc_scan_container(struct fsl_mc_device *mc_bus_dev)
6695 * Discover objects in the DPRC:
6696 */
6697 mutex_lock(&mc_bus->scan_mutex);
6698 - error = dprc_scan_objects(mc_bus_dev, &irq_count);
6699 + error = dprc_scan_objects(mc_bus_dev, NULL, &irq_count);
6700 mutex_unlock(&mc_bus->scan_mutex);
6701 if (error < 0)
6702 goto error;
6703 @@ -415,7 +422,7 @@ static irqreturn_t dprc_irq0_handler_thread(int irq_num, void *arg)
6704 DPRC_IRQ_EVENT_OBJ_CREATED)) {
6705 unsigned int irq_count;
6706
6707 - error = dprc_scan_objects(mc_dev, &irq_count);
6708 + error = dprc_scan_objects(mc_dev, NULL, &irq_count);
6709 if (error < 0) {
6710 /*
6711 * If the error is -ENXIO, we ignore it, as it indicates
6712 @@ -505,7 +512,7 @@ static int register_dprc_irq_handler(struct fsl_mc_device *mc_dev)
6713 dprc_irq0_handler,
6714 dprc_irq0_handler_thread,
6715 IRQF_NO_SUSPEND | IRQF_ONESHOT,
6716 - "FSL MC DPRC irq0",
6717 + dev_name(&mc_dev->dev),
6718 &mc_dev->dev);
6719 if (error < 0) {
6720 dev_err(&mc_dev->dev,
6721 @@ -597,6 +604,7 @@ static int dprc_probe(struct fsl_mc_device *mc_dev)
6722 struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_dev);
6723 bool mc_io_created = false;
6724 bool msi_domain_set = false;
6725 + u16 major_ver, minor_ver;
6726
6727 if (WARN_ON(strcmp(mc_dev->obj_desc.type, "dprc") != 0))
6728 return -EINVAL;
6729 @@ -669,13 +677,21 @@ static int dprc_probe(struct fsl_mc_device *mc_dev)
6730 goto error_cleanup_open;
6731 }
6732
6733 - if (mc_bus->dprc_attr.version.major < DPRC_MIN_VER_MAJOR ||
6734 - (mc_bus->dprc_attr.version.major == DPRC_MIN_VER_MAJOR &&
6735 - mc_bus->dprc_attr.version.minor < DPRC_MIN_VER_MINOR)) {
6736 + error = dprc_get_api_version(mc_dev->mc_io, 0,
6737 + &major_ver,
6738 + &minor_ver);
6739 + if (error < 0) {
6740 + dev_err(&mc_dev->dev, "dprc_get_api_version() failed: %d\n",
6741 + error);
6742 + goto error_cleanup_open;
6743 + }
6744 +
6745 + if (major_ver < DPRC_MIN_VER_MAJOR ||
6746 + (major_ver == DPRC_MIN_VER_MAJOR &&
6747 + minor_ver < DPRC_MIN_VER_MINOR)) {
6748 dev_err(&mc_dev->dev,
6749 "ERROR: DPRC version %d.%d not supported\n",
6750 - mc_bus->dprc_attr.version.major,
6751 - mc_bus->dprc_attr.version.minor);
6752 + major_ver, minor_ver);
6753 error = -ENOTSUPP;
6754 goto error_cleanup_open;
6755 }
6756 diff --git a/drivers/staging/fsl-mc/bus/dprc.c b/drivers/staging/fsl-mc/bus/dprc.c
6757 index 9fea3def..764cd3fb 100644
6758 --- a/drivers/staging/fsl-mc/bus/dprc.c
6759 +++ b/drivers/staging/fsl-mc/bus/dprc.c
6760 @@ -1,4 +1,5 @@
6761 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
6762 +/*
6763 + * Copyright 2013-2016 Freescale Semiconductor Inc.
6764 *
6765 * Redistribution and use in source and binary forms, with or without
6766 * modification, are permitted provided that the following conditions are met:
6767 @@ -11,7 +12,6 @@
6768 * names of any contributors may be used to endorse or promote products
6769 * derived from this software without specific prior written permission.
6770 *
6771 - *
6772 * ALTERNATIVELY, this software may be distributed under the terms of the
6773 * GNU General Public License ("GPL") as published by the Free Software
6774 * Foundation, either version 2 of that License or (at your option) any
6775 @@ -99,93 +99,6 @@ int dprc_close(struct fsl_mc_io *mc_io,
6776 }
6777 EXPORT_SYMBOL(dprc_close);
6778
6779 -/**
6780 - * dprc_create_container() - Create child container
6781 - * @mc_io: Pointer to MC portal's I/O object
6782 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6783 - * @token: Token of DPRC object
6784 - * @cfg: Child container configuration
6785 - * @child_container_id: Returned child container ID
6786 - * @child_portal_offset: Returned child portal offset from MC portal base
6787 - *
6788 - * Return: '0' on Success; Error code otherwise.
6789 - */
6790 -int dprc_create_container(struct fsl_mc_io *mc_io,
6791 - u32 cmd_flags,
6792 - u16 token,
6793 - struct dprc_cfg *cfg,
6794 - int *child_container_id,
6795 - u64 *child_portal_offset)
6796 -{
6797 - struct mc_command cmd = { 0 };
6798 - struct dprc_cmd_create_container *cmd_params;
6799 - struct dprc_rsp_create_container *rsp_params;
6800 - int err;
6801 -
6802 - /* prepare command */
6803 - cmd_params = (struct dprc_cmd_create_container *)cmd.params;
6804 - cmd_params->options = cpu_to_le32(cfg->options);
6805 - cmd_params->icid = cpu_to_le16(cfg->icid);
6806 - cmd_params->portal_id = cpu_to_le32(cfg->portal_id);
6807 - strncpy(cmd_params->label, cfg->label, 16);
6808 - cmd_params->label[15] = '\0';
6809 -
6810 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_CREATE_CONT,
6811 - cmd_flags, token);
6812 -
6813 - /* send command to mc*/
6814 - err = mc_send_command(mc_io, &cmd);
6815 - if (err)
6816 - return err;
6817 -
6818 - /* retrieve response parameters */
6819 - rsp_params = (struct dprc_rsp_create_container *)cmd.params;
6820 - *child_container_id = le32_to_cpu(rsp_params->child_container_id);
6821 - *child_portal_offset = le64_to_cpu(rsp_params->child_portal_addr);
6822 -
6823 - return 0;
6824 -}
6825 -
6826 -/**
6827 - * dprc_destroy_container() - Destroy child container.
6828 - * @mc_io: Pointer to MC portal's I/O object
6829 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6830 - * @token: Token of DPRC object
6831 - * @child_container_id: ID of the container to destroy
6832 - *
6833 - * This function terminates the child container, so following this call the
6834 - * child container ID becomes invalid.
6835 - *
6836 - * Notes:
6837 - * - All resources and objects of the destroyed container are returned to the
6838 - * parent container or destroyed if were created be the destroyed container.
6839 - * - This function destroy all the child containers of the specified
6840 - * container prior to destroying the container itself.
6841 - *
6842 - * warning: Only the parent container is allowed to destroy a child policy
6843 - * Container 0 can't be destroyed
6844 - *
6845 - * Return: '0' on Success; Error code otherwise.
6846 - *
6847 - */
6848 -int dprc_destroy_container(struct fsl_mc_io *mc_io,
6849 - u32 cmd_flags,
6850 - u16 token,
6851 - int child_container_id)
6852 -{
6853 - struct mc_command cmd = { 0 };
6854 - struct dprc_cmd_destroy_container *cmd_params;
6855 -
6856 - /* prepare command */
6857 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_DESTROY_CONT,
6858 - cmd_flags, token);
6859 - cmd_params = (struct dprc_cmd_destroy_container *)cmd.params;
6860 - cmd_params->child_container_id = cpu_to_le32(child_container_id);
6861 -
6862 - /* send command to mc*/
6863 - return mc_send_command(mc_io, &cmd);
6864 -}
6865 -
6866 /**
6867 * dprc_reset_container - Reset child container.
6868 * @mc_io: Pointer to MC portal's I/O object
6869 @@ -565,279 +478,6 @@ int dprc_get_attributes(struct fsl_mc_io *mc_io,
6870 attr->icid = le16_to_cpu(rsp_params->icid);
6871 attr->options = le32_to_cpu(rsp_params->options);
6872 attr->portal_id = le32_to_cpu(rsp_params->portal_id);
6873 - attr->version.major = le16_to_cpu(rsp_params->version_major);
6874 - attr->version.minor = le16_to_cpu(rsp_params->version_minor);
6875 -
6876 - return 0;
6877 -}
6878 -
6879 -/**
6880 - * dprc_set_res_quota() - Set allocation policy for a specific resource/object
6881 - * type in a child container
6882 - * @mc_io: Pointer to MC portal's I/O object
6883 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6884 - * @token: Token of DPRC object
6885 - * @child_container_id: ID of the child container
6886 - * @type: Resource/object type
6887 - * @quota: Sets the maximum number of resources of the selected type
6888 - * that the child container is allowed to allocate from its parent;
6889 - * when quota is set to -1, the policy is the same as container's
6890 - * general policy.
6891 - *
6892 - * Allocation policy determines whether or not a container may allocate
6893 - * resources from its parent. Each container has a 'global' allocation policy
6894 - * that is set when the container is created.
6895 - *
6896 - * This function sets allocation policy for a specific resource type.
6897 - * The default policy for all resource types matches the container's 'global'
6898 - * allocation policy.
6899 - *
6900 - * Return: '0' on Success; Error code otherwise.
6901 - *
6902 - * @warning Only the parent container is allowed to change a child policy.
6903 - */
6904 -int dprc_set_res_quota(struct fsl_mc_io *mc_io,
6905 - u32 cmd_flags,
6906 - u16 token,
6907 - int child_container_id,
6908 - char *type,
6909 - u16 quota)
6910 -{
6911 - struct mc_command cmd = { 0 };
6912 - struct dprc_cmd_set_res_quota *cmd_params;
6913 -
6914 - /* prepare command */
6915 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_RES_QUOTA,
6916 - cmd_flags, token);
6917 - cmd_params = (struct dprc_cmd_set_res_quota *)cmd.params;
6918 - cmd_params->child_container_id = cpu_to_le32(child_container_id);
6919 - cmd_params->quota = cpu_to_le16(quota);
6920 - strncpy(cmd_params->type, type, 16);
6921 - cmd_params->type[15] = '\0';
6922 -
6923 - /* send command to mc*/
6924 - return mc_send_command(mc_io, &cmd);
6925 -}
6926 -
6927 -/**
6928 - * dprc_get_res_quota() - Gets the allocation policy of a specific
6929 - * resource/object type in a child container
6930 - * @mc_io: Pointer to MC portal's I/O object
6931 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6932 - * @token: Token of DPRC object
6933 - * @child_container_id; ID of the child container
6934 - * @type: resource/object type
6935 - * @quota: Returnes the maximum number of resources of the selected type
6936 - * that the child container is allowed to allocate from the parent;
6937 - * when quota is set to -1, the policy is the same as container's
6938 - * general policy.
6939 - *
6940 - * Return: '0' on Success; Error code otherwise.
6941 - */
6942 -int dprc_get_res_quota(struct fsl_mc_io *mc_io,
6943 - u32 cmd_flags,
6944 - u16 token,
6945 - int child_container_id,
6946 - char *type,
6947 - u16 *quota)
6948 -{
6949 - struct mc_command cmd = { 0 };
6950 - struct dprc_cmd_get_res_quota *cmd_params;
6951 - struct dprc_rsp_get_res_quota *rsp_params;
6952 - int err;
6953 -
6954 - /* prepare command */
6955 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_QUOTA,
6956 - cmd_flags, token);
6957 - cmd_params = (struct dprc_cmd_get_res_quota *)cmd.params;
6958 - cmd_params->child_container_id = cpu_to_le32(child_container_id);
6959 - strncpy(cmd_params->type, type, 16);
6960 - cmd_params->type[15] = '\0';
6961 -
6962 - /* send command to mc*/
6963 - err = mc_send_command(mc_io, &cmd);
6964 - if (err)
6965 - return err;
6966 -
6967 - /* retrieve response parameters */
6968 - rsp_params = (struct dprc_rsp_get_res_quota *)cmd.params;
6969 - *quota = le16_to_cpu(rsp_params->quota);
6970 -
6971 - return 0;
6972 -}
6973 -
6974 -/**
6975 - * dprc_assign() - Assigns objects or resource to a child container.
6976 - * @mc_io: Pointer to MC portal's I/O object
6977 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6978 - * @token: Token of DPRC object
6979 - * @container_id: ID of the child container
6980 - * @res_req: Describes the type and amount of resources to
6981 - * assign to the given container
6982 - *
6983 - * Assignment is usually done by a parent (this DPRC) to one of its child
6984 - * containers.
6985 - *
6986 - * According to the DPRC allocation policy, the assigned resources may be taken
6987 - * (allocated) from the container's ancestors, if not enough resources are
6988 - * available in the container itself.
6989 - *
6990 - * The type of assignment depends on the dprc_res_req options, as follows:
6991 - * - DPRC_RES_REQ_OPT_EXPLICIT: indicates that assigned resources should have
6992 - * the explicit base ID specified at the id_base_align field of res_req.
6993 - * - DPRC_RES_REQ_OPT_ALIGNED: indicates that the assigned resources should be
6994 - * aligned to the value given at id_base_align field of res_req.
6995 - * - DPRC_RES_REQ_OPT_PLUGGED: Relevant only for object assignment,
6996 - * and indicates that the object must be set to the plugged state.
6997 - *
6998 - * A container may use this function with its own ID in order to change a
6999 - * object state to plugged or unplugged.
7000 - *
7001 - * If IRQ information has been set in the child DPRC, it will signal an
7002 - * interrupt following every change in its object assignment.
7003 - *
7004 - * Return: '0' on Success; Error code otherwise.
7005 - */
7006 -int dprc_assign(struct fsl_mc_io *mc_io,
7007 - u32 cmd_flags,
7008 - u16 token,
7009 - int container_id,
7010 - struct dprc_res_req *res_req)
7011 -{
7012 - struct mc_command cmd = { 0 };
7013 - struct dprc_cmd_assign *cmd_params;
7014 -
7015 - /* prepare command */
7016 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_ASSIGN,
7017 - cmd_flags, token);
7018 - cmd_params = (struct dprc_cmd_assign *)cmd.params;
7019 - cmd_params->container_id = cpu_to_le32(container_id);
7020 - cmd_params->options = cpu_to_le32(res_req->options);
7021 - cmd_params->num = cpu_to_le32(res_req->num);
7022 - cmd_params->id_base_align = cpu_to_le32(res_req->id_base_align);
7023 - strncpy(cmd_params->type, res_req->type, 16);
7024 - cmd_params->type[15] = '\0';
7025 -
7026 - /* send command to mc*/
7027 - return mc_send_command(mc_io, &cmd);
7028 -}
7029 -
7030 -/**
7031 - * dprc_unassign() - Un-assigns objects or resources from a child container
7032 - * and moves them into this (parent) DPRC.
7033 - * @mc_io: Pointer to MC portal's I/O object
7034 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7035 - * @token: Token of DPRC object
7036 - * @child_container_id: ID of the child container
7037 - * @res_req: Describes the type and amount of resources to un-assign from
7038 - * the child container
7039 - *
7040 - * Un-assignment of objects can succeed only if the object is not in the
7041 - * plugged or opened state.
7042 - *
7043 - * Return: '0' on Success; Error code otherwise.
7044 - */
7045 -int dprc_unassign(struct fsl_mc_io *mc_io,
7046 - u32 cmd_flags,
7047 - u16 token,
7048 - int child_container_id,
7049 - struct dprc_res_req *res_req)
7050 -{
7051 - struct mc_command cmd = { 0 };
7052 - struct dprc_cmd_unassign *cmd_params;
7053 -
7054 - /* prepare command */
7055 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_UNASSIGN,
7056 - cmd_flags,
7057 - token);
7058 - cmd_params = (struct dprc_cmd_unassign *)cmd.params;
7059 - cmd_params->child_container_id = cpu_to_le32(child_container_id);
7060 - cmd_params->options = cpu_to_le32(res_req->options);
7061 - cmd_params->num = cpu_to_le32(res_req->num);
7062 - cmd_params->id_base_align = cpu_to_le32(res_req->id_base_align);
7063 - strncpy(cmd_params->type, res_req->type, 16);
7064 - cmd_params->type[15] = '\0';
7065 -
7066 - /* send command to mc*/
7067 - return mc_send_command(mc_io, &cmd);
7068 -}
7069 -
7070 -/**
7071 - * dprc_get_pool_count() - Get the number of dprc's pools
7072 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7073 - * @mc_io: Pointer to MC portal's I/O object
7074 - * @token: Token of DPRC object
7075 - * @pool_count: Returned number of resource pools in the dprc
7076 - *
7077 - * Return: '0' on Success; Error code otherwise.
7078 - */
7079 -int dprc_get_pool_count(struct fsl_mc_io *mc_io,
7080 - u32 cmd_flags,
7081 - u16 token,
7082 - int *pool_count)
7083 -{
7084 - struct mc_command cmd = { 0 };
7085 - struct dprc_rsp_get_pool_count *rsp_params;
7086 - int err;
7087 -
7088 - /* prepare command */
7089 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL_COUNT,
7090 - cmd_flags, token);
7091 -
7092 - /* send command to mc*/
7093 - err = mc_send_command(mc_io, &cmd);
7094 - if (err)
7095 - return err;
7096 -
7097 - /* retrieve response parameters */
7098 - rsp_params = (struct dprc_rsp_get_pool_count *)cmd.params;
7099 - *pool_count = le32_to_cpu(rsp_params->pool_count);
7100 -
7101 - return 0;
7102 -}
7103 -
7104 -/**
7105 - * dprc_get_pool() - Get the type (string) of a certain dprc's pool
7106 - * @mc_io: Pointer to MC portal's I/O object
7107 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7108 - * @token: Token of DPRC object
7109 - * @pool_index; Index of the pool to be queried (< pool_count)
7110 - * @type: The type of the pool
7111 - *
7112 - * The pool types retrieved one by one by incrementing
7113 - * pool_index up to (not including) the value of pool_count returned
7114 - * from dprc_get_pool_count(). dprc_get_pool_count() must
7115 - * be called prior to dprc_get_pool().
7116 - *
7117 - * Return: '0' on Success; Error code otherwise.
7118 - */
7119 -int dprc_get_pool(struct fsl_mc_io *mc_io,
7120 - u32 cmd_flags,
7121 - u16 token,
7122 - int pool_index,
7123 - char *type)
7124 -{
7125 - struct mc_command cmd = { 0 };
7126 - struct dprc_cmd_get_pool *cmd_params;
7127 - struct dprc_rsp_get_pool *rsp_params;
7128 - int err;
7129 -
7130 - /* prepare command */
7131 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL,
7132 - cmd_flags,
7133 - token);
7134 - cmd_params = (struct dprc_cmd_get_pool *)cmd.params;
7135 - cmd_params->pool_index = cpu_to_le32(pool_index);
7136 -
7137 - /* send command to mc*/
7138 - err = mc_send_command(mc_io, &cmd);
7139 - if (err)
7140 - return err;
7141 -
7142 - /* retrieve response parameters */
7143 - rsp_params = (struct dprc_rsp_get_pool *)cmd.params;
7144 - strncpy(type, rsp_params->type, 16);
7145 - type[15] = '\0';
7146
7147 return 0;
7148 }
7149 @@ -933,64 +573,6 @@ int dprc_get_obj(struct fsl_mc_io *mc_io,
7150 }
7151 EXPORT_SYMBOL(dprc_get_obj);
7152
7153 -/**
7154 - * dprc_get_obj_desc() - Get object descriptor.
7155 - *
7156 - * @mc_io: Pointer to MC portal's I/O object
7157 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7158 - * @token: Token of DPRC object
7159 - * @obj_type: The type of the object to get its descriptor.
7160 - * @obj_id: The id of the object to get its descriptor
7161 - * @obj_desc: The returned descriptor to fill and return to the user
7162 - *
7163 - * Return: '0' on Success; Error code otherwise.
7164 - *
7165 - */
7166 -int dprc_get_obj_desc(struct fsl_mc_io *mc_io,
7167 - u32 cmd_flags,
7168 - u16 token,
7169 - char *obj_type,
7170 - int obj_id,
7171 - struct dprc_obj_desc *obj_desc)
7172 -{
7173 - struct mc_command cmd = { 0 };
7174 - struct dprc_cmd_get_obj_desc *cmd_params;
7175 - struct dprc_rsp_get_obj_desc *rsp_params;
7176 - int err;
7177 -
7178 - /* prepare command */
7179 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_DESC,
7180 - cmd_flags,
7181 - token);
7182 - cmd_params = (struct dprc_cmd_get_obj_desc *)cmd.params;
7183 - cmd_params->obj_id = cpu_to_le32(obj_id);
7184 - strncpy(cmd_params->type, obj_type, 16);
7185 - cmd_params->type[15] = '\0';
7186 -
7187 - /* send command to mc*/
7188 - err = mc_send_command(mc_io, &cmd);
7189 - if (err)
7190 - return err;
7191 -
7192 - /* retrieve response parameters */
7193 - rsp_params = (struct dprc_rsp_get_obj_desc *)cmd.params;
7194 - obj_desc->id = le32_to_cpu(rsp_params->id);
7195 - obj_desc->vendor = le16_to_cpu(rsp_params->vendor);
7196 - obj_desc->irq_count = rsp_params->irq_count;
7197 - obj_desc->region_count = rsp_params->region_count;
7198 - obj_desc->state = le32_to_cpu(rsp_params->state);
7199 - obj_desc->ver_major = le16_to_cpu(rsp_params->version_major);
7200 - obj_desc->ver_minor = le16_to_cpu(rsp_params->version_minor);
7201 - obj_desc->flags = le16_to_cpu(rsp_params->flags);
7202 - strncpy(obj_desc->type, rsp_params->type, 16);
7203 - obj_desc->type[15] = '\0';
7204 - strncpy(obj_desc->label, rsp_params->label, 16);
7205 - obj_desc->label[15] = '\0';
7206 -
7207 - return 0;
7208 -}
7209 -EXPORT_SYMBOL(dprc_get_obj_desc);
7210 -
7211 /**
7212 * dprc_set_obj_irq() - Set IRQ information for object to trigger an interrupt.
7213 * @mc_io: Pointer to MC portal's I/O object
7214 @@ -1129,52 +711,6 @@ int dprc_get_res_count(struct fsl_mc_io *mc_io,
7215 }
7216 EXPORT_SYMBOL(dprc_get_res_count);
7217
7218 -/**
7219 - * dprc_get_res_ids() - Obtains IDs of free resources in the container
7220 - * @mc_io: Pointer to MC portal's I/O object
7221 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7222 - * @token: Token of DPRC object
7223 - * @type: pool type
7224 - * @range_desc: range descriptor
7225 - *
7226 - * Return: '0' on Success; Error code otherwise.
7227 - */
7228 -int dprc_get_res_ids(struct fsl_mc_io *mc_io,
7229 - u32 cmd_flags,
7230 - u16 token,
7231 - char *type,
7232 - struct dprc_res_ids_range_desc *range_desc)
7233 -{
7234 - struct mc_command cmd = { 0 };
7235 - struct dprc_cmd_get_res_ids *cmd_params;
7236 - struct dprc_rsp_get_res_ids *rsp_params;
7237 - int err;
7238 -
7239 - /* prepare command */
7240 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_IDS,
7241 - cmd_flags, token);
7242 - cmd_params = (struct dprc_cmd_get_res_ids *)cmd.params;
7243 - cmd_params->iter_status = range_desc->iter_status;
7244 - cmd_params->base_id = cpu_to_le32(range_desc->base_id);
7245 - cmd_params->last_id = cpu_to_le32(range_desc->last_id);
7246 - strncpy(cmd_params->type, type, 16);
7247 - cmd_params->type[15] = '\0';
7248 -
7249 - /* send command to mc*/
7250 - err = mc_send_command(mc_io, &cmd);
7251 - if (err)
7252 - return err;
7253 -
7254 - /* retrieve response parameters */
7255 - rsp_params = (struct dprc_rsp_get_res_ids *)cmd.params;
7256 - range_desc->iter_status = rsp_params->iter_status;
7257 - range_desc->base_id = le32_to_cpu(rsp_params->base_id);
7258 - range_desc->last_id = le32_to_cpu(rsp_params->last_id);
7259 -
7260 - return 0;
7261 -}
7262 -EXPORT_SYMBOL(dprc_get_res_ids);
7263 -
7264 /**
7265 * dprc_get_obj_region() - Get region information for a specified object.
7266 * @mc_io: Pointer to MC portal's I/O object
7267 @@ -1216,160 +752,66 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io,
7268
7269 /* retrieve response parameters */
7270 rsp_params = (struct dprc_rsp_get_obj_region *)cmd.params;
7271 - region_desc->base_offset = le64_to_cpu(rsp_params->base_addr);
7272 + region_desc->base_offset = le32_to_cpu(rsp_params->base_addr);
7273 region_desc->size = le32_to_cpu(rsp_params->size);
7274 + region_desc->type = rsp_params->type;
7275 + region_desc->flags = le32_to_cpu(rsp_params->flags);
7276
7277 return 0;
7278 }
7279 EXPORT_SYMBOL(dprc_get_obj_region);
7280
7281 /**
7282 - * dprc_set_obj_label() - Set object label.
7283 - * @mc_io: Pointer to MC portal's I/O object
7284 + * dprc_get_api_version - Get Data Path Resource Container API version
7285 + * @mc_io: Pointer to Mc portal's I/O object
7286 * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7287 - * @token: Token of DPRC object
7288 - * @obj_type: Object's type
7289 - * @obj_id: Object's ID
7290 - * @label: The required label. The maximum length is 16 chars.
7291 + * @major_ver: Major version of Data Path Resource Container API
7292 + * @minor_ver: Minor version of Data Path Resource Container API
7293 *
7294 * Return: '0' on Success; Error code otherwise.
7295 */
7296 -int dprc_set_obj_label(struct fsl_mc_io *mc_io,
7297 - u32 cmd_flags,
7298 - u16 token,
7299 - char *obj_type,
7300 - int obj_id,
7301 - char *label)
7302 +int dprc_get_api_version(struct fsl_mc_io *mc_io,
7303 + u32 cmd_flags,
7304 + u16 *major_ver,
7305 + u16 *minor_ver)
7306 {
7307 struct mc_command cmd = { 0 };
7308 - struct dprc_cmd_set_obj_label *cmd_params;
7309 + int err;
7310
7311 /* prepare command */
7312 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_OBJ_LABEL,
7313 - cmd_flags,
7314 - token);
7315 - cmd_params = (struct dprc_cmd_set_obj_label *)cmd.params;
7316 - cmd_params->obj_id = cpu_to_le32(obj_id);
7317 - strncpy(cmd_params->label, label, 16);
7318 - cmd_params->label[15] = '\0';
7319 - strncpy(cmd_params->obj_type, obj_type, 16);
7320 - cmd_params->obj_type[15] = '\0';
7321 + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_API_VERSION,
7322 + cmd_flags, 0);
7323
7324 - /* send command to mc*/
7325 - return mc_send_command(mc_io, &cmd);
7326 -}
7327 -EXPORT_SYMBOL(dprc_set_obj_label);
7328 -
7329 -/**
7330 - * dprc_connect() - Connect two endpoints to create a network link between them
7331 - * @mc_io: Pointer to MC portal's I/O object
7332 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7333 - * @token: Token of DPRC object
7334 - * @endpoint1: Endpoint 1 configuration parameters
7335 - * @endpoint2: Endpoint 2 configuration parameters
7336 - * @cfg: Connection configuration. The connection configuration is ignored for
7337 - * connections made to DPMAC objects, where rate is retrieved from the
7338 - * MAC configuration.
7339 - *
7340 - * Return: '0' on Success; Error code otherwise.
7341 - */
7342 -int dprc_connect(struct fsl_mc_io *mc_io,
7343 - u32 cmd_flags,
7344 - u16 token,
7345 - const struct dprc_endpoint *endpoint1,
7346 - const struct dprc_endpoint *endpoint2,
7347 - const struct dprc_connection_cfg *cfg)
7348 -{
7349 - struct mc_command cmd = { 0 };
7350 - struct dprc_cmd_connect *cmd_params;
7351 + /* send command to mc */
7352 + err = mc_send_command(mc_io, &cmd);
7353 + if (err)
7354 + return err;
7355
7356 - /* prepare command */
7357 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_CONNECT,
7358 - cmd_flags,
7359 - token);
7360 - cmd_params = (struct dprc_cmd_connect *)cmd.params;
7361 - cmd_params->ep1_id = cpu_to_le32(endpoint1->id);
7362 - cmd_params->ep1_interface_id = cpu_to_le32(endpoint1->if_id);
7363 - cmd_params->ep2_id = cpu_to_le32(endpoint2->id);
7364 - cmd_params->ep2_interface_id = cpu_to_le32(endpoint2->if_id);
7365 - strncpy(cmd_params->ep1_type, endpoint1->type, 16);
7366 - cmd_params->ep1_type[15] = '\0';
7367 - cmd_params->max_rate = cpu_to_le32(cfg->max_rate);
7368 - cmd_params->committed_rate = cpu_to_le32(cfg->committed_rate);
7369 - strncpy(cmd_params->ep2_type, endpoint2->type, 16);
7370 - cmd_params->ep2_type[15] = '\0';
7371 + /* retrieve response parameters */
7372 + mc_cmd_read_api_version(&cmd, major_ver, minor_ver);
7373
7374 - /* send command to mc*/
7375 - return mc_send_command(mc_io, &cmd);
7376 + return 0;
7377 }
7378
7379 /**
7380 - * dprc_disconnect() - Disconnect one endpoint to remove its network connection
7381 - * @mc_io: Pointer to MC portal's I/O object
7382 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7383 - * @token: Token of DPRC object
7384 - * @endpoint: Endpoint configuration parameters
7385 + * dprc_get_container_id - Get container ID associated with a given portal.
7386 + * @mc_io: Pointer to Mc portal's I/O object
7387 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7388 + * @container_id: Requested container id
7389 *
7390 * Return: '0' on Success; Error code otherwise.
7391 */
7392 -int dprc_disconnect(struct fsl_mc_io *mc_io,
7393 - u32 cmd_flags,
7394 - u16 token,
7395 - const struct dprc_endpoint *endpoint)
7396 -{
7397 - struct mc_command cmd = { 0 };
7398 - struct dprc_cmd_disconnect *cmd_params;
7399 -
7400 - /* prepare command */
7401 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_DISCONNECT,
7402 - cmd_flags,
7403 - token);
7404 - cmd_params = (struct dprc_cmd_disconnect *)cmd.params;
7405 - cmd_params->id = cpu_to_le32(endpoint->id);
7406 - cmd_params->interface_id = cpu_to_le32(endpoint->if_id);
7407 - strncpy(cmd_params->type, endpoint->type, 16);
7408 - cmd_params->type[15] = '\0';
7409 -
7410 - /* send command to mc*/
7411 - return mc_send_command(mc_io, &cmd);
7412 -}
7413 -
7414 -/**
7415 - * dprc_get_connection() - Get connected endpoint and link status if connection
7416 - * exists.
7417 - * @mc_io: Pointer to MC portal's I/O object
7418 - * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7419 - * @token: Token of DPRC object
7420 - * @endpoint1: Endpoint 1 configuration parameters
7421 - * @endpoint2: Returned endpoint 2 configuration parameters
7422 - * @state: Returned link state:
7423 - * 1 - link is up;
7424 - * 0 - link is down;
7425 - * -1 - no connection (endpoint2 information is irrelevant)
7426 - *
7427 - * Return: '0' on Success; -ENAVAIL if connection does not exist.
7428 - */
7429 -int dprc_get_connection(struct fsl_mc_io *mc_io,
7430 - u32 cmd_flags,
7431 - u16 token,
7432 - const struct dprc_endpoint *endpoint1,
7433 - struct dprc_endpoint *endpoint2,
7434 - int *state)
7435 +int dprc_get_container_id(struct fsl_mc_io *mc_io,
7436 + u32 cmd_flags,
7437 + int *container_id)
7438 {
7439 struct mc_command cmd = { 0 };
7440 - struct dprc_cmd_get_connection *cmd_params;
7441 - struct dprc_rsp_get_connection *rsp_params;
7442 int err;
7443
7444 /* prepare command */
7445 - cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONNECTION,
7446 + cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONT_ID,
7447 cmd_flags,
7448 - token);
7449 - cmd_params = (struct dprc_cmd_get_connection *)cmd.params;
7450 - cmd_params->ep1_id = cpu_to_le32(endpoint1->id);
7451 - cmd_params->ep1_interface_id = cpu_to_le32(endpoint1->if_id);
7452 - strncpy(cmd_params->ep1_type, endpoint1->type, 16);
7453 - cmd_params->ep1_type[15] = '\0';
7454 + 0);
7455
7456 /* send command to mc*/
7457 err = mc_send_command(mc_io, &cmd);
7458 @@ -1377,12 +819,7 @@ int dprc_get_connection(struct fsl_mc_io *mc_io,
7459 return err;
7460
7461 /* retrieve response parameters */
7462 - rsp_params = (struct dprc_rsp_get_connection *)cmd.params;
7463 - endpoint2->id = le32_to_cpu(rsp_params->ep2_id);
7464 - endpoint2->if_id = le32_to_cpu(rsp_params->ep2_interface_id);
7465 - strncpy(endpoint2->type, rsp_params->ep2_type, 16);
7466 - endpoint2->type[15] = '\0';
7467 - *state = le32_to_cpu(rsp_params->state);
7468 + *container_id = (int)mc_cmd_read_object_id(&cmd);
7469
7470 return 0;
7471 }
7472 diff --git a/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c b/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
7473 index e93ab53b..ce07096c 100644
7474 --- a/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
7475 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
7476 @@ -1,7 +1,7 @@
7477 /*
7478 - * Freescale MC object device allocator driver
7479 + * fsl-mc object allocator driver
7480 *
7481 - * Copyright (C) 2013 Freescale Semiconductor, Inc.
7482 + * Copyright (C) 2013-2016 Freescale Semiconductor, Inc.
7483 *
7484 * This file is licensed under the terms of the GNU General Public
7485 * License version 2. This program is licensed "as is" without any
7486 @@ -12,9 +12,9 @@
7487 #include <linux/msi.h>
7488 #include "../include/mc-bus.h"
7489 #include "../include/mc-sys.h"
7490 -#include "../include/dpbp-cmd.h"
7491 -#include "../include/dpcon-cmd.h"
7492
7493 +#include "dpbp-cmd.h"
7494 +#include "dpcon-cmd.h"
7495 #include "fsl-mc-private.h"
7496
7497 #define FSL_MC_IS_ALLOCATABLE(_obj_type) \
7498 @@ -23,15 +23,12 @@
7499 strcmp(_obj_type, "dpcon") == 0)
7500
7501 /**
7502 - * fsl_mc_resource_pool_add_device - add allocatable device to a resource
7503 - * pool of a given MC bus
7504 + * fsl_mc_resource_pool_add_device - add allocatable object to a resource
7505 + * pool of a given fsl-mc bus
7506 *
7507 - * @mc_bus: pointer to the MC bus
7508 - * @pool_type: MC bus pool type
7509 - * @mc_dev: Pointer to allocatable MC object device
7510 - *
7511 - * It adds an allocatable MC object device to a container's resource pool of
7512 - * the given resource type
7513 + * @mc_bus: pointer to the fsl-mc bus
7514 + * @pool_type: pool type
7515 + * @mc_dev: pointer to allocatable fsl-mc device
7516 */
7517 static int __must_check fsl_mc_resource_pool_add_device(struct fsl_mc_bus
7518 *mc_bus,
7519 @@ -95,10 +92,10 @@ static int __must_check fsl_mc_resource_pool_add_device(struct fsl_mc_bus
7520 * fsl_mc_resource_pool_remove_device - remove an allocatable device from a
7521 * resource pool
7522 *
7523 - * @mc_dev: Pointer to allocatable MC object device
7524 + * @mc_dev: pointer to allocatable fsl-mc device
7525 *
7526 - * It permanently removes an allocatable MC object device from the resource
7527 - * pool, the device is currently in, as long as it is in the pool's free list.
7528 + * It permanently removes an allocatable fsl-mc device from the resource
7529 + * pool. It's an error if the device is in use.
7530 */
7531 static int __must_check fsl_mc_resource_pool_remove_device(struct fsl_mc_device
7532 *mc_dev)
7533 @@ -255,17 +252,18 @@ void fsl_mc_resource_free(struct fsl_mc_resource *resource)
7534 EXPORT_SYMBOL_GPL(fsl_mc_resource_free);
7535
7536 /**
7537 - * fsl_mc_object_allocate - Allocates a MC object device of the given
7538 - * pool type from a given MC bus
7539 + * fsl_mc_object_allocate - Allocates an fsl-mc object of the given
7540 + * pool type from a given fsl-mc bus instance
7541 *
7542 - * @mc_dev: MC device for which the MC object device is to be allocated
7543 - * @pool_type: MC bus resource pool type
7544 - * @new_mc_dev: Pointer to area where the pointer to the allocated
7545 - * MC object device is to be returned
7546 + * @mc_dev: fsl-mc device which is used in conjunction with the
7547 + * allocated object
7548 + * @pool_type: pool type
7549 + * @new_mc_dev: pointer to area where the pointer to the allocated device
7550 + * is to be returned
7551 *
7552 - * This function allocates a MC object device from the device's parent DPRC,
7553 - * from the corresponding MC bus' pool of allocatable MC object devices of
7554 - * the given resource type. mc_dev cannot be a DPRC itself.
7555 + * Allocatable objects are always used in conjunction with some functional
7556 + * device. This function allocates an object of the specified type from
7557 + * the DPRC containing the functional device.
7558 *
7559 * NOTE: pool_type must be different from FSL_MC_POOL_MCP, since MC
7560 * portals are allocated using fsl_mc_portal_allocate(), instead of
7561 @@ -312,10 +310,9 @@ int __must_check fsl_mc_object_allocate(struct fsl_mc_device *mc_dev,
7562 EXPORT_SYMBOL_GPL(fsl_mc_object_allocate);
7563
7564 /**
7565 - * fsl_mc_object_free - Returns an allocatable MC object device to the
7566 - * corresponding resource pool of a given MC bus.
7567 - *
7568 - * @mc_adev: Pointer to the MC object device
7569 + * fsl_mc_object_free - Returns an fsl-mc object to the resource
7570 + * pool where it came from.
7571 + * @mc_adev: Pointer to the fsl-mc device
7572 */
7573 void fsl_mc_object_free(struct fsl_mc_device *mc_adev)
7574 {
7575 @@ -332,8 +329,14 @@ void fsl_mc_object_free(struct fsl_mc_device *mc_adev)
7576 EXPORT_SYMBOL_GPL(fsl_mc_object_free);
7577
7578 /*
7579 - * Initialize the interrupt pool associated with a MC bus.
7580 - * It allocates a block of IRQs from the GIC-ITS
7581 + * A DPRC and the devices in the DPRC all share the same GIC-ITS device
7582 + * ID. A block of IRQs is pre-allocated and maintained in a pool
7583 + * from which devices can allocate them when needed.
7584 + */
7585 +
7586 +/*
7587 + * Initialize the interrupt pool associated with an fsl-mc bus.
7588 + * It allocates a block of IRQs from the GIC-ITS.
7589 */
7590 int fsl_mc_populate_irq_pool(struct fsl_mc_bus *mc_bus,
7591 unsigned int irq_count)
7592 @@ -395,7 +398,7 @@ int fsl_mc_populate_irq_pool(struct fsl_mc_bus *mc_bus,
7593 EXPORT_SYMBOL_GPL(fsl_mc_populate_irq_pool);
7594
7595 /**
7596 - * Teardown the interrupt pool associated with an MC bus.
7597 + * Teardown the interrupt pool associated with an fsl-mc bus.
7598 * It frees the IRQs that were allocated to the pool, back to the GIC-ITS.
7599 */
7600 void fsl_mc_cleanup_irq_pool(struct fsl_mc_bus *mc_bus)
7601 @@ -422,11 +425,7 @@ void fsl_mc_cleanup_irq_pool(struct fsl_mc_bus *mc_bus)
7602 EXPORT_SYMBOL_GPL(fsl_mc_cleanup_irq_pool);
7603
7604 /**
7605 - * It allocates the IRQs required by a given MC object device. The
7606 - * IRQs are allocated from the interrupt pool associated with the
7607 - * MC bus that contains the device, if the device is not a DPRC device.
7608 - * Otherwise, the IRQs are allocated from the interrupt pool associated
7609 - * with the MC bus that represents the DPRC device itself.
7610 + * Allocate the IRQs required by a given fsl-mc device.
7611 */
7612 int __must_check fsl_mc_allocate_irqs(struct fsl_mc_device *mc_dev)
7613 {
7614 @@ -495,8 +494,7 @@ int __must_check fsl_mc_allocate_irqs(struct fsl_mc_device *mc_dev)
7615 EXPORT_SYMBOL_GPL(fsl_mc_allocate_irqs);
7616
7617 /*
7618 - * It frees the IRQs that were allocated for a MC object device, by
7619 - * returning them to the corresponding interrupt pool.
7620 + * Frees the IRQs that were allocated for an fsl-mc device.
7621 */
7622 void fsl_mc_free_irqs(struct fsl_mc_device *mc_dev)
7623 {
7624 @@ -605,7 +603,7 @@ static int fsl_mc_allocator_probe(struct fsl_mc_device *mc_dev)
7625 return error;
7626
7627 dev_dbg(&mc_dev->dev,
7628 - "Allocatable MC object device bound to fsl_mc_allocator driver");
7629 + "Allocatable fsl-mc device bound to fsl_mc_allocator driver");
7630 return 0;
7631 }
7632
7633 @@ -627,7 +625,7 @@ static int fsl_mc_allocator_remove(struct fsl_mc_device *mc_dev)
7634 }
7635
7636 dev_dbg(&mc_dev->dev,
7637 - "Allocatable MC object device unbound from fsl_mc_allocator driver");
7638 + "Allocatable fsl-mc device unbound from fsl_mc_allocator driver");
7639 return 0;
7640 }
7641
7642 diff --git a/drivers/staging/fsl-mc/bus/fsl-mc-bus.c b/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
7643 index 44f64b6f..30a48df3 100644
7644 --- a/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
7645 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
7646 @@ -1,7 +1,7 @@
7647 /*
7648 * Freescale Management Complex (MC) bus driver
7649 *
7650 - * Copyright (C) 2014 Freescale Semiconductor, Inc.
7651 + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
7652 * Author: German Rivera <German.Rivera@freescale.com>
7653 *
7654 * This file is licensed under the terms of the GNU General Public
7655 @@ -9,6 +9,8 @@
7656 * warranty of any kind, whether express or implied.
7657 */
7658
7659 +#define pr_fmt(fmt) "fsl-mc: " fmt
7660 +
7661 #include <linux/module.h>
7662 #include <linux/of_device.h>
7663 #include <linux/of_address.h>
7664 @@ -25,8 +27,6 @@
7665 #include "fsl-mc-private.h"
7666 #include "dprc-cmd.h"
7667
7668 -static struct kmem_cache *mc_dev_cache;
7669 -
7670 /**
7671 * Default DMA mask for devices on a fsl-mc bus
7672 */
7673 @@ -34,7 +34,7 @@ static struct kmem_cache *mc_dev_cache;
7674
7675 /**
7676 * struct fsl_mc - Private data of a "fsl,qoriq-mc" platform device
7677 - * @root_mc_bus_dev: MC object device representing the root DPRC
7678 + * @root_mc_bus_dev: fsl-mc device representing the root DPRC
7679 * @num_translation_ranges: number of entries in addr_translation_ranges
7680 * @translation_ranges: array of bus to system address translation ranges
7681 */
7682 @@ -62,8 +62,8 @@ struct fsl_mc_addr_translation_range {
7683
7684 /**
7685 * fsl_mc_bus_match - device to driver matching callback
7686 - * @dev: the MC object device structure to match against
7687 - * @drv: the device driver to search for matching MC object device id
7688 + * @dev: the fsl-mc device to match against
7689 + * @drv: the device driver to search for matching fsl-mc object type
7690 * structures
7691 *
7692 * Returns 1 on success, 0 otherwise.
7693 @@ -75,8 +75,11 @@ static int fsl_mc_bus_match(struct device *dev, struct device_driver *drv)
7694 struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(drv);
7695 bool found = false;
7696
7697 - if (WARN_ON(!fsl_mc_bus_exists()))
7698 + /* When driver_override is set, only bind to the matching driver */
7699 + if (mc_dev->driver_override) {
7700 + found = !strcmp(mc_dev->driver_override, mc_drv->driver.name);
7701 goto out;
7702 + }
7703
7704 if (!mc_drv->match_id_table)
7705 goto out;
7706 @@ -91,7 +94,7 @@ static int fsl_mc_bus_match(struct device *dev, struct device_driver *drv)
7707
7708 /*
7709 * Traverse the match_id table of the given driver, trying to find
7710 - * a matching for the given MC object device.
7711 + * a matching for the given device.
7712 */
7713 for (id = mc_drv->match_id_table; id->vendor != 0x0; id++) {
7714 if (id->vendor == mc_dev->obj_desc.vendor &&
7715 @@ -132,23 +135,141 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
7716 }
7717 static DEVICE_ATTR_RO(modalias);
7718
7719 +static ssize_t rescan_store(struct device *dev,
7720 + struct device_attribute *attr,
7721 + const char *buf, size_t count)
7722 +{
7723 + unsigned long val;
7724 + unsigned int irq_count;
7725 + struct fsl_mc_device *root_mc_dev;
7726 + struct fsl_mc_bus *root_mc_bus;
7727 +
7728 + if (!fsl_mc_is_root_dprc(dev))
7729 + return -EINVAL;
7730 +
7731 + root_mc_dev = to_fsl_mc_device(dev);
7732 + root_mc_bus = to_fsl_mc_bus(root_mc_dev);
7733 +
7734 + if (kstrtoul(buf, 0, &val) < 0)
7735 + return -EINVAL;
7736 +
7737 + if (val) {
7738 + mutex_lock(&root_mc_bus->scan_mutex);
7739 + dprc_scan_objects(root_mc_dev, NULL, &irq_count);
7740 + mutex_unlock(&root_mc_bus->scan_mutex);
7741 + }
7742 +
7743 + return count;
7744 +}
7745 +static DEVICE_ATTR_WO(rescan);
7746 +
7747 +static ssize_t driver_override_store(struct device *dev,
7748 + struct device_attribute *attr,
7749 + const char *buf, size_t count)
7750 +{
7751 + struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
7752 + const char *driver_override, *old = mc_dev->driver_override;
7753 + char *cp;
7754 +
7755 + if (WARN_ON(dev->bus != &fsl_mc_bus_type))
7756 + return -EINVAL;
7757 +
7758 + if (count >= (PAGE_SIZE - 1))
7759 + return -EINVAL;
7760 +
7761 + driver_override = kstrndup(buf, count, GFP_KERNEL);
7762 + if (!driver_override)
7763 + return -ENOMEM;
7764 +
7765 + cp = strchr(driver_override, '\n');
7766 + if (cp)
7767 + *cp = '\0';
7768 +
7769 + if (strlen(driver_override)) {
7770 + mc_dev->driver_override = driver_override;
7771 + } else {
7772 + kfree(driver_override);
7773 + mc_dev->driver_override = NULL;
7774 + }
7775 +
7776 + kfree(old);
7777 +
7778 + return count;
7779 +}
7780 +
7781 +static ssize_t driver_override_show(struct device *dev,
7782 + struct device_attribute *attr, char *buf)
7783 +{
7784 + struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
7785 +
7786 + return snprintf(buf, PAGE_SIZE, "%s\n", mc_dev->driver_override);
7787 +}
7788 +static DEVICE_ATTR_RW(driver_override);
7789 +
7790 static struct attribute *fsl_mc_dev_attrs[] = {
7791 &dev_attr_modalias.attr,
7792 + &dev_attr_rescan.attr,
7793 + &dev_attr_driver_override.attr,
7794 NULL,
7795 };
7796
7797 ATTRIBUTE_GROUPS(fsl_mc_dev);
7798
7799 +static int scan_fsl_mc_bus(struct device *dev, void *data)
7800 +{
7801 + unsigned int irq_count;
7802 + struct fsl_mc_device *root_mc_dev;
7803 + struct fsl_mc_bus *root_mc_bus;
7804 +
7805 + if (fsl_mc_is_root_dprc(dev)) {
7806 + root_mc_dev = to_fsl_mc_device(dev);
7807 + root_mc_bus = to_fsl_mc_bus(root_mc_dev);
7808 + mutex_lock(&root_mc_bus->scan_mutex);
7809 + dprc_scan_objects(root_mc_dev, NULL, &irq_count);
7810 + mutex_unlock(&root_mc_bus->scan_mutex);
7811 + }
7812 +
7813 + return 0;
7814 +}
7815 +
7816 +static ssize_t bus_rescan_store(struct bus_type *bus,
7817 + const char *buf, size_t count)
7818 +{
7819 + unsigned long val;
7820 +
7821 + if (kstrtoul(buf, 0, &val) < 0)
7822 + return -EINVAL;
7823 +
7824 + if (val)
7825 + bus_for_each_dev(bus, NULL, NULL, scan_fsl_mc_bus);
7826 +
7827 + return count;
7828 +}
7829 +static BUS_ATTR(rescan, (S_IWUSR | S_IWGRP), NULL, bus_rescan_store);
7830 +
7831 +static struct attribute *fsl_mc_bus_attrs[] = {
7832 + &bus_attr_rescan.attr,
7833 + NULL,
7834 +};
7835 +
7836 +static const struct attribute_group fsl_mc_bus_group = {
7837 + .attrs = fsl_mc_bus_attrs,
7838 +};
7839 +
7840 +static const struct attribute_group *fsl_mc_bus_groups[] = {
7841 + &fsl_mc_bus_group,
7842 + NULL,
7843 +};
7844 +
7845 struct bus_type fsl_mc_bus_type = {
7846 .name = "fsl-mc",
7847 .match = fsl_mc_bus_match,
7848 .uevent = fsl_mc_bus_uevent,
7849 .dev_groups = fsl_mc_dev_groups,
7850 + .bus_groups = fsl_mc_bus_groups,
7851 };
7852 EXPORT_SYMBOL_GPL(fsl_mc_bus_type);
7853
7854 -static atomic_t root_dprc_count = ATOMIC_INIT(0);
7855 -
7856 static int fsl_mc_driver_probe(struct device *dev)
7857 {
7858 struct fsl_mc_driver *mc_drv;
7859 @@ -164,8 +285,7 @@ static int fsl_mc_driver_probe(struct device *dev)
7860
7861 error = mc_drv->probe(mc_dev);
7862 if (error < 0) {
7863 - dev_err(dev, "MC object device probe callback failed: %d\n",
7864 - error);
7865 + dev_err(dev, "%s failed: %d\n", __func__, error);
7866 return error;
7867 }
7868
7869 @@ -183,9 +303,7 @@ static int fsl_mc_driver_remove(struct device *dev)
7870
7871 error = mc_drv->remove(mc_dev);
7872 if (error < 0) {
7873 - dev_err(dev,
7874 - "MC object device remove callback failed: %d\n",
7875 - error);
7876 + dev_err(dev, "%s failed: %d\n", __func__, error);
7877 return error;
7878 }
7879
7880 @@ -232,8 +350,6 @@ int __fsl_mc_driver_register(struct fsl_mc_driver *mc_driver,
7881 return error;
7882 }
7883
7884 - pr_info("MC object device driver %s registered\n",
7885 - mc_driver->driver.name);
7886 return 0;
7887 }
7888 EXPORT_SYMBOL_GPL(__fsl_mc_driver_register);
7889 @@ -248,15 +364,6 @@ void fsl_mc_driver_unregister(struct fsl_mc_driver *mc_driver)
7890 }
7891 EXPORT_SYMBOL_GPL(fsl_mc_driver_unregister);
7892
7893 -/**
7894 - * fsl_mc_bus_exists - check if a root dprc exists
7895 - */
7896 -bool fsl_mc_bus_exists(void)
7897 -{
7898 - return atomic_read(&root_dprc_count) > 0;
7899 -}
7900 -EXPORT_SYMBOL_GPL(fsl_mc_bus_exists);
7901 -
7902 /**
7903 * fsl_mc_get_root_dprc - function to traverse to the root dprc
7904 */
7905 @@ -315,21 +422,6 @@ static int get_dprc_icid(struct fsl_mc_io *mc_io,
7906 return error;
7907 }
7908
7909 -static int get_dprc_version(struct fsl_mc_io *mc_io,
7910 - int container_id, u16 *major, u16 *minor)
7911 -{
7912 - struct dprc_attributes attr;
7913 - int error;
7914 -
7915 - error = get_dprc_attr(mc_io, container_id, &attr);
7916 - if (error == 0) {
7917 - *major = attr.version.major;
7918 - *minor = attr.version.minor;
7919 - }
7920 -
7921 - return error;
7922 -}
7923 -
7924 static int translate_mc_addr(struct fsl_mc_device *mc_dev,
7925 enum dprc_region_type mc_region_type,
7926 u64 mc_offset, phys_addr_t *phys_addr)
7927 @@ -451,18 +543,37 @@ bool fsl_mc_is_root_dprc(struct device *dev)
7928 return dev == root_dprc_dev;
7929 }
7930
7931 +static void fsl_mc_device_release(struct device *dev)
7932 +{
7933 + struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
7934 + struct fsl_mc_bus *mc_bus = NULL;
7935 +
7936 + kfree(mc_dev->regions);
7937 +
7938 + if (strcmp(mc_dev->obj_desc.type, "dprc") == 0)
7939 + mc_bus = to_fsl_mc_bus(mc_dev);
7940 +
7941 + if (mc_bus)
7942 + kfree(mc_bus);
7943 + else
7944 + kfree(mc_dev);
7945 +}
7946 +
7947 /**
7948 - * Add a newly discovered MC object device to be visible in Linux
7949 + * Add a newly discovered fsl-mc device to be visible in Linux
7950 */
7951 int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
7952 struct fsl_mc_io *mc_io,
7953 struct device *parent_dev,
7954 + const char *driver_override,
7955 struct fsl_mc_device **new_mc_dev)
7956 {
7957 int error;
7958 struct fsl_mc_device *mc_dev = NULL;
7959 struct fsl_mc_bus *mc_bus = NULL;
7960 struct fsl_mc_device *parent_mc_dev;
7961 + struct device *fsl_mc_platform_dev;
7962 + struct device_node *fsl_mc_platform_node;
7963
7964 if (dev_is_fsl_mc(parent_dev))
7965 parent_mc_dev = to_fsl_mc_device(parent_dev);
7966 @@ -473,7 +584,7 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
7967 /*
7968 * Allocate an MC bus device object:
7969 */
7970 - mc_bus = devm_kzalloc(parent_dev, sizeof(*mc_bus), GFP_KERNEL);
7971 + mc_bus = kzalloc(sizeof(*mc_bus), GFP_KERNEL);
7972 if (!mc_bus)
7973 return -ENOMEM;
7974
7975 @@ -482,16 +593,30 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
7976 /*
7977 * Allocate a regular fsl_mc_device object:
7978 */
7979 - mc_dev = kmem_cache_zalloc(mc_dev_cache, GFP_KERNEL);
7980 + mc_dev = kzalloc(sizeof(*mc_dev), GFP_KERNEL);
7981 if (!mc_dev)
7982 return -ENOMEM;
7983 }
7984
7985 mc_dev->obj_desc = *obj_desc;
7986 mc_dev->mc_io = mc_io;
7987 +
7988 + if (driver_override) {
7989 + /*
7990 + * We trust driver_override, so we don't need to use
7991 + * kstrndup() here
7992 + */
7993 + mc_dev->driver_override = kstrdup(driver_override, GFP_KERNEL);
7994 + if (!mc_dev->driver_override) {
7995 + error = -ENOMEM;
7996 + goto error_cleanup_dev;
7997 + }
7998 + }
7999 +
8000 device_initialize(&mc_dev->dev);
8001 mc_dev->dev.parent = parent_dev;
8002 mc_dev->dev.bus = &fsl_mc_bus_type;
8003 + mc_dev->dev.release = fsl_mc_device_release;
8004 dev_set_name(&mc_dev->dev, "%s.%d", obj_desc->type, obj_desc->id);
8005
8006 if (strcmp(obj_desc->type, "dprc") == 0) {
8007 @@ -524,8 +649,6 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
8008 }
8009
8010 mc_io2 = mc_io;
8011 -
8012 - atomic_inc(&root_dprc_count);
8013 }
8014
8015 error = get_dprc_icid(mc_io2, obj_desc->id, &mc_dev->icid);
8016 @@ -533,8 +656,8 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
8017 goto error_cleanup_dev;
8018 } else {
8019 /*
8020 - * A non-DPRC MC object device has to be a child of another
8021 - * MC object (specifically a DPRC object)
8022 + * A non-DPRC object has to be a child of a DPRC, use the
8023 + * parent's ICID and interrupt domain.
8024 */
8025 mc_dev->icid = parent_mc_dev->icid;
8026 mc_dev->dma_mask = FSL_MC_DEFAULT_DMA_MASK;
8027 @@ -556,9 +679,14 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
8028 goto error_cleanup_dev;
8029 }
8030
8031 - /* Objects are coherent, unless 'no shareability' flag set. */
8032 - if (!(obj_desc->flags & DPRC_OBJ_FLAG_NO_MEM_SHAREABILITY))
8033 - arch_setup_dma_ops(&mc_dev->dev, 0, 0, NULL, true);
8034 + fsl_mc_platform_dev = &mc_dev->dev;
8035 + while (dev_is_fsl_mc(fsl_mc_platform_dev))
8036 + fsl_mc_platform_dev = fsl_mc_platform_dev->parent;
8037 + fsl_mc_platform_node = fsl_mc_platform_dev->of_node;
8038 +
8039 + /* Set up the iommu configuration for the devices. */
8040 + fsl_mc_dma_configure(mc_dev, fsl_mc_platform_node,
8041 + !(obj_desc->flags & DPRC_OBJ_FLAG_NO_MEM_SHAREABILITY));
8042
8043 /*
8044 * The device-specific probe callback will get invoked by device_add()
8045 @@ -571,9 +699,7 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
8046 goto error_cleanup_dev;
8047 }
8048
8049 - (void)get_device(&mc_dev->dev);
8050 - dev_dbg(parent_dev, "Added MC object device %s\n",
8051 - dev_name(&mc_dev->dev));
8052 + dev_dbg(parent_dev, "added %s\n", dev_name(&mc_dev->dev));
8053
8054 *new_mc_dev = mc_dev;
8055 return 0;
8056 @@ -581,47 +707,34 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
8057 error_cleanup_dev:
8058 kfree(mc_dev->regions);
8059 if (mc_bus)
8060 - devm_kfree(parent_dev, mc_bus);
8061 + kfree(mc_bus);
8062 else
8063 - kmem_cache_free(mc_dev_cache, mc_dev);
8064 + kfree(mc_dev);
8065
8066 return error;
8067 }
8068 EXPORT_SYMBOL_GPL(fsl_mc_device_add);
8069
8070 /**
8071 - * fsl_mc_device_remove - Remove a MC object device from being visible to
8072 + * fsl_mc_device_remove - Remove an fsl-mc device from being visible to
8073 * Linux
8074 *
8075 - * @mc_dev: Pointer to a MC object device object
8076 + * @mc_dev: Pointer to an fsl-mc device
8077 */
8078 void fsl_mc_device_remove(struct fsl_mc_device *mc_dev)
8079 {
8080 - struct fsl_mc_bus *mc_bus = NULL;
8081 -
8082 - kfree(mc_dev->regions);
8083 + kfree(mc_dev->driver_override);
8084 + mc_dev->driver_override = NULL;
8085
8086 /*
8087 * The device-specific remove callback will get invoked by device_del()
8088 */
8089 device_del(&mc_dev->dev);
8090 - put_device(&mc_dev->dev);
8091
8092 - if (strcmp(mc_dev->obj_desc.type, "dprc") == 0) {
8093 - mc_bus = to_fsl_mc_bus(mc_dev);
8094 + if (strcmp(mc_dev->obj_desc.type, "dprc") != 0)
8095 + mc_dev->dev.iommu_fwspec = NULL;
8096
8097 - if (fsl_mc_is_root_dprc(&mc_dev->dev)) {
8098 - if (atomic_read(&root_dprc_count) > 0)
8099 - atomic_dec(&root_dprc_count);
8100 - else
8101 - WARN_ON(1);
8102 - }
8103 - }
8104 -
8105 - if (mc_bus)
8106 - devm_kfree(mc_dev->dev.parent, mc_bus);
8107 - else
8108 - kmem_cache_free(mc_dev_cache, mc_dev);
8109 + put_device(&mc_dev->dev);
8110 }
8111 EXPORT_SYMBOL_GPL(fsl_mc_device_remove);
8112
8113 @@ -629,8 +742,7 @@ static int parse_mc_ranges(struct device *dev,
8114 int *paddr_cells,
8115 int *mc_addr_cells,
8116 int *mc_size_cells,
8117 - const __be32 **ranges_start,
8118 - u8 *num_ranges)
8119 + const __be32 **ranges_start)
8120 {
8121 const __be32 *prop;
8122 int range_tuple_cell_count;
8123 @@ -643,8 +755,6 @@ static int parse_mc_ranges(struct device *dev,
8124 dev_warn(dev,
8125 "missing or empty ranges property for device tree node '%s'\n",
8126 mc_node->name);
8127 -
8128 - *num_ranges = 0;
8129 return 0;
8130 }
8131
8132 @@ -671,8 +781,7 @@ static int parse_mc_ranges(struct device *dev,
8133 return -EINVAL;
8134 }
8135
8136 - *num_ranges = ranges_len / tuple_len;
8137 - return 0;
8138 + return ranges_len / tuple_len;
8139 }
8140
8141 static int get_mc_addr_translation_ranges(struct device *dev,
8142 @@ -680,7 +789,7 @@ static int get_mc_addr_translation_ranges(struct device *dev,
8143 **ranges,
8144 u8 *num_ranges)
8145 {
8146 - int error;
8147 + int ret;
8148 int paddr_cells;
8149 int mc_addr_cells;
8150 int mc_size_cells;
8151 @@ -688,16 +797,16 @@ static int get_mc_addr_translation_ranges(struct device *dev,
8152 const __be32 *ranges_start;
8153 const __be32 *cell;
8154
8155 - error = parse_mc_ranges(dev,
8156 + ret = parse_mc_ranges(dev,
8157 &paddr_cells,
8158 &mc_addr_cells,
8159 &mc_size_cells,
8160 - &ranges_start,
8161 - num_ranges);
8162 - if (error < 0)
8163 - return error;
8164 + &ranges_start);
8165 + if (ret < 0)
8166 + return ret;
8167
8168 - if (!(*num_ranges)) {
8169 + *num_ranges = ret;
8170 + if (!ret) {
8171 /*
8172 * Missing or empty ranges property ("ranges;") for the
8173 * 'fsl,qoriq-mc' node. In this case, identity mapping
8174 @@ -749,8 +858,6 @@ static int fsl_mc_bus_probe(struct platform_device *pdev)
8175 struct mc_version mc_version;
8176 struct resource res;
8177
8178 - dev_info(&pdev->dev, "Root MC bus device probed");
8179 -
8180 mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
8181 if (!mc)
8182 return -ENOMEM;
8183 @@ -783,8 +890,7 @@ static int fsl_mc_bus_probe(struct platform_device *pdev)
8184 goto error_cleanup_mc_io;
8185 }
8186
8187 - dev_info(&pdev->dev,
8188 - "Freescale Management Complex Firmware version: %u.%u.%u\n",
8189 + dev_info(&pdev->dev, "MC firmware version: %u.%u.%u\n",
8190 mc_version.major, mc_version.minor, mc_version.revision);
8191
8192 error = get_mc_addr_translation_ranges(&pdev->dev,
8193 @@ -793,16 +899,17 @@ static int fsl_mc_bus_probe(struct platform_device *pdev)
8194 if (error < 0)
8195 goto error_cleanup_mc_io;
8196
8197 - error = dpmng_get_container_id(mc_io, 0, &container_id);
8198 + error = dprc_get_container_id(mc_io, 0, &container_id);
8199 if (error < 0) {
8200 dev_err(&pdev->dev,
8201 - "dpmng_get_container_id() failed: %d\n", error);
8202 + "dprc_get_container_id() failed: %d\n", error);
8203 goto error_cleanup_mc_io;
8204 }
8205
8206 memset(&obj_desc, 0, sizeof(struct dprc_obj_desc));
8207 - error = get_dprc_version(mc_io, container_id,
8208 - &obj_desc.ver_major, &obj_desc.ver_minor);
8209 + error = dprc_get_api_version(mc_io, 0,
8210 + &obj_desc.ver_major,
8211 + &obj_desc.ver_minor);
8212 if (error < 0)
8213 goto error_cleanup_mc_io;
8214
8215 @@ -812,7 +919,8 @@ static int fsl_mc_bus_probe(struct platform_device *pdev)
8216 obj_desc.irq_count = 1;
8217 obj_desc.region_count = 0;
8218
8219 - error = fsl_mc_device_add(&obj_desc, mc_io, &pdev->dev, &mc_bus_dev);
8220 + error = fsl_mc_device_add(&obj_desc, mc_io, &pdev->dev, NULL,
8221 + &mc_bus_dev);
8222 if (error < 0)
8223 goto error_cleanup_mc_io;
8224
8225 @@ -840,7 +948,6 @@ static int fsl_mc_bus_remove(struct platform_device *pdev)
8226 fsl_destroy_mc_io(mc->root_mc_bus_dev->mc_io);
8227 mc->root_mc_bus_dev->mc_io = NULL;
8228
8229 - dev_info(&pdev->dev, "Root MC bus device removed");
8230 return 0;
8231 }
8232
8233 @@ -865,22 +972,12 @@ static int __init fsl_mc_bus_driver_init(void)
8234 {
8235 int error;
8236
8237 - mc_dev_cache = kmem_cache_create("fsl_mc_device",
8238 - sizeof(struct fsl_mc_device), 0, 0,
8239 - NULL);
8240 - if (!mc_dev_cache) {
8241 - pr_err("Could not create fsl_mc_device cache\n");
8242 - return -ENOMEM;
8243 - }
8244 -
8245 error = bus_register(&fsl_mc_bus_type);
8246 if (error < 0) {
8247 - pr_err("fsl-mc bus type registration failed: %d\n", error);
8248 + pr_err("bus type registration failed: %d\n", error);
8249 goto error_cleanup_cache;
8250 }
8251
8252 - pr_info("fsl-mc bus type registered\n");
8253 -
8254 error = platform_driver_register(&fsl_mc_bus_driver);
8255 if (error < 0) {
8256 pr_err("platform_driver_register() failed: %d\n", error);
8257 @@ -914,7 +1011,6 @@ static int __init fsl_mc_bus_driver_init(void)
8258 bus_unregister(&fsl_mc_bus_type);
8259
8260 error_cleanup_cache:
8261 - kmem_cache_destroy(mc_dev_cache);
8262 return error;
8263 }
8264 postcore_initcall(fsl_mc_bus_driver_init);
8265 diff --git a/drivers/staging/fsl-mc/bus/fsl-mc-iommu.c b/drivers/staging/fsl-mc/bus/fsl-mc-iommu.c
8266 new file mode 100644
8267 index 00000000..86b2cd84
8268 --- /dev/null
8269 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-iommu.c
8270 @@ -0,0 +1,104 @@
8271 +/*
8272 + * Copyright 2016-17 NXP
8273 + * Author: Nipun Gupta <nipun.gupta@nxp.com>
8274 + *
8275 + * This file is licensed under the terms of the GNU General Public
8276 + * License version 2. This program is licensed "as is" without any
8277 + * warranty of any kind, whether express or implied.
8278 + */
8279 +
8280 +#include <linux/iommu.h>
8281 +#include <linux/of.h>
8282 +#include <linux/of_iommu.h>
8283 +#include "../include/mc.h"
8284 +
8285 +/* Setup the IOMMU for the DPRC container */
8286 +static const struct iommu_ops
8287 +*fsl_mc_iommu_configure(struct fsl_mc_device *mc_dev,
8288 + struct device_node *fsl_mc_platform_node)
8289 +{
8290 + struct of_phandle_args iommu_spec;
8291 + const struct iommu_ops *ops;
8292 + u32 iommu_phandle;
8293 + struct device_node *iommu_node;
8294 + const __be32 *map = NULL;
8295 + int iommu_cells, map_len, ret;
8296 +
8297 + map = of_get_property(fsl_mc_platform_node, "iommu-map", &map_len);
8298 + if (!map)
8299 + return NULL;
8300 +
8301 + ops = mc_dev->dev.bus->iommu_ops;
8302 + if (!ops || !ops->of_xlate)
8303 + return NULL;
8304 +
8305 + iommu_phandle = be32_to_cpup(map + 1);
8306 + iommu_node = of_find_node_by_phandle(iommu_phandle);
8307 +
8308 + if (of_property_read_u32(iommu_node, "#iommu-cells", &iommu_cells)) {
8309 + pr_err("%s: missing #iommu-cells property\n", iommu_node->name);
8310 + return NULL;
8311 + }
8312 +
8313 + /* Initialize the fwspec */
8314 + ret = iommu_fwspec_init(&mc_dev->dev, &iommu_node->fwnode, ops);
8315 + if (ret)
8316 + return NULL;
8317 +
8318 + /*
8319 + * Fill in the required stream-id before calling the iommu's
8320 + * ops->xlate callback.
8321 + */
8322 + iommu_spec.np = iommu_node;
8323 + iommu_spec.args[0] = mc_dev->icid;
8324 + iommu_spec.args_count = 1;
8325 +
8326 + ret = ops->of_xlate(&mc_dev->dev, &iommu_spec);
8327 + if (ret)
8328 + return NULL;
8329 +
8330 + of_node_put(iommu_spec.np);
8331 +
8332 + return ops;
8333 +}
8334 +
8335 +/* Set up DMA configuration for fsl-mc devices */
8336 +void fsl_mc_dma_configure(struct fsl_mc_device *mc_dev,
8337 + struct device_node *fsl_mc_platform_node, int coherent)
8338 +{
8339 + const struct iommu_ops *ops;
8340 +
8341 + ops = fsl_mc_iommu_configure(mc_dev, fsl_mc_platform_node);
8342 +
8343 + mc_dev->dev.coherent_dma_mask = DMA_BIT_MASK(48);
8344 + mc_dev->dev.dma_mask = &mc_dev->dev.coherent_dma_mask;
8345 + arch_setup_dma_ops(&mc_dev->dev, 0,
8346 + mc_dev->dev.coherent_dma_mask + 1, ops, coherent);
8347 +}
8348 +
8349 +/* Macro to get the container device of a MC device */
8350 +#define fsl_mc_cont_dev(_dev) ((to_fsl_mc_device(_dev)->flags & \
8351 + FSL_MC_IS_DPRC) ? (_dev) : ((_dev)->parent))
8352 +
8353 +/* Macro to check if a device is a container device */
8354 +#define is_cont_dev(_dev) (to_fsl_mc_device(_dev)->flags & FSL_MC_IS_DPRC)
8355 +
8356 +/* Get the IOMMU group for device on fsl-mc bus */
8357 +struct iommu_group *fsl_mc_device_group(struct device *dev)
8358 +{
8359 + struct device *cont_dev = fsl_mc_cont_dev(dev);
8360 + struct iommu_group *group;
8361 +
8362 + /* Container device is responsible for creating the iommu group */
8363 + if (is_cont_dev(dev)) {
8364 + group = iommu_group_alloc();
8365 + if (IS_ERR(group))
8366 + return NULL;
8367 + } else {
8368 + get_device(cont_dev);
8369 + group = iommu_group_get(cont_dev);
8370 + put_device(cont_dev);
8371 + }
8372 +
8373 + return group;
8374 +}
8375 diff --git a/drivers/staging/fsl-mc/bus/fsl-mc-msi.c b/drivers/staging/fsl-mc/bus/fsl-mc-msi.c
8376 index 3d46b1b1..b8b2c86e 100644
8377 --- a/drivers/staging/fsl-mc/bus/fsl-mc-msi.c
8378 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-msi.c
8379 @@ -1,7 +1,7 @@
8380 /*
8381 * Freescale Management Complex (MC) bus driver MSI support
8382 *
8383 - * Copyright (C) 2015 Freescale Semiconductor, Inc.
8384 + * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
8385 * Author: German Rivera <German.Rivera@freescale.com>
8386 *
8387 * This file is licensed under the terms of the GNU General Public
8388 @@ -17,6 +17,7 @@
8389 #include <linux/irqdomain.h>
8390 #include <linux/msi.h>
8391 #include "../include/mc-bus.h"
8392 +#include "fsl-mc-private.h"
8393
8394 /*
8395 * Generate a unique ID identifying the interrupt (only used within the MSI
8396 diff --git a/drivers/staging/fsl-mc/bus/fsl-mc-private.h b/drivers/staging/fsl-mc/bus/fsl-mc-private.h
8397 index d459c267..e08b8843 100644
8398 --- a/drivers/staging/fsl-mc/bus/fsl-mc-private.h
8399 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-private.h
8400 @@ -10,13 +10,15 @@
8401 #ifndef _FSL_MC_PRIVATE_H_
8402 #define _FSL_MC_PRIVATE_H_
8403
8404 +#include "../include/mc.h"
8405 +#include "../include/mc-bus.h"
8406 +
8407 int __must_check fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
8408 struct fsl_mc_io *mc_io,
8409 struct device *parent_dev,
8410 + const char *driver_override,
8411 struct fsl_mc_device **new_mc_dev);
8412
8413 -void fsl_mc_device_remove(struct fsl_mc_device *mc_dev);
8414 -
8415 int __init dprc_driver_init(void);
8416
8417 void dprc_driver_exit(void);
8418 diff --git a/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c b/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c
8419 index 7a6ac640..49127acb 100644
8420 --- a/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c
8421 +++ b/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c
8422 @@ -1,7 +1,7 @@
8423 /*
8424 * Freescale Management Complex (MC) bus driver MSI support
8425 *
8426 - * Copyright (C) 2015 Freescale Semiconductor, Inc.
8427 + * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
8428 * Author: German Rivera <German.Rivera@freescale.com>
8429 *
8430 * This file is licensed under the terms of the GNU General Public
8431 @@ -17,9 +17,10 @@
8432 #include <linux/of.h>
8433 #include <linux/of_irq.h>
8434 #include "../include/mc-bus.h"
8435 +#include "fsl-mc-private.h"
8436
8437 static struct irq_chip its_msi_irq_chip = {
8438 - .name = "fsl-mc-bus-msi",
8439 + .name = "ITS-fMSI",
8440 .irq_mask = irq_chip_mask_parent,
8441 .irq_unmask = irq_chip_unmask_parent,
8442 .irq_eoi = irq_chip_eoi_parent,
8443 @@ -51,7 +52,7 @@ static int its_fsl_mc_msi_prepare(struct irq_domain *msi_domain,
8444 return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info);
8445 }
8446
8447 -static struct msi_domain_ops its_fsl_mc_msi_ops = {
8448 +static struct msi_domain_ops its_fsl_mc_msi_ops __ro_after_init = {
8449 .msi_prepare = its_fsl_mc_msi_prepare,
8450 };
8451
8452 @@ -94,8 +95,8 @@ int __init its_fsl_mc_msi_init(void)
8453 continue;
8454 }
8455
8456 - WARN_ON(mc_msi_domain->
8457 - host_data != &its_fsl_mc_msi_domain_info);
8458 + WARN_ON(mc_msi_domain->host_data !=
8459 + &its_fsl_mc_msi_domain_info);
8460
8461 pr_info("fsl-mc MSI: %s domain created\n", np->full_name);
8462 }
8463 diff --git a/drivers/staging/fsl-mc/bus/mc-io.c b/drivers/staging/fsl-mc/bus/mc-io.c
8464 index 798c965f..d66b87f0 100644
8465 --- a/drivers/staging/fsl-mc/bus/mc-io.c
8466 +++ b/drivers/staging/fsl-mc/bus/mc-io.c
8467 @@ -1,4 +1,5 @@
8468 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
8469 +/*
8470 + * Copyright 2013-2016 Freescale Semiconductor Inc.
8471 *
8472 * Redistribution and use in source and binary forms, with or without
8473 * modification, are permitted provided that the following conditions are met:
8474 @@ -11,7 +12,6 @@
8475 * names of any contributors may be used to endorse or promote products
8476 * derived from this software without specific prior written permission.
8477 *
8478 - *
8479 * ALTERNATIVELY, this software may be distributed under the terms of the
8480 * GNU General Public License ("GPL") as published by the Free Software
8481 * Foundation, either version 2 of that License or (at your option) any
8482 diff --git a/drivers/staging/fsl-mc/bus/mc-ioctl.h b/drivers/staging/fsl-mc/bus/mc-ioctl.h
8483 new file mode 100644
8484 index 00000000..8ac502a1
8485 --- /dev/null
8486 +++ b/drivers/staging/fsl-mc/bus/mc-ioctl.h
8487 @@ -0,0 +1,22 @@
8488 +/*
8489 + * Freescale Management Complex (MC) ioclt interface
8490 + *
8491 + * Copyright (C) 2014 Freescale Semiconductor, Inc.
8492 + * Author: Lijun Pan <Lijun.Pan@freescale.com>
8493 + *
8494 + * This file is licensed under the terms of the GNU General Public
8495 + * License version 2. This program is licensed "as is" without any
8496 + * warranty of any kind, whether express or implied.
8497 + */
8498 +#ifndef _FSL_MC_IOCTL_H_
8499 +#define _FSL_MC_IOCTL_H_
8500 +
8501 +#include <linux/ioctl.h>
8502 +#include "../include/mc-sys.h"
8503 +
8504 +#define RESTOOL_IOCTL_TYPE 'R'
8505 +
8506 +#define RESTOOL_SEND_MC_COMMAND \
8507 + _IOWR(RESTOOL_IOCTL_TYPE, 0xE0, struct mc_command)
8508 +
8509 +#endif /* _FSL_MC_IOCTL_H_ */
8510 diff --git a/drivers/staging/fsl-mc/bus/mc-restool.c b/drivers/staging/fsl-mc/bus/mc-restool.c
8511 new file mode 100644
8512 index 00000000..d5330b68
8513 --- /dev/null
8514 +++ b/drivers/staging/fsl-mc/bus/mc-restool.c
8515 @@ -0,0 +1,405 @@
8516 +/*
8517 + * Freescale Management Complex (MC) restool driver
8518 + *
8519 + * Copyright (C) 2014 Freescale Semiconductor, Inc.
8520 + * Author: Lijun Pan <Lijun.Pan@freescale.com>
8521 + *
8522 + * This file is licensed under the terms of the GNU General Public
8523 + * License version 2. This program is licensed "as is" without any
8524 + * warranty of any kind, whether express or implied.
8525 + */
8526 +
8527 +#include "../include/mc.h"
8528 +#include <linux/module.h>
8529 +#include <linux/fs.h>
8530 +#include <linux/miscdevice.h>
8531 +#include <linux/mm.h>
8532 +#include <linux/slab.h>
8533 +#include <linux/uaccess.h>
8534 +#include <linux/mutex.h>
8535 +#include <linux/platform_device.h>
8536 +#include "mc-ioctl.h"
8537 +#include "../include/mc-sys.h"
8538 +#include "../include/mc-bus.h"
8539 +#include "../include/mc-cmd.h"
8540 +#include "../include/dpmng.h"
8541 +
8542 +/**
8543 + * Maximum number of DPRCs that can be opened at the same time
8544 + */
8545 +#define MAX_DPRC_HANDLES 64
8546 +
8547 +/**
8548 + * restool_misc - information associated with the newly added miscdevice
8549 + * @misc: newly created miscdevice associated with root dprc
8550 + * @miscdevt: device id of this miscdevice
8551 + * @list: a linked list node representing this miscdevcie
8552 + * @static_mc_io: pointer to the static MC I/O object used by the restool
8553 + * @dynamic_instance_count: number of dynamically created instances
8554 + * @static_instance_in_use: static instance is in use or not
8555 + * @mutex: mutex lock to serialze the open/release operations
8556 + * @dev: root dprc associated with this miscdevice
8557 + */
8558 +struct restool_misc {
8559 + struct miscdevice misc;
8560 + dev_t miscdevt;
8561 + struct list_head list;
8562 + struct fsl_mc_io *static_mc_io;
8563 + u32 dynamic_instance_count;
8564 + bool static_instance_in_use;
8565 + struct mutex mutex; /* serialze the open/release operations */
8566 + struct device *dev;
8567 +};
8568 +
8569 +/**
8570 + * struct fsl_mc - Private data of a "fsl,qoriq-mc" platform device
8571 + * @root_mc_bus_dev: fsl-mc device representing the root DPRC
8572 + * @num_translation_ranges: number of entries in addr_translation_ranges
8573 + * @translation_ranges: array of bus to system address translation ranges
8574 + */
8575 +struct fsl_mc {
8576 + struct fsl_mc_device *root_mc_bus_dev;
8577 + u8 num_translation_ranges;
8578 + struct fsl_mc_addr_translation_range *translation_ranges;
8579 +};
8580 +
8581 +/*
8582 + * initialize a global list to link all
8583 + * the miscdevice nodes (struct restool_misc)
8584 + */
8585 +static LIST_HEAD(misc_list);
8586 +static DEFINE_MUTEX(misc_list_mutex);
8587 +
8588 +static int fsl_mc_restool_dev_open(struct inode *inode, struct file *filep)
8589 +{
8590 + struct fsl_mc_device *root_mc_dev;
8591 + int error;
8592 + struct fsl_mc_io *dynamic_mc_io = NULL;
8593 + struct restool_misc *restool_misc = NULL;
8594 + struct restool_misc *restool_misc_cursor;
8595 +
8596 + mutex_lock(&misc_list_mutex);
8597 +
8598 + list_for_each_entry(restool_misc_cursor, &misc_list, list) {
8599 + if (restool_misc_cursor->miscdevt == inode->i_rdev) {
8600 + restool_misc = restool_misc_cursor;
8601 + break;
8602 + }
8603 + }
8604 +
8605 + mutex_unlock(&misc_list_mutex);
8606 +
8607 + if (!restool_misc)
8608 + return -EINVAL;
8609 +
8610 + if (WARN_ON(!restool_misc->dev))
8611 + return -EINVAL;
8612 +
8613 + mutex_lock(&restool_misc->mutex);
8614 +
8615 + if (!restool_misc->static_instance_in_use) {
8616 + restool_misc->static_instance_in_use = true;
8617 + filep->private_data = restool_misc->static_mc_io;
8618 + } else {
8619 + dynamic_mc_io = kzalloc(sizeof(*dynamic_mc_io), GFP_KERNEL);
8620 + if (!dynamic_mc_io) {
8621 + error = -ENOMEM;
8622 + goto err_unlock;
8623 + }
8624 +
8625 + root_mc_dev = to_fsl_mc_device(restool_misc->dev);
8626 + error = fsl_mc_portal_allocate(root_mc_dev, 0, &dynamic_mc_io);
8627 + if (error < 0) {
8628 + pr_err("Not able to allocate MC portal\n");
8629 + goto free_dynamic_mc_io;
8630 + }
8631 + ++restool_misc->dynamic_instance_count;
8632 + filep->private_data = dynamic_mc_io;
8633 + }
8634 +
8635 + mutex_unlock(&restool_misc->mutex);
8636 +
8637 + return 0;
8638 +
8639 +free_dynamic_mc_io:
8640 + kfree(dynamic_mc_io);
8641 +err_unlock:
8642 + mutex_unlock(&restool_misc->mutex);
8643 +
8644 + return error;
8645 +}
8646 +
8647 +static int fsl_mc_restool_dev_release(struct inode *inode, struct file *filep)
8648 +{
8649 + struct fsl_mc_io *local_mc_io = filep->private_data;
8650 + struct restool_misc *restool_misc = NULL;
8651 + struct restool_misc *restool_misc_cursor;
8652 +
8653 + if (WARN_ON(!filep->private_data))
8654 + return -EINVAL;
8655 +
8656 + mutex_lock(&misc_list_mutex);
8657 +
8658 + list_for_each_entry(restool_misc_cursor, &misc_list, list) {
8659 + if (restool_misc_cursor->miscdevt == inode->i_rdev) {
8660 + restool_misc = restool_misc_cursor;
8661 + break;
8662 + }
8663 + }
8664 +
8665 + mutex_unlock(&misc_list_mutex);
8666 +
8667 + if (!restool_misc)
8668 + return -EINVAL;
8669 +
8670 + mutex_lock(&restool_misc->mutex);
8671 +
8672 + if (WARN_ON(restool_misc->dynamic_instance_count == 0 &&
8673 + !restool_misc->static_instance_in_use)) {
8674 + mutex_unlock(&restool_misc->mutex);
8675 + return -EINVAL;
8676 + }
8677 +
8678 + /* Globally clean up opened/untracked handles */
8679 + fsl_mc_portal_reset(local_mc_io);
8680 +
8681 + /*
8682 + * must check
8683 + * whether local_mc_io is dynamic or static instance
8684 + * Otherwise it will free up the reserved portal by accident
8685 + * or even not free up the dynamic allocated portal
8686 + * if 2 or more instances running concurrently
8687 + */
8688 + if (local_mc_io == restool_misc->static_mc_io) {
8689 + restool_misc->static_instance_in_use = false;
8690 + } else {
8691 + fsl_mc_portal_free(local_mc_io);
8692 + kfree(filep->private_data);
8693 + --restool_misc->dynamic_instance_count;
8694 + }
8695 +
8696 + filep->private_data = NULL;
8697 + mutex_unlock(&restool_misc->mutex);
8698 +
8699 + return 0;
8700 +}
8701 +
8702 +static int restool_send_mc_command(unsigned long arg,
8703 + struct fsl_mc_io *local_mc_io)
8704 +{
8705 + int error;
8706 + struct mc_command mc_cmd;
8707 +
8708 + if (copy_from_user(&mc_cmd, (void __user *)arg, sizeof(mc_cmd)))
8709 + return -EFAULT;
8710 +
8711 + /*
8712 + * Send MC command to the MC:
8713 + */
8714 + error = mc_send_command(local_mc_io, &mc_cmd);
8715 + if (error < 0)
8716 + return error;
8717 +
8718 + if (copy_to_user((void __user *)arg, &mc_cmd, sizeof(mc_cmd)))
8719 + return -EFAULT;
8720 +
8721 + return 0;
8722 +}
8723 +
8724 +static long
8725 +fsl_mc_restool_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
8726 +{
8727 + int error;
8728 +
8729 + switch (cmd) {
8730 + case RESTOOL_SEND_MC_COMMAND:
8731 + error = restool_send_mc_command(arg, file->private_data);
8732 + break;
8733 + default:
8734 + pr_err("%s: unexpected ioctl call number\n", __func__);
8735 + error = -EINVAL;
8736 + }
8737 +
8738 + return error;
8739 +}
8740 +
8741 +static const struct file_operations fsl_mc_restool_dev_fops = {
8742 + .owner = THIS_MODULE,
8743 + .open = fsl_mc_restool_dev_open,
8744 + .release = fsl_mc_restool_dev_release,
8745 + .unlocked_ioctl = fsl_mc_restool_dev_ioctl,
8746 +};
8747 +
8748 +static int restool_add_device_file(struct device *dev)
8749 +{
8750 + u32 name1 = 0;
8751 + char name2[20] = {0};
8752 + int error;
8753 + struct fsl_mc_device *root_mc_dev;
8754 + struct restool_misc *restool_misc;
8755 +
8756 + if (dev->bus == &platform_bus_type && dev->driver_data) {
8757 + if (sscanf(dev_name(dev), "%x.%s", &name1, name2) != 2)
8758 + return -EINVAL;
8759 +
8760 + if (strcmp(name2, "fsl-mc") == 0)
8761 + pr_debug("platform's root dprc name is: %s\n",
8762 + dev_name(&(((struct fsl_mc *)
8763 + (dev->driver_data))->root_mc_bus_dev->dev)));
8764 + }
8765 +
8766 + if (!fsl_mc_is_root_dprc(dev))
8767 + return 0;
8768 +
8769 + restool_misc = kzalloc(sizeof(*restool_misc), GFP_KERNEL);
8770 + if (!restool_misc)
8771 + return -ENOMEM;
8772 +
8773 + restool_misc->dev = dev;
8774 + root_mc_dev = to_fsl_mc_device(dev);
8775 + error = fsl_mc_portal_allocate(root_mc_dev, 0,
8776 + &restool_misc->static_mc_io);
8777 + if (error < 0) {
8778 + pr_err("Not able to allocate MC portal\n");
8779 + goto free_restool_misc;
8780 + }
8781 +
8782 + restool_misc->misc.minor = MISC_DYNAMIC_MINOR;
8783 + restool_misc->misc.name = dev_name(dev);
8784 + restool_misc->misc.fops = &fsl_mc_restool_dev_fops;
8785 +
8786 + error = misc_register(&restool_misc->misc);
8787 + if (error < 0) {
8788 + pr_err("misc_register() failed: %d\n", error);
8789 + goto free_portal;
8790 + }
8791 +
8792 + restool_misc->miscdevt = restool_misc->misc.this_device->devt;
8793 + mutex_init(&restool_misc->mutex);
8794 + mutex_lock(&misc_list_mutex);
8795 + list_add(&restool_misc->list, &misc_list);
8796 + mutex_unlock(&misc_list_mutex);
8797 +
8798 + pr_info("/dev/%s driver registered\n", dev_name(dev));
8799 +
8800 + return 0;
8801 +
8802 +free_portal:
8803 + fsl_mc_portal_free(restool_misc->static_mc_io);
8804 +free_restool_misc:
8805 + kfree(restool_misc);
8806 +
8807 + return error;
8808 +}
8809 +
8810 +static int restool_bus_notifier(struct notifier_block *nb,
8811 + unsigned long action, void *data)
8812 +{
8813 + int error;
8814 + struct device *dev = data;
8815 +
8816 + switch (action) {
8817 + case BUS_NOTIFY_ADD_DEVICE:
8818 + error = restool_add_device_file(dev);
8819 + if (error)
8820 + return error;
8821 + break;
8822 + case BUS_NOTIFY_DEL_DEVICE:
8823 + case BUS_NOTIFY_REMOVED_DEVICE:
8824 + case BUS_NOTIFY_BIND_DRIVER:
8825 + case BUS_NOTIFY_BOUND_DRIVER:
8826 + case BUS_NOTIFY_UNBIND_DRIVER:
8827 + case BUS_NOTIFY_UNBOUND_DRIVER:
8828 + break;
8829 + default:
8830 + pr_err("%s: unrecognized device action from %s\n", __func__,
8831 + dev_name(dev));
8832 + return -EINVAL;
8833 + }
8834 +
8835 + return 0;
8836 +}
8837 +
8838 +static int add_to_restool(struct device *dev, void *data)
8839 +{
8840 + return restool_add_device_file(dev);
8841 +}
8842 +
8843 +static int __init fsl_mc_restool_driver_init(void)
8844 +{
8845 + int error;
8846 + struct notifier_block *nb;
8847 +
8848 + nb = kzalloc(sizeof(*nb), GFP_KERNEL);
8849 + if (!nb)
8850 + return -ENOMEM;
8851 +
8852 + nb->notifier_call = restool_bus_notifier;
8853 + error = bus_register_notifier(&fsl_mc_bus_type, nb);
8854 + if (error)
8855 + goto free_nb;
8856 +
8857 + /*
8858 + * This driver runs after fsl-mc bus driver runs.
8859 + * Hence, many of the root dprcs are already attached to fsl-mc bus
8860 + * In order to make sure we find all the root dprcs,
8861 + * we need to scan the fsl_mc_bus_type.
8862 + */
8863 + error = bus_for_each_dev(&fsl_mc_bus_type, NULL, NULL, add_to_restool);
8864 + if (error) {
8865 + bus_unregister_notifier(&fsl_mc_bus_type, nb);
8866 + kfree(nb);
8867 + pr_err("restool driver registration failure\n");
8868 + return error;
8869 + }
8870 +
8871 + return 0;
8872 +
8873 +free_nb:
8874 + kfree(nb);
8875 + return error;
8876 +}
8877 +
8878 +module_init(fsl_mc_restool_driver_init);
8879 +
8880 +static void __exit fsl_mc_restool_driver_exit(void)
8881 +{
8882 + struct restool_misc *restool_misc;
8883 + struct restool_misc *restool_misc_tmp;
8884 + char name1[20] = {0};
8885 + u32 name2 = 0;
8886 +
8887 + list_for_each_entry_safe(restool_misc, restool_misc_tmp,
8888 + &misc_list, list) {
8889 + if (sscanf(restool_misc->misc.name, "%4s.%u", name1, &name2)
8890 + != 2)
8891 + continue;
8892 +
8893 + pr_debug("name1=%s,name2=%u\n", name1, name2);
8894 + pr_debug("misc-device: %s\n", restool_misc->misc.name);
8895 + if (strcmp(name1, "dprc") != 0)
8896 + continue;
8897 +
8898 + if (WARN_ON(!restool_misc->static_mc_io))
8899 + return;
8900 +
8901 + if (WARN_ON(restool_misc->dynamic_instance_count != 0))
8902 + return;
8903 +
8904 + if (WARN_ON(restool_misc->static_instance_in_use))
8905 + return;
8906 +
8907 + misc_deregister(&restool_misc->misc);
8908 + pr_info("/dev/%s driver unregistered\n",
8909 + restool_misc->misc.name);
8910 + fsl_mc_portal_free(restool_misc->static_mc_io);
8911 + list_del(&restool_misc->list);
8912 + kfree(restool_misc);
8913 + }
8914 +}
8915 +
8916 +module_exit(fsl_mc_restool_driver_exit);
8917 +
8918 +MODULE_AUTHOR("Freescale Semiconductor Inc.");
8919 +MODULE_DESCRIPTION("Freescale's MC restool driver");
8920 +MODULE_LICENSE("GPL");
8921 diff --git a/drivers/staging/fsl-mc/bus/mc-sys.c b/drivers/staging/fsl-mc/bus/mc-sys.c
8922 index 285917c7..cf63c7b6 100644
8923 --- a/drivers/staging/fsl-mc/bus/mc-sys.c
8924 +++ b/drivers/staging/fsl-mc/bus/mc-sys.c
8925 @@ -1,4 +1,5 @@
8926 -/* Copyright 2013-2014 Freescale Semiconductor Inc.
8927 +/*
8928 + * Copyright 2013-2016 Freescale Semiconductor Inc.
8929 *
8930 * I/O services to send MC commands to the MC hardware
8931 *
8932 @@ -13,7 +14,6 @@
8933 * names of any contributors may be used to endorse or promote products
8934 * derived from this software without specific prior written permission.
8935 *
8936 - *
8937 * ALTERNATIVELY, this software may be distributed under the terms of the
8938 * GNU General Public License ("GPL") as published by the Free Software
8939 * Foundation, either version 2 of that License or (at your option) any
8940 @@ -46,7 +46,7 @@
8941 /**
8942 * Timeout in milliseconds to wait for the completion of an MC command
8943 */
8944 -#define MC_CMD_COMPLETION_TIMEOUT_MS 500
8945 +#define MC_CMD_COMPLETION_TIMEOUT_MS 15000
8946
8947 /*
8948 * usleep_range() min and max values used to throttle down polling
8949 @@ -67,7 +67,7 @@ static u16 mc_cmd_hdr_read_cmdid(struct mc_command *cmd)
8950 struct mc_cmd_header *hdr = (struct mc_cmd_header *)&cmd->header;
8951 u16 cmd_id = le16_to_cpu(hdr->cmd_id);
8952
8953 - return (cmd_id & MC_CMD_HDR_CMDID_MASK) >> MC_CMD_HDR_CMDID_SHIFT;
8954 + return cmd_id;
8955 }
8956
8957 static int mc_status_to_error(enum mc_cmd_status status)
8958 @@ -200,7 +200,7 @@ static int mc_polling_wait_preemptible(struct fsl_mc_io *mc_io,
8959
8960 if (time_after_eq(jiffies, jiffies_until_timeout)) {
8961 dev_dbg(mc_io->dev,
8962 - "MC command timed out (portal: %#llx, obj handle: %#x, command: %#x)\n",
8963 + "MC command timed out (portal: %#llx, dprc handle: %#x, command: %#x)\n",
8964 mc_io->portal_phys_addr,
8965 (unsigned int)mc_cmd_hdr_read_token(cmd),
8966 (unsigned int)mc_cmd_hdr_read_cmdid(cmd));
8967 @@ -240,7 +240,7 @@ static int mc_polling_wait_atomic(struct fsl_mc_io *mc_io,
8968 timeout_usecs -= MC_CMD_COMPLETION_POLLING_MAX_SLEEP_USECS;
8969 if (timeout_usecs == 0) {
8970 dev_dbg(mc_io->dev,
8971 - "MC command timed out (portal: %#llx, obj handle: %#x, command: %#x)\n",
8972 + "MC command timed out (portal: %#llx, dprc handle: %#x, command: %#x)\n",
8973 mc_io->portal_phys_addr,
8974 (unsigned int)mc_cmd_hdr_read_token(cmd),
8975 (unsigned int)mc_cmd_hdr_read_cmdid(cmd));
8976 @@ -294,7 +294,7 @@ int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd)
8977
8978 if (status != MC_CMD_STATUS_OK) {
8979 dev_dbg(mc_io->dev,
8980 - "MC command failed: portal: %#llx, obj handle: %#x, command: %#x, status: %s (%#x)\n",
8981 + "MC command failed: portal: %#llx, dprc handle: %#x, command: %#x, status: %s (%#x)\n",
8982 mc_io->portal_phys_addr,
8983 (unsigned int)mc_cmd_hdr_read_token(cmd),
8984 (unsigned int)mc_cmd_hdr_read_cmdid(cmd),
8985 diff --git a/drivers/staging/fsl-mc/include/dpaa2-fd.h b/drivers/staging/fsl-mc/include/dpaa2-fd.h
8986 new file mode 100644
8987 index 00000000..72328415
8988 --- /dev/null
8989 +++ b/drivers/staging/fsl-mc/include/dpaa2-fd.h
8990 @@ -0,0 +1,706 @@
8991 +/*
8992 + * Copyright 2014-2016 Freescale Semiconductor Inc.
8993 + * Copyright 2016 NXP
8994 + *
8995 + * Redistribution and use in source and binary forms, with or without
8996 + * modification, are permitted provided that the following conditions are met:
8997 + * * Redistributions of source code must retain the above copyright
8998 + * notice, this list of conditions and the following disclaimer.
8999 + * * Redistributions in binary form must reproduce the above copyright
9000 + * notice, this list of conditions and the following disclaimer in the
9001 + * documentation and/or other materials provided with the distribution.
9002 + * * Neither the name of Freescale Semiconductor nor the
9003 + * names of its contributors may be used to endorse or promote products
9004 + * derived from this software without specific prior written permission.
9005 + *
9006 + * ALTERNATIVELY, this software may be distributed under the terms of the
9007 + * GNU General Public License ("GPL") as published by the Free Software
9008 + * Foundation, either version 2 of that License or (at your option) any
9009 + * later version.
9010 + *
9011 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9012 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9013 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9014 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9015 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9016 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9017 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9018 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9019 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9020 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9021 + */
9022 +#ifndef __FSL_DPAA2_FD_H
9023 +#define __FSL_DPAA2_FD_H
9024 +
9025 +#include <linux/kernel.h>
9026 +
9027 +/**
9028 + * DOC: DPAA2 FD - Frame Descriptor APIs for DPAA2
9029 + *
9030 + * Frame Descriptors (FDs) are used to describe frame data in the DPAA2.
9031 + * Frames can be enqueued and dequeued to Frame Queues (FQs) which are consumed
9032 + * by the various DPAA accelerators (WRIOP, SEC, PME, DCE)
9033 + *
9034 + * There are three types of frames: single, scatter gather, and frame lists.
9035 + *
9036 + * The set of APIs in this file must be used to create, manipulate and
9037 + * query Frame Descriptors.
9038 + */
9039 +
9040 +/**
9041 + * struct dpaa2_fd - Struct describing FDs
9042 + * @words: for easier/faster copying the whole FD structure
9043 + * @addr: address in the FD
9044 + * @len: length in the FD
9045 + * @bpid: buffer pool ID
9046 + * @format_offset: format, offset, and short-length fields
9047 + * @frc: frame context
9048 + * @ctrl: control bits...including dd, sc, va, err, etc
9049 + * @flc: flow context address
9050 + *
9051 + * This structure represents the basic Frame Descriptor used in the system.
9052 + */
9053 +struct dpaa2_fd {
9054 + union {
9055 + u32 words[8];
9056 + struct dpaa2_fd_simple {
9057 + __le64 addr;
9058 + __le32 len;
9059 + __le16 bpid;
9060 + __le16 format_offset;
9061 + __le32 frc;
9062 + __le32 ctrl;
9063 + __le64 flc;
9064 + } simple;
9065 + };
9066 +};
9067 +
9068 +#define FD_SHORT_LEN_FLAG_MASK 0x1
9069 +#define FD_SHORT_LEN_FLAG_SHIFT 14
9070 +#define FD_SHORT_LEN_MASK 0x3FFFF
9071 +#define FD_OFFSET_MASK 0x0FFF
9072 +#define FD_FORMAT_MASK 0x3
9073 +#define FD_FORMAT_SHIFT 12
9074 +#define FD_BPID_MASK 0x3FFF
9075 +#define SG_SHORT_LEN_FLAG_MASK 0x1
9076 +#define SG_SHORT_LEN_FLAG_SHIFT 14
9077 +#define SG_SHORT_LEN_MASK 0x1FFFF
9078 +#define SG_OFFSET_MASK 0x0FFF
9079 +#define SG_FORMAT_MASK 0x3
9080 +#define SG_FORMAT_SHIFT 12
9081 +#define SG_BPID_MASK 0x3FFF
9082 +#define SG_FINAL_FLAG_MASK 0x1
9083 +#define SG_FINAL_FLAG_SHIFT 15
9084 +#define FL_SHORT_LEN_FLAG_MASK 0x1
9085 +#define FL_SHORT_LEN_FLAG_SHIFT 14
9086 +#define FL_SHORT_LEN_MASK 0x3FFFF
9087 +#define FL_OFFSET_MASK 0x0FFF
9088 +#define FL_FORMAT_MASK 0x3
9089 +#define FL_FORMAT_SHIFT 12
9090 +#define FL_BPID_MASK 0x3FFF
9091 +#define FL_FINAL_FLAG_MASK 0x1
9092 +#define FL_FINAL_FLAG_SHIFT 15
9093 +
9094 +/* Error bits in FD CTRL */
9095 +#define FD_CTRL_ERR_MASK 0x000000FF
9096 +#define FD_CTRL_UFD 0x00000004
9097 +#define FD_CTRL_SBE 0x00000008
9098 +#define FD_CTRL_FLC 0x00000010
9099 +#define FD_CTRL_FSE 0x00000020
9100 +#define FD_CTRL_FAERR 0x00000040
9101 +
9102 +/* Annotation bits in FD CTRL */
9103 +#define FD_CTRL_PTA 0x00800000
9104 +#define FD_CTRL_PTV1 0x00400000
9105 +
9106 +enum dpaa2_fd_format {
9107 + dpaa2_fd_single = 0,
9108 + dpaa2_fd_list,
9109 + dpaa2_fd_sg
9110 +};
9111 +
9112 +/**
9113 + * dpaa2_fd_get_addr() - get the addr field of frame descriptor
9114 + * @fd: the given frame descriptor
9115 + *
9116 + * Return the address in the frame descriptor.
9117 + */
9118 +static inline dma_addr_t dpaa2_fd_get_addr(const struct dpaa2_fd *fd)
9119 +{
9120 + return (dma_addr_t)le64_to_cpu(fd->simple.addr);
9121 +}
9122 +
9123 +/**
9124 + * dpaa2_fd_set_addr() - Set the addr field of frame descriptor
9125 + * @fd: the given frame descriptor
9126 + * @addr: the address needs to be set in frame descriptor
9127 + */
9128 +static inline void dpaa2_fd_set_addr(struct dpaa2_fd *fd, dma_addr_t addr)
9129 +{
9130 + fd->simple.addr = cpu_to_le64(addr);
9131 +}
9132 +
9133 +/**
9134 + * dpaa2_fd_get_frc() - Get the frame context in the frame descriptor
9135 + * @fd: the given frame descriptor
9136 + *
9137 + * Return the frame context field in the frame descriptor.
9138 + */
9139 +static inline u32 dpaa2_fd_get_frc(const struct dpaa2_fd *fd)
9140 +{
9141 + return le32_to_cpu(fd->simple.frc);
9142 +}
9143 +
9144 +/**
9145 + * dpaa2_fd_set_frc() - Set the frame context in the frame descriptor
9146 + * @fd: the given frame descriptor
9147 + * @frc: the frame context needs to be set in frame descriptor
9148 + */
9149 +static inline void dpaa2_fd_set_frc(struct dpaa2_fd *fd, u32 frc)
9150 +{
9151 + fd->simple.frc = cpu_to_le32(frc);
9152 +}
9153 +
9154 +/**
9155 + * dpaa2_fd_get_ctrl() - Get the control bits in the frame descriptor
9156 + * @fd: the given frame descriptor
9157 + *
9158 + * Return the control bits field in the frame descriptor.
9159 + */
9160 +static inline u32 dpaa2_fd_get_ctrl(const struct dpaa2_fd *fd)
9161 +{
9162 + return le32_to_cpu(fd->simple.ctrl);
9163 +}
9164 +
9165 +/**
9166 + * dpaa2_fd_set_ctrl() - Set the control bits in the frame descriptor
9167 + * @fd: the given frame descriptor
9168 + * @ctrl: the control bits to be set in the frame descriptor
9169 + */
9170 +static inline void dpaa2_fd_set_ctrl(struct dpaa2_fd *fd, u32 ctrl)
9171 +{
9172 + fd->simple.ctrl = cpu_to_le32(ctrl);
9173 +}
9174 +
9175 +/**
9176 + * dpaa2_fd_get_flc() - Get the flow context in the frame descriptor
9177 + * @fd: the given frame descriptor
9178 + *
9179 + * Return the flow context in the frame descriptor.
9180 + */
9181 +static inline dma_addr_t dpaa2_fd_get_flc(const struct dpaa2_fd *fd)
9182 +{
9183 + return (dma_addr_t)le64_to_cpu(fd->simple.flc);
9184 +}
9185 +
9186 +/**
9187 + * dpaa2_fd_set_flc() - Set the flow context field of frame descriptor
9188 + * @fd: the given frame descriptor
9189 + * @flc_addr: the flow context needs to be set in frame descriptor
9190 + */
9191 +static inline void dpaa2_fd_set_flc(struct dpaa2_fd *fd, dma_addr_t flc_addr)
9192 +{
9193 + fd->simple.flc = cpu_to_le64(flc_addr);
9194 +}
9195 +
9196 +static inline bool dpaa2_fd_short_len(const struct dpaa2_fd *fd)
9197 +{
9198 + return !!((le16_to_cpu(fd->simple.format_offset) >>
9199 + FD_SHORT_LEN_FLAG_SHIFT) & FD_SHORT_LEN_FLAG_MASK);
9200 +}
9201 +
9202 +/**
9203 + * dpaa2_fd_get_len() - Get the length in the frame descriptor
9204 + * @fd: the given frame descriptor
9205 + *
9206 + * Return the length field in the frame descriptor.
9207 + */
9208 +static inline u32 dpaa2_fd_get_len(const struct dpaa2_fd *fd)
9209 +{
9210 + if (dpaa2_fd_short_len(fd))
9211 + return le32_to_cpu(fd->simple.len) & FD_SHORT_LEN_MASK;
9212 +
9213 + return le32_to_cpu(fd->simple.len);
9214 +}
9215 +
9216 +/**
9217 + * dpaa2_fd_set_len() - Set the length field of frame descriptor
9218 + * @fd: the given frame descriptor
9219 + * @len: the length needs to be set in frame descriptor
9220 + */
9221 +static inline void dpaa2_fd_set_len(struct dpaa2_fd *fd, u32 len)
9222 +{
9223 + fd->simple.len = cpu_to_le32(len);
9224 +}
9225 +
9226 +/**
9227 + * dpaa2_fd_get_offset() - Get the offset field in the frame descriptor
9228 + * @fd: the given frame descriptor
9229 + *
9230 + * Return the offset.
9231 + */
9232 +static inline uint16_t dpaa2_fd_get_offset(const struct dpaa2_fd *fd)
9233 +{
9234 + return le16_to_cpu(fd->simple.format_offset) & FD_OFFSET_MASK;
9235 +}
9236 +
9237 +/**
9238 + * dpaa2_fd_set_offset() - Set the offset field of frame descriptor
9239 + * @fd: the given frame descriptor
9240 + * @offset: the offset needs to be set in frame descriptor
9241 + */
9242 +static inline void dpaa2_fd_set_offset(struct dpaa2_fd *fd, uint16_t offset)
9243 +{
9244 + fd->simple.format_offset &= cpu_to_le16(~FD_OFFSET_MASK);
9245 + fd->simple.format_offset |= cpu_to_le16(offset);
9246 +}
9247 +
9248 +/**
9249 + * dpaa2_fd_get_format() - Get the format field in the frame descriptor
9250 + * @fd: the given frame descriptor
9251 + *
9252 + * Return the format.
9253 + */
9254 +static inline enum dpaa2_fd_format dpaa2_fd_get_format(
9255 + const struct dpaa2_fd *fd)
9256 +{
9257 + return (enum dpaa2_fd_format)((le16_to_cpu(fd->simple.format_offset)
9258 + >> FD_FORMAT_SHIFT) & FD_FORMAT_MASK);
9259 +}
9260 +
9261 +/**
9262 + * dpaa2_fd_set_format() - Set the format field of frame descriptor
9263 + * @fd: the given frame descriptor
9264 + * @format: the format needs to be set in frame descriptor
9265 + */
9266 +static inline void dpaa2_fd_set_format(struct dpaa2_fd *fd,
9267 + enum dpaa2_fd_format format)
9268 +{
9269 + fd->simple.format_offset &=
9270 + cpu_to_le16(~(FD_FORMAT_MASK << FD_FORMAT_SHIFT));
9271 + fd->simple.format_offset |= cpu_to_le16(format << FD_FORMAT_SHIFT);
9272 +}
9273 +
9274 +/**
9275 + * dpaa2_fd_get_bpid() - Get the bpid field in the frame descriptor
9276 + * @fd: the given frame descriptor
9277 + *
9278 + * Return the buffer pool id.
9279 + */
9280 +static inline uint16_t dpaa2_fd_get_bpid(const struct dpaa2_fd *fd)
9281 +{
9282 + return le16_to_cpu(fd->simple.bpid) & FD_BPID_MASK;
9283 +}
9284 +
9285 +/**
9286 + * dpaa2_fd_set_bpid() - Set the bpid field of frame descriptor
9287 + * @fd: the given frame descriptor
9288 + * @bpid: buffer pool id to be set
9289 + */
9290 +static inline void dpaa2_fd_set_bpid(struct dpaa2_fd *fd, uint16_t bpid)
9291 +{
9292 + fd->simple.bpid &= cpu_to_le16(~(FD_BPID_MASK));
9293 + fd->simple.bpid |= cpu_to_le16(bpid);
9294 +}
9295 +
9296 +/**
9297 + * struct dpaa2_sg_entry - the scatter-gathering structure
9298 + * @addr: address of the sg entry
9299 + * @len: length in this sg entry
9300 + * @bpid: buffer pool id
9301 + * @format_offset: format and offset fields
9302 + */
9303 +struct dpaa2_sg_entry {
9304 + __le64 addr;
9305 + __le32 len;
9306 + __le16 bpid;
9307 + __le16 format_offset;
9308 +};
9309 +
9310 +enum dpaa2_sg_format {
9311 + dpaa2_sg_single = 0,
9312 + dpaa2_sg_frame_data,
9313 + dpaa2_sg_sgt_ext
9314 +};
9315 +
9316 +/* Accessors for SG entry fields */
9317 +
9318 +/**
9319 + * dpaa2_sg_get_addr() - Get the address from SG entry
9320 + * @sg: the given scatter-gathering object
9321 + *
9322 + * Return the address.
9323 + */
9324 +static inline dma_addr_t dpaa2_sg_get_addr(const struct dpaa2_sg_entry *sg)
9325 +{
9326 + return le64_to_cpu((dma_addr_t)sg->addr);
9327 +}
9328 +
9329 +/**
9330 + * dpaa2_sg_set_addr() - Set the address in SG entry
9331 + * @sg: the given scatter-gathering object
9332 + * @addr: the address to be set
9333 + */
9334 +static inline void dpaa2_sg_set_addr(struct dpaa2_sg_entry *sg, dma_addr_t addr)
9335 +{
9336 + sg->addr = cpu_to_le64(addr);
9337 +}
9338 +
9339 +static inline bool dpaa2_sg_short_len(const struct dpaa2_sg_entry *sg)
9340 +{
9341 + return !!((le16_to_cpu(sg->format_offset) >> SG_SHORT_LEN_FLAG_SHIFT)
9342 + & SG_SHORT_LEN_FLAG_MASK);
9343 +}
9344 +
9345 +/**
9346 + * dpaa2_sg_get_len() - Get the length in SG entry
9347 + * @sg: the given scatter-gathering object
9348 + *
9349 + * Return the length.
9350 + */
9351 +static inline u32 dpaa2_sg_get_len(const struct dpaa2_sg_entry *sg)
9352 +{
9353 + if (dpaa2_sg_short_len(sg))
9354 + return le32_to_cpu(sg->len) & SG_SHORT_LEN_MASK;
9355 +
9356 + return le32_to_cpu(sg->len);
9357 +}
9358 +
9359 +/**
9360 + * dpaa2_sg_set_len() - Set the length in SG entry
9361 + * @sg: the given scatter-gathering object
9362 + * @len: the length to be set
9363 + */
9364 +static inline void dpaa2_sg_set_len(struct dpaa2_sg_entry *sg, u32 len)
9365 +{
9366 + sg->len = cpu_to_le32(len);
9367 +}
9368 +
9369 +/**
9370 + * dpaa2_sg_get_offset() - Get the offset in SG entry
9371 + * @sg: the given scatter-gathering object
9372 + *
9373 + * Return the offset.
9374 + */
9375 +static inline u16 dpaa2_sg_get_offset(const struct dpaa2_sg_entry *sg)
9376 +{
9377 + return le16_to_cpu(sg->format_offset) & SG_OFFSET_MASK;
9378 +}
9379 +
9380 +/**
9381 + * dpaa2_sg_set_offset() - Set the offset in SG entry
9382 + * @sg: the given scatter-gathering object
9383 + * @offset: the offset to be set
9384 + */
9385 +static inline void dpaa2_sg_set_offset(struct dpaa2_sg_entry *sg,
9386 + u16 offset)
9387 +{
9388 + sg->format_offset &= cpu_to_le16(~SG_OFFSET_MASK);
9389 + sg->format_offset |= cpu_to_le16(offset);
9390 +}
9391 +
9392 +/**
9393 + * dpaa2_sg_get_format() - Get the SG format in SG entry
9394 + * @sg: the given scatter-gathering object
9395 + *
9396 + * Return the format.
9397 + */
9398 +static inline enum dpaa2_sg_format
9399 + dpaa2_sg_get_format(const struct dpaa2_sg_entry *sg)
9400 +{
9401 + return (enum dpaa2_sg_format)((le16_to_cpu(sg->format_offset)
9402 + >> SG_FORMAT_SHIFT) & SG_FORMAT_MASK);
9403 +}
9404 +
9405 +/**
9406 + * dpaa2_sg_set_format() - Set the SG format in SG entry
9407 + * @sg: the given scatter-gathering object
9408 + * @format: the format to be set
9409 + */
9410 +static inline void dpaa2_sg_set_format(struct dpaa2_sg_entry *sg,
9411 + enum dpaa2_sg_format format)
9412 +{
9413 + sg->format_offset &= cpu_to_le16(~(SG_FORMAT_MASK << SG_FORMAT_SHIFT));
9414 + sg->format_offset |= cpu_to_le16(format << SG_FORMAT_SHIFT);
9415 +}
9416 +
9417 +/**
9418 + * dpaa2_sg_get_bpid() - Get the buffer pool id in SG entry
9419 + * @sg: the given scatter-gathering object
9420 + *
9421 + * Return the bpid.
9422 + */
9423 +static inline u16 dpaa2_sg_get_bpid(const struct dpaa2_sg_entry *sg)
9424 +{
9425 + return le16_to_cpu(sg->bpid) & SG_BPID_MASK;
9426 +}
9427 +
9428 +/**
9429 + * dpaa2_sg_set_bpid() - Set the buffer pool id in SG entry
9430 + * @sg: the given scatter-gathering object
9431 + * @bpid: the bpid to be set
9432 + */
9433 +static inline void dpaa2_sg_set_bpid(struct dpaa2_sg_entry *sg, u16 bpid)
9434 +{
9435 + sg->bpid &= cpu_to_le16(~(SG_BPID_MASK));
9436 + sg->bpid |= cpu_to_le16(bpid);
9437 +}
9438 +
9439 +/**
9440 + * dpaa2_sg_is_final() - Check final bit in SG entry
9441 + * @sg: the given scatter-gathering object
9442 + *
9443 + * Return bool.
9444 + */
9445 +static inline bool dpaa2_sg_is_final(const struct dpaa2_sg_entry *sg)
9446 +{
9447 + return !!(le16_to_cpu(sg->format_offset) >> SG_FINAL_FLAG_SHIFT);
9448 +}
9449 +
9450 +/**
9451 + * dpaa2_sg_set_final() - Set the final bit in SG entry
9452 + * @sg: the given scatter-gathering object
9453 + * @final: the final boolean to be set
9454 + */
9455 +static inline void dpaa2_sg_set_final(struct dpaa2_sg_entry *sg, bool final)
9456 +{
9457 + sg->format_offset &= cpu_to_le16(~(SG_FINAL_FLAG_MASK
9458 + << SG_FINAL_FLAG_SHIFT));
9459 + sg->format_offset |= cpu_to_le16(final << SG_FINAL_FLAG_SHIFT);
9460 +}
9461 +
9462 +/**
9463 + * struct dpaa2_fl_entry - structure for frame list entry.
9464 + * @addr: address in the FLE
9465 + * @len: length in the FLE
9466 + * @bpid: buffer pool ID
9467 + * @format_offset: format, offset, and short-length fields
9468 + * @frc: frame context
9469 + * @ctrl: control bits...including pta, pvt1, pvt2, err, etc
9470 + * @flc: flow context address
9471 + */
9472 +struct dpaa2_fl_entry {
9473 + __le64 addr;
9474 + __le32 len;
9475 + __le16 bpid;
9476 + __le16 format_offset;
9477 + __le32 frc;
9478 + __le32 ctrl;
9479 + __le64 flc;
9480 +};
9481 +
9482 +enum dpaa2_fl_format {
9483 + dpaa2_fl_single = 0,
9484 + dpaa2_fl_res,
9485 + dpaa2_fl_sg
9486 +};
9487 +
9488 +/**
9489 + * dpaa2_fl_get_addr() - get the addr field of FLE
9490 + * @fle: the given frame list entry
9491 + *
9492 + * Return the address in the frame list entry.
9493 + */
9494 +static inline dma_addr_t dpaa2_fl_get_addr(const struct dpaa2_fl_entry *fle)
9495 +{
9496 + return (dma_addr_t)le64_to_cpu(fle->addr);
9497 +}
9498 +
9499 +/**
9500 + * dpaa2_fl_set_addr() - Set the addr field of FLE
9501 + * @fle: the given frame list entry
9502 + * @addr: the address needs to be set in frame list entry
9503 + */
9504 +static inline void dpaa2_fl_set_addr(struct dpaa2_fl_entry *fle,
9505 + dma_addr_t addr)
9506 +{
9507 + fle->addr = cpu_to_le64(addr);
9508 +}
9509 +
9510 +/**
9511 + * dpaa2_fl_get_frc() - Get the frame context in the FLE
9512 + * @fle: the given frame list entry
9513 + *
9514 + * Return the frame context field in the frame lsit entry.
9515 + */
9516 +static inline u32 dpaa2_fl_get_frc(const struct dpaa2_fl_entry *fle)
9517 +{
9518 + return le32_to_cpu(fle->frc);
9519 +}
9520 +
9521 +/**
9522 + * dpaa2_fl_set_frc() - Set the frame context in the FLE
9523 + * @fle: the given frame list entry
9524 + * @frc: the frame context needs to be set in frame list entry
9525 + */
9526 +static inline void dpaa2_fl_set_frc(struct dpaa2_fl_entry *fle, u32 frc)
9527 +{
9528 + fle->frc = cpu_to_le32(frc);
9529 +}
9530 +
9531 +/**
9532 + * dpaa2_fl_get_ctrl() - Get the control bits in the FLE
9533 + * @fle: the given frame list entry
9534 + *
9535 + * Return the control bits field in the frame list entry.
9536 + */
9537 +static inline u32 dpaa2_fl_get_ctrl(const struct dpaa2_fl_entry *fle)
9538 +{
9539 + return le32_to_cpu(fle->ctrl);
9540 +}
9541 +
9542 +/**
9543 + * dpaa2_fl_set_ctrl() - Set the control bits in the FLE
9544 + * @fle: the given frame list entry
9545 + * @ctrl: the control bits to be set in the frame list entry
9546 + */
9547 +static inline void dpaa2_fl_set_ctrl(struct dpaa2_fl_entry *fle, u32 ctrl)
9548 +{
9549 + fle->ctrl = cpu_to_le32(ctrl);
9550 +}
9551 +
9552 +/**
9553 + * dpaa2_fl_get_flc() - Get the flow context in the FLE
9554 + * @fle: the given frame list entry
9555 + *
9556 + * Return the flow context in the frame list entry.
9557 + */
9558 +static inline dma_addr_t dpaa2_fl_get_flc(const struct dpaa2_fl_entry *fle)
9559 +{
9560 + return (dma_addr_t)le64_to_cpu(fle->flc);
9561 +}
9562 +
9563 +/**
9564 + * dpaa2_fl_set_flc() - Set the flow context field of FLE
9565 + * @fle: the given frame list entry
9566 + * @flc_addr: the flow context needs to be set in frame list entry
9567 + */
9568 +static inline void dpaa2_fl_set_flc(struct dpaa2_fl_entry *fle,
9569 + dma_addr_t flc_addr)
9570 +{
9571 + fle->flc = cpu_to_le64(flc_addr);
9572 +}
9573 +
9574 +static inline bool dpaa2_fl_short_len(const struct dpaa2_fl_entry *fle)
9575 +{
9576 + return !!((le16_to_cpu(fle->format_offset) >>
9577 + FL_SHORT_LEN_FLAG_SHIFT) & FL_SHORT_LEN_FLAG_MASK);
9578 +}
9579 +
9580 +/**
9581 + * dpaa2_fl_get_len() - Get the length in the FLE
9582 + * @fle: the given frame list entry
9583 + *
9584 + * Return the length field in the frame list entry.
9585 + */
9586 +static inline u32 dpaa2_fl_get_len(const struct dpaa2_fl_entry *fle)
9587 +{
9588 + if (dpaa2_fl_short_len(fle))
9589 + return le32_to_cpu(fle->len) & FL_SHORT_LEN_MASK;
9590 +
9591 + return le32_to_cpu(fle->len);
9592 +}
9593 +
9594 +/**
9595 + * dpaa2_fl_set_len() - Set the length field of FLE
9596 + * @fle: the given frame list entry
9597 + * @len: the length needs to be set in frame list entry
9598 + */
9599 +static inline void dpaa2_fl_set_len(struct dpaa2_fl_entry *fle, u32 len)
9600 +{
9601 + fle->len = cpu_to_le32(len);
9602 +}
9603 +
9604 +/**
9605 + * dpaa2_fl_get_offset() - Get the offset field in the frame list entry
9606 + * @fle: the given frame list entry
9607 + *
9608 + * Return the offset.
9609 + */
9610 +static inline u16 dpaa2_fl_get_offset(const struct dpaa2_fl_entry *fle)
9611 +{
9612 + return le16_to_cpu(fle->format_offset) & FL_OFFSET_MASK;
9613 +}
9614 +
9615 +/**
9616 + * dpaa2_fl_set_offset() - Set the offset field of FLE
9617 + * @fle: the given frame list entry
9618 + * @offset: the offset needs to be set in frame list entry
9619 + */
9620 +static inline void dpaa2_fl_set_offset(struct dpaa2_fl_entry *fle, u16 offset)
9621 +{
9622 + fle->format_offset &= cpu_to_le16(~FL_OFFSET_MASK);
9623 + fle->format_offset |= cpu_to_le16(offset);
9624 +}
9625 +
9626 +/**
9627 + * dpaa2_fl_get_format() - Get the format field in the FLE
9628 + * @fle: the given frame list entry
9629 + *
9630 + * Return the format.
9631 + */
9632 +static inline enum dpaa2_fl_format dpaa2_fl_get_format(
9633 + const struct dpaa2_fl_entry *fle)
9634 +{
9635 + return (enum dpaa2_fl_format)((le16_to_cpu(fle->format_offset) >>
9636 + FL_FORMAT_SHIFT) & FL_FORMAT_MASK);
9637 +}
9638 +
9639 +/**
9640 + * dpaa2_fl_set_format() - Set the format field of FLE
9641 + * @fle: the given frame list entry
9642 + * @format: the format needs to be set in frame list entry
9643 + */
9644 +static inline void dpaa2_fl_set_format(struct dpaa2_fl_entry *fle,
9645 + enum dpaa2_fl_format format)
9646 +{
9647 + fle->format_offset &= cpu_to_le16(~(FL_FORMAT_MASK << FL_FORMAT_SHIFT));
9648 + fle->format_offset |= cpu_to_le16(format << FL_FORMAT_SHIFT);
9649 +}
9650 +
9651 +/**
9652 + * dpaa2_fl_get_bpid() - Get the bpid field in the FLE
9653 + * @fle: the given frame list entry
9654 + *
9655 + * Return the buffer pool id.
9656 + */
9657 +static inline u16 dpaa2_fl_get_bpid(const struct dpaa2_fl_entry *fle)
9658 +{
9659 + return le16_to_cpu(fle->bpid) & FL_BPID_MASK;
9660 +}
9661 +
9662 +/**
9663 + * dpaa2_fl_set_bpid() - Set the bpid field of FLE
9664 + * @fle: the given frame list entry
9665 + * @bpid: buffer pool id to be set
9666 + */
9667 +static inline void dpaa2_fl_set_bpid(struct dpaa2_fl_entry *fle, u16 bpid)
9668 +{
9669 + fle->bpid &= cpu_to_le16(~(FL_BPID_MASK));
9670 + fle->bpid |= cpu_to_le16(bpid);
9671 +}
9672 +
9673 +/**
9674 + * dpaa2_fl_is_final() - Check final bit in FLE
9675 + * @fle: the given frame list entry
9676 + *
9677 + * Return bool.
9678 + */
9679 +static inline bool dpaa2_fl_is_final(const struct dpaa2_fl_entry *fle)
9680 +{
9681 + return !!(le16_to_cpu(fle->format_offset) >> FL_FINAL_FLAG_SHIFT);
9682 +}
9683 +
9684 +/**
9685 + * dpaa2_fl_set_final() - Set the final bit in FLE
9686 + * @fle: the given frame list entry
9687 + * @final: the final boolean to be set
9688 + */
9689 +static inline void dpaa2_fl_set_final(struct dpaa2_fl_entry *fle, bool final)
9690 +{
9691 + fle->format_offset &= cpu_to_le16(~(FL_FINAL_FLAG_MASK <<
9692 + FL_FINAL_FLAG_SHIFT));
9693 + fle->format_offset |= cpu_to_le16(final << FL_FINAL_FLAG_SHIFT);
9694 +}
9695 +
9696 +#endif /* __FSL_DPAA2_FD_H */
9697 diff --git a/drivers/staging/fsl-mc/include/dpaa2-global.h b/drivers/staging/fsl-mc/include/dpaa2-global.h
9698 new file mode 100644
9699 index 00000000..0326447f
9700 --- /dev/null
9701 +++ b/drivers/staging/fsl-mc/include/dpaa2-global.h
9702 @@ -0,0 +1,202 @@
9703 +/*
9704 + * Copyright 2014-2016 Freescale Semiconductor Inc.
9705 + * Copyright 2016 NXP
9706 + *
9707 + * Redistribution and use in source and binary forms, with or without
9708 + * modification, are permitted provided that the following conditions are met:
9709 + * * Redistributions of source code must retain the above copyright
9710 + * notice, this list of conditions and the following disclaimer.
9711 + * * Redistributions in binary form must reproduce the above copyright
9712 + * notice, this list of conditions and the following disclaimer in the
9713 + * documentation and/or other materials provided with the distribution.
9714 + * * Neither the name of Freescale Semiconductor nor the
9715 + * names of its contributors may be used to endorse or promote products
9716 + * derived from this software without specific prior written permission.
9717 + *
9718 + * ALTERNATIVELY, this software may be distributed under the terms of the
9719 + * GNU General Public License ("GPL") as published by the Free Software
9720 + * Foundation, either version 2 of that License or (at your option) any
9721 + * later version.
9722 + *
9723 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9724 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9725 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9726 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9727 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9728 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9729 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9730 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9731 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9732 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9733 + */
9734 +#ifndef __FSL_DPAA2_GLOBAL_H
9735 +#define __FSL_DPAA2_GLOBAL_H
9736 +
9737 +#include <linux/types.h>
9738 +#include <linux/cpumask.h>
9739 +#include "dpaa2-fd.h"
9740 +
9741 +struct dpaa2_dq {
9742 + union {
9743 + struct common {
9744 + u8 verb;
9745 + u8 reserved[63];
9746 + } common;
9747 + struct dq {
9748 + u8 verb;
9749 + u8 stat;
9750 + __le16 seqnum;
9751 + __le16 oprid;
9752 + u8 reserved;
9753 + u8 tok;
9754 + __le32 fqid;
9755 + u32 reserved2;
9756 + __le32 fq_byte_cnt;
9757 + __le32 fq_frm_cnt;
9758 + __le64 fqd_ctx;
9759 + u8 fd[32];
9760 + } dq;
9761 + struct scn {
9762 + u8 verb;
9763 + u8 stat;
9764 + u8 state;
9765 + u8 reserved;
9766 + __le32 rid_tok;
9767 + __le64 ctx;
9768 + } scn;
9769 + };
9770 +};
9771 +
9772 +/* Parsing frame dequeue results */
9773 +/* FQ empty */
9774 +#define DPAA2_DQ_STAT_FQEMPTY 0x80
9775 +/* FQ held active */
9776 +#define DPAA2_DQ_STAT_HELDACTIVE 0x40
9777 +/* FQ force eligible */
9778 +#define DPAA2_DQ_STAT_FORCEELIGIBLE 0x20
9779 +/* valid frame */
9780 +#define DPAA2_DQ_STAT_VALIDFRAME 0x10
9781 +/* FQ ODP enable */
9782 +#define DPAA2_DQ_STAT_ODPVALID 0x04
9783 +/* volatile dequeue */
9784 +#define DPAA2_DQ_STAT_VOLATILE 0x02
9785 +/* volatile dequeue command is expired */
9786 +#define DPAA2_DQ_STAT_EXPIRED 0x01
9787 +
9788 +#define DQ_FQID_MASK 0x00FFFFFF
9789 +#define DQ_FRAME_COUNT_MASK 0x00FFFFFF
9790 +
9791 +/**
9792 + * dpaa2_dq_flags() - Get the stat field of dequeue response
9793 + * @dq: the dequeue result.
9794 + */
9795 +static inline u32 dpaa2_dq_flags(const struct dpaa2_dq *dq)
9796 +{
9797 + return dq->dq.stat;
9798 +}
9799 +
9800 +/**
9801 + * dpaa2_dq_is_pull() - Check whether the dq response is from a pull
9802 + * command.
9803 + * @dq: the dequeue result
9804 + *
9805 + * Return 1 for volatile(pull) dequeue, 0 for static dequeue.
9806 + */
9807 +static inline int dpaa2_dq_is_pull(const struct dpaa2_dq *dq)
9808 +{
9809 + return (int)(dpaa2_dq_flags(dq) & DPAA2_DQ_STAT_VOLATILE);
9810 +}
9811 +
9812 +/**
9813 + * dpaa2_dq_is_pull_complete() - Check whether the pull command is completed.
9814 + * @dq: the dequeue result
9815 + *
9816 + * Return boolean.
9817 + */
9818 +static inline bool dpaa2_dq_is_pull_complete(const struct dpaa2_dq *dq)
9819 +{
9820 + return !!(dpaa2_dq_flags(dq) & DPAA2_DQ_STAT_EXPIRED);
9821 +}
9822 +
9823 +/**
9824 + * dpaa2_dq_seqnum() - Get the seqnum field in dequeue response
9825 + * @dq: the dequeue result
9826 + *
9827 + * seqnum is valid only if VALIDFRAME flag is TRUE
9828 + *
9829 + * Return seqnum.
9830 + */
9831 +static inline u16 dpaa2_dq_seqnum(const struct dpaa2_dq *dq)
9832 +{
9833 + return le16_to_cpu(dq->dq.seqnum);
9834 +}
9835 +
9836 +/**
9837 + * dpaa2_dq_odpid() - Get the odpid field in dequeue response
9838 + * @dq: the dequeue result
9839 + *
9840 + * odpid is valid only if ODPVALID flag is TRUE.
9841 + *
9842 + * Return odpid.
9843 + */
9844 +static inline u16 dpaa2_dq_odpid(const struct dpaa2_dq *dq)
9845 +{
9846 + return le16_to_cpu(dq->dq.oprid);
9847 +}
9848 +
9849 +/**
9850 + * dpaa2_dq_fqid() - Get the fqid in dequeue response
9851 + * @dq: the dequeue result
9852 + *
9853 + * Return fqid.
9854 + */
9855 +static inline u32 dpaa2_dq_fqid(const struct dpaa2_dq *dq)
9856 +{
9857 + return le32_to_cpu(dq->dq.fqid) & DQ_FQID_MASK;
9858 +}
9859 +
9860 +/**
9861 + * dpaa2_dq_byte_count() - Get the byte count in dequeue response
9862 + * @dq: the dequeue result
9863 + *
9864 + * Return the byte count remaining in the FQ.
9865 + */
9866 +static inline u32 dpaa2_dq_byte_count(const struct dpaa2_dq *dq)
9867 +{
9868 + return le32_to_cpu(dq->dq.fq_byte_cnt);
9869 +}
9870 +
9871 +/**
9872 + * dpaa2_dq_frame_count() - Get the frame count in dequeue response
9873 + * @dq: the dequeue result
9874 + *
9875 + * Return the frame count remaining in the FQ.
9876 + */
9877 +static inline u32 dpaa2_dq_frame_count(const struct dpaa2_dq *dq)
9878 +{
9879 + return le32_to_cpu(dq->dq.fq_frm_cnt) & DQ_FRAME_COUNT_MASK;
9880 +}
9881 +
9882 +/**
9883 + * dpaa2_dq_fd_ctx() - Get the frame queue context in dequeue response
9884 + * @dq: the dequeue result
9885 + *
9886 + * Return the frame queue context.
9887 + */
9888 +static inline u64 dpaa2_dq_fqd_ctx(const struct dpaa2_dq *dq)
9889 +{
9890 + return le64_to_cpu(dq->dq.fqd_ctx);
9891 +}
9892 +
9893 +/**
9894 + * dpaa2_dq_fd() - Get the frame descriptor in dequeue response
9895 + * @dq: the dequeue result
9896 + *
9897 + * Return the frame descriptor.
9898 + */
9899 +static inline const struct dpaa2_fd *dpaa2_dq_fd(const struct dpaa2_dq *dq)
9900 +{
9901 + return (const struct dpaa2_fd *)&dq->dq.fd[0];
9902 +}
9903 +
9904 +#endif /* __FSL_DPAA2_GLOBAL_H */
9905 diff --git a/drivers/staging/fsl-mc/include/dpaa2-io.h b/drivers/staging/fsl-mc/include/dpaa2-io.h
9906 new file mode 100644
9907 index 00000000..c7d1d997
9908 --- /dev/null
9909 +++ b/drivers/staging/fsl-mc/include/dpaa2-io.h
9910 @@ -0,0 +1,190 @@
9911 +/*
9912 + * Copyright 2014-2016 Freescale Semiconductor Inc.
9913 + * Copyright 2017 NXP
9914 + *
9915 + * Redistribution and use in source and binary forms, with or without
9916 + * modification, are permitted provided that the following conditions are met:
9917 + * * Redistributions of source code must retain the above copyright
9918 + * notice, this list of conditions and the following disclaimer.
9919 + * * Redistributions in binary form must reproduce the above copyright
9920 + * notice, this list of conditions and the following disclaimer in the
9921 + * documentation and/or other materials provided with the distribution.
9922 + * * Neither the name of Freescale Semiconductor nor the
9923 + * names of its contributors may be used to endorse or promote products
9924 + * derived from this software without specific prior written permission.
9925 + *
9926 + * ALTERNATIVELY, this software may be distributed under the terms of the
9927 + * GNU General Public License ("GPL") as published by the Free Software
9928 + * Foundation, either version 2 of that License or (at your option) any
9929 + * later version.
9930 + *
9931 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9932 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9933 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9934 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9935 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9936 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9937 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9938 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9939 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9940 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9941 + */
9942 +#ifndef __FSL_DPAA2_IO_H
9943 +#define __FSL_DPAA2_IO_H
9944 +
9945 +#include <linux/types.h>
9946 +#include <linux/cpumask.h>
9947 +
9948 +#include "dpaa2-fd.h"
9949 +#include "dpaa2-global.h"
9950 +
9951 +struct dpaa2_io;
9952 +struct dpaa2_io_store;
9953 +struct device;
9954 +
9955 +/**
9956 + * DOC: DPIO Service
9957 + *
9958 + * The DPIO service provides APIs for users to interact with the datapath
9959 + * by enqueueing and dequeing frame descriptors.
9960 + *
9961 + * The following set of APIs can be used to enqueue and dequeue frames
9962 + * as well as producing notification callbacks when data is available
9963 + * for dequeue.
9964 + */
9965 +
9966 +/**
9967 + * struct dpaa2_io_desc - The DPIO descriptor
9968 + * @receives_notifications: Use notificaton mode. Non-zero if the DPIO
9969 + * has a channel.
9970 + * @has_8prio: Set to non-zero for channel with 8 priority WQs. Ignored
9971 + * unless receives_notification is TRUE.
9972 + * @cpu: The cpu index that at least interrupt handlers will
9973 + * execute on.
9974 + * @stash_affinity: The stash affinity for this portal favour 'cpu'
9975 + * @regs_cena: The cache enabled regs.
9976 + * @regs_cinh: The cache inhibited regs
9977 + * @dpio_id: The dpio index
9978 + * @qman_version: The qman version
9979 + *
9980 + * Describes the attributes and features of the DPIO object.
9981 + */
9982 +struct dpaa2_io_desc {
9983 + int receives_notifications;
9984 + int has_8prio;
9985 + int cpu;
9986 + void *regs_cena;
9987 + void *regs_cinh;
9988 + int dpio_id;
9989 + u32 qman_version;
9990 +};
9991 +
9992 +struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc);
9993 +
9994 +void dpaa2_io_down(struct dpaa2_io *d);
9995 +
9996 +irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj);
9997 +
9998 +/**
9999 + * struct dpaa2_io_notification_ctx - The DPIO notification context structure
10000 + * @cb: The callback to be invoked when the notification arrives
10001 + * @is_cdan: Zero for FQDAN, non-zero for CDAN
10002 + * @id: FQID or channel ID, needed for rearm
10003 + * @desired_cpu: The cpu on which the notifications will show up. -1 means
10004 + * any CPU.
10005 + * @dpio_id: The dpio index
10006 + * @qman64: The 64-bit context value shows up in the FQDAN/CDAN.
10007 + * @node: The list node
10008 + * @dpio_private: The dpio object internal to dpio_service
10009 + *
10010 + * Used when a FQDAN/CDAN registration is made by drivers.
10011 + */
10012 +struct dpaa2_io_notification_ctx {
10013 + void (*cb)(struct dpaa2_io_notification_ctx *);
10014 + int is_cdan;
10015 + u32 id;
10016 + int desired_cpu;
10017 + int dpio_id;
10018 + u64 qman64;
10019 + struct list_head node;
10020 + void *dpio_private;
10021 +};
10022 +
10023 +int dpaa2_io_service_register(struct dpaa2_io *service,
10024 + struct dpaa2_io_notification_ctx *ctx);
10025 +void dpaa2_io_service_deregister(struct dpaa2_io *service,
10026 + struct dpaa2_io_notification_ctx *ctx);
10027 +int dpaa2_io_service_rearm(struct dpaa2_io *service,
10028 + struct dpaa2_io_notification_ctx *ctx);
10029 +
10030 +int dpaa2_io_service_pull_fq(struct dpaa2_io *d, u32 fqid,
10031 + struct dpaa2_io_store *s);
10032 +int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid,
10033 + struct dpaa2_io_store *s);
10034 +
10035 +int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d, u32 fqid,
10036 + const struct dpaa2_fd *fd);
10037 +int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
10038 + u16 qdbin, const struct dpaa2_fd *fd);
10039 +int dpaa2_io_service_release(struct dpaa2_io *d, u32 bpid,
10040 + const u64 *buffers, unsigned int num_buffers);
10041 +int dpaa2_io_service_acquire(struct dpaa2_io *d, u32 bpid,
10042 + u64 *buffers, unsigned int num_buffers);
10043 +
10044 +struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
10045 + struct device *dev);
10046 +void dpaa2_io_store_destroy(struct dpaa2_io_store *s);
10047 +struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last);
10048 +
10049 +#ifdef CONFIG_FSL_QBMAN_DEBUG
10050 +int dpaa2_io_query_fq_count(struct dpaa2_io *d, uint32_t fqid,
10051 + uint32_t *fcnt, uint32_t *bcnt);
10052 +int dpaa2_io_query_bp_count(struct dpaa2_io *d, uint32_t bpid,
10053 + uint32_t *num);
10054 +#endif
10055 +
10056 +
10057 +/***************/
10058 +/* CSCN */
10059 +/***************/
10060 +
10061 +/**
10062 + * struct dpaa2_cscn - The CSCN message format
10063 + * @verb: identifies the type of message (should be 0x27).
10064 + * @stat: status bits related to dequeuing response (not used)
10065 + * @state: bit 0 = 0/1 if CG is no/is congested
10066 + * @reserved: reserved byte
10067 + * @cgid: congest grp ID - the first 16 bits
10068 + * @ctx: context data
10069 + *
10070 + * Congestion management can be implemented in software through
10071 + * the use of Congestion State Change Notifications (CSCN). These
10072 + * are messages written by DPAA2 hardware to memory whenever the
10073 + * instantaneous count (I_CNT field in the CG) exceeds the
10074 + * Congestion State (CS) entrance threshold, signifying congestion
10075 + * entrance, or when the instantaneous count returns below exit
10076 + * threshold, signifying congestion exit. The format of the message
10077 + * is given by the dpaa2_cscn structure. Bit 0 of the state field
10078 + * represents congestion state written by the hardware.
10079 + */
10080 +struct dpaa2_cscn {
10081 + u8 verb;
10082 + u8 stat;
10083 + u8 state;
10084 + u8 reserved;
10085 + __le32 cgid;
10086 + __le64 ctx;
10087 +};
10088 +
10089 +#define DPAA2_CSCN_SIZE 64
10090 +#define DPAA2_CSCN_ALIGN 16
10091 +
10092 +#define DPAA2_CSCN_STATE_MASK 0x1
10093 +#define DPAA2_CSCN_CONGESTED 1
10094 +
10095 +static inline bool dpaa2_cscn_state_congested(struct dpaa2_cscn *cscn)
10096 +{
10097 + return ((cscn->state & DPAA2_CSCN_STATE_MASK) == DPAA2_CSCN_CONGESTED);
10098 +}
10099 +
10100 +#endif /* __FSL_DPAA2_IO_H */
10101 diff --git a/drivers/staging/fsl-mc/include/dpbp-cmd.h b/drivers/staging/fsl-mc/include/dpbp-cmd.h
10102 deleted file mode 100644
10103 index 2860411d..00000000
10104 --- a/drivers/staging/fsl-mc/include/dpbp-cmd.h
10105 +++ /dev/null
10106 @@ -1,185 +0,0 @@
10107 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
10108 - *
10109 - * Redistribution and use in source and binary forms, with or without
10110 - * modification, are permitted provided that the following conditions are met:
10111 - * * Redistributions of source code must retain the above copyright
10112 - * notice, this list of conditions and the following disclaimer.
10113 - * * Redistributions in binary form must reproduce the above copyright
10114 - * notice, this list of conditions and the following disclaimer in the
10115 - * documentation and/or other materials provided with the distribution.
10116 - * * Neither the name of the above-listed copyright holders nor the
10117 - * names of any contributors may be used to endorse or promote products
10118 - * derived from this software without specific prior written permission.
10119 - *
10120 - *
10121 - * ALTERNATIVELY, this software may be distributed under the terms of the
10122 - * GNU General Public License ("GPL") as published by the Free Software
10123 - * Foundation, either version 2 of that License or (at your option) any
10124 - * later version.
10125 - *
10126 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
10127 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
10128 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
10129 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
10130 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
10131 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
10132 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
10133 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
10134 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
10135 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
10136 - * POSSIBILITY OF SUCH DAMAGE.
10137 - */
10138 -#ifndef _FSL_DPBP_CMD_H
10139 -#define _FSL_DPBP_CMD_H
10140 -
10141 -/* DPBP Version */
10142 -#define DPBP_VER_MAJOR 2
10143 -#define DPBP_VER_MINOR 2
10144 -
10145 -/* Command IDs */
10146 -#define DPBP_CMDID_CLOSE 0x800
10147 -#define DPBP_CMDID_OPEN 0x804
10148 -#define DPBP_CMDID_CREATE 0x904
10149 -#define DPBP_CMDID_DESTROY 0x900
10150 -
10151 -#define DPBP_CMDID_ENABLE 0x002
10152 -#define DPBP_CMDID_DISABLE 0x003
10153 -#define DPBP_CMDID_GET_ATTR 0x004
10154 -#define DPBP_CMDID_RESET 0x005
10155 -#define DPBP_CMDID_IS_ENABLED 0x006
10156 -
10157 -#define DPBP_CMDID_SET_IRQ 0x010
10158 -#define DPBP_CMDID_GET_IRQ 0x011
10159 -#define DPBP_CMDID_SET_IRQ_ENABLE 0x012
10160 -#define DPBP_CMDID_GET_IRQ_ENABLE 0x013
10161 -#define DPBP_CMDID_SET_IRQ_MASK 0x014
10162 -#define DPBP_CMDID_GET_IRQ_MASK 0x015
10163 -#define DPBP_CMDID_GET_IRQ_STATUS 0x016
10164 -#define DPBP_CMDID_CLEAR_IRQ_STATUS 0x017
10165 -
10166 -#define DPBP_CMDID_SET_NOTIFICATIONS 0x01b0
10167 -#define DPBP_CMDID_GET_NOTIFICATIONS 0x01b1
10168 -
10169 -struct dpbp_cmd_open {
10170 - __le32 dpbp_id;
10171 -};
10172 -
10173 -#define DPBP_ENABLE 0x1
10174 -
10175 -struct dpbp_rsp_is_enabled {
10176 - u8 enabled;
10177 -};
10178 -
10179 -struct dpbp_cmd_set_irq {
10180 - /* cmd word 0 */
10181 - u8 irq_index;
10182 - u8 pad[3];
10183 - __le32 irq_val;
10184 - /* cmd word 1 */
10185 - __le64 irq_addr;
10186 - /* cmd word 2 */
10187 - __le32 irq_num;
10188 -};
10189 -
10190 -struct dpbp_cmd_get_irq {
10191 - __le32 pad;
10192 - u8 irq_index;
10193 -};
10194 -
10195 -struct dpbp_rsp_get_irq {
10196 - /* response word 0 */
10197 - __le32 irq_val;
10198 - __le32 pad;
10199 - /* response word 1 */
10200 - __le64 irq_addr;
10201 - /* response word 2 */
10202 - __le32 irq_num;
10203 - __le32 type;
10204 -};
10205 -
10206 -struct dpbp_cmd_set_irq_enable {
10207 - u8 enable;
10208 - u8 pad[3];
10209 - u8 irq_index;
10210 -};
10211 -
10212 -struct dpbp_cmd_get_irq_enable {
10213 - __le32 pad;
10214 - u8 irq_index;
10215 -};
10216 -
10217 -struct dpbp_rsp_get_irq_enable {
10218 - u8 enabled;
10219 -};
10220 -
10221 -struct dpbp_cmd_set_irq_mask {
10222 - __le32 mask;
10223 - u8 irq_index;
10224 -};
10225 -
10226 -struct dpbp_cmd_get_irq_mask {
10227 - __le32 pad;
10228 - u8 irq_index;
10229 -};
10230 -
10231 -struct dpbp_rsp_get_irq_mask {
10232 - __le32 mask;
10233 -};
10234 -
10235 -struct dpbp_cmd_get_irq_status {
10236 - __le32 status;
10237 - u8 irq_index;
10238 -};
10239 -
10240 -struct dpbp_rsp_get_irq_status {
10241 - __le32 status;
10242 -};
10243 -
10244 -struct dpbp_cmd_clear_irq_status {
10245 - __le32 status;
10246 - u8 irq_index;
10247 -};
10248 -
10249 -struct dpbp_rsp_get_attributes {
10250 - /* response word 0 */
10251 - __le16 pad;
10252 - __le16 bpid;
10253 - __le32 id;
10254 - /* response word 1 */
10255 - __le16 version_major;
10256 - __le16 version_minor;
10257 -};
10258 -
10259 -struct dpbp_cmd_set_notifications {
10260 - /* cmd word 0 */
10261 - __le32 depletion_entry;
10262 - __le32 depletion_exit;
10263 - /* cmd word 1 */
10264 - __le32 surplus_entry;
10265 - __le32 surplus_exit;
10266 - /* cmd word 2 */
10267 - __le16 options;
10268 - __le16 pad[3];
10269 - /* cmd word 3 */
10270 - __le64 message_ctx;
10271 - /* cmd word 4 */
10272 - __le64 message_iova;
10273 -};
10274 -
10275 -struct dpbp_rsp_get_notifications {
10276 - /* response word 0 */
10277 - __le32 depletion_entry;
10278 - __le32 depletion_exit;
10279 - /* response word 1 */
10280 - __le32 surplus_entry;
10281 - __le32 surplus_exit;
10282 - /* response word 2 */
10283 - __le16 options;
10284 - __le16 pad[3];
10285 - /* response word 3 */
10286 - __le64 message_ctx;
10287 - /* response word 4 */
10288 - __le64 message_iova;
10289 -};
10290 -
10291 -#endif /* _FSL_DPBP_CMD_H */
10292 diff --git a/drivers/staging/fsl-mc/include/dpbp.h b/drivers/staging/fsl-mc/include/dpbp.h
10293 index e14e85a5..e9e04cce 100644
10294 --- a/drivers/staging/fsl-mc/include/dpbp.h
10295 +++ b/drivers/staging/fsl-mc/include/dpbp.h
10296 @@ -1,4 +1,5 @@
10297 -/* Copyright 2013-2015 Freescale Semiconductor Inc.
10298 +/*
10299 + * Copyright 2013-2016 Freescale Semiconductor Inc.
10300 *
10301 * Redistribution and use in source and binary forms, with or without
10302 * modification, are permitted provided that the following conditions are met:
10303 @@ -32,7 +33,8 @@
10304 #ifndef __FSL_DPBP_H
10305 #define __FSL_DPBP_H
10306
10307 -/* Data Path Buffer Pool API
10308 +/*
10309 + * Data Path Buffer Pool API
10310 * Contains initialization APIs and runtime control APIs for DPBP
10311 */
10312
10313 @@ -44,25 +46,8 @@ int dpbp_open(struct fsl_mc_io *mc_io,
10314 u16 *token);
10315
10316 int dpbp_close(struct fsl_mc_io *mc_io,
10317 - u32 cmd_flags,
10318 - u16 token);
10319 -
10320 -/**
10321 - * struct dpbp_cfg - Structure representing DPBP configuration
10322 - * @options: place holder
10323 - */
10324 -struct dpbp_cfg {
10325 - u32 options;
10326 -};
10327 -
10328 -int dpbp_create(struct fsl_mc_io *mc_io,
10329 - u32 cmd_flags,
10330 - const struct dpbp_cfg *cfg,
10331 - u16 *token);
10332 -
10333 -int dpbp_destroy(struct fsl_mc_io *mc_io,
10334 - u32 cmd_flags,
10335 - u16 token);
10336 + u32 cmd_flags,
10337 + u16 token);
10338
10339 int dpbp_enable(struct fsl_mc_io *mc_io,
10340 u32 cmd_flags,
10341 @@ -81,140 +66,25 @@ int dpbp_reset(struct fsl_mc_io *mc_io,
10342 u32 cmd_flags,
10343 u16 token);
10344
10345 -/**
10346 - * struct dpbp_irq_cfg - IRQ configuration
10347 - * @addr: Address that must be written to signal a message-based interrupt
10348 - * @val: Value to write into irq_addr address
10349 - * @irq_num: A user defined number associated with this IRQ
10350 - */
10351 -struct dpbp_irq_cfg {
10352 - u64 addr;
10353 - u32 val;
10354 - int irq_num;
10355 -};
10356 -
10357 -int dpbp_set_irq(struct fsl_mc_io *mc_io,
10358 - u32 cmd_flags,
10359 - u16 token,
10360 - u8 irq_index,
10361 - struct dpbp_irq_cfg *irq_cfg);
10362 -
10363 -int dpbp_get_irq(struct fsl_mc_io *mc_io,
10364 - u32 cmd_flags,
10365 - u16 token,
10366 - u8 irq_index,
10367 - int *type,
10368 - struct dpbp_irq_cfg *irq_cfg);
10369 -
10370 -int dpbp_set_irq_enable(struct fsl_mc_io *mc_io,
10371 - u32 cmd_flags,
10372 - u16 token,
10373 - u8 irq_index,
10374 - u8 en);
10375 -
10376 -int dpbp_get_irq_enable(struct fsl_mc_io *mc_io,
10377 - u32 cmd_flags,
10378 - u16 token,
10379 - u8 irq_index,
10380 - u8 *en);
10381 -
10382 -int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
10383 - u32 cmd_flags,
10384 - u16 token,
10385 - u8 irq_index,
10386 - u32 mask);
10387 -
10388 -int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
10389 - u32 cmd_flags,
10390 - u16 token,
10391 - u8 irq_index,
10392 - u32 *mask);
10393 -
10394 -int dpbp_get_irq_status(struct fsl_mc_io *mc_io,
10395 - u32 cmd_flags,
10396 - u16 token,
10397 - u8 irq_index,
10398 - u32 *status);
10399 -
10400 -int dpbp_clear_irq_status(struct fsl_mc_io *mc_io,
10401 - u32 cmd_flags,
10402 - u16 token,
10403 - u8 irq_index,
10404 - u32 status);
10405 -
10406 /**
10407 * struct dpbp_attr - Structure representing DPBP attributes
10408 * @id: DPBP object ID
10409 - * @version: DPBP version
10410 * @bpid: Hardware buffer pool ID; should be used as an argument in
10411 * acquire/release operations on buffers
10412 */
10413 struct dpbp_attr {
10414 int id;
10415 - /**
10416 - * struct version - Structure representing DPBP version
10417 - * @major: DPBP major version
10418 - * @minor: DPBP minor version
10419 - */
10420 - struct {
10421 - u16 major;
10422 - u16 minor;
10423 - } version;
10424 u16 bpid;
10425 };
10426
10427 -int dpbp_get_attributes(struct fsl_mc_io *mc_io,
10428 - u32 cmd_flags,
10429 - u16 token,
10430 - struct dpbp_attr *attr);
10431 -
10432 -/**
10433 - * DPBP notifications options
10434 - */
10435 -
10436 -/**
10437 - * BPSCN write will attempt to allocate into a cache (coherent write)
10438 - */
10439 -#define DPBP_NOTIF_OPT_COHERENT_WRITE 0x00000001
10440 -
10441 -/**
10442 - * struct dpbp_notification_cfg - Structure representing DPBP notifications
10443 - * towards software
10444 - * @depletion_entry: below this threshold the pool is "depleted";
10445 - * set it to '0' to disable it
10446 - * @depletion_exit: greater than or equal to this threshold the pool exit its
10447 - * "depleted" state
10448 - * @surplus_entry: above this threshold the pool is in "surplus" state;
10449 - * set it to '0' to disable it
10450 - * @surplus_exit: less than or equal to this threshold the pool exit its
10451 - * "surplus" state
10452 - * @message_iova: MUST be given if either 'depletion_entry' or 'surplus_entry'
10453 - * is not '0' (enable); I/O virtual address (must be in DMA-able memory),
10454 - * must be 16B aligned.
10455 - * @message_ctx: The context that will be part of the BPSCN message and will
10456 - * be written to 'message_iova'
10457 - * @options: Mask of available options; use 'DPBP_NOTIF_OPT_<X>' values
10458 - */
10459 -struct dpbp_notification_cfg {
10460 - u32 depletion_entry;
10461 - u32 depletion_exit;
10462 - u32 surplus_entry;
10463 - u32 surplus_exit;
10464 - u64 message_iova;
10465 - u64 message_ctx;
10466 - u16 options;
10467 -};
10468 -
10469 -int dpbp_set_notifications(struct fsl_mc_io *mc_io,
10470 - u32 cmd_flags,
10471 - u16 token,
10472 - struct dpbp_notification_cfg *cfg);
10473 -
10474 -int dpbp_get_notifications(struct fsl_mc_io *mc_io,
10475 - u32 cmd_flags,
10476 - u16 token,
10477 - struct dpbp_notification_cfg *cfg);
10478 +int dpbp_get_attributes(struct fsl_mc_io *mc_io,
10479 + u32 cmd_flags,
10480 + u16 token,
10481 + struct dpbp_attr *attr);
10482
10483 -/** @} */
10484 +int dpbp_get_api_version(struct fsl_mc_io *mc_io,
10485 + u32 cmd_flags,
10486 + u16 *major_ver,
10487 + u16 *minor_ver);
10488
10489 #endif /* __FSL_DPBP_H */
10490 diff --git a/drivers/staging/fsl-mc/include/dpcon.h b/drivers/staging/fsl-mc/include/dpcon.h
10491 new file mode 100644
10492 index 00000000..efa23906
10493 --- /dev/null
10494 +++ b/drivers/staging/fsl-mc/include/dpcon.h
10495 @@ -0,0 +1,115 @@
10496 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
10497 + *
10498 + * Redistribution and use in source and binary forms, with or without
10499 + * modification, are permitted provided that the following conditions are met:
10500 + * * Redistributions of source code must retain the above copyright
10501 + * notice, this list of conditions and the following disclaimer.
10502 + * * Redistributions in binary form must reproduce the above copyright
10503 + * notice, this list of conditions and the following disclaimer in the
10504 + * documentation and/or other materials provided with the distribution.
10505 + * * Neither the name of the above-listed copyright holders nor the
10506 + * names of any contributors may be used to endorse or promote products
10507 + * derived from this software without specific prior written permission.
10508 + *
10509 + *
10510 + * ALTERNATIVELY, this software may be distributed under the terms of the
10511 + * GNU General Public License ("GPL") as published by the Free Software
10512 + * Foundation, either version 2 of that License or (at your option) any
10513 + * later version.
10514 + *
10515 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
10516 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
10517 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
10518 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
10519 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
10520 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
10521 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
10522 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
10523 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
10524 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
10525 + * POSSIBILITY OF SUCH DAMAGE.
10526 + */
10527 +#ifndef __FSL_DPCON_H
10528 +#define __FSL_DPCON_H
10529 +
10530 +/* Data Path Concentrator API
10531 + * Contains initialization APIs and runtime control APIs for DPCON
10532 + */
10533 +
10534 +struct fsl_mc_io;
10535 +
10536 +/** General DPCON macros */
10537 +
10538 +/**
10539 + * Use it to disable notifications; see dpcon_set_notification()
10540 + */
10541 +#define DPCON_INVALID_DPIO_ID (int)(-1)
10542 +
10543 +int dpcon_open(struct fsl_mc_io *mc_io,
10544 + u32 cmd_flags,
10545 + int dpcon_id,
10546 + u16 *token);
10547 +
10548 +int dpcon_close(struct fsl_mc_io *mc_io,
10549 + u32 cmd_flags,
10550 + u16 token);
10551 +
10552 +int dpcon_enable(struct fsl_mc_io *mc_io,
10553 + u32 cmd_flags,
10554 + u16 token);
10555 +
10556 +int dpcon_disable(struct fsl_mc_io *mc_io,
10557 + u32 cmd_flags,
10558 + u16 token);
10559 +
10560 +int dpcon_is_enabled(struct fsl_mc_io *mc_io,
10561 + u32 cmd_flags,
10562 + u16 token,
10563 + int *en);
10564 +
10565 +int dpcon_reset(struct fsl_mc_io *mc_io,
10566 + u32 cmd_flags,
10567 + u16 token);
10568 +
10569 +/**
10570 + * struct dpcon_attr - Structure representing DPCON attributes
10571 + * @id: DPCON object ID
10572 + * @qbman_ch_id: Channel ID to be used by dequeue operation
10573 + * @num_priorities: Number of priorities for the DPCON channel (1-8)
10574 + */
10575 +struct dpcon_attr {
10576 + int id;
10577 + u16 qbman_ch_id;
10578 + u8 num_priorities;
10579 +};
10580 +
10581 +int dpcon_get_attributes(struct fsl_mc_io *mc_io,
10582 + u32 cmd_flags,
10583 + u16 token,
10584 + struct dpcon_attr *attr);
10585 +
10586 +/**
10587 + * struct dpcon_notification_cfg - Structure representing notification params
10588 + * @dpio_id: DPIO object ID; must be configured with a notification channel;
10589 + * to disable notifications set it to 'DPCON_INVALID_DPIO_ID';
10590 + * @priority: Priority selection within the DPIO channel; valid values
10591 + * are 0-7, depending on the number of priorities in that channel
10592 + * @user_ctx: User context value provided with each CDAN message
10593 + */
10594 +struct dpcon_notification_cfg {
10595 + int dpio_id;
10596 + u8 priority;
10597 + u64 user_ctx;
10598 +};
10599 +
10600 +int dpcon_set_notification(struct fsl_mc_io *mc_io,
10601 + u32 cmd_flags,
10602 + u16 token,
10603 + struct dpcon_notification_cfg *cfg);
10604 +
10605 +int dpcon_get_api_version(struct fsl_mc_io *mc_io,
10606 + u32 cmd_flags,
10607 + u16 *major_ver,
10608 + u16 *minor_ver);
10609 +
10610 +#endif /* __FSL_DPCON_H */
10611 diff --git a/drivers/staging/fsl-mc/include/dpmng.h b/drivers/staging/fsl-mc/include/dpmng.h
10612 index e5cfd017..170c07dd 100644
10613 --- a/drivers/staging/fsl-mc/include/dpmng.h
10614 +++ b/drivers/staging/fsl-mc/include/dpmng.h
10615 @@ -1,4 +1,5 @@
10616 -/* Copyright 2013-2015 Freescale Semiconductor Inc.
10617 +/*
10618 + * Copyright 2013-2016 Freescale Semiconductor Inc.
10619 *
10620 * Redistribution and use in source and binary forms, with or without
10621 * modification, are permitted provided that the following conditions are met:
10622 @@ -32,7 +33,8 @@
10623 #ifndef __FSL_DPMNG_H
10624 #define __FSL_DPMNG_H
10625
10626 -/* Management Complex General API
10627 +/*
10628 + * Management Complex General API
10629 * Contains general API for the Management Complex firmware
10630 */
10631
10632 @@ -58,12 +60,8 @@ struct mc_version {
10633 u32 revision;
10634 };
10635
10636 -int mc_get_version(struct fsl_mc_io *mc_io,
10637 - u32 cmd_flags,
10638 - struct mc_version *mc_ver_info);
10639 -
10640 -int dpmng_get_container_id(struct fsl_mc_io *mc_io,
10641 - u32 cmd_flags,
10642 - int *container_id);
10643 +int mc_get_version(struct fsl_mc_io *mc_io,
10644 + u32 cmd_flags,
10645 + struct mc_version *mc_ver_info);
10646
10647 #endif /* __FSL_DPMNG_H */
10648 diff --git a/drivers/staging/fsl-mc/include/dpopr.h b/drivers/staging/fsl-mc/include/dpopr.h
10649 new file mode 100644
10650 index 00000000..e1110af2
10651 --- /dev/null
10652 +++ b/drivers/staging/fsl-mc/include/dpopr.h
10653 @@ -0,0 +1,110 @@
10654 +/*
10655 + * Copyright 2017 NXP
10656 + *
10657 + * Redistribution and use in source and binary forms, with or without
10658 + * modification, are permitted provided that the following conditions are met:
10659 + * * Redistributions of source code must retain the above copyright
10660 + * notice, this list of conditions and the following disclaimer.
10661 + * * Redistributions in binary form must reproduce the above copyright
10662 + * notice, this list of conditions and the following disclaimer in the
10663 + * documentation and/or other materials provided with the distribution.
10664 + * * Neither the name of the above-listed copyright holders nor the
10665 + * names of any contributors may be used to endorse or promote products
10666 + * derived from this software without specific prior written permission.
10667 + *
10668 + *
10669 + * ALTERNATIVELY, this software may be distributed under the terms of the
10670 + * GNU General Public License ("GPL") as published by the Free Software
10671 + * Foundation, either version 2 of that License or (at your option) any
10672 + * later version.
10673 + *
10674 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
10675 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
10676 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
10677 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
10678 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
10679 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
10680 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
10681 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
10682 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
10683 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
10684 + * POSSIBILITY OF SUCH DAMAGE.
10685 + */
10686 +#ifndef __FSL_DPOPR_H_
10687 +#define __FSL_DPOPR_H_
10688 +
10689 +/* Data Path Order Restoration API
10690 + * Contains initialization APIs and runtime APIs for the Order Restoration
10691 + */
10692 +
10693 +/** Order Restoration properties */
10694 +
10695 +/**
10696 + * Create a new Order Point Record option
10697 + */
10698 +#define OPR_OPT_CREATE 0x1
10699 +/**
10700 + * Retire an existing Order Point Record option
10701 + */
10702 +#define OPR_OPT_RETIRE 0x2
10703 +
10704 +/**
10705 + * struct opr_cfg - Structure representing OPR configuration
10706 + * @oprrws: Order point record (OPR) restoration window size (0 to 5)
10707 + * 0 - Window size is 32 frames.
10708 + * 1 - Window size is 64 frames.
10709 + * 2 - Window size is 128 frames.
10710 + * 3 - Window size is 256 frames.
10711 + * 4 - Window size is 512 frames.
10712 + * 5 - Window size is 1024 frames.
10713 + * @oa: OPR auto advance NESN window size (0 disabled, 1 enabled)
10714 + * @olws: OPR acceptable late arrival window size (0 to 3)
10715 + * 0 - Disabled. Late arrivals are always rejected.
10716 + * 1 - Window size is 32 frames.
10717 + * 2 - Window size is the same as the OPR restoration
10718 + * window size configured in the OPRRWS field.
10719 + * 3 - Window size is 8192 frames. Late arrivals are
10720 + * always accepted.
10721 + * @oeane: Order restoration list (ORL) resource exhaustion
10722 + * advance NESN enable (0 disabled, 1 enabled)
10723 + * @oloe: OPR loose ordering enable (0 disabled, 1 enabled)
10724 + */
10725 +struct opr_cfg {
10726 + u8 oprrws;
10727 + u8 oa;
10728 + u8 olws;
10729 + u8 oeane;
10730 + u8 oloe;
10731 +};
10732 +
10733 +/**
10734 + * struct opr_qry - Structure representing OPR configuration
10735 + * @enable: Enabled state
10736 + * @rip: Retirement In Progress
10737 + * @ndsn: Next dispensed sequence number
10738 + * @nesn: Next expected sequence number
10739 + * @ea_hseq: Early arrival head sequence number
10740 + * @hseq_nlis: HSEQ not last in sequence
10741 + * @ea_tseq: Early arrival tail sequence number
10742 + * @tseq_nlis: TSEQ not last in sequence
10743 + * @ea_tptr: Early arrival tail pointer
10744 + * @ea_hptr: Early arrival head pointer
10745 + * @opr_id: Order Point Record ID
10746 + * @opr_vid: Order Point Record Virtual ID
10747 + */
10748 +struct opr_qry {
10749 + char enable;
10750 + char rip;
10751 + u16 ndsn;
10752 + u16 nesn;
10753 + u16 ea_hseq;
10754 + char hseq_nlis;
10755 + u16 ea_tseq;
10756 + char tseq_nlis;
10757 + u16 ea_tptr;
10758 + u16 ea_hptr;
10759 + u16 opr_id;
10760 + u16 opr_vid;
10761 +};
10762 +
10763 +#endif /* __FSL_DPOPR_H_ */
10764 diff --git a/drivers/staging/fsl-mc/include/dprc.h b/drivers/staging/fsl-mc/include/dprc.h
10765 index 593b2bbe..8dc411ec 100644
10766 --- a/drivers/staging/fsl-mc/include/dprc.h
10767 +++ b/drivers/staging/fsl-mc/include/dprc.h
10768 @@ -1,4 +1,5 @@
10769 -/* Copyright 2013-2015 Freescale Semiconductor Inc.
10770 +/*
10771 + * Copyright 2013-2016 Freescale Semiconductor Inc.
10772 *
10773 * Redistribution and use in source and binary forms, with or without
10774 * modification, are permitted provided that the following conditions are met:
10775 @@ -34,26 +35,13 @@
10776
10777 #include "mc-cmd.h"
10778
10779 -/* Data Path Resource Container API
10780 +/*
10781 + * Data Path Resource Container API
10782 * Contains DPRC API for managing and querying DPAA resources
10783 */
10784
10785 struct fsl_mc_io;
10786
10787 -/**
10788 - * Set this value as the icid value in dprc_cfg structure when creating a
10789 - * container, in case the ICID is not selected by the user and should be
10790 - * allocated by the DPRC from the pool of ICIDs.
10791 - */
10792 -#define DPRC_GET_ICID_FROM_POOL (u16)(~(0))
10793 -
10794 -/**
10795 - * Set this value as the portal_id value in dprc_cfg structure when creating a
10796 - * container, in case the portal ID is not specifically selected by the
10797 - * user and should be allocated by the DPRC from the pool of portal ids.
10798 - */
10799 -#define DPRC_GET_PORTAL_ID_FROM_POOL (int)(~(0))
10800 -
10801 int dprc_open(struct fsl_mc_io *mc_io,
10802 u32 cmd_flags,
10803 int container_id,
10804 @@ -63,75 +51,6 @@ int dprc_close(struct fsl_mc_io *mc_io,
10805 u32 cmd_flags,
10806 u16 token);
10807
10808 -/**
10809 - * Container general options
10810 - *
10811 - * These options may be selected at container creation by the container creator
10812 - * and can be retrieved using dprc_get_attributes()
10813 - */
10814 -
10815 -/* Spawn Policy Option allowed - Indicates that the new container is allowed
10816 - * to spawn and have its own child containers.
10817 - */
10818 -#define DPRC_CFG_OPT_SPAWN_ALLOWED 0x00000001
10819 -
10820 -/* General Container allocation policy - Indicates that the new container is
10821 - * allowed to allocate requested resources from its parent container; if not
10822 - * set, the container is only allowed to use resources in its own pools; Note
10823 - * that this is a container's global policy, but the parent container may
10824 - * override it and set specific quota per resource type.
10825 - */
10826 -#define DPRC_CFG_OPT_ALLOC_ALLOWED 0x00000002
10827 -
10828 -/* Object initialization allowed - software context associated with this
10829 - * container is allowed to invoke object initialization operations.
10830 - */
10831 -#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004
10832 -
10833 -/* Topology change allowed - software context associated with this
10834 - * container is allowed to invoke topology operations, such as attach/detach
10835 - * of network objects.
10836 - */
10837 -#define DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED 0x00000008
10838 -
10839 -/* AIOP - Indicates that container belongs to AIOP. */
10840 -#define DPRC_CFG_OPT_AIOP 0x00000020
10841 -
10842 -/* IRQ Config - Indicates that the container allowed to configure its IRQs. */
10843 -#define DPRC_CFG_OPT_IRQ_CFG_ALLOWED 0x00000040
10844 -
10845 -/**
10846 - * struct dprc_cfg - Container configuration options
10847 - * @icid: Container's ICID; if set to 'DPRC_GET_ICID_FROM_POOL', a free
10848 - * ICID value is allocated by the DPRC
10849 - * @portal_id: Portal ID; if set to 'DPRC_GET_PORTAL_ID_FROM_POOL', a free
10850 - * portal ID is allocated by the DPRC
10851 - * @options: Combination of 'DPRC_CFG_OPT_<X>' options
10852 - * @label: Object's label
10853 - */
10854 -struct dprc_cfg {
10855 - u16 icid;
10856 - int portal_id;
10857 - u64 options;
10858 - char label[16];
10859 -};
10860 -
10861 -int dprc_create_container(struct fsl_mc_io *mc_io,
10862 - u32 cmd_flags,
10863 - u16 token,
10864 - struct dprc_cfg *cfg,
10865 - int *child_container_id,
10866 - u64 *child_portal_offset);
10867 -
10868 -int dprc_destroy_container(struct fsl_mc_io *mc_io,
10869 - u32 cmd_flags,
10870 - u16 token,
10871 - int child_container_id);
10872 -
10873 -int dprc_reset_container(struct fsl_mc_io *mc_io,
10874 - u32 cmd_flags,
10875 - u16 token,
10876 - int child_container_id);
10877
10878 /* IRQ */
10879
10880 @@ -139,7 +58,7 @@ int dprc_reset_container(struct fsl_mc_io *mc_io,
10881 #define DPRC_IRQ_INDEX 0
10882
10883 /* Number of dprc's IRQs */
10884 -#define DPRC_NUM_OF_IRQS 1
10885 +#define DPRC_NUM_OF_IRQS 1
10886
10887 /* DPRC IRQ events */
10888
10889 @@ -151,12 +70,14 @@ int dprc_reset_container(struct fsl_mc_io *mc_io,
10890 #define DPRC_IRQ_EVENT_RES_ADDED 0x00000004
10891 /* IRQ event - Indicates that resources removed from the container */
10892 #define DPRC_IRQ_EVENT_RES_REMOVED 0x00000008
10893 -/* IRQ event - Indicates that one of the descendant containers that opened by
10894 +/*
10895 + * IRQ event - Indicates that one of the descendant containers that opened by
10896 * this container is destroyed
10897 */
10898 #define DPRC_IRQ_EVENT_CONTAINER_DESTROYED 0x00000010
10899
10900 -/* IRQ event - Indicates that on one of the container's opened object is
10901 +/*
10902 + * IRQ event - Indicates that on one of the container's opened object is
10903 * destroyed
10904 */
10905 #define DPRC_IRQ_EVENT_OBJ_DESTROYED 0x00000020
10906 @@ -171,59 +92,59 @@ int dprc_reset_container(struct fsl_mc_io *mc_io,
10907 * @irq_num: A user defined number associated with this IRQ
10908 */
10909 struct dprc_irq_cfg {
10910 - phys_addr_t paddr;
10911 - u32 val;
10912 - int irq_num;
10913 + phys_addr_t paddr;
10914 + u32 val;
10915 + int irq_num;
10916 };
10917
10918 -int dprc_set_irq(struct fsl_mc_io *mc_io,
10919 - u32 cmd_flags,
10920 - u16 token,
10921 - u8 irq_index,
10922 - struct dprc_irq_cfg *irq_cfg);
10923 -
10924 -int dprc_get_irq(struct fsl_mc_io *mc_io,
10925 - u32 cmd_flags,
10926 - u16 token,
10927 - u8 irq_index,
10928 - int *type,
10929 - struct dprc_irq_cfg *irq_cfg);
10930 -
10931 -int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
10932 - u32 cmd_flags,
10933 - u16 token,
10934 - u8 irq_index,
10935 - u8 en);
10936 -
10937 -int dprc_get_irq_enable(struct fsl_mc_io *mc_io,
10938 - u32 cmd_flags,
10939 - u16 token,
10940 - u8 irq_index,
10941 - u8 *en);
10942 -
10943 -int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
10944 - u32 cmd_flags,
10945 - u16 token,
10946 - u8 irq_index,
10947 - u32 mask);
10948 -
10949 -int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
10950 - u32 cmd_flags,
10951 - u16 token,
10952 - u8 irq_index,
10953 - u32 *mask);
10954 -
10955 -int dprc_get_irq_status(struct fsl_mc_io *mc_io,
10956 - u32 cmd_flags,
10957 - u16 token,
10958 - u8 irq_index,
10959 - u32 *status);
10960 -
10961 -int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
10962 - u32 cmd_flags,
10963 - u16 token,
10964 - u8 irq_index,
10965 - u32 status);
10966 +int dprc_set_irq(struct fsl_mc_io *mc_io,
10967 + u32 cmd_flags,
10968 + u16 token,
10969 + u8 irq_index,
10970 + struct dprc_irq_cfg *irq_cfg);
10971 +
10972 +int dprc_get_irq(struct fsl_mc_io *mc_io,
10973 + u32 cmd_flags,
10974 + u16 token,
10975 + u8 irq_index,
10976 + int *type,
10977 + struct dprc_irq_cfg *irq_cfg);
10978 +
10979 +int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
10980 + u32 cmd_flags,
10981 + u16 token,
10982 + u8 irq_index,
10983 + u8 en);
10984 +
10985 +int dprc_get_irq_enable(struct fsl_mc_io *mc_io,
10986 + u32 cmd_flags,
10987 + u16 token,
10988 + u8 irq_index,
10989 + u8 *en);
10990 +
10991 +int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
10992 + u32 cmd_flags,
10993 + u16 token,
10994 + u8 irq_index,
10995 + u32 mask);
10996 +
10997 +int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
10998 + u32 cmd_flags,
10999 + u16 token,
11000 + u8 irq_index,
11001 + u32 *mask);
11002 +
11003 +int dprc_get_irq_status(struct fsl_mc_io *mc_io,
11004 + u32 cmd_flags,
11005 + u16 token,
11006 + u8 irq_index,
11007 + u32 *status);
11008 +
11009 +int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
11010 + u32 cmd_flags,
11011 + u16 token,
11012 + u8 irq_index,
11013 + u32 status);
11014
11015 /**
11016 * struct dprc_attributes - Container attributes
11017 @@ -231,114 +152,23 @@ int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
11018 * @icid: Container's ICID
11019 * @portal_id: Container's portal ID
11020 * @options: Container's options as set at container's creation
11021 - * @version: DPRC version
11022 */
11023 struct dprc_attributes {
11024 int container_id;
11025 u16 icid;
11026 int portal_id;
11027 u64 options;
11028 - /**
11029 - * struct version - DPRC version
11030 - * @major: DPRC major version
11031 - * @minor: DPRC minor version
11032 - */
11033 - struct {
11034 - u16 major;
11035 - u16 minor;
11036 - } version;
11037 -};
11038 -
11039 -int dprc_get_attributes(struct fsl_mc_io *mc_io,
11040 - u32 cmd_flags,
11041 - u16 token,
11042 - struct dprc_attributes *attributes);
11043 -
11044 -int dprc_set_res_quota(struct fsl_mc_io *mc_io,
11045 - u32 cmd_flags,
11046 - u16 token,
11047 - int child_container_id,
11048 - char *type,
11049 - u16 quota);
11050 -
11051 -int dprc_get_res_quota(struct fsl_mc_io *mc_io,
11052 - u32 cmd_flags,
11053 - u16 token,
11054 - int child_container_id,
11055 - char *type,
11056 - u16 *quota);
11057 -
11058 -/* Resource request options */
11059 -
11060 -/* Explicit resource ID request - The requested objects/resources
11061 - * are explicit and sequential (in case of resources).
11062 - * The base ID is given at res_req at base_align field
11063 - */
11064 -#define DPRC_RES_REQ_OPT_EXPLICIT 0x00000001
11065 -
11066 -/* Aligned resources request - Relevant only for resources
11067 - * request (and not objects). Indicates that resources base ID should be
11068 - * sequential and aligned to the value given at dprc_res_req base_align field
11069 - */
11070 -#define DPRC_RES_REQ_OPT_ALIGNED 0x00000002
11071 -
11072 -/* Plugged Flag - Relevant only for object assignment request.
11073 - * Indicates that after all objects assigned. An interrupt will be invoked at
11074 - * the relevant GPP. The assigned object will be marked as plugged.
11075 - * plugged objects can't be assigned from their container
11076 - */
11077 -#define DPRC_RES_REQ_OPT_PLUGGED 0x00000004
11078 -
11079 -/**
11080 - * struct dprc_res_req - Resource request descriptor, to be used in assignment
11081 - * or un-assignment of resources and objects.
11082 - * @type: Resource/object type: Represent as a NULL terminated string.
11083 - * This string may received by using dprc_get_pool() to get resource
11084 - * type and dprc_get_obj() to get object type;
11085 - * Note: it is not possible to assign/un-assign DPRC objects
11086 - * @num: Number of resources
11087 - * @options: Request options: combination of DPRC_RES_REQ_OPT_ options
11088 - * @id_base_align: In case of explicit assignment (DPRC_RES_REQ_OPT_EXPLICIT
11089 - * is set at option), this field represents the required base ID
11090 - * for resource allocation; In case of aligned assignment
11091 - * (DPRC_RES_REQ_OPT_ALIGNED is set at option), this field
11092 - * indicates the required alignment for the resource ID(s) -
11093 - * use 0 if there is no alignment or explicit ID requirements
11094 - */
11095 -struct dprc_res_req {
11096 - char type[16];
11097 - u32 num;
11098 - u32 options;
11099 - int id_base_align;
11100 };
11101
11102 -int dprc_assign(struct fsl_mc_io *mc_io,
11103 - u32 cmd_flags,
11104 - u16 token,
11105 - int container_id,
11106 - struct dprc_res_req *res_req);
11107 -
11108 -int dprc_unassign(struct fsl_mc_io *mc_io,
11109 - u32 cmd_flags,
11110 - u16 token,
11111 - int child_container_id,
11112 - struct dprc_res_req *res_req);
11113 -
11114 -int dprc_get_pool_count(struct fsl_mc_io *mc_io,
11115 - u32 cmd_flags,
11116 - u16 token,
11117 - int *pool_count);
11118 -
11119 -int dprc_get_pool(struct fsl_mc_io *mc_io,
11120 - u32 cmd_flags,
11121 - u16 token,
11122 - int pool_index,
11123 - char *type);
11124 +int dprc_get_attributes(struct fsl_mc_io *mc_io,
11125 + u32 cmd_flags,
11126 + u16 token,
11127 + struct dprc_attributes *attributes);
11128
11129 int dprc_get_obj_count(struct fsl_mc_io *mc_io,
11130 - u32 cmd_flags,
11131 - u16 token,
11132 - int *obj_count);
11133 + u32 cmd_flags,
11134 + u16 token,
11135 + int *obj_count);
11136
11137 /* Objects Attributes Flags */
11138
11139 @@ -353,7 +183,7 @@ int dprc_get_obj_count(struct fsl_mc_io *mc_io,
11140 * masters;
11141 * user is responsible for proper memory handling through IOMMU configuration.
11142 */
11143 -#define DPRC_OBJ_FLAG_NO_MEM_SHAREABILITY 0x0001
11144 +#define DPRC_OBJ_FLAG_NO_MEM_SHAREABILITY 0x0001
11145
11146 /**
11147 * struct dprc_obj_desc - Object descriptor, returned from dprc_get_obj()
11148 @@ -381,41 +211,41 @@ struct dprc_obj_desc {
11149 u16 flags;
11150 };
11151
11152 -int dprc_get_obj(struct fsl_mc_io *mc_io,
11153 - u32 cmd_flags,
11154 - u16 token,
11155 - int obj_index,
11156 - struct dprc_obj_desc *obj_desc);
11157 -
11158 -int dprc_get_obj_desc(struct fsl_mc_io *mc_io,
11159 - u32 cmd_flags,
11160 - u16 token,
11161 - char *obj_type,
11162 - int obj_id,
11163 - struct dprc_obj_desc *obj_desc);
11164 -
11165 -int dprc_set_obj_irq(struct fsl_mc_io *mc_io,
11166 - u32 cmd_flags,
11167 - u16 token,
11168 - char *obj_type,
11169 - int obj_id,
11170 - u8 irq_index,
11171 - struct dprc_irq_cfg *irq_cfg);
11172 -
11173 -int dprc_get_obj_irq(struct fsl_mc_io *mc_io,
11174 - u32 cmd_flags,
11175 - u16 token,
11176 - char *obj_type,
11177 - int obj_id,
11178 - u8 irq_index,
11179 - int *type,
11180 - struct dprc_irq_cfg *irq_cfg);
11181 -
11182 -int dprc_get_res_count(struct fsl_mc_io *mc_io,
11183 - u32 cmd_flags,
11184 - u16 token,
11185 - char *type,
11186 - int *res_count);
11187 +int dprc_get_obj(struct fsl_mc_io *mc_io,
11188 + u32 cmd_flags,
11189 + u16 token,
11190 + int obj_index,
11191 + struct dprc_obj_desc *obj_desc);
11192 +
11193 +int dprc_get_obj_desc(struct fsl_mc_io *mc_io,
11194 + u32 cmd_flags,
11195 + u16 token,
11196 + char *obj_type,
11197 + int obj_id,
11198 + struct dprc_obj_desc *obj_desc);
11199 +
11200 +int dprc_set_obj_irq(struct fsl_mc_io *mc_io,
11201 + u32 cmd_flags,
11202 + u16 token,
11203 + char *obj_type,
11204 + int obj_id,
11205 + u8 irq_index,
11206 + struct dprc_irq_cfg *irq_cfg);
11207 +
11208 +int dprc_get_obj_irq(struct fsl_mc_io *mc_io,
11209 + u32 cmd_flags,
11210 + u16 token,
11211 + char *obj_type,
11212 + int obj_id,
11213 + u8 irq_index,
11214 + int *type,
11215 + struct dprc_irq_cfg *irq_cfg);
11216 +
11217 +int dprc_get_res_count(struct fsl_mc_io *mc_io,
11218 + u32 cmd_flags,
11219 + u16 token,
11220 + char *type,
11221 + int *res_count);
11222
11223 /**
11224 * enum dprc_iter_status - Iteration status
11225 @@ -429,27 +259,6 @@ enum dprc_iter_status {
11226 DPRC_ITER_STATUS_LAST = 2
11227 };
11228
11229 -/**
11230 - * struct dprc_res_ids_range_desc - Resource ID range descriptor
11231 - * @base_id: Base resource ID of this range
11232 - * @last_id: Last resource ID of this range
11233 - * @iter_status: Iteration status - should be set to DPRC_ITER_STATUS_FIRST at
11234 - * first iteration; while the returned marker is DPRC_ITER_STATUS_MORE,
11235 - * additional iterations are needed, until the returned marker is
11236 - * DPRC_ITER_STATUS_LAST
11237 - */
11238 -struct dprc_res_ids_range_desc {
11239 - int base_id;
11240 - int last_id;
11241 - enum dprc_iter_status iter_status;
11242 -};
11243 -
11244 -int dprc_get_res_ids(struct fsl_mc_io *mc_io,
11245 - u32 cmd_flags,
11246 - u16 token,
11247 - char *type,
11248 - struct dprc_res_ids_range_desc *range_desc);
11249 -
11250 /* Region flags */
11251 /* Cacheable - Indicates that region should be mapped as cacheable */
11252 #define DPRC_REGION_CACHEABLE 0x00000001
11253 @@ -481,64 +290,27 @@ struct dprc_region_desc {
11254 enum dprc_region_type type;
11255 };
11256
11257 -int dprc_get_obj_region(struct fsl_mc_io *mc_io,
11258 - u32 cmd_flags,
11259 - u16 token,
11260 - char *obj_type,
11261 - int obj_id,
11262 - u8 region_index,
11263 - struct dprc_region_desc *region_desc);
11264 -
11265 -int dprc_set_obj_label(struct fsl_mc_io *mc_io,
11266 - u32 cmd_flags,
11267 - u16 token,
11268 - char *obj_type,
11269 - int obj_id,
11270 - char *label);
11271 +int dprc_get_obj_region(struct fsl_mc_io *mc_io,
11272 + u32 cmd_flags,
11273 + u16 token,
11274 + char *obj_type,
11275 + int obj_id,
11276 + u8 region_index,
11277 + struct dprc_region_desc *region_desc);
11278
11279 -/**
11280 - * struct dprc_endpoint - Endpoint description for link connect/disconnect
11281 - * operations
11282 - * @type: Endpoint object type: NULL terminated string
11283 - * @id: Endpoint object ID
11284 - * @if_id: Interface ID; should be set for endpoints with multiple
11285 - * interfaces ("dpsw", "dpdmux"); for others, always set to 0
11286 - */
11287 -struct dprc_endpoint {
11288 - char type[16];
11289 - int id;
11290 - int if_id;
11291 -};
11292 +int dprc_get_api_version(struct fsl_mc_io *mc_io,
11293 + u32 cmd_flags,
11294 + u16 *major_ver,
11295 + u16 *minor_ver);
11296
11297 -/**
11298 - * struct dprc_connection_cfg - Connection configuration.
11299 - * Used for virtual connections only
11300 - * @committed_rate: Committed rate (Mbits/s)
11301 - * @max_rate: Maximum rate (Mbits/s)
11302 - */
11303 -struct dprc_connection_cfg {
11304 - u32 committed_rate;
11305 - u32 max_rate;
11306 -};
11307 +int dprc_get_container_id(struct fsl_mc_io *mc_io,
11308 + u32 cmd_flags,
11309 + int *container_id);
11310
11311 -int dprc_connect(struct fsl_mc_io *mc_io,
11312 - u32 cmd_flags,
11313 - u16 token,
11314 - const struct dprc_endpoint *endpoint1,
11315 - const struct dprc_endpoint *endpoint2,
11316 - const struct dprc_connection_cfg *cfg);
11317 -
11318 -int dprc_disconnect(struct fsl_mc_io *mc_io,
11319 - u32 cmd_flags,
11320 - u16 token,
11321 - const struct dprc_endpoint *endpoint);
11322 -
11323 -int dprc_get_connection(struct fsl_mc_io *mc_io,
11324 - u32 cmd_flags,
11325 - u16 token,
11326 - const struct dprc_endpoint *endpoint1,
11327 - struct dprc_endpoint *endpoint2,
11328 - int *state);
11329 +int dprc_reset_container(struct fsl_mc_io *mc_io,
11330 + u32 cmd_flags,
11331 + u16 token,
11332 + int child_container_id);
11333
11334 #endif /* _FSL_DPRC_H */
11335
11336 diff --git a/drivers/staging/fsl-mc/include/mc-bus.h b/drivers/staging/fsl-mc/include/mc-bus.h
11337 index 170684a5..4d1f2d3e 100644
11338 --- a/drivers/staging/fsl-mc/include/mc-bus.h
11339 +++ b/drivers/staging/fsl-mc/include/mc-bus.h
11340 @@ -1,7 +1,7 @@
11341 /*
11342 * Freescale Management Complex (MC) bus declarations
11343 *
11344 - * Copyright (C) 2014 Freescale Semiconductor, Inc.
11345 + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
11346 * Author: German Rivera <German.Rivera@freescale.com>
11347 *
11348 * This file is licensed under the terms of the GNU General Public
11349 @@ -42,8 +42,8 @@ struct msi_domain_info;
11350 */
11351 struct fsl_mc_resource_pool {
11352 enum fsl_mc_pool_type type;
11353 - int16_t max_count;
11354 - int16_t free_count;
11355 + int max_count;
11356 + int free_count;
11357 struct mutex mutex; /* serializes access to free_list */
11358 struct list_head free_list;
11359 struct fsl_mc_bus *mc_bus;
11360 @@ -73,6 +73,7 @@ struct fsl_mc_bus {
11361 int dprc_scan_container(struct fsl_mc_device *mc_bus_dev);
11362
11363 int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev,
11364 + const char *driver_override,
11365 unsigned int *total_irq_count);
11366
11367 int __init dprc_driver_init(void);
11368 diff --git a/drivers/staging/fsl-mc/include/mc-cmd.h b/drivers/staging/fsl-mc/include/mc-cmd.h
11369 index 5decb989..2e08aa31 100644
11370 --- a/drivers/staging/fsl-mc/include/mc-cmd.h
11371 +++ b/drivers/staging/fsl-mc/include/mc-cmd.h
11372 @@ -1,4 +1,5 @@
11373 -/* Copyright 2013-2015 Freescale Semiconductor Inc.
11374 +/*
11375 + * Copyright 2013-2016 Freescale Semiconductor Inc.
11376 *
11377 * Redistribution and use in source and binary forms, with or without
11378 * modification, are permitted provided that the following conditions are met:
11379 @@ -48,6 +49,15 @@ struct mc_command {
11380 u64 params[MC_CMD_NUM_OF_PARAMS];
11381 };
11382
11383 +struct mc_rsp_create {
11384 + __le32 object_id;
11385 +};
11386 +
11387 +struct mc_rsp_api_ver {
11388 + __le16 major_ver;
11389 + __le16 minor_ver;
11390 +};
11391 +
11392 enum mc_cmd_status {
11393 MC_CMD_STATUS_OK = 0x0, /* Completed successfully */
11394 MC_CMD_STATUS_READY = 0x1, /* Ready to be processed */
11395 @@ -72,11 +82,6 @@ enum mc_cmd_status {
11396 /* Command completion flag */
11397 #define MC_CMD_FLAG_INTR_DIS 0x01
11398
11399 -#define MC_CMD_HDR_CMDID_MASK 0xFFF0
11400 -#define MC_CMD_HDR_CMDID_SHIFT 4
11401 -#define MC_CMD_HDR_TOKEN_MASK 0xFFC0
11402 -#define MC_CMD_HDR_TOKEN_SHIFT 6
11403 -
11404 static inline u64 mc_encode_cmd_header(u16 cmd_id,
11405 u32 cmd_flags,
11406 u16 token)
11407 @@ -84,10 +89,8 @@ static inline u64 mc_encode_cmd_header(u16 cmd_id,
11408 u64 header = 0;
11409 struct mc_cmd_header *hdr = (struct mc_cmd_header *)&header;
11410
11411 - hdr->cmd_id = cpu_to_le16((cmd_id << MC_CMD_HDR_CMDID_SHIFT) &
11412 - MC_CMD_HDR_CMDID_MASK);
11413 - hdr->token = cpu_to_le16((token << MC_CMD_HDR_TOKEN_SHIFT) &
11414 - MC_CMD_HDR_TOKEN_MASK);
11415 + hdr->cmd_id = cpu_to_le16(cmd_id);
11416 + hdr->token = cpu_to_le16(token);
11417 hdr->status = MC_CMD_STATUS_READY;
11418 if (cmd_flags & MC_CMD_FLAG_PRI)
11419 hdr->flags_hw = MC_CMD_FLAG_PRI;
11420 @@ -102,7 +105,26 @@ static inline u16 mc_cmd_hdr_read_token(struct mc_command *cmd)
11421 struct mc_cmd_header *hdr = (struct mc_cmd_header *)&cmd->header;
11422 u16 token = le16_to_cpu(hdr->token);
11423
11424 - return (token & MC_CMD_HDR_TOKEN_MASK) >> MC_CMD_HDR_TOKEN_SHIFT;
11425 + return token;
11426 +}
11427 +
11428 +static inline u32 mc_cmd_read_object_id(struct mc_command *cmd)
11429 +{
11430 + struct mc_rsp_create *rsp_params;
11431 +
11432 + rsp_params = (struct mc_rsp_create *)cmd->params;
11433 + return le32_to_cpu(rsp_params->object_id);
11434 +}
11435 +
11436 +static inline void mc_cmd_read_api_version(struct mc_command *cmd,
11437 + u16 *major_ver,
11438 + u16 *minor_ver)
11439 +{
11440 + struct mc_rsp_api_ver *rsp_params;
11441 +
11442 + rsp_params = (struct mc_rsp_api_ver *)cmd->params;
11443 + *major_ver = le16_to_cpu(rsp_params->major_ver);
11444 + *minor_ver = le16_to_cpu(rsp_params->minor_ver);
11445 }
11446
11447 #endif /* __FSL_MC_CMD_H */
11448 diff --git a/drivers/staging/fsl-mc/include/mc-sys.h b/drivers/staging/fsl-mc/include/mc-sys.h
11449 index 89ad0cf5..dca7f908 100644
11450 --- a/drivers/staging/fsl-mc/include/mc-sys.h
11451 +++ b/drivers/staging/fsl-mc/include/mc-sys.h
11452 @@ -1,4 +1,5 @@
11453 -/* Copyright 2013-2014 Freescale Semiconductor Inc.
11454 +/*
11455 + * Copyright 2013-2016 Freescale Semiconductor Inc.
11456 *
11457 * Interface of the I/O services to send MC commands to the MC hardware
11458 *
11459 diff --git a/drivers/staging/fsl-mc/include/mc.h b/drivers/staging/fsl-mc/include/mc.h
11460 index f6e720e8..c23b78a4 100644
11461 --- a/drivers/staging/fsl-mc/include/mc.h
11462 +++ b/drivers/staging/fsl-mc/include/mc.h
11463 @@ -1,7 +1,7 @@
11464 /*
11465 * Freescale Management Complex (MC) bus public interface
11466 *
11467 - * Copyright (C) 2014 Freescale Semiconductor, Inc.
11468 + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
11469 * Author: German Rivera <German.Rivera@freescale.com>
11470 *
11471 * This file is licensed under the terms of the GNU General Public
11472 @@ -81,7 +81,7 @@ enum fsl_mc_pool_type {
11473 */
11474 struct fsl_mc_resource {
11475 enum fsl_mc_pool_type type;
11476 - int32_t id;
11477 + s32 id;
11478 void *data;
11479 struct fsl_mc_resource_pool *parent_pool;
11480 struct list_head node;
11481 @@ -122,6 +122,7 @@ struct fsl_mc_device_irq {
11482 * @regions: pointer to array of MMIO region entries
11483 * @irqs: pointer to array of pointers to interrupts allocated to this device
11484 * @resource: generic resource associated with this MC object device, if any.
11485 + * @driver_override: Driver name to force a match
11486 *
11487 * Generic device object for MC object devices that are "attached" to a
11488 * MC bus.
11489 @@ -154,6 +155,7 @@ struct fsl_mc_device {
11490 struct resource *regions;
11491 struct fsl_mc_device_irq **irqs;
11492 struct fsl_mc_resource *resource;
11493 + const char *driver_override;
11494 };
11495
11496 #define to_fsl_mc_device(_dev) \
11497 @@ -175,6 +177,8 @@ struct fsl_mc_device {
11498 #define fsl_mc_driver_register(drv) \
11499 __fsl_mc_driver_register(drv, THIS_MODULE)
11500
11501 +void fsl_mc_device_remove(struct fsl_mc_device *mc_dev);
11502 +
11503 int __must_check __fsl_mc_driver_register(struct fsl_mc_driver *fsl_mc_driver,
11504 struct module *owner);
11505
11506 @@ -198,4 +202,13 @@ int __must_check fsl_mc_allocate_irqs(struct fsl_mc_device *mc_dev);
11507
11508 void fsl_mc_free_irqs(struct fsl_mc_device *mc_dev);
11509
11510 +void fsl_mc_dma_configure(struct fsl_mc_device *mc_dev,
11511 + struct device_node *fsl_mc_platform_node, int coherent);
11512 +
11513 +#ifdef CONFIG_FSL_MC_BUS
11514 +struct iommu_group *fsl_mc_device_group(struct device *dev);
11515 +#else
11516 +#define fsl_mc_device_group(__dev) NULL
11517 +#endif
11518 +
11519 #endif /* _FSL_MC_H_ */
11520 --
11521 2.14.1
11522
Staging tree of Mathias Kresin