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[openwrt/staging/mkresin.git] / target / linux / layerscape / patches-4.14 / 302-dts-support-layerscape.patch
1 From cc1d1d1b68d18a31aeb8a572ca6b3929b083855c Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Wed, 17 Apr 2019 18:58:33 +0800
4 Subject: [PATCH] dts: support layerscape
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 This is an integrated patch of dts for layerscape
10
11 Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
12 Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
13 Signed-off-by: Alan Wang <alan.wang@nxp.com>
14 Signed-off-by: Alison Wang <alison.wang@nxp.com>
15 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
16 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
17 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
18 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
19 Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
20 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
21 Signed-off-by: Biwen Li <biwen.li@nxp.com>
22 Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
23 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
24 Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
25 Signed-off-by: Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
26 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
27 Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
28 Signed-off-by: Constantin Tudor <constantin.tudor@nxp.com>
29 Signed-off-by: David S. Miller <davem@davemloft.net>
30 Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
31 Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
32 Signed-off-by: Guanhua Gao <guanhua.gao@nxp.com>
33 Signed-off-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
34 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
35 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
36 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
37 Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
38 Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
39 Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
40 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
41 Signed-off-by: Li Yang <leoyang.li@nxp.com>
42 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
43 Signed-off-by: Mathew McBride <matt@traverse.com.au>
44 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
45 Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
46 Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
47 Signed-off-by: Peng Ma <peng.ma@nxp.com>
48 Signed-off-by: Po Liu <po.liu@nxp.com>
49 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
50 Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
51 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
52 Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
53 Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
54 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
55 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
56 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
57 Signed-off-by: Sakar Arora <Sakar.Arora@freescale.com>
58 Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
59 Signed-off-by: Scott Wood <oss@buserror.net>
60 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
61 Signed-off-by: Shawn Guo <shawnguo@kernel.org>
62 Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
63 Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
64 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
65 Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
66 Signed-off-by: Tao Yang <b31903@freescale.com>
67 Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
68 Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
69 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
70 Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
71 Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
72 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
73 Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
74 Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
75 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
76 Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
77 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
78 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
79 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
80 ---
81 arch/arm/boot/dts/Makefile | 3 +-
82 arch/arm/boot/dts/imx25.dtsi | 4 +-
83 arch/arm/boot/dts/imx28.dtsi | 4 +-
84 arch/arm/boot/dts/imx35.dtsi | 4 +-
85 arch/arm/boot/dts/imx53.dtsi | 4 +-
86 arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++
87 arch/arm/boot/dts/ls1021a-qds.dts | 32 +
88 arch/arm/boot/dts/ls1021a-twr.dts | 27 +
89 arch/arm/boot/dts/ls1021a.dtsi | 111 +-
90 arch/arm64/boot/dts/freescale/Makefile | 16 +-
91 .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 126 ++
92 .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 97 +-
93 .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 179 +++
94 .../boot/dts/freescale/fsl-ls1012a-qds.dts | 136 +-
95 .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 100 +-
96 .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 210 ++-
97 .../boot/dts/freescale/fsl-ls1043-post.dtsi | 3 +-
98 .../dts/freescale/fsl-ls1043a-qds-sdk.dts | 263 ++++
99 .../boot/dts/freescale/fsl-ls1043a-qds.dts | 206 ++-
100 .../dts/freescale/fsl-ls1043a-rdb-sdk.dts | 262 ++++
101 .../dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 140 ++
102 .../boot/dts/freescale/fsl-ls1043a-rdb.dts | 76 +-
103 .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 382 +++--
104 .../boot/dts/freescale/fsl-ls1046-post.dtsi | 2 +-
105 .../dts/freescale/fsl-ls1046a-qds-sdk.dts | 268 ++++
106 .../boot/dts/freescale/fsl-ls1046a-qds.dts | 194 ++-
107 .../dts/freescale/fsl-ls1046a-rdb-sdk.dts | 307 ++++
108 .../dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 133 ++
109 .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 48 +-
110 .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 386 +++--
111 .../boot/dts/freescale/fsl-ls1088a-qds.dts | 88 +-
112 .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 150 +-
113 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 546 ++++++-
114 .../boot/dts/freescale/fsl-ls2080a-qds.dts | 100 +-
115 .../boot/dts/freescale/fsl-ls2080a-rdb.dts | 118 +-
116 .../boot/dts/freescale/fsl-ls2080a-simu.dts | 38 +-
117 .../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 50 +-
118 .../boot/dts/freescale/fsl-ls2081a-rdb.dts | 163 ++
119 .../boot/dts/freescale/fsl-ls2088a-qds.dts | 158 +-
120 .../boot/dts/freescale/fsl-ls2088a-rdb.dts | 118 +-
121 .../arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 52 +-
122 .../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 43 +-
123 .../boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 60 +-
124 .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 299 ++--
125 .../boot/dts/freescale/fsl-lx2160a-qds.dts | 353 +++++
126 .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 241 +++
127 .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 1318 +++++++++++++++++
128 .../boot/dts/freescale/fsl-tmu-map1.dtsi | 99 ++
129 .../boot/dts/freescale/fsl-tmu-map2.dtsi | 99 ++
130 .../boot/dts/freescale/fsl-tmu-map3.dtsi | 99 ++
131 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 ++++
132 .../dts/freescale/qoriq-bman-portals-sdk.dtsi | 55 +
133 .../dts/freescale/qoriq-bman-portals.dtsi | 8 +-
134 .../boot/dts/freescale/qoriq-dpaa-eth.dtsi | 97 ++
135 .../dts/freescale/qoriq-fman3-0-10g-0.dtsi | 11 +-
136 .../dts/freescale/qoriq-fman3-0-10g-1.dtsi | 11 +-
137 .../dts/freescale/qoriq-fman3-0-1g-0.dtsi | 7 +-
138 .../dts/freescale/qoriq-fman3-0-1g-1.dtsi | 7 +-
139 .../dts/freescale/qoriq-fman3-0-1g-2.dtsi | 7 +-
140 .../dts/freescale/qoriq-fman3-0-1g-3.dtsi | 7 +-
141 .../dts/freescale/qoriq-fman3-0-1g-4.dtsi | 7 +-
142 .../dts/freescale/qoriq-fman3-0-1g-5.dtsi | 7 +-
143 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 +
144 .../boot/dts/freescale/qoriq-fman3-0.dtsi | 67 +-
145 .../dts/freescale/qoriq-qman-portals-sdk.dtsi | 38 +
146 .../dts/freescale/qoriq-qman-portals.dtsi | 9 +-
147 .../boot/dts/freescale/traverse-ls1043s.dts | 29 +
148 .../boot/dts/freescale/traverse-ls1043v.dts | 29 +
149 68 files changed, 7660 insertions(+), 1211 deletions(-)
150 create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts
151 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
152 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
153 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
154 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
155 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
156 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
157 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
158 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
159 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
160 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
161 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
162 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
163 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
164 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
165 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
166 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
167 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi
168 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
169 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
170 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi
171
172 --- a/arch/arm/boot/dts/Makefile
173 +++ b/arch/arm/boot/dts/Makefile
174 @@ -496,7 +496,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
175 imx7s-warp.dtb
176 dtb-$(CONFIG_SOC_LS1021A) += \
177 ls1021a-qds.dtb \
178 - ls1021a-twr.dtb
179 + ls1021a-twr.dtb \
180 + ls1021a-iot.dtb
181 dtb-$(CONFIG_SOC_VF610) += \
182 vf500-colibri-eval-v3.dtb \
183 vf610-colibri-eval-v3.dtb \
184 --- a/arch/arm/boot/dts/imx25.dtsi
185 +++ b/arch/arm/boot/dts/imx25.dtsi
186 @@ -122,7 +122,7 @@
187 };
188
189 can1: can@43f88000 {
190 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
191 + compatible = "fsl,imx25-flexcan";
192 reg = <0x43f88000 0x4000>;
193 interrupts = <43>;
194 clocks = <&clks 75>, <&clks 75>;
195 @@ -131,7 +131,7 @@
196 };
197
198 can2: can@43f8c000 {
199 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
200 + compatible = "fsl,imx25-flexcan";
201 reg = <0x43f8c000 0x4000>;
202 interrupts = <44>;
203 clocks = <&clks 76>, <&clks 76>;
204 --- a/arch/arm/boot/dts/imx28.dtsi
205 +++ b/arch/arm/boot/dts/imx28.dtsi
206 @@ -1038,7 +1038,7 @@
207 };
208
209 can0: can@80032000 {
210 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
211 + compatible = "fsl,imx28-flexcan";
212 reg = <0x80032000 0x2000>;
213 interrupts = <8>;
214 clocks = <&clks 58>, <&clks 58>;
215 @@ -1047,7 +1047,7 @@
216 };
217
218 can1: can@80034000 {
219 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
220 + compatible = "fsl,imx28-flexcan";
221 reg = <0x80034000 0x2000>;
222 interrupts = <9>;
223 clocks = <&clks 59>, <&clks 59>;
224 --- a/arch/arm/boot/dts/imx35.dtsi
225 +++ b/arch/arm/boot/dts/imx35.dtsi
226 @@ -303,7 +303,7 @@
227 };
228
229 can1: can@53fe4000 {
230 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
231 + compatible = "fsl,imx35-flexcan";
232 reg = <0x53fe4000 0x1000>;
233 clocks = <&clks 33>, <&clks 33>;
234 clock-names = "ipg", "per";
235 @@ -312,7 +312,7 @@
236 };
237
238 can2: can@53fe8000 {
239 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
240 + compatible = "fsl,imx35-flexcan";
241 reg = <0x53fe8000 0x1000>;
242 clocks = <&clks 34>, <&clks 34>;
243 clock-names = "ipg", "per";
244 --- a/arch/arm/boot/dts/imx53.dtsi
245 +++ b/arch/arm/boot/dts/imx53.dtsi
246 @@ -536,7 +536,7 @@
247 };
248
249 can1: can@53fc8000 {
250 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
251 + compatible = "fsl,imx53-flexcan";
252 reg = <0x53fc8000 0x4000>;
253 interrupts = <82>;
254 clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>,
255 @@ -546,7 +546,7 @@
256 };
257
258 can2: can@53fcc000 {
259 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
260 + compatible = "fsl,imx53-flexcan";
261 reg = <0x53fcc000 0x4000>;
262 interrupts = <83>;
263 clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>,
264 --- /dev/null
265 +++ b/arch/arm/boot/dts/ls1021a-iot.dts
266 @@ -0,0 +1,262 @@
267 +/*
268 + * Copyright 2013-2016 Freescale Semiconductor, Inc.
269 + *
270 + * This program is free software; you can redistribute it and/or modify
271 + * it under the terms of the GNU General Public License as published by
272 + * the Free Software Foundation; either version 2 of the License, or
273 + * (at your option) any later version.
274 + */
275 +
276 +/dts-v1/;
277 +#include "ls1021a.dtsi"
278 +
279 +/ {
280 + model = "LS1021A IOT Board";
281 +
282 + sys_mclk: clock-mclk {
283 + compatible = "fixed-clock";
284 + #clock-cells = <0>;
285 + clock-frequency = <24576000>;
286 + };
287 +
288 + regulators {
289 + compatible = "simple-bus";
290 + #address-cells = <1>;
291 + #size-cells = <0>;
292 +
293 + reg_3p3v: regulator@0 {
294 + compatible = "regulator-fixed";
295 + reg = <0>;
296 + regulator-name = "3P3V";
297 + regulator-min-microvolt = <3300000>;
298 + regulator-max-microvolt = <3300000>;
299 + regulator-always-on;
300 + };
301 +
302 + reg_2p5v: regulator@1 {
303 + compatible = "regulator-fixed";
304 + reg = <1>;
305 + regulator-name = "2P5V";
306 + regulator-min-microvolt = <2500000>;
307 + regulator-max-microvolt = <2500000>;
308 + regulator-always-on;
309 + };
310 + };
311 +
312 + sound {
313 + compatible = "simple-audio-card";
314 + simple-audio-card,format = "i2s";
315 + simple-audio-card,widgets =
316 + "Microphone", "Microphone Jack",
317 + "Headphone", "Headphone Jack",
318 + "Speaker", "Speaker Ext",
319 + "Line", "Line In Jack";
320 + simple-audio-card,routing =
321 + "MIC_IN", "Microphone Jack",
322 + "Microphone Jack", "Mic Bias",
323 + "LINE_IN", "Line In Jack",
324 + "Headphone Jack", "HP_OUT",
325 + "Speaker Ext", "LINE_OUT";
326 +
327 + simple-audio-card,cpu {
328 + sound-dai = <&sai2>;
329 + frame-master;
330 + bitclock-master;
331 + };
332 +
333 + simple-audio-card,codec {
334 + sound-dai = <&codec>;
335 + frame-master;
336 + bitclock-master;
337 + };
338 + };
339 +
340 + firmware {
341 + optee {
342 + compatible = "linaro,optee-tz";
343 + method = "smc";
344 + };
345 + };
346 +};
347 +
348 +&enet0 {
349 + tbi-handle = <&tbi1>;
350 + phy-handle = <&phy1>;
351 + phy-connection-type = "sgmii";
352 + status = "okay";
353 +};
354 +
355 +&enet1 {
356 + tbi-handle = <&tbi1>;
357 + phy-handle = <&phy3>;
358 + phy-connection-type = "sgmii";
359 + status = "okay";
360 +};
361 +
362 +&enet2 {
363 + fixed-link = <0 1 1000 0 0>;
364 + phy-connection-type = "rgmii-id";
365 + status = "okay";
366 +};
367 +
368 +&can0{
369 + status = "disabled";
370 +};
371 +
372 +&can1{
373 + status = "disabled";
374 +};
375 +
376 +&can2{
377 + status = "disabled";
378 +};
379 +
380 +&can3{
381 + status = "okay";
382 +};
383 +
384 +&esdhc{
385 + status = "okay";
386 +};
387 +
388 +&i2c0 {
389 + status = "okay";
390 +
391 + max1239@35 {
392 + compatible = "maxim,max1239";
393 + reg = <0x35>;
394 + #io-channel-cells = <1>;
395 + };
396 +
397 + codec: sgtl5000@2a {
398 + #sound-dai-cells=<0x0>;
399 + compatible = "fsl,sgtl5000";
400 + reg = <0x2a>;
401 + VDDA-supply = <&reg_3p3v>;
402 + VDDIO-supply = <&reg_2p5v>;
403 + clocks = <&sys_mclk 1>;
404 + };
405 +
406 + pca9555: pca9555@23 {
407 + compatible = "nxp,pca9555";
408 + /*pinctrl-names = "default";*/
409 + /*interrupt-parent = <&gpio2>;
410 + interrupts = <19 0x2>;*/
411 + gpio-controller;
412 + #gpio-cells = <2>;
413 + interrupt-controller;
414 + #interrupt-cells = <2>;
415 + reg = <0x23>;
416 + };
417 +
418 + ina220@44 {
419 + compatible = "ti,ina220";
420 + reg = <0x44>;
421 + shunt-resistor = <1000>;
422 + };
423 +
424 + ina220@45 {
425 + compatible = "ti,ina220";
426 + reg = <0x45>;
427 + shunt-resistor = <1000>;
428 + };
429 +
430 + lm75b@48 {
431 + compatible = "nxp,lm75a";
432 + reg = <0x48>;
433 + };
434 +
435 + adt7461a@4c {
436 + compatible = "adt7461a";
437 + reg = <0x4c>;
438 + };
439 +
440 + hdmi: sii9022a@39 {
441 + compatible = "fsl,sii902x";
442 + reg = <0x39>;
443 + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
444 + };
445 +};
446 +
447 +&i2c1 {
448 + status = "disabled";
449 +};
450 +
451 +&ifc {
452 + status = "disabled";
453 +};
454 +
455 +&lpuart0 {
456 + status = "okay";
457 +};
458 +
459 +&mdio0 {
460 + phy0: ethernet-phy@0 {
461 + reg = <0x0>;
462 + };
463 + phy1: ethernet-phy@1 {
464 + reg = <0x1>;
465 + };
466 + phy2: ethernet-phy@2 {
467 + reg = <0x2>;
468 + };
469 + phy3: ethernet-phy@3 {
470 + reg = <0x3>;
471 + };
472 + tbi1: tbi-phy@1f {
473 + reg = <0x1f>;
474 + device_type = "tbi-phy";
475 + };
476 +};
477 +
478 +&qspi {
479 + num-cs = <2>;
480 + status = "okay";
481 +
482 + qflash0: s25fl128s@0 {
483 + compatible = "spansion,s25fl129p1";
484 + #address-cells = <1>;
485 + #size-cells = <1>;
486 + spi-max-frequency = <20000000>;
487 + reg = <0>;
488 + };
489 +};
490 +
491 +&sai2 {
492 + status = "okay";
493 +};
494 +
495 +&uart0 {
496 + status = "okay";
497 +};
498 +
499 +&uart1 {
500 + status = "okay";
501 +};
502 +
503 +&dcu {
504 + display = <&display>;
505 + status = "okay";
506 +
507 + display: display@0 {
508 + bits-per-pixel = <24>;
509 +
510 + display-timings {
511 + native-mode = <&timing0>;
512 +
513 + timing0: mode0 {
514 + clock-frequency = <25000000>;
515 + hactive = <640>;
516 + vactive = <480>;
517 + hback-porch = <80>;
518 + hfront-porch = <80>;
519 + vback-porch = <16>;
520 + vfront-porch = <16>;
521 + hsync-len = <12>;
522 + vsync-len = <2>;
523 + hsync-active = <1>;
524 + vsync-active = <1>;
525 + };
526 + };
527 + };
528 +};
529 --- a/arch/arm/boot/dts/ls1021a-qds.dts
530 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
531 @@ -124,6 +124,21 @@
532 };
533 };
534
535 +&qspi {
536 + num-cs = <2>;
537 + status = "okay";
538 +
539 + qflash0: s25fl128s@0 {
540 + compatible = "spansion,m25p80";
541 + #address-cells = <1>;
542 + #size-cells = <1>;
543 + spi-max-frequency = <20000000>;
544 + reg = <0>;
545 + spi-rx-bus-width = <4>;
546 + spi-tx-bus-width = <4>;
547 + };
548 +};
549 +
550 &enet0 {
551 tbi-handle = <&tbi0>;
552 phy-handle = <&sgmii_phy1c>;
553 @@ -239,6 +254,11 @@
554 device-width = <1>;
555 };
556
557 + nand@2,0 {
558 + compatible = "fsl,ifc-nand";
559 + reg = <0x2 0x0 0x10000>;
560 + };
561 +
562 fpga: board-control@3,0 {
563 #address-cells = <1>;
564 #size-cells = <1>;
565 @@ -316,6 +336,10 @@
566 };
567 };
568
569 +&esdhc {
570 + status = "okay";
571 +};
572 +
573 &sai2 {
574 status = "okay";
575 };
576 @@ -331,3 +355,11 @@
577 &uart1 {
578 status = "okay";
579 };
580 +
581 +&can0 {
582 + status = "okay";
583 +};
584 +
585 +&can1 {
586 + status = "okay";
587 +};
588 --- a/arch/arm/boot/dts/ls1021a-twr.dts
589 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
590 @@ -142,6 +142,21 @@
591 };
592 };
593
594 +&qspi {
595 + num-cs = <2>;
596 + status = "okay";
597 +
598 + qflash0: n25q128a13@0 {
599 + compatible = "n25q128a13", "jedec,spi-nor";
600 + #address-cells = <1>;
601 + #size-cells = <1>;
602 + spi-max-frequency = <20000000>;
603 + reg = <0>;
604 + spi-rx-bus-width = <4>;
605 + spi-tx-bus-width = <4>;
606 + };
607 +};
608 +
609 &enet0 {
610 tbi-handle = <&tbi0>;
611 phy-handle = <&sgmii_phy2>;
612 @@ -235,6 +250,10 @@
613 };
614 };
615
616 +&esdhc {
617 + status = "okay";
618 +};
619 +
620 &sai1 {
621 status = "okay";
622 };
623 @@ -250,3 +269,11 @@
624 &uart1 {
625 status = "okay";
626 };
627 +
628 +&can0 {
629 + status = "okay";
630 +};
631 +
632 +&can1 {
633 + status = "okay";
634 +};
635 --- a/arch/arm/boot/dts/ls1021a.dtsi
636 +++ b/arch/arm/boot/dts/ls1021a.dtsi
637 @@ -146,12 +146,13 @@
638 ifc: ifc@1530000 {
639 compatible = "fsl,ifc", "simple-bus";
640 reg = <0x0 0x1530000 0x0 0x10000>;
641 + big-endian;
642 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
643 };
644
645 dcfg: dcfg@1ee0000 {
646 compatible = "fsl,ls1021a-dcfg", "syscon";
647 - reg = <0x0 0x1ee0000 0x0 0x10000>;
648 + reg = <0x0 0x1ee0000 0x0 0x1000>;
649 big-endian;
650 };
651
652 @@ -334,25 +335,44 @@
653 status = "disabled";
654 };
655
656 + qspi: quadspi@1550000 {
657 + compatible = "fsl,ls1021a-qspi";
658 + #address-cells = <1>;
659 + #size-cells = <0>;
660 + reg = <0x0 0x1550000 0x0 0x10000>,
661 + <0x0 0x40000000 0x0 0x4000000>;
662 + reg-names = "QuadSPI", "QuadSPI-memory";
663 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
664 + clock-names = "qspi_en", "qspi";
665 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
666 + big-endian;
667 + status = "disabled";
668 + };
669 +
670 i2c0: i2c@2180000 {
671 - compatible = "fsl,vf610-i2c";
672 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
673 #address-cells = <1>;
674 #size-cells = <0>;
675 reg = <0x0 0x2180000 0x0 0x10000>;
676 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
677 clock-names = "i2c";
678 clocks = <&clockgen 4 1>;
679 + dma-names = "tx", "rx";
680 + dmas = <&edma0 1 39>,
681 + <&edma0 1 38>;
682 + fsl-scl-gpio = <&gpio3 23 0>;
683 status = "disabled";
684 };
685
686 i2c1: i2c@2190000 {
687 - compatible = "fsl,vf610-i2c";
688 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
689 #address-cells = <1>;
690 #size-cells = <0>;
691 reg = <0x0 0x2190000 0x0 0x10000>;
692 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
693 clock-names = "i2c";
694 clocks = <&clockgen 4 1>;
695 + fsl-scl-gpio = <&gpio3 23 0>;
696 status = "disabled";
697 };
698
699 @@ -497,6 +517,17 @@
700 status = "disabled";
701 };
702
703 + ftm0: ftm0@29d0000 {
704 + compatible = "fsl,ls1021a-ftm-alarm";
705 + reg = <0x0 0x29d0000 0x0 0x10000>,
706 + <0x0 0x1ee2144 0x0 0x4>,
707 + <0x0 0x0157051c 0x0 0x4>;
708 + reg-names = "ftm", "pmctrl", "scrachpad";
709 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
710 + big-endian;
711 + status = "okay";
712 + };
713 +
714 wdog0: watchdog@2ad0000 {
715 compatible = "fsl,imx21-wdt";
716 reg = <0x0 0x2ad0000 0x0 0x10000>;
717 @@ -550,6 +581,25 @@
718 <&clockgen 4 1>;
719 };
720
721 + qdma: qdma@8390000 {
722 + compatible = "fsl,ls1021a-qdma";
723 + reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
724 + <0x0 0x8389000 0x0 0x1000>, /* Status regs */
725 + <0x0 0x838a000 0x0 0x2000>; /* Block regs */
726 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
727 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
728 + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
729 + interrupt-names = "qdma-error",
730 + "qdma-queue0", "qdma-queue1";
731 + channels = <8>;
732 + block-number = <2>;
733 + block-offset = <0x1000>;
734 + queues = <2>;
735 + status-sizes = <64>;
736 + queue-sizes = <64 64>;
737 + big-endian;
738 + };
739 +
740 dcu: dcu@2ce0000 {
741 compatible = "fsl,ls1021a-dcu";
742 reg = <0x0 0x2ce0000 0x0 0x10000>;
743 @@ -693,6 +743,11 @@
744 dr_mode = "host";
745 snps,quirk-frame-length-adjustment = <0x20>;
746 snps,dis_rxdet_inp3_quirk;
747 + configure-gfladj;
748 + usb3-lpm-capable;
749 + snps,dis-u1u2-when-u3-quirk;
750 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
751 + snps,host-vbus-glitches;
752 };
753
754 pcie@3400000 {
755 @@ -700,7 +755,9 @@
756 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
757 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
758 reg-names = "regs", "config";
759 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
760 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
761 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
762 + interrupt-names = "pme", "aer";
763 fsl,pcie-scfg = <&scfg 0>;
764 #address-cells = <3>;
765 #size-cells = <2>;
766 @@ -716,6 +773,7 @@
767 <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
768 <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
769 <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
770 + status = "disabled";
771 };
772
773 pcie@3500000 {
774 @@ -723,7 +781,9 @@
775 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
776 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
777 reg-names = "regs", "config";
778 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
779 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
780 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
781 + interrupt-names = "pme", "aer";
782 fsl,pcie-scfg = <&scfg 1>;
783 #address-cells = <3>;
784 #size-cells = <2>;
785 @@ -739,6 +799,47 @@
786 <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
787 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
788 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
789 + status = "disabled";
790 + };
791 +
792 + can0: can@2a70000 {
793 + compatible = "fsl,ls1021ar2-flexcan";
794 + reg = <0x0 0x2a70000 0x0 0x1000>;
795 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
796 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
797 + clock-names = "ipg", "per";
798 + big-endian;
799 + status = "disabled";
800 + };
801 +
802 + can1: can@2a80000 {
803 + compatible = "fsl,ls1021ar2-flexcan";
804 + reg = <0x0 0x2a80000 0x0 0x1000>;
805 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
806 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
807 + clock-names = "ipg", "per";
808 + big-endian;
809 + status = "disabled";
810 + };
811 +
812 + can2: can@2a90000 {
813 + compatible = "fsl,ls1021ar2-flexcan";
814 + reg = <0x0 0x2a90000 0x0 0x1000>;
815 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
816 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
817 + clock-names = "ipg", "per";
818 + big-endian;
819 + status = "disabled";
820 + };
821 +
822 + can3: can@2aa0000 {
823 + compatible = "fsl,ls1021ar2-flexcan";
824 + reg = <0x0 0x2aa0000 0x0 0x1000>;
825 + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
826 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
827 + clock-names = "ipg", "per";
828 + big-endian;
829 + status = "disabled";
830 };
831 };
832 };
833 --- a/arch/arm64/boot/dts/freescale/Makefile
834 +++ b/arch/arm64/boot/dts/freescale/Makefile
835 @@ -1,19 +1,33 @@
836 # SPDX-License-Identifier: GPL-2.0
837 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
838 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
839 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
840 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
841 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
842 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
843 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
844 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
845 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
846 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
847 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
848 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
849 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
850 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
851 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
852 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
853 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
854 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
855 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
856 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
857 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
858 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
859 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
860 -
861 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
862 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
863 +
864 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043v.dtb
865 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043s.dtb
866 +
867 always := $(dtb-y)
868 subdir-y := $(dts-dirs)
869 clean-files := *.dtb
870 --- /dev/null
871 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
872 @@ -0,0 +1,126 @@
873 +/*
874 + * Device Tree file for NXP LS1012A 2G5RDB Board.
875 + *
876 + * Copyright 2017 NXP
877 + *
878 + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
879 + *
880 + * This file is dual-licensed: you can use it either under the terms
881 + * of the GPLv2 or the X11 license, at your option. Note that this dual
882 + * licensing only applies to this file, and not this project as a
883 + * whole.
884 + *
885 + * a) This library is free software; you can redistribute it and/or
886 + * modify it under the terms of the GNU General Public License as
887 + * published by the Free Software Foundation; either version 2 of the
888 + * License, or (at your option) any later version.
889 + *
890 + * This library is distributed in the hope that it will be useful,
891 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
892 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
893 + * GNU General Public License for more details.
894 + *
895 + * Or, alternatively,
896 + *
897 + * b) Permission is hereby granted, free of charge, to any person
898 + * obtaining a copy of this software and associated documentation
899 + * files (the "Software"), to deal in the Software without
900 + * restriction, including without limitation the rights to use,
901 + * copy, modify, merge, publish, distribute, sublicense, and/or
902 + * sell copies of the Software, and to permit persons to whom the
903 + * Software is furnished to do so, subject to the following
904 + * conditions:
905 + *
906 + * The above copyright notice and this permission notice shall be
907 + * included in all copies or substantial portions of the Software.
908 + *
909 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
910 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
911 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
912 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
913 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
914 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
915 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
916 + * OTHER DEALINGS IN THE SOFTWARE.
917 + */
918 +/dts-v1/;
919 +
920 +#include "fsl-ls1012a.dtsi"
921 +
922 +/ {
923 + model = "LS1012A 2G5RDB Board";
924 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
925 +
926 + aliases {
927 + ethernet0 = &pfe_mac0;
928 + ethernet1 = &pfe_mac1;
929 + };
930 +};
931 +
932 +&duart0 {
933 + status = "okay";
934 +};
935 +
936 +&i2c0 {
937 + status = "okay";
938 +};
939 +
940 +&qspi {
941 + num-cs = <2>;
942 + bus-num = <0>;
943 + status = "okay";
944 +
945 + qflash0: s25fs512s@0 {
946 + compatible = "spansion,m25p80";
947 + #address-cells = <1>;
948 + #size-cells = <1>;
949 + spi-max-frequency = <20000000>;
950 + m25p,fast-read;
951 + reg = <0>;
952 + };
953 +};
954 +
955 +&sata {
956 + status = "okay";
957 +};
958 +
959 +&pfe {
960 + status = "okay";
961 + #address-cells = <1>;
962 + #size-cells = <0>;
963 +
964 + pfe_mac0: ethernet@0 {
965 + compatible = "fsl,pfe-gemac-port";
966 + #address-cells = <1>;
967 + #size-cells = <0>;
968 + reg = <0x0>; /* GEM_ID */
969 + fsl,mdio-mux-val = <0x0>;
970 + phy-mode = "sgmii-2500";
971 + phy-handle = <&sgmii_phy1>;
972 + };
973 +
974 + pfe_mac1: ethernet@1 {
975 + compatible = "fsl,pfe-gemac-port";
976 + #address-cells = <1>;
977 + #size-cells = <0>;
978 + reg = <0x1>; /* GEM_ID */
979 + fsl,mdio-mux-val = <0x0>;
980 + phy-mode = "sgmii-2500";
981 + phy-handle = <&sgmii_phy2>;
982 + };
983 +
984 + mdio@0 {
985 + #address-cells = <1>;
986 + #size-cells = <0>;
987 +
988 + sgmii_phy1: ethernet-phy@1 {
989 + compatible = "ethernet-phy-ieee802.3-c45";
990 + reg = <0x1>;
991 + };
992 +
993 + sgmii_phy2: ethernet-phy@2 {
994 + compatible = "ethernet-phy-ieee802.3-c45";
995 + reg = <0x2>;
996 + };
997 + };
998 +};
999 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1000 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1001 @@ -1,45 +1,9 @@
1002 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1003 /*
1004 * Device Tree file for Freescale LS1012A Freedom Board.
1005 *
1006 * Copyright 2016 Freescale Semiconductor, Inc.
1007 *
1008 - * This file is dual-licensed: you can use it either under the terms
1009 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1010 - * licensing only applies to this file, and not this project as a
1011 - * whole.
1012 - *
1013 - * a) This library is free software; you can redistribute it and/or
1014 - * modify it under the terms of the GNU General Public License as
1015 - * published by the Free Software Foundation; either version 2 of the
1016 - * License, or (at your option) any later version.
1017 - *
1018 - * This library is distributed in the hope that it will be useful,
1019 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1020 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1021 - * GNU General Public License for more details.
1022 - *
1023 - * Or, alternatively,
1024 - *
1025 - * b) Permission is hereby granted, free of charge, to any person
1026 - * obtaining a copy of this software and associated documentation
1027 - * files (the "Software"), to deal in the Software without
1028 - * restriction, including without limitation the rights to use,
1029 - * copy, modify, merge, publish, distribute, sublicense, and/or
1030 - * sell copies of the Software, and to permit persons to whom the
1031 - * Software is furnished to do so, subject to the following
1032 - * conditions:
1033 - *
1034 - * The above copyright notice and this permission notice shall be
1035 - * included in all copies or substantial portions of the Software.
1036 - *
1037 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1038 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1039 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1040 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1041 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1042 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1043 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1044 - * OTHER DEALINGS IN THE SOFTWARE.
1045 */
1046 /dts-v1/;
1047
1048 @@ -49,6 +13,11 @@
1049 model = "LS1012A Freedom Board";
1050 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
1051
1052 + aliases {
1053 + ethernet0 = &pfe_mac0;
1054 + ethernet1 = &pfe_mac1;
1055 + };
1056 +
1057 sys_mclk: clock-mclk {
1058 compatible = "fixed-clock";
1059 #clock-cells = <0>;
1060 @@ -110,6 +79,45 @@
1061 };
1062 };
1063
1064 +&pfe {
1065 + status = "okay";
1066 + #address-cells = <1>;
1067 + #size-cells = <0>;
1068 +
1069 + pfe_mac0: ethernet@0 {
1070 + compatible = "fsl,pfe-gemac-port";
1071 + #address-cells = <1>;
1072 + #size-cells = <0>;
1073 + reg = <0x0>; /* GEM_ID */
1074 + fsl,mdio-mux-val = <0x0>;
1075 + phy-mode = "sgmii";
1076 + phy-handle = <&sgmii_phy1>;
1077 + };
1078 +
1079 + pfe_mac1: ethernet@1 {
1080 + compatible = "fsl,pfe-gemac-port";
1081 + #address-cells = <1>;
1082 + #size-cells = <0>;
1083 + reg = <0x1>; /* GEM_ID */
1084 + fsl,mdio-mux-val = <0x0>;
1085 + phy-mode = "sgmii";
1086 + phy-handle = <&sgmii_phy2>;
1087 + };
1088 +
1089 + mdio@0 {
1090 + #address-cells = <1>;
1091 + #size-cells = <0>;
1092 +
1093 + sgmii_phy1: ethernet-phy@2 {
1094 + reg = <0x2>;
1095 + };
1096 +
1097 + sgmii_phy2: ethernet-phy@1 {
1098 + reg = <0x1>;
1099 + };
1100 + };
1101 +};
1102 +
1103 &sai2 {
1104 status = "okay";
1105 };
1106 @@ -117,3 +125,18 @@
1107 &sata {
1108 status = "okay";
1109 };
1110 +
1111 +&qspi {
1112 + status = "okay";
1113 + qflash0: s25fs512s@0 {
1114 + compatible = "spansion,m25p80";
1115 + #address-cells = <1>;
1116 + #size-cells = <1>;
1117 + spi-max-frequency = <20000000>;
1118 + m25p,fast-read;
1119 + reg = <0>;
1120 + spi-rx-bus-width = <2>;
1121 + spi-tx-bus-width = <2>;
1122 + };
1123 +
1124 +};
1125 --- /dev/null
1126 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
1127 @@ -0,0 +1,179 @@
1128 +/*
1129 + * Device Tree file for NXP LS1012A FRWY Board.
1130 + *
1131 + * Copyright 2018 NXP
1132 + *
1133 + * This file is dual-licensed: you can use it either under the terms
1134 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1135 + * licensing only applies to this file, and not this project as a
1136 + * whole.
1137 + *
1138 + * a) This library is free software; you can redistribute it and/or
1139 + * modify it under the terms of the GNU General Public License as
1140 + * published by the Free Software Foundation; either version 2 of the
1141 + * License, or (at your option) any later version.
1142 + *
1143 + * This library is distributed in the hope that it will be useful,
1144 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1145 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1146 + * GNU General Public License for more details.
1147 + *
1148 + * Or, alternatively,
1149 + *
1150 + * b) Permission is hereby granted, free of charge, to any person
1151 + * obtaining a copy of this software and associated documentation
1152 + * files (the "Software"), to deal in the Software without
1153 + * restriction, including without limitation the rights to use,
1154 + * copy, modify, merge, publish, distribute, sublicense, and/or
1155 + * sell copies of the Software, and to permit persons to whom the
1156 + * Software is furnished to do so, subject to the following
1157 + * conditions:
1158 + *
1159 + * The above copyright notice and this permission notice shall be
1160 + * included in all copies or substantial portions of the Software.
1161 + *
1162 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1163 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1164 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1165 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1166 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1167 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1168 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1169 + * OTHER DEALINGS IN THE SOFTWARE.
1170 + */
1171 +/dts-v1/;
1172 +
1173 +#include "fsl-ls1012a.dtsi"
1174 +
1175 +/ {
1176 + model = "LS1012A FRWY Board";
1177 + compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
1178 +
1179 + aliases {
1180 + ethernet0 = &pfe_mac0;
1181 + ethernet1 = &pfe_mac1;
1182 + };
1183 +
1184 + sys_mclk: clock-mclk {
1185 + compatible = "fixed-clock";
1186 + #clock-cells = <0>;
1187 + clock-frequency = <25000000>;
1188 + };
1189 +
1190 + reg_1p8v: regulator-1p8v {
1191 + compatible = "regulator-fixed";
1192 + regulator-name = "1P8V";
1193 + regulator-min-microvolt = <1800000>;
1194 + regulator-max-microvolt = <1800000>;
1195 + regulator-always-on;
1196 + };
1197 +
1198 + sound {
1199 + compatible = "simple-audio-card";
1200 + simple-audio-card,format = "i2s";
1201 + simple-audio-card,widgets =
1202 + "Microphone", "Microphone Jack",
1203 + "Headphone", "Headphone Jack",
1204 + "Speaker", "Speaker Ext",
1205 + "Line", "Line In Jack";
1206 + simple-audio-card,routing =
1207 + "MIC_IN", "Microphone Jack",
1208 + "Microphone Jack", "Mic Bias",
1209 + "LINE_IN", "Line In Jack",
1210 + "Headphone Jack", "HP_OUT",
1211 + "Speaker Ext", "LINE_OUT";
1212 +
1213 + simple-audio-card,cpu {
1214 + sound-dai = <&sai2>;
1215 + frame-master;
1216 + bitclock-master;
1217 + };
1218 +
1219 + simple-audio-card,codec {
1220 + sound-dai = <&codec>;
1221 + frame-master;
1222 + bitclock-master;
1223 + system-clock-frequency = <25000000>;
1224 + };
1225 + };
1226 +};
1227 +
1228 +&pcie {
1229 + status = "okay";
1230 +};
1231 +
1232 +&duart0 {
1233 + status = "okay";
1234 +};
1235 +
1236 +&i2c0 {
1237 + status = "okay";
1238 +
1239 + codec: sgtl5000@a {
1240 + compatible = "fsl,sgtl5000";
1241 + #sound-dai-cells = <0>;
1242 + reg = <0xa>;
1243 + VDDA-supply = <&reg_1p8v>;
1244 + VDDIO-supply = <&reg_1p8v>;
1245 + clocks = <&sys_mclk>;
1246 + };
1247 +};
1248 +
1249 +&qspi {
1250 + num-cs = <1>;
1251 + bus-num = <0>;
1252 + status = "okay";
1253 +
1254 + qflash0: w25q16dw@0 {
1255 + compatible = "spansion,m25p80";
1256 + #address-cells = <1>;
1257 + #size-cells = <1>;
1258 + m25p,fast-read;
1259 + spi-max-frequency = <20000000>;
1260 + reg = <0>;
1261 + };
1262 +};
1263 +
1264 +&pfe {
1265 + status = "okay";
1266 + #address-cells = <1>;
1267 + #size-cells = <0>;
1268 +
1269 + pfe_mac0: ethernet@0 {
1270 + compatible = "fsl,pfe-gemac-port";
1271 + #address-cells = <1>;
1272 + #size-cells = <0>;
1273 + reg = <0x0>; /* GEM_ID */
1274 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1275 + fsl,mdio-mux-val = <0x0>;
1276 + phy-mode = "sgmii";
1277 + phy-handle = <&sgmii_phy1>;
1278 + };
1279 +
1280 + pfe_mac1: ethernet@1 {
1281 + compatible = "fsl,pfe-gemac-port";
1282 + #address-cells = <1>;
1283 + #size-cells = <0>;
1284 + reg = <0x1>; /* GEM_ID */
1285 + fsl,mdio-mux-val = <0x0>;
1286 + phy-mode = "sgmii";
1287 + phy-handle = <&sgmii_phy2>;
1288 + };
1289 +
1290 + mdio@0 {
1291 + #address-cells = <1>;
1292 + #size-cells = <0>;
1293 +
1294 + sgmii_phy1: ethernet-phy@2 {
1295 + reg = <0x2>;
1296 + };
1297 +
1298 + sgmii_phy2: ethernet-phy@1 {
1299 + reg = <0x1>;
1300 + };
1301 + };
1302 +};
1303 +
1304 +&sai2 {
1305 + status = "okay";
1306 +};
1307 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1308 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1309 @@ -1,45 +1,9 @@
1310 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1311 /*
1312 * Device Tree file for Freescale LS1012A QDS Board.
1313 *
1314 * Copyright 2016 Freescale Semiconductor, Inc.
1315 *
1316 - * This file is dual-licensed: you can use it either under the terms
1317 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1318 - * licensing only applies to this file, and not this project as a
1319 - * whole.
1320 - *
1321 - * a) This library is free software; you can redistribute it and/or
1322 - * modify it under the terms of the GNU General Public License as
1323 - * published by the Free Software Foundation; either version 2 of the
1324 - * License, or (at your option) any later version.
1325 - *
1326 - * This library is distributed in the hope that it will be useful,
1327 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1328 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1329 - * GNU General Public License for more details.
1330 - *
1331 - * Or, alternatively,
1332 - *
1333 - * b) Permission is hereby granted, free of charge, to any person
1334 - * obtaining a copy of this software and associated documentation
1335 - * files (the "Software"), to deal in the Software without
1336 - * restriction, including without limitation the rights to use,
1337 - * copy, modify, merge, publish, distribute, sublicense, and/or
1338 - * sell copies of the Software, and to permit persons to whom the
1339 - * Software is furnished to do so, subject to the following
1340 - * conditions:
1341 - *
1342 - * The above copyright notice and this permission notice shall be
1343 - * included in all copies or substantial portions of the Software.
1344 - *
1345 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1346 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1347 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1348 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1349 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1350 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1351 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1352 - * OTHER DEALINGS IN THE SOFTWARE.
1353 */
1354 /dts-v1/;
1355
1356 @@ -49,6 +13,11 @@
1357 model = "LS1012A QDS Board";
1358 compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
1359
1360 + aliases {
1361 + ethernet0 = &pfe_mac0;
1362 + ethernet1 = &pfe_mac1;
1363 + };
1364 +
1365 sys_mclk: clock-mclk {
1366 compatible = "fixed-clock";
1367 #clock-cells = <0>;
1368 @@ -93,6 +62,43 @@
1369 };
1370 };
1371
1372 +&pcie {
1373 + status = "okay";
1374 +};
1375 +
1376 +&dspi {
1377 + bus-num = <0>;
1378 + status = "okay";
1379 +
1380 + flash@0 {
1381 + #address-cells = <1>;
1382 + #size-cells = <1>;
1383 + compatible = "n25q128a11", "jedec,spi-nor";
1384 + reg = <0>;
1385 + spi-max-frequency = <10000000>;
1386 + };
1387 +
1388 + flash@1 {
1389 + #address-cells = <1>;
1390 + #size-cells = <1>;
1391 + compatible = "sst25wf040b", "jedec,spi-nor";
1392 + spi-cpol;
1393 + spi-cpha;
1394 + reg = <1>;
1395 + spi-max-frequency = <10000000>;
1396 + };
1397 +
1398 + flash@2 {
1399 + #address-cells = <1>;
1400 + #size-cells = <1>;
1401 + compatible = "en25s64", "jedec,spi-nor";
1402 + spi-cpol;
1403 + spi-cpha;
1404 + reg = <2>;
1405 + spi-max-frequency = <10000000>;
1406 + };
1407 +};
1408 +
1409 &duart0 {
1410 status = "okay";
1411 };
1412 @@ -131,6 +137,47 @@
1413 };
1414 };
1415
1416 +&pfe {
1417 + status = "okay";
1418 + #address-cells = <1>;
1419 + #size-cells = <0>;
1420 +
1421 + pfe_mac0: ethernet@0 {
1422 + compatible = "fsl,pfe-gemac-port";
1423 + #address-cells = <1>;
1424 + #size-cells = <0>;
1425 + reg = <0x0>; /* GEM_ID */
1426 + fsl,mdio-mux-val = <0x2>;
1427 + phy-mode = "sgmii-2500";
1428 + phy-handle = <&sgmii_phy1>;
1429 + };
1430 +
1431 + pfe_mac1: ethernet@1 {
1432 + compatible = "fsl,pfe-gemac-port";
1433 + #address-cells = <1>;
1434 + #size-cells = <0>;
1435 + reg = <0x1>; /* GEM_ID */
1436 + fsl,mdio-mux-val = <0x3>;
1437 + phy-mode = "sgmii-2500";
1438 + phy-handle = <&sgmii_phy2>;
1439 + };
1440 +
1441 + mdio@0 {
1442 + #address-cells = <1>;
1443 + #size-cells = <0>;
1444 +
1445 + sgmii_phy1: ethernet-phy@1 {
1446 + compatible = "ethernet-phy-ieee802.3-c45";
1447 + reg = <0x1>;
1448 + };
1449 +
1450 + sgmii_phy2: ethernet-phy@2 {
1451 + compatible = "ethernet-phy-ieee802.3-c45";
1452 + reg = <0x2>;
1453 + };
1454 + };
1455 +};
1456 +
1457 &sai2 {
1458 status = "okay";
1459 };
1460 @@ -138,3 +185,18 @@
1461 &sata {
1462 status = "okay";
1463 };
1464 +
1465 +&qspi {
1466 + status = "okay";
1467 + qflash0: s25fs512s@0 {
1468 + compatible = "spansion,m25p80";
1469 + #address-cells = <1>;
1470 + #size-cells = <1>;
1471 + spi-max-frequency = <20000000>;
1472 + m25p,fast-read;
1473 + reg = <0>;
1474 + spi-rx-bus-width = <2>;
1475 + spi-tx-bus-width = <2>;
1476 + };
1477 +
1478 +};
1479 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1480 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1481 @@ -1,45 +1,9 @@
1482 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1483 /*
1484 * Device Tree file for Freescale LS1012A RDB Board.
1485 *
1486 * Copyright 2016 Freescale Semiconductor, Inc.
1487 *
1488 - * This file is dual-licensed: you can use it either under the terms
1489 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1490 - * licensing only applies to this file, and not this project as a
1491 - * whole.
1492 - *
1493 - * a) This library is free software; you can redistribute it and/or
1494 - * modify it under the terms of the GNU General Public License as
1495 - * published by the Free Software Foundation; either version 2 of the
1496 - * License, or (at your option) any later version.
1497 - *
1498 - * This library is distributed in the hope that it will be useful,
1499 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1500 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1501 - * GNU General Public License for more details.
1502 - *
1503 - * Or, alternatively,
1504 - *
1505 - * b) Permission is hereby granted, free of charge, to any person
1506 - * obtaining a copy of this software and associated documentation
1507 - * files (the "Software"), to deal in the Software without
1508 - * restriction, including without limitation the rights to use,
1509 - * copy, modify, merge, publish, distribute, sublicense, and/or
1510 - * sell copies of the Software, and to permit persons to whom the
1511 - * Software is furnished to do so, subject to the following
1512 - * conditions:
1513 - *
1514 - * The above copyright notice and this permission notice shall be
1515 - * included in all copies or substantial portions of the Software.
1516 - *
1517 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1518 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1519 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1520 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1521 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1522 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1523 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1524 - * OTHER DEALINGS IN THE SOFTWARE.
1525 */
1526 /dts-v1/;
1527
1528 @@ -48,6 +12,15 @@
1529 / {
1530 model = "LS1012A RDB Board";
1531 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1532 +
1533 + aliases {
1534 + ethernet0 = &pfe_mac0;
1535 + ethernet1 = &pfe_mac1;
1536 + };
1537 +};
1538 +
1539 +&pcie {
1540 + status = "okay";
1541 };
1542
1543 &duart0 {
1544 @@ -74,3 +47,56 @@
1545 &sata {
1546 status = "okay";
1547 };
1548 +
1549 +&pfe {
1550 + status = "okay";
1551 + #address-cells = <1>;
1552 + #size-cells = <0>;
1553 +
1554 + pfe_mac0: ethernet@0 {
1555 + compatible = "fsl,pfe-gemac-port";
1556 + #address-cells = <1>;
1557 + #size-cells = <0>;
1558 + reg = <0x0>; /* GEM_ID */
1559 + fsl,mdio-mux-val = <0x0>;
1560 + phy-mode = "sgmii";
1561 + phy-handle = <&sgmii_phy>;
1562 + };
1563 +
1564 + pfe_mac1: ethernet@1 {
1565 + compatible = "fsl,pfe-gemac-port";
1566 + #address-cells = <1>;
1567 + #size-cells = <0>;
1568 + reg = <0x1>; /* GEM_ID */
1569 + fsl,mdio-mux-val = <0x0>;
1570 + phy-mode = "rgmii-txid";
1571 + phy-handle = <&rgmii_phy>;
1572 + };
1573 + mdio@0 {
1574 + #address-cells = <1>;
1575 + #size-cells = <0>;
1576 +
1577 + sgmii_phy: ethernet-phy@2 {
1578 + reg = <0x2>;
1579 + };
1580 +
1581 + rgmii_phy: ethernet-phy@1 {
1582 + reg = <0x1>;
1583 + };
1584 + };
1585 +};
1586 +
1587 +&qspi {
1588 + status = "okay";
1589 + qflash0: s25fs512s@0 {
1590 + compatible = "spansion,m25p80";
1591 + #address-cells = <1>;
1592 + #size-cells = <1>;
1593 + spi-max-frequency = <20000000>;
1594 + m25p,fast-read;
1595 + reg = <0>;
1596 + spi-rx-bus-width = <2>;
1597 + spi-tx-bus-width = <2>;
1598 + };
1599 +
1600 +};
1601 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1602 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1603 @@ -1,45 +1,9 @@
1604 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1605 /*
1606 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1607 *
1608 * Copyright 2016 Freescale Semiconductor, Inc.
1609 *
1610 - * This file is dual-licensed: you can use it either under the terms
1611 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1612 - * licensing only applies to this file, and not this project as a
1613 - * whole.
1614 - *
1615 - * a) This library is free software; you can redistribute it and/or
1616 - * modify it under the terms of the GNU General Public License as
1617 - * published by the Free Software Foundation; either version 2 of the
1618 - * License, or (at your option) any later version.
1619 - *
1620 - * This library is distributed in the hope that it will be useful,
1621 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1622 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1623 - * GNU General Public License for more details.
1624 - *
1625 - * Or, alternatively,
1626 - *
1627 - * b) Permission is hereby granted, free of charge, to any person
1628 - * obtaining a copy of this software and associated documentation
1629 - * files (the "Software"), to deal in the Software without
1630 - * restriction, including without limitation the rights to use,
1631 - * copy, modify, merge, publish, distribute, sublicense, and/or
1632 - * sell copies of the Software, and to permit persons to whom the
1633 - * Software is furnished to do so, subject to the following
1634 - * conditions:
1635 - *
1636 - * The above copyright notice and this permission notice shall be
1637 - * included in all copies or substantial portions of the Software.
1638 - *
1639 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1640 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1641 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1642 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1643 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1644 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1645 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1646 - * OTHER DEALINGS IN THE SOFTWARE.
1647 */
1648
1649 #include <dt-bindings/interrupt-controller/arm-gic.h>
1650 @@ -64,12 +28,30 @@
1651 #address-cells = <1>;
1652 #size-cells = <0>;
1653
1654 - cpu0: cpu@0 {
1655 + cooling_map0: cpu0: cpu@0 {
1656 device_type = "cpu";
1657 compatible = "arm,cortex-a53";
1658 reg = <0x0>;
1659 clocks = <&clockgen 1 0>;
1660 #cooling-cells = <2>;
1661 + cpu-idle-states = <&CPU_PH20>;
1662 + };
1663 + };
1664 +
1665 + idle-states {
1666 + /*
1667 + * PSCI node is not added default, U-boot will add missing
1668 + * parts if it determines to use PSCI.
1669 + */
1670 + entry-method = "arm,psci";
1671 +
1672 + CPU_PH20: cpu-ph20 {
1673 + compatible = "arm,idle-state";
1674 + idle-state-name = "PH20";
1675 + arm,psci-suspend-param = <0x0>;
1676 + entry-latency-us = <1000>;
1677 + exit-latency-us = <1000>;
1678 + min-residency-us = <3000>;
1679 };
1680 };
1681
1682 @@ -247,7 +229,7 @@
1683 dcfg: dcfg@1ee0000 {
1684 compatible = "fsl,ls1012a-dcfg",
1685 "syscon";
1686 - reg = <0x0 0x1ee0000 0x0 0x10000>;
1687 + reg = <0x0 0x1ee0000 0x0 0x1000>;
1688 big-endian;
1689 };
1690
1691 @@ -304,44 +286,25 @@
1692 #thermal-sensor-cells = <1>;
1693 };
1694
1695 - thermal-zones {
1696 - cpu_thermal: cpu-thermal {
1697 - polling-delay-passive = <1000>;
1698 - polling-delay = <5000>;
1699 - thermal-sensors = <&tmu 0>;
1700 -
1701 - trips {
1702 - cpu_alert: cpu-alert {
1703 - temperature = <85000>;
1704 - hysteresis = <2000>;
1705 - type = "passive";
1706 - };
1707 -
1708 - cpu_crit: cpu-crit {
1709 - temperature = <95000>;
1710 - hysteresis = <2000>;
1711 - type = "critical";
1712 - };
1713 - };
1714 + #include "fsl-tmu.dtsi"
1715
1716 - cooling-maps {
1717 - map0 {
1718 - trip = <&cpu_alert>;
1719 - cooling-device =
1720 - <&cpu0 THERMAL_NO_LIMIT
1721 - THERMAL_NO_LIMIT>;
1722 - };
1723 - };
1724 - };
1725 + ftm0: ftm0@29d0000 {
1726 + compatible = "fsl,ls1012a-ftm-alarm";
1727 + reg = <0x0 0x29d0000 0x0 0x10000>,
1728 + <0x0 0x1ee2140 0x0 0x4>;
1729 + reg-names = "ftm", "pmctrl";
1730 + interrupts = <0 86 0x4>;
1731 + big-endian;
1732 };
1733
1734 i2c0: i2c@2180000 {
1735 - compatible = "fsl,vf610-i2c";
1736 + compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c";
1737 #address-cells = <1>;
1738 #size-cells = <0>;
1739 reg = <0x0 0x2180000 0x0 0x10000>;
1740 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1741 - clocks = <&clockgen 4 0>;
1742 + clocks = <&clockgen 4 3>;
1743 + scl-gpios = <&gpio0 13 0>;
1744 status = "disabled";
1745 };
1746
1747 @@ -351,7 +314,20 @@
1748 #size-cells = <0>;
1749 reg = <0x0 0x2190000 0x0 0x10000>;
1750 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1751 + clocks = <&clockgen 4 3>;
1752 + status = "disabled";
1753 + };
1754 +
1755 + dspi: dspi@2100000 {
1756 + compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
1757 + #address-cells = <1>;
1758 + #size-cells = <0>;
1759 + reg = <0x0 0x2100000 0x0 0x10000>;
1760 + interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
1761 + clock-names = "dspi";
1762 clocks = <&clockgen 4 0>;
1763 + spi-num-chipselects = <5>;
1764 + big-endian;
1765 status = "disabled";
1766 };
1767
1768 @@ -400,6 +376,20 @@
1769 big-endian;
1770 };
1771
1772 + qspi: quadspi@1550000 {
1773 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1774 + #address-cells = <1>;
1775 + #size-cells = <0>;
1776 + reg = <0x0 0x1550000 0x0 0x10000>,
1777 + <0x0 0x40000000 0x0 0x10000000>;
1778 + reg-names = "QuadSPI", "QuadSPI-memory";
1779 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1780 + clock-names = "qspi_en", "qspi";
1781 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1782 + big-endian;
1783 + status = "disabled";
1784 + };
1785 +
1786 sai1: sai@2b50000 {
1787 #sound-dai-cells = <0>;
1788 compatible = "fsl,vf610-sai";
1789 @@ -451,6 +441,8 @@
1790 dr_mode = "host";
1791 snps,quirk-frame-length-adjustment = <0x20>;
1792 snps,dis_rxdet_inp3_quirk;
1793 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1794 + snps,host-vbus-glitches;
1795 };
1796
1797 sata: sata@3200000 {
1798 @@ -471,5 +463,85 @@
1799 dr_mode = "host";
1800 phy_type = "ulpi";
1801 };
1802 +
1803 + msi: msi-controller1@1572000 {
1804 + compatible = "fsl,ls1012a-msi";
1805 + reg = <0x0 0x1572000 0x0 0x8>;
1806 + msi-controller;
1807 + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
1808 + };
1809 +
1810 + pcie: pcie@3400000 {
1811 + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
1812 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
1813 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
1814 + reg-names = "regs", "config";
1815 + interrupts = <0 118 0x4>, /* AER interrupt */
1816 + <0 117 0x4>; /* PME interrupt */
1817 + interrupt-names = "aer", "pme";
1818 + #address-cells = <3>;
1819 + #size-cells = <2>;
1820 + device_type = "pci";
1821 + num-lanes = <4>;
1822 + bus-range = <0x0 0xff>;
1823 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
1824 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1825 + msi-parent = <&msi>;
1826 + #interrupt-cells = <1>;
1827 + interrupt-map-mask = <0 0 0 7>;
1828 + interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
1829 + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
1830 + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
1831 + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
1832 + status = "disabled";
1833 + };
1834 +
1835 + rcpm: rcpm@1ee2000 {
1836 + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
1837 + reg = <0x0 0x1ee2000 0x0 0x1000>;
1838 + fsl,#rcpm-wakeup-cells = <1>;
1839 + };
1840 + };
1841 +
1842 + reserved-memory {
1843 + #address-cells = <2>;
1844 + #size-cells = <2>;
1845 + ranges;
1846 +
1847 + pfe_reserved: packetbuffer@83400000 {
1848 + reg = <0 0x83400000 0 0xc00000>;
1849 + };
1850 + };
1851 +
1852 + pfe: pfe@04000000 {
1853 + compatible = "fsl,pfe";
1854 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
1855 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
1856 + reg-names = "pfe", "pfe-ddr";
1857 + fsl,pfe-num-interfaces = <0x2>;
1858 + interrupts = <0 172 0x4>, /* HIF interrupt */
1859 + <0 173 0x4>, /*HIF_NOCPY interrupt */
1860 + <0 174 0x4>; /* WoL interrupt */
1861 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
1862 + memory-region = <&pfe_reserved>;
1863 + fsl,pfe-scfg = <&scfg 0>;
1864 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
1865 + clocks = <&clockgen 4 0>;
1866 + clock-names = "pfe";
1867 +
1868 + status = "okay";
1869 + };
1870 +
1871 + firmware {
1872 + optee {
1873 + compatible = "linaro,optee-tz";
1874 + method = "smc";
1875 + };
1876 + };
1877 +};
1878 +
1879 +&thermal_zones {
1880 + thermal-zone0 {
1881 + status = "okay";
1882 };
1883 };
1884 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1885 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1886 @@ -1,9 +1,8 @@
1887 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1888 /*
1889 * QorIQ FMan v3 device tree nodes for ls1043
1890 *
1891 * Copyright 2015-2016 Freescale Semiconductor Inc.
1892 - *
1893 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1894 */
1895
1896 &soc {
1897 --- /dev/null
1898 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
1899 @@ -0,0 +1,263 @@
1900 +/*
1901 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
1902 + *
1903 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
1904 + *
1905 + * Mingkai Hu <Mingkai.hu@freescale.com>
1906 + *
1907 + * This file is dual-licensed: you can use it either under the terms
1908 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1909 + * licensing only applies to this file, and not this project as a
1910 + * whole.
1911 + *
1912 + * a) This library is free software; you can redistribute it and/or
1913 + * modify it under the terms of the GNU General Public License as
1914 + * published by the Free Software Foundation; either version 2 of the
1915 + * License, or (at your option) any later version.
1916 + *
1917 + * This library is distributed in the hope that it will be useful,
1918 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1919 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1920 + * GNU General Public License for more details.
1921 + *
1922 + * Or, alternatively,
1923 + *
1924 + * b) Permission is hereby granted, free of charge, to any person
1925 + * obtaining a copy of this software and associated documentation
1926 + * files (the "Software"), to deal in the Software without
1927 + * restriction, including without limitation the rights to use,
1928 + * copy, modify, merge, publish, distribute, sublicense, and/or
1929 + * sell copies of the Software, and to permit persons to whom the
1930 + * Software is furnished to do so, subject to the following
1931 + * conditions:
1932 + *
1933 + * The above copyright notice and this permission notice shall be
1934 + * included in all copies or substantial portions of the Software.
1935 + *
1936 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1937 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1938 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1939 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1940 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1941 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1942 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1943 + * OTHER DEALINGS IN THE SOFTWARE.
1944 + */
1945 +
1946 +#include "fsl-ls1043a-qds.dts"
1947 +#include "qoriq-qman-portals-sdk.dtsi"
1948 +#include "qoriq-bman-portals-sdk.dtsi"
1949 +
1950 +&bman_fbpr {
1951 + compatible = "fsl,bman-fbpr";
1952 + alloc-ranges = <0 0 0x10000 0>;
1953 +};
1954 +&qman_fqd {
1955 + compatible = "fsl,qman-fqd";
1956 + alloc-ranges = <0 0 0x10000 0>;
1957 +};
1958 +&qman_pfdr {
1959 + compatible = "fsl,qman-pfdr";
1960 + alloc-ranges = <0 0 0x10000 0>;
1961 +};
1962 +
1963 +&soc {
1964 +/delete-property/ dma-coherent;
1965 +
1966 +#include "qoriq-dpaa-eth.dtsi"
1967 +#include "qoriq-fman3-0-6oh.dtsi"
1968 +
1969 +pcie@3400000 {
1970 + /delete-property/ iommu-map;
1971 + dma-coherent;
1972 +};
1973 +
1974 +pcie@3500000 {
1975 + /delete-property/ iommu-map;
1976 + dma-coherent;
1977 +};
1978 +
1979 +pcie@3600000 {
1980 + /delete-property/ iommu-map;
1981 + dma-coherent;
1982 +};
1983 +
1984 +/delete-node/ iommu@9000000;
1985 +};
1986 +
1987 +&fman0 {
1988 + compatible = "fsl,fman", "simple-bus";
1989 + dma-coherent;
1990 +};
1991 +
1992 +&clockgen {
1993 + dma-coherent;
1994 +};
1995 +
1996 +&scfg {
1997 + dma-coherent;
1998 +};
1999 +
2000 +&crypto {
2001 + dma-coherent;
2002 +};
2003 +
2004 +&dcfg {
2005 + dma-coherent;
2006 +};
2007 +
2008 +&ifc {
2009 + dma-coherent;
2010 +};
2011 +
2012 +&qspi {
2013 + dma-coherent;
2014 +};
2015 +
2016 +&esdhc {
2017 + dma-coherent;
2018 +};
2019 +
2020 +&ddr {
2021 + dma-coherent;
2022 +};
2023 +
2024 +&tmu {
2025 + dma-coherent;
2026 +};
2027 +
2028 +&qman {
2029 + dma-coherent;
2030 +};
2031 +
2032 +&bman {
2033 + dma-coherent;
2034 +};
2035 +
2036 +&bportals {
2037 + dma-coherent;
2038 +};
2039 +
2040 +&qportals {
2041 + dma-coherent;
2042 +};
2043 +
2044 +&dspi0 {
2045 + dma-coherent;
2046 +};
2047 +
2048 +&dspi1 {
2049 + dma-coherent;
2050 +};
2051 +
2052 +&i2c0 {
2053 + dma-coherent;
2054 +};
2055 +
2056 +&i2c1 {
2057 + dma-coherent;
2058 +};
2059 +
2060 +&i2c2 {
2061 + dma-coherent;
2062 +};
2063 +
2064 +&i2c3 {
2065 + dma-coherent;
2066 +};
2067 +
2068 +&duart0 {
2069 + dma-coherent;
2070 +};
2071 +
2072 +&duart1 {
2073 + dma-coherent;
2074 +};
2075 +
2076 +&duart2 {
2077 + dma-coherent;
2078 +};
2079 +
2080 +&duart3 {
2081 + dma-coherent;
2082 +};
2083 +
2084 +&gpio1 {
2085 + dma-coherent;
2086 +};
2087 +
2088 +&gpio2 {
2089 + dma-coherent;
2090 +};
2091 +
2092 +&gpio3 {
2093 + dma-coherent;
2094 +};
2095 +
2096 +&gpio4 {
2097 + dma-coherent;
2098 +};
2099 +
2100 +&uqe {
2101 + dma-coherent;
2102 +};
2103 +
2104 +&lpuart0 {
2105 + dma-coherent;
2106 +};
2107 +
2108 +&lpuart1 {
2109 + dma-coherent;
2110 +};
2111 +
2112 +&lpuart2 {
2113 + dma-coherent;
2114 +};
2115 +
2116 +&lpuart3 {
2117 + dma-coherent;
2118 +};
2119 +
2120 +&lpuart4 {
2121 + dma-coherent;
2122 +};
2123 +
2124 +&lpuart5 {
2125 + dma-coherent;
2126 +};
2127 +
2128 +&ftm0 {
2129 + dma-coherent;
2130 +};
2131 +
2132 +&wdog0 {
2133 + dma-coherent;
2134 +};
2135 +
2136 +&edma0 {
2137 + dma-coherent;
2138 +};
2139 +
2140 +&qdma {
2141 + dma-coherent;
2142 +};
2143 +
2144 +&msi1 {
2145 + dma-coherent;
2146 +};
2147 +
2148 +&msi2 {
2149 + dma-coherent;
2150 +};
2151 +
2152 +&msi3 {
2153 + dma-coherent;
2154 +};
2155 +
2156 +&ptp_timer0 {
2157 + dma-coherent;
2158 +};
2159 +
2160 +&fsldpaa {
2161 + dma-coherent;
2162 +};
2163 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2164 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2165 @@ -1,47 +1,10 @@
2166 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2167 /*
2168 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2169 *
2170 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2171 *
2172 * Mingkai Hu <Mingkai.hu@freescale.com>
2173 - *
2174 - * This file is dual-licensed: you can use it either under the terms
2175 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2176 - * licensing only applies to this file, and not this project as a
2177 - * whole.
2178 - *
2179 - * a) This library is free software; you can redistribute it and/or
2180 - * modify it under the terms of the GNU General Public License as
2181 - * published by the Free Software Foundation; either version 2 of the
2182 - * License, or (at your option) any later version.
2183 - *
2184 - * This library is distributed in the hope that it will be useful,
2185 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2186 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2187 - * GNU General Public License for more details.
2188 - *
2189 - * Or, alternatively,
2190 - *
2191 - * b) Permission is hereby granted, free of charge, to any person
2192 - * obtaining a copy of this software and associated documentation
2193 - * files (the "Software"), to deal in the Software without
2194 - * restriction, including without limitation the rights to use,
2195 - * copy, modify, merge, publish, distribute, sublicense, and/or
2196 - * sell copies of the Software, and to permit persons to whom the
2197 - * Software is furnished to do so, subject to the following
2198 - * conditions:
2199 - *
2200 - * The above copyright notice and this permission notice shall be
2201 - * included in all copies or substantial portions of the Software.
2202 - *
2203 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2204 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2205 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2206 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2207 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2208 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2209 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2210 - * OTHER DEALINGS IN THE SOFTWARE.
2211 */
2212
2213 /dts-v1/;
2214 @@ -60,6 +23,22 @@
2215 serial1 = &duart1;
2216 serial2 = &duart2;
2217 serial3 = &duart3;
2218 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
2219 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
2220 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
2221 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
2222 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
2223 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
2224 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
2225 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
2226 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
2227 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
2228 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
2229 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
2230 + emi1_slot1 = &ls1043mdio_s1;
2231 + emi1_slot2 = &ls1043mdio_s2;
2232 + emi1_slot3 = &ls1043mdio_s3;
2233 + emi1_slot4 = &ls1043mdio_s4;
2234 };
2235
2236 chosen {
2237 @@ -97,8 +76,11 @@
2238 };
2239
2240 fpga: board-control@2,0 {
2241 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
2242 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
2243 reg = <0x2 0x0 0x0000100>;
2244 + #address-cells = <1>;
2245 + #size-cells = <1>;
2246 + ranges = <0 2 0 0x100>;
2247 };
2248 };
2249
2250 @@ -179,7 +161,153 @@
2251 #size-cells = <1>;
2252 spi-max-frequency = <20000000>;
2253 reg = <0>;
2254 + spi-rx-bus-width = <4>;
2255 + spi-tx-bus-width = <4>;
2256 };
2257 };
2258
2259 #include "fsl-ls1043-post.dtsi"
2260 +
2261 +&fman0 {
2262 + ethernet@e0000 {
2263 + phy-handle = <&qsgmii_phy_s2_p1>;
2264 + phy-connection-type = "sgmii";
2265 + };
2266 +
2267 + ethernet@e2000 {
2268 + phy-handle = <&qsgmii_phy_s2_p2>;
2269 + phy-connection-type = "sgmii";
2270 + };
2271 +
2272 + ethernet@e4000 {
2273 + phy-handle = <&rgmii_phy1>;
2274 + phy-connection-type = "rgmii";
2275 + };
2276 +
2277 + ethernet@e6000 {
2278 + phy-handle = <&rgmii_phy2>;
2279 + phy-connection-type = "rgmii";
2280 + };
2281 +
2282 + ethernet@e8000 {
2283 + phy-handle = <&qsgmii_phy_s2_p3>;
2284 + phy-connection-type = "sgmii";
2285 + };
2286 +
2287 + ethernet@ea000 {
2288 + phy-handle = <&qsgmii_phy_s2_p4>;
2289 + phy-connection-type = "sgmii";
2290 + };
2291 +
2292 + ethernet@f0000 { /* DTSEC9/10GEC1 */
2293 + fixed-link = <1 1 10000 0 0>;
2294 + phy-connection-type = "xgmii";
2295 + };
2296 +};
2297 +
2298 +&fpga {
2299 + mdio-mux-emi1 {
2300 + compatible = "mdio-mux-mmioreg", "mdio-mux";
2301 + mdio-parent-bus = <&mdio0>;
2302 + #address-cells = <1>;
2303 + #size-cells = <0>;
2304 + reg = <0x54 1>; /* BRDCFG4 */
2305 + mux-mask = <0xe0>; /* EMI1 */
2306 +
2307 + /* On-board RGMII1 PHY */
2308 + ls1043mdio0: mdio@0 {
2309 + reg = <0>;
2310 + #address-cells = <1>;
2311 + #size-cells = <0>;
2312 +
2313 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
2314 + reg = <0x1>;
2315 + };
2316 + };
2317 +
2318 + /* On-board RGMII2 PHY */
2319 + ls1043mdio1: mdio@1 {
2320 + reg = <0x20>;
2321 + #address-cells = <1>;
2322 + #size-cells = <0>;
2323 +
2324 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
2325 + reg = <0x2>;
2326 + };
2327 + };
2328 +
2329 + /* Slot 1 */
2330 + ls1043mdio_s1: mdio@2 {
2331 + reg = <0x40>;
2332 + #address-cells = <1>;
2333 + #size-cells = <0>;
2334 + status = "disabled";
2335 +
2336 + qsgmii_phy_s1_p1: ethernet-phy@4 {
2337 + reg = <0x4>;
2338 + };
2339 + qsgmii_phy_s1_p2: ethernet-phy@5 {
2340 + reg = <0x5>;
2341 + };
2342 + qsgmii_phy_s1_p3: ethernet-phy@6 {
2343 + reg = <0x6>;
2344 + };
2345 + qsgmii_phy_s1_p4: ethernet-phy@7 {
2346 + reg = <0x7>;
2347 + };
2348 +
2349 + sgmii_phy_s1_p1: ethernet-phy@1c {
2350 + reg = <0x1c>;
2351 + };
2352 + };
2353 +
2354 + /* Slot 2 */
2355 + ls1043mdio_s2: mdio@3 {
2356 + reg = <0x60>;
2357 + #address-cells = <1>;
2358 + #size-cells = <0>;
2359 + status = "disabled";
2360 +
2361 + qsgmii_phy_s2_p1: ethernet-phy@8 {
2362 + reg = <0x8>;
2363 + };
2364 + qsgmii_phy_s2_p2: ethernet-phy@9 {
2365 + reg = <0x9>;
2366 + };
2367 + qsgmii_phy_s2_p3: ethernet-phy@a {
2368 + reg = <0xa>;
2369 + };
2370 + qsgmii_phy_s2_p4: ethernet-phy@b {
2371 + reg = <0xb>;
2372 + };
2373 +
2374 + sgmii_phy_s2_p1: ethernet-phy@1c {
2375 + reg = <0x1c>;
2376 + };
2377 + };
2378 +
2379 + /* Slot 3 */
2380 + ls1043mdio_s3: mdio@4 {
2381 + reg = <0x80>;
2382 + #address-cells = <1>;
2383 + #size-cells = <0>;
2384 + status = "disabled";
2385 +
2386 + sgmii_phy_s3_p1: ethernet-phy@1c {
2387 + reg = <0x1c>;
2388 + };
2389 + };
2390 +
2391 + /* Slot 4 */
2392 + ls1043mdio_s4: mdio@5 {
2393 + reg = <0xa0>;
2394 + #address-cells = <1>;
2395 + #size-cells = <0>;
2396 + status = "disabled";
2397 +
2398 + sgmii_phy_s4_p1: ethernet-phy@1c {
2399 + reg = <0x1c>;
2400 + };
2401 + };
2402 + };
2403 +};
2404 --- /dev/null
2405 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2406 @@ -0,0 +1,262 @@
2407 +/*
2408 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2409 + *
2410 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2411 + *
2412 + * Mingkai Hu <Mingkai.hu@freescale.com>
2413 + *
2414 + * This file is dual-licensed: you can use it either under the terms
2415 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2416 + * licensing only applies to this file, and not this project as a
2417 + * whole.
2418 + *
2419 + * a) This library is free software; you can redistribute it and/or
2420 + * modify it under the terms of the GNU General Public License as
2421 + * published by the Free Software Foundation; either version 2 of the
2422 + * License, or (at your option) any later version.
2423 + *
2424 + * This library is distributed in the hope that it will be useful,
2425 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2426 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2427 + * GNU General Public License for more details.
2428 + *
2429 + * Or, alternatively,
2430 + *
2431 + * b) Permission is hereby granted, free of charge, to any person
2432 + * obtaining a copy of this software and associated documentation
2433 + * files (the "Software"), to deal in the Software without
2434 + * restriction, including without limitation the rights to use,
2435 + * copy, modify, merge, publish, distribute, sublicense, and/or
2436 + * sell copies of the Software, and to permit persons to whom the
2437 + * Software is furnished to do so, subject to the following
2438 + * conditions:
2439 + *
2440 + * The above copyright notice and this permission notice shall be
2441 + * included in all copies or substantial portions of the Software.
2442 + *
2443 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2444 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2445 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2446 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2447 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2448 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2449 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2450 + * OTHER DEALINGS IN THE SOFTWARE.
2451 + */
2452 +
2453 +#include "fsl-ls1043a-rdb.dts"
2454 +#include "qoriq-qman-portals-sdk.dtsi"
2455 +#include "qoriq-bman-portals-sdk.dtsi"
2456 +
2457 +&bman_fbpr {
2458 + compatible = "fsl,bman-fbpr";
2459 + alloc-ranges = <0 0 0x10000 0>;
2460 +};
2461 +&qman_fqd {
2462 + compatible = "fsl,qman-fqd";
2463 + alloc-ranges = <0 0 0x10000 0>;
2464 +};
2465 +&qman_pfdr {
2466 + compatible = "fsl,qman-pfdr";
2467 + alloc-ranges = <0 0 0x10000 0>;
2468 +};
2469 +
2470 +&soc {
2471 +/delete-property/ dma-coherent;
2472 +
2473 +#include "qoriq-dpaa-eth.dtsi"
2474 +#include "qoriq-fman3-0-6oh.dtsi"
2475 +
2476 +pcie@3400000 {
2477 + /delete-property/ iommu-map;
2478 + dma-coherent;
2479 +};
2480 +
2481 +pcie@3500000 {
2482 + /delete-property/ iommu-map;
2483 + dma-coherent;
2484 +};
2485 +
2486 +pcie@3600000 {
2487 + /delete-property/ iommu-map;
2488 + dma-coherent;
2489 +};
2490 +
2491 +/delete-node/ iommu@9000000;
2492 +};
2493 +
2494 +&fman0 {
2495 + compatible = "fsl,fman", "simple-bus";
2496 +};
2497 +
2498 +&clockgen {
2499 + dma-coherent;
2500 +};
2501 +
2502 +&scfg {
2503 + dma-coherent;
2504 +};
2505 +
2506 +&crypto {
2507 + dma-coherent;
2508 +};
2509 +
2510 +&dcfg {
2511 + dma-coherent;
2512 +};
2513 +
2514 +&ifc {
2515 + dma-coherent;
2516 +};
2517 +
2518 +&qspi {
2519 + dma-coherent;
2520 +};
2521 +
2522 +&esdhc {
2523 + dma-coherent;
2524 +};
2525 +
2526 +&ddr {
2527 + dma-coherent;
2528 +};
2529 +
2530 +&tmu {
2531 + dma-coherent;
2532 +};
2533 +
2534 +&qman {
2535 + dma-coherent;
2536 +};
2537 +
2538 +&bman {
2539 + dma-coherent;
2540 +};
2541 +
2542 +&bportals {
2543 + dma-coherent;
2544 +};
2545 +
2546 +&qportals {
2547 + dma-coherent;
2548 +};
2549 +
2550 +&dspi0 {
2551 + dma-coherent;
2552 +};
2553 +
2554 +&dspi1 {
2555 + dma-coherent;
2556 +};
2557 +
2558 +&i2c0 {
2559 + dma-coherent;
2560 +};
2561 +
2562 +&i2c1 {
2563 + dma-coherent;
2564 +};
2565 +
2566 +&i2c2 {
2567 + dma-coherent;
2568 +};
2569 +
2570 +&i2c3 {
2571 + dma-coherent;
2572 +};
2573 +
2574 +&duart0 {
2575 + dma-coherent;
2576 +};
2577 +
2578 +&duart1 {
2579 + dma-coherent;
2580 +};
2581 +
2582 +&duart2 {
2583 + dma-coherent;
2584 +};
2585 +
2586 +&duart3 {
2587 + dma-coherent;
2588 +};
2589 +
2590 +&gpio1 {
2591 + dma-coherent;
2592 +};
2593 +
2594 +&gpio2 {
2595 + dma-coherent;
2596 +};
2597 +
2598 +&gpio3 {
2599 + dma-coherent;
2600 +};
2601 +
2602 +&gpio4 {
2603 + dma-coherent;
2604 +};
2605 +
2606 +&lpuart0 {
2607 + dma-coherent;
2608 +};
2609 +
2610 +&lpuart1 {
2611 + dma-coherent;
2612 +};
2613 +
2614 +&lpuart2 {
2615 + dma-coherent;
2616 +};
2617 +
2618 +&lpuart3 {
2619 + dma-coherent;
2620 +};
2621 +
2622 +&lpuart4 {
2623 + dma-coherent;
2624 +};
2625 +
2626 +&lpuart5 {
2627 + dma-coherent;
2628 +};
2629 +
2630 +&ftm0 {
2631 + dma-coherent;
2632 +};
2633 +
2634 +&wdog0 {
2635 + dma-coherent;
2636 +};
2637 +
2638 +&edma0 {
2639 + dma-coherent;
2640 +};
2641 +
2642 +&qdma {
2643 + dma-coherent;
2644 +};
2645 +
2646 +&msi1 {
2647 + dma-coherent;
2648 +};
2649 +
2650 +&msi2 {
2651 + dma-coherent;
2652 +};
2653 +
2654 +&msi3 {
2655 + dma-coherent;
2656 +};
2657 +
2658 +&fman0 {
2659 + dma-coherent;
2660 +};
2661 +
2662 +&ptp_timer0 {
2663 + dma-coherent;
2664 +};
2665 +
2666 +&fsldpaa {
2667 + dma-coherent;
2668 +};
2669 --- /dev/null
2670 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2671 @@ -0,0 +1,140 @@
2672 +/*
2673 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2674 + *
2675 + * Copyright (C) 2014-2015, Freescale Semiconductor
2676 + *
2677 + * This file is licensed under the terms of the GNU General Public
2678 + * License version 2. This program is licensed "as is" without any
2679 + * warranty of any kind, whether express or implied.
2680 + */
2681 +
2682 +#include "fsl-ls1043a-rdb-sdk.dts"
2683 +
2684 +&soc {
2685 + bp7: buffer-pool@7 {
2686 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2687 + fsl,bpid = <7>;
2688 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2689 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2690 + dma-coherent;
2691 + };
2692 +
2693 + bp8: buffer-pool@8 {
2694 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2695 + fsl,bpid = <8>;
2696 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2697 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2698 + dma-coherent;
2699 + };
2700 +
2701 + bp9: buffer-pool@9 {
2702 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2703 + fsl,bpid = <9>;
2704 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2705 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2706 + dma-coherent;
2707 + };
2708 +
2709 + fsl,dpaa {
2710 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2711 + dma-coherent;
2712 +
2713 + ethernet@0 {
2714 + compatible = "fsl,dpa-ethernet-init";
2715 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2716 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2717 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2718 + };
2719 +
2720 + ethernet@1 {
2721 + compatible = "fsl,dpa-ethernet-init";
2722 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2723 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2724 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2725 + };
2726 +
2727 + ethernet@2 {
2728 + compatible = "fsl,dpa-ethernet-init";
2729 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2730 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2731 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2732 + };
2733 +
2734 + ethernet@3 {
2735 + compatible = "fsl,dpa-ethernet-init";
2736 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2737 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2738 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2739 + };
2740 +
2741 + ethernet@4 {
2742 + compatible = "fsl,dpa-ethernet-init";
2743 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2744 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2745 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2746 + };
2747 +
2748 + ethernet@5 {
2749 + compatible = "fsl,dpa-ethernet-init";
2750 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2751 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2752 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2753 + };
2754 +
2755 + ethernet@8 {
2756 + compatible = "fsl,dpa-ethernet-init";
2757 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2758 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2759 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2760 +
2761 + };
2762 + dpa-fman0-oh@2 {
2763 + compatible = "fsl,dpa-oh";
2764 + /* Define frame queues for the OH port*/
2765 + /* <OH Rx error, OH Rx default> */
2766 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2767 + fsl,fman-oh-port = <&fman0_oh2>;
2768 + };
2769 + };
2770 +
2771 + pcie@3400000 {
2772 + /delete-property/ iommu-map;
2773 + };
2774 +
2775 + pcie@3500000 {
2776 + /delete-property/ iommu-map;
2777 + };
2778 +
2779 + pcie@3600000 {
2780 + /delete-property/ iommu-map;
2781 + };
2782 +
2783 + /delete-node/ iommu@9000000;
2784 +};
2785 +/ {
2786 + reserved-memory {
2787 + #address-cells = <2>;
2788 + #size-cells = <2>;
2789 + ranges;
2790 +
2791 + /* For legacy usdpaa based use-cases, update the size and
2792 + alignment parameters. e.g. to allocate 256 MB memory:
2793 + size = <0 0x10000000>;
2794 + alignment = <0 0x10000000>;
2795 + */
2796 + usdpaa_mem: usdpaa_mem {
2797 + compatible = "fsl,usdpaa-mem";
2798 + alloc-ranges = <0 0 0x10000 0>;
2799 + size = <0 0x1000>;
2800 + alignment = <0 0x1000>;
2801 + };
2802 + };
2803 +};
2804 +
2805 +&fman0 {
2806 + fman0_oh2: port@83000 {
2807 + cell-index = <1>;
2808 + compatible = "fsl,fman-port-oh";
2809 + reg = <0x83000 0x1000>;
2810 + };
2811 +};
2812 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2813 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2814 @@ -1,47 +1,10 @@
2815 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2816 /*
2817 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2818 *
2819 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2820 *
2821 * Mingkai Hu <Mingkai.hu@freescale.com>
2822 - *
2823 - * This file is dual-licensed: you can use it either under the terms
2824 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2825 - * licensing only applies to this file, and not this project as a
2826 - * whole.
2827 - *
2828 - * a) This library is free software; you can redistribute it and/or
2829 - * modify it under the terms of the GNU General Public License as
2830 - * published by the Free Software Foundation; either version 2 of the
2831 - * License, or (at your option) any later version.
2832 - *
2833 - * This library is distributed in the hope that it will be useful,
2834 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2835 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2836 - * GNU General Public License for more details.
2837 - *
2838 - * Or, alternatively,
2839 - *
2840 - * b) Permission is hereby granted, free of charge, to any person
2841 - * obtaining a copy of this software and associated documentation
2842 - * files (the "Software"), to deal in the Software without
2843 - * restriction, including without limitation the rights to use,
2844 - * copy, modify, merge, publish, distribute, sublicense, and/or
2845 - * sell copies of the Software, and to permit persons to whom the
2846 - * Software is furnished to do so, subject to the following
2847 - * conditions:
2848 - *
2849 - * The above copyright notice and this permission notice shall be
2850 - * included in all copies or substantial portions of the Software.
2851 - *
2852 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2853 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2854 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2855 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2856 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2857 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2858 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2859 - * OTHER DEALINGS IN THE SOFTWARE.
2860 */
2861
2862 /dts-v1/;
2863 @@ -51,7 +14,6 @@
2864 model = "LS1043A RDB Board";
2865
2866 aliases {
2867 - crypto = &crypto;
2868 serial0 = &duart0;
2869 serial1 = &duart1;
2870 serial2 = &duart2;
2871 @@ -86,6 +48,10 @@
2872 compatible = "pericom,pt7c4338";
2873 reg = <0x68>;
2874 };
2875 + rtc@51 {
2876 + compatible = "nxp,pcf85263";
2877 + reg = <0x51>;
2878 + };
2879 };
2880
2881 &ifc {
2882 @@ -130,6 +96,38 @@
2883 reg = <0>;
2884 spi-max-frequency = <1000000>; /* input clock */
2885 };
2886 +
2887 + slic@2 {
2888 + compatible = "maxim,ds26522";
2889 + reg = <2>;
2890 + spi-max-frequency = <2000000>;
2891 + fsl,spi-cs-sck-delay = <100>;
2892 + fsl,spi-sck-cs-delay = <50>;
2893 + };
2894 +
2895 + slic@3 {
2896 + compatible = "maxim,ds26522";
2897 + reg = <3>;
2898 + spi-max-frequency = <2000000>;
2899 + fsl,spi-cs-sck-delay = <100>;
2900 + fsl,spi-sck-cs-delay = <50>;
2901 + };
2902 +};
2903 +
2904 +&uqe {
2905 + ucc_hdlc: ucc@2000 {
2906 + compatible = "fsl,ucc-hdlc";
2907 + rx-clock-name = "clk8";
2908 + tx-clock-name = "clk9";
2909 + fsl,rx-sync-clock = "rsync_pin";
2910 + fsl,tx-sync-clock = "tsync_pin";
2911 + fsl,tx-timeslot-mask = <0xfffffffe>;
2912 + fsl,rx-timeslot-mask = <0xfffffffe>;
2913 + fsl,tdm-framer-type = "e1";
2914 + fsl,tdm-id = <0>;
2915 + fsl,siram-entry-id = <0>;
2916 + fsl,tdm-interface;
2917 + };
2918 };
2919
2920 &duart0 {
2921 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2922 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2923 @@ -1,47 +1,10 @@
2924 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2925 /*
2926 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2927 *
2928 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2929 *
2930 * Mingkai Hu <Mingkai.hu@freescale.com>
2931 - *
2932 - * This file is dual-licensed: you can use it either under the terms
2933 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2934 - * licensing only applies to this file, and not this project as a
2935 - * whole.
2936 - *
2937 - * a) This library is free software; you can redistribute it and/or
2938 - * modify it under the terms of the GNU General Public License as
2939 - * published by the Free Software Foundation; either version 2 of the
2940 - * License, or (at your option) any later version.
2941 - *
2942 - * This library is distributed in the hope that it will be useful,
2943 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2944 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2945 - * GNU General Public License for more details.
2946 - *
2947 - * Or, alternatively,
2948 - *
2949 - * b) Permission is hereby granted, free of charge, to any person
2950 - * obtaining a copy of this software and associated documentation
2951 - * files (the "Software"), to deal in the Software without
2952 - * restriction, including without limitation the rights to use,
2953 - * copy, modify, merge, publish, distribute, sublicense, and/or
2954 - * sell copies of the Software, and to permit persons to whom the
2955 - * Software is furnished to do so, subject to the following
2956 - * conditions:
2957 - *
2958 - * The above copyright notice and this permission notice shall be
2959 - * included in all copies or substantial portions of the Software.
2960 - *
2961 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2962 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2963 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2964 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2965 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2966 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2967 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2968 - * OTHER DEALINGS IN THE SOFTWARE.
2969 */
2970
2971 #include <dt-bindings/thermal/thermal.h>
2972 @@ -54,6 +17,7 @@
2973 #size-cells = <2>;
2974
2975 aliases {
2976 + crypto = &crypto;
2977 fman0 = &fman0;
2978 ethernet0 = &enet0;
2979 ethernet1 = &enet1;
2980 @@ -74,13 +38,14 @@
2981 *
2982 * Currently supported enable-method is psci v0.2
2983 */
2984 - cpu0: cpu@0 {
2985 + cooling_map0: cpu0: cpu@0 {
2986 device_type = "cpu";
2987 compatible = "arm,cortex-a53";
2988 reg = <0x0>;
2989 clocks = <&clockgen 1 0>;
2990 next-level-cache = <&l2>;
2991 #cooling-cells = <2>;
2992 + cpu-idle-states = <&CPU_PH20>;
2993 };
2994
2995 cpu1: cpu@1 {
2996 @@ -89,6 +54,7 @@
2997 reg = <0x1>;
2998 clocks = <&clockgen 1 0>;
2999 next-level-cache = <&l2>;
3000 + cpu-idle-states = <&CPU_PH20>;
3001 };
3002
3003 cpu2: cpu@2 {
3004 @@ -97,6 +63,7 @@
3005 reg = <0x2>;
3006 clocks = <&clockgen 1 0>;
3007 next-level-cache = <&l2>;
3008 + cpu-idle-states = <&CPU_PH20>;
3009 };
3010
3011 cpu3: cpu@3 {
3012 @@ -105,6 +72,7 @@
3013 reg = <0x3>;
3014 clocks = <&clockgen 1 0>;
3015 next-level-cache = <&l2>;
3016 + cpu-idle-states = <&CPU_PH20>;
3017 };
3018
3019 l2: l2-cache {
3020 @@ -112,6 +80,23 @@
3021 };
3022 };
3023
3024 + idle-states {
3025 + /*
3026 + * PSCI node is not added default, U-boot will add missing
3027 + * parts if it determines to use PSCI.
3028 + */
3029 + entry-method = "arm,psci";
3030 +
3031 + CPU_PH20: cpu-ph20 {
3032 + compatible = "arm,idle-state";
3033 + idle-state-name = "PH20";
3034 + arm,psci-suspend-param = <0x0>;
3035 + entry-latency-us = <1000>;
3036 + exit-latency-us = <1000>;
3037 + min-residency-us = <3000>;
3038 + };
3039 + };
3040 +
3041 memory@80000000 {
3042 device_type = "memory";
3043 reg = <0x0 0x80000000 0 0x80000000>;
3044 @@ -196,6 +181,8 @@
3045 #address-cells = <2>;
3046 #size-cells = <2>;
3047 ranges;
3048 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
3049 + dma-coherent;
3050
3051 clockgen: clocking@1ee1000 {
3052 compatible = "fsl,ls1043a-clockgen";
3053 @@ -204,6 +191,49 @@
3054 clocks = <&sysclk>;
3055 };
3056
3057 + smmu: iommu@9000000 {
3058 + compatible = "arm,mmu-500";
3059 + reg = <0 0x9000000 0 0x400000>;
3060 + dma-coherent;
3061 + stream-match-mask = <0x7f00>;
3062 + #global-interrupts = <2>;
3063 + #iommu-cells = <1>;
3064 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3065 + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
3066 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3067 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3068 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3069 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3070 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3071 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3072 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3073 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3074 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3075 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3076 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3077 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3078 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3079 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3080 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3081 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3082 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3083 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3084 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3085 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3086 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3087 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3088 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3089 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3090 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3091 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3092 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3093 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3094 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3095 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3096 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3097 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
3098 + };
3099 +
3100 scfg: scfg@1570000 {
3101 compatible = "fsl,ls1043a-scfg", "syscon";
3102 reg = <0x0 0x1570000 0x0 0x10000>;
3103 @@ -255,7 +285,7 @@
3104
3105 dcfg: dcfg@1ee0000 {
3106 compatible = "fsl,ls1043a-dcfg", "syscon";
3107 - reg = <0x0 0x1ee0000 0x0 0x10000>;
3108 + reg = <0x0 0x1ee0000 0x0 0x1000>;
3109 big-endian;
3110 };
3111
3112 @@ -342,36 +372,7 @@
3113 #thermal-sensor-cells = <1>;
3114 };
3115
3116 - thermal-zones {
3117 - cpu_thermal: cpu-thermal {
3118 - polling-delay-passive = <1000>;
3119 - polling-delay = <5000>;
3120 -
3121 - thermal-sensors = <&tmu 3>;
3122 -
3123 - trips {
3124 - cpu_alert: cpu-alert {
3125 - temperature = <85000>;
3126 - hysteresis = <2000>;
3127 - type = "passive";
3128 - };
3129 - cpu_crit: cpu-crit {
3130 - temperature = <95000>;
3131 - hysteresis = <2000>;
3132 - type = "critical";
3133 - };
3134 - };
3135 -
3136 - cooling-maps {
3137 - map0 {
3138 - trip = <&cpu_alert>;
3139 - cooling-device =
3140 - <&cpu0 THERMAL_NO_LIMIT
3141 - THERMAL_NO_LIMIT>;
3142 - };
3143 - };
3144 - };
3145 - };
3146 + #include "fsl-tmu.dtsi"
3147
3148 qman: qman@1880000 {
3149 compatible = "fsl,qman";
3150 @@ -422,7 +423,7 @@
3151 };
3152
3153 i2c0: i2c@2180000 {
3154 - compatible = "fsl,vf610-i2c";
3155 + compatible = "fsl,vf610-i2c", "fsl,ls1043a-vf610-i2c";
3156 #address-cells = <1>;
3157 #size-cells = <0>;
3158 reg = <0x0 0x2180000 0x0 0x10000>;
3159 @@ -432,6 +433,7 @@
3160 dmas = <&edma0 1 39>,
3161 <&edma0 1 38>;
3162 dma-names = "tx", "rx";
3163 + scl-gpios = <&gpio4 12 0>;
3164 status = "disabled";
3165 };
3166
3167 @@ -536,6 +538,72 @@
3168 #interrupt-cells = <2>;
3169 };
3170
3171 + uqe: uqe@2400000 {
3172 + #address-cells = <1>;
3173 + #size-cells = <1>;
3174 + device_type = "qe";
3175 + compatible = "fsl,qe", "simple-bus";
3176 + ranges = <0x0 0x0 0x2400000 0x40000>;
3177 + reg = <0x0 0x2400000 0x0 0x480>;
3178 + brg-frequency = <100000000>;
3179 + bus-frequency = <200000000>;
3180 +
3181 + fsl,qe-num-riscs = <1>;
3182 + fsl,qe-num-snums = <28>;
3183 +
3184 + qeic: qeic@80 {
3185 + compatible = "fsl,qe-ic";
3186 + reg = <0x80 0x80>;
3187 + #address-cells = <0>;
3188 + interrupt-controller;
3189 + #interrupt-cells = <1>;
3190 + interrupts = <0 77 0x04 0 77 0x04>;
3191 + };
3192 +
3193 + si1: si@700 {
3194 + #address-cells = <1>;
3195 + #size-cells = <0>;
3196 + compatible = "fsl,ls1043-qe-si",
3197 + "fsl,t1040-qe-si";
3198 + reg = <0x700 0x80>;
3199 + };
3200 +
3201 + siram1: siram@1000 {
3202 + #address-cells = <1>;
3203 + #size-cells = <1>;
3204 + compatible = "fsl,ls1043-qe-siram",
3205 + "fsl,t1040-qe-siram";
3206 + reg = <0x1000 0x800>;
3207 + };
3208 +
3209 + ucc@2000 {
3210 + cell-index = <1>;
3211 + reg = <0x2000 0x200>;
3212 + interrupts = <32>;
3213 + interrupt-parent = <&qeic>;
3214 + };
3215 +
3216 + ucc@2200 {
3217 + cell-index = <3>;
3218 + reg = <0x2200 0x200>;
3219 + interrupts = <34>;
3220 + interrupt-parent = <&qeic>;
3221 + };
3222 +
3223 + muram@10000 {
3224 + #address-cells = <1>;
3225 + #size-cells = <1>;
3226 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
3227 + ranges = <0x0 0x10000 0x6000>;
3228 +
3229 + data-only@0 {
3230 + compatible = "fsl,qe-muram-data",
3231 + "fsl,cpm-muram-data";
3232 + reg = <0x0 0x6000>;
3233 + };
3234 + };
3235 + };
3236 +
3237 lpuart0: serial@2950000 {
3238 compatible = "fsl,ls1021a-lpuart";
3239 reg = <0x0 0x2950000 0x0 0x1000>;
3240 @@ -590,6 +658,16 @@
3241 status = "disabled";
3242 };
3243
3244 + ftm0: ftm0@29d0000 {
3245 + compatible = "fsl,ls1043a-ftm-alarm";
3246 + reg = <0x0 0x29d0000 0x0 0x10000>,
3247 + <0x0 0x1ee2140 0x0 0x4>;
3248 + reg-names = "ftm", "pmctrl";
3249 + interrupts = <0 86 0x4>;
3250 + big-endian;
3251 + status = "okay";
3252 + };
3253 +
3254 wdog0: wdog@2ad0000 {
3255 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
3256 reg = <0x0 0x2ad0000 0x0 0x10000>;
3257 @@ -615,41 +693,81 @@
3258 <&clockgen 4 0>;
3259 };
3260
3261 - usb0: usb3@2f00000 {
3262 - compatible = "snps,dwc3";
3263 - reg = <0x0 0x2f00000 0x0 0x10000>;
3264 - interrupts = <0 60 0x4>;
3265 - dr_mode = "host";
3266 - snps,quirk-frame-length-adjustment = <0x20>;
3267 - snps,dis_rxdet_inp3_quirk;
3268 - };
3269 -
3270 - usb1: usb3@3000000 {
3271 - compatible = "snps,dwc3";
3272 - reg = <0x0 0x3000000 0x0 0x10000>;
3273 - interrupts = <0 61 0x4>;
3274 - dr_mode = "host";
3275 - snps,quirk-frame-length-adjustment = <0x20>;
3276 - snps,dis_rxdet_inp3_quirk;
3277 - };
3278 -
3279 - usb2: usb3@3100000 {
3280 - compatible = "snps,dwc3";
3281 - reg = <0x0 0x3100000 0x0 0x10000>;
3282 - interrupts = <0 63 0x4>;
3283 - dr_mode = "host";
3284 - snps,quirk-frame-length-adjustment = <0x20>;
3285 - snps,dis_rxdet_inp3_quirk;
3286 - };
3287 -
3288 - sata: sata@3200000 {
3289 - compatible = "fsl,ls1043a-ahci";
3290 - reg = <0x0 0x3200000 0x0 0x10000>,
3291 - <0x0 0x20140520 0x0 0x4>;
3292 - reg-names = "ahci", "sata-ecc";
3293 - interrupts = <0 69 0x4>;
3294 - clocks = <&clockgen 4 0>;
3295 - dma-coherent;
3296 + aux_bus: aux_bus {
3297 + #address-cells = <2>;
3298 + #size-cells = <2>;
3299 + compatible = "simple-bus";
3300 + ranges;
3301 + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
3302 +
3303 + usb0: usb3@2f00000 {
3304 + compatible = "snps,dwc3";
3305 + reg = <0x0 0x2f00000 0x0 0x10000>;
3306 + interrupts = <0 60 0x4>;
3307 + dr_mode = "host";
3308 + snps,quirk-frame-length-adjustment = <0x20>;
3309 + snps,dis_rxdet_inp3_quirk;
3310 + usb3-lpm-capable;
3311 + snps,dis-u1u2-when-u3-quirk;
3312 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3313 + snps,host-vbus-glitches;
3314 + };
3315 +
3316 + usb1: usb3@3000000 {
3317 + compatible = "snps,dwc3";
3318 + reg = <0x0 0x3000000 0x0 0x10000>;
3319 + interrupts = <0 61 0x4>;
3320 + dr_mode = "host";
3321 + snps,quirk-frame-length-adjustment = <0x20>;
3322 + snps,dis_rxdet_inp3_quirk;
3323 + usb3-lpm-capable;
3324 + snps,dis-u1u2-when-u3-quirk;
3325 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3326 + snps,host-vbus-glitches;
3327 + };
3328 +
3329 + usb2: usb3@3100000 {
3330 + compatible = "snps,dwc3";
3331 + reg = <0x0 0x3100000 0x0 0x10000>;
3332 + interrupts = <0 63 0x4>;
3333 + dr_mode = "host";
3334 + snps,quirk-frame-length-adjustment = <0x20>;
3335 + snps,dis_rxdet_inp3_quirk;
3336 + usb3-lpm-capable;
3337 + snps,dis-u1u2-when-u3-quirk;
3338 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3339 + snps,host-vbus-glitches;
3340 + };
3341 +
3342 + sata: sata@3200000 {
3343 + compatible = "fsl,ls1043a-ahci";
3344 + reg = <0x0 0x3200000 0x0 0x10000>,
3345 + <0x0 0x20140520 0x0 0x4>;
3346 + reg-names = "ahci", "sata-ecc";
3347 + interrupts = <0 69 0x4>;
3348 + clocks = <&clockgen 4 0>;
3349 + };
3350 + };
3351 +
3352 + qdma: qdma@8380000 {
3353 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
3354 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
3355 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
3356 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
3357 + interrupts = <0 152 0x4>,
3358 + <0 39 0x4>,
3359 + <0 40 0x4>,
3360 + <0 41 0x4>,
3361 + <0 42 0x4>;
3362 + interrupt-names = "qdma-error", "qdma-queue0",
3363 + "qdma-queue1", "qdma-queue2", "qdma-queue3";
3364 + channels = <8>;
3365 + block-number = <1>;
3366 + block-offset = <0x10000>;
3367 + queues = <2>;
3368 + status-sizes = <64>;
3369 + queue-sizes = <64 64>;
3370 + big-endian;
3371 };
3372
3373 msi1: msi-controller1@1571000 {
3374 @@ -678,13 +796,13 @@
3375 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
3376 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
3377 reg-names = "regs", "config";
3378 - interrupts = <0 118 0x4>, /* controller interrupt */
3379 - <0 117 0x4>; /* PME interrupt */
3380 - interrupt-names = "intr", "pme";
3381 + interrupts = <0 117 0x4>, /* PME interrupt */
3382 + <0 118 0x4>; /* aer interrupt */
3383 + interrupt-names = "pme", "aer";
3384 #address-cells = <3>;
3385 #size-cells = <2>;
3386 device_type = "pci";
3387 - dma-coherent;
3388 + iommu-map = <0 &smmu 0 1>;
3389 num-lanes = <4>;
3390 bus-range = <0x0 0xff>;
3391 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
3392 @@ -696,6 +814,7 @@
3393 <0000 0 0 2 &gic 0 111 0x4>,
3394 <0000 0 0 3 &gic 0 112 0x4>,
3395 <0000 0 0 4 &gic 0 113 0x4>;
3396 + status = "disabled";
3397 };
3398
3399 pcie@3500000 {
3400 @@ -703,13 +822,13 @@
3401 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
3402 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
3403 reg-names = "regs", "config";
3404 - interrupts = <0 128 0x4>,
3405 - <0 127 0x4>;
3406 - interrupt-names = "intr", "pme";
3407 + interrupts = <0 127 0x4>,
3408 + <0 128 0x4>;
3409 + interrupt-names = "pme", "aer";
3410 #address-cells = <3>;
3411 #size-cells = <2>;
3412 device_type = "pci";
3413 - dma-coherent;
3414 + iommu-map = <0 &smmu 0 1>;
3415 num-lanes = <2>;
3416 bus-range = <0x0 0xff>;
3417 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
3418 @@ -721,6 +840,7 @@
3419 <0000 0 0 2 &gic 0 121 0x4>,
3420 <0000 0 0 3 &gic 0 122 0x4>,
3421 <0000 0 0 4 &gic 0 123 0x4>;
3422 + status = "disabled";
3423 };
3424
3425 pcie@3600000 {
3426 @@ -728,13 +848,13 @@
3427 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
3428 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
3429 reg-names = "regs", "config";
3430 - interrupts = <0 162 0x4>,
3431 - <0 161 0x4>;
3432 - interrupt-names = "intr", "pme";
3433 + interrupts = <0 161 0x4>,
3434 + <0 162 0x4>;
3435 + interrupt-names = "pme", "aer";
3436 #address-cells = <3>;
3437 #size-cells = <2>;
3438 device_type = "pci";
3439 - dma-coherent;
3440 + iommu-map = <0 &smmu 0 1>;
3441 num-lanes = <2>;
3442 bus-range = <0x0 0xff>;
3443 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
3444 @@ -746,6 +866,14 @@
3445 <0000 0 0 2 &gic 0 155 0x4>,
3446 <0000 0 0 3 &gic 0 156 0x4>,
3447 <0000 0 0 4 &gic 0 157 0x4>;
3448 + status = "disabled";
3449 + };
3450 + };
3451 +
3452 + firmware {
3453 + optee {
3454 + compatible = "linaro,optee-tz";
3455 + method = "smc";
3456 };
3457 };
3458
3459 @@ -753,3 +881,29 @@
3460
3461 #include "qoriq-qman-portals.dtsi"
3462 #include "qoriq-bman-portals.dtsi"
3463 +
3464 +&thermal_zones {
3465 + thermal-zone0 {
3466 + status = "okay";
3467 + };
3468 +
3469 + thermal-zone1 {
3470 + status = "okay";
3471 + };
3472 +
3473 + thermal-zone2 {
3474 + status = "okay";
3475 + };
3476 +
3477 + thermal-zone3 {
3478 + status = "okay";
3479 + };
3480 +
3481 + thermal-zone4 {
3482 + status = "okay";
3483 + };
3484 +
3485 + thermal-zone5 {
3486 + status = "okay";
3487 + };
3488 +};
3489 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3490 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3491 @@ -1,9 +1,9 @@
3492 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3493 /*
3494 * QorIQ FMan v3 device tree nodes for ls1046
3495 *
3496 * Copyright 2015-2016 Freescale Semiconductor Inc.
3497 *
3498 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3499 */
3500
3501 &soc {
3502 --- /dev/null
3503 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
3504 @@ -0,0 +1,268 @@
3505 +/*
3506 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3507 + *
3508 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3509 + *
3510 + * Mingkai Hu <Mingkai.hu@freescale.com>
3511 + *
3512 + * This file is dual-licensed: you can use it either under the terms
3513 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3514 + * licensing only applies to this file, and not this project as a
3515 + * whole.
3516 + *
3517 + * a) This library is free software; you can redistribute it and/or
3518 + * modify it under the terms of the GNU General Public License as
3519 + * published by the Free Software Foundation; either version 2 of the
3520 + * License, or (at your option) any later version.
3521 + *
3522 + * This library is distributed in the hope that it will be useful,
3523 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3524 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3525 + * GNU General Public License for more details.
3526 + *
3527 + * Or, alternatively,
3528 + *
3529 + * b) Permission is hereby granted, free of charge, to any person
3530 + * obtaining a copy of this software and associated documentation
3531 + * files (the "Software"), to deal in the Software without
3532 + * restriction, including without limitation the rights to use,
3533 + * copy, modify, merge, publish, distribute, sublicense, and/or
3534 + * sell copies of the Software, and to permit persons to whom the
3535 + * Software is furnished to do so, subject to the following
3536 + * conditions:
3537 + *
3538 + * The above copyright notice and this permission notice shall be
3539 + * included in all copies or substantial portions of the Software.
3540 + *
3541 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3542 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3543 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3544 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3545 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3546 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3547 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3548 + * OTHER DEALINGS IN THE SOFTWARE.
3549 + */
3550 +
3551 +#include "fsl-ls1046a-qds.dts"
3552 +#include "qoriq-qman-portals-sdk.dtsi"
3553 +#include "qoriq-bman-portals-sdk.dtsi"
3554 +
3555 +&bman_fbpr {
3556 + compatible = "fsl,bman-fbpr";
3557 + alloc-ranges = <0 0 0x10000 0>;
3558 +};
3559 +&qman_fqd {
3560 + compatible = "fsl,qman-fqd";
3561 + alloc-ranges = <0 0 0x10000 0>;
3562 +};
3563 +&qman_pfdr {
3564 + compatible = "fsl,qman-pfdr";
3565 + alloc-ranges = <0 0 0x10000 0>;
3566 +};
3567 +
3568 +&soc {
3569 +/delete-property/ dma-coherent;
3570 +
3571 +#include "qoriq-dpaa-eth.dtsi"
3572 +#include "qoriq-fman3-0-6oh.dtsi"
3573 +
3574 +pcie@3400000 {
3575 + /delete-property/ iommu-map;
3576 +};
3577 +
3578 +pcie@3500000 {
3579 + /delete-property/ iommu-map;
3580 +};
3581 +
3582 +pcie@3600000 {
3583 + /delete-property/ iommu-map;
3584 +};
3585 +
3586 +/delete-node/ iommu@9000000;
3587 +};
3588 +
3589 +&fsldpaa {
3590 + ethernet@9 {
3591 + compatible = "fsl,dpa-ethernet";
3592 + fsl,fman-mac = <&enet7>;
3593 + dma-coherent;
3594 + };
3595 +};
3596 +
3597 +&fman0 {
3598 + compatible = "fsl,fman", "simple-bus";
3599 + dma-coherent;
3600 +};
3601 +
3602 +&clockgen {
3603 + dma-coherent;
3604 +};
3605 +
3606 +&scfg {
3607 + dma-coherent;
3608 +};
3609 +
3610 +&crypto {
3611 + dma-coherent;
3612 +};
3613 +
3614 +&dcfg {
3615 + dma-coherent;
3616 +};
3617 +
3618 +&ifc {
3619 + dma-coherent;
3620 +};
3621 +
3622 +&qspi {
3623 + dma-coherent;
3624 +};
3625 +
3626 +&esdhc {
3627 + dma-coherent;
3628 +};
3629 +
3630 +&ddr {
3631 + dma-coherent;
3632 +};
3633 +
3634 +&tmu {
3635 + dma-coherent;
3636 +};
3637 +
3638 +&qman {
3639 + dma-coherent;
3640 +};
3641 +
3642 +&bman {
3643 + dma-coherent;
3644 +};
3645 +
3646 +&bportals {
3647 + dma-coherent;
3648 +};
3649 +
3650 +&qportals {
3651 + dma-coherent;
3652 +};
3653 +
3654 +&dspi {
3655 + dma-coherent;
3656 +};
3657 +
3658 +&i2c0 {
3659 + dma-coherent;
3660 +};
3661 +
3662 +&i2c1 {
3663 + dma-coherent;
3664 +};
3665 +
3666 +&i2c2 {
3667 + dma-coherent;
3668 +};
3669 +
3670 +&i2c3 {
3671 + dma-coherent;
3672 +};
3673 +
3674 +&duart0 {
3675 + dma-coherent;
3676 +};
3677 +
3678 +&duart1 {
3679 + dma-coherent;
3680 +};
3681 +
3682 +&duart2 {
3683 + dma-coherent;
3684 +};
3685 +
3686 +&duart3 {
3687 + dma-coherent;
3688 +};
3689 +
3690 +&gpio0 {
3691 + dma-coherent;
3692 +};
3693 +
3694 +&gpio1 {
3695 + dma-coherent;
3696 +};
3697 +
3698 +&gpio2 {
3699 + dma-coherent;
3700 +};
3701 +
3702 +&gpio3 {
3703 + dma-coherent;
3704 +};
3705 +
3706 +&lpuart0 {
3707 + dma-coherent;
3708 +};
3709 +
3710 +&lpuart1 {
3711 + dma-coherent;
3712 +};
3713 +
3714 +&lpuart2 {
3715 + dma-coherent;
3716 +};
3717 +
3718 +&lpuart3 {
3719 + dma-coherent;
3720 +};
3721 +
3722 +&lpuart4 {
3723 + dma-coherent;
3724 +};
3725 +
3726 +&lpuart5 {
3727 + dma-coherent;
3728 +};
3729 +
3730 +&ftm0 {
3731 + dma-coherent;
3732 +};
3733 +
3734 +&wdog0 {
3735 + dma-coherent;
3736 +};
3737 +
3738 +&edma0 {
3739 + dma-coherent;
3740 +};
3741 +
3742 +&sata {
3743 + dma-coherent;
3744 +};
3745 +
3746 +&qdma {
3747 + dma-coherent;
3748 +};
3749 +
3750 +&msi1 {
3751 + dma-coherent;
3752 +};
3753 +
3754 +&msi2 {
3755 + dma-coherent;
3756 +};
3757 +
3758 +&msi3 {
3759 + dma-coherent;
3760 +};
3761 +
3762 +&ptp_timer0 {
3763 + dma-coherent;
3764 +};
3765 +
3766 +&serdes1 {
3767 + dma-coherent;
3768 +};
3769 +
3770 +&fsldpaa {
3771 + dma-coherent;
3772 +};
3773 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3774 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3775 @@ -1,47 +1,10 @@
3776 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3777 /*
3778 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3779 *
3780 * Copyright 2016 Freescale Semiconductor, Inc.
3781 *
3782 * Shaohui Xie <Shaohui.Xie@nxp.com>
3783 - *
3784 - * This file is dual-licensed: you can use it either under the terms
3785 - * of the GPLv2 or the X11 license, at your option. Note that this dual
3786 - * licensing only applies to this file, and not this project as a
3787 - * whole.
3788 - *
3789 - * a) This library is free software; you can redistribute it and/or
3790 - * modify it under the terms of the GNU General Public License as
3791 - * published by the Free Software Foundation; either version 2 of the
3792 - * License, or (at your option) any later version.
3793 - *
3794 - * This library is distributed in the hope that it will be useful,
3795 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
3796 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3797 - * GNU General Public License for more details.
3798 - *
3799 - * Or, alternatively,
3800 - *
3801 - * b) Permission is hereby granted, free of charge, to any person
3802 - * obtaining a copy of this software and associated documentation
3803 - * files (the "Software"), to deal in the Software without
3804 - * restriction, including without limitation the rights to use,
3805 - * copy, modify, merge, publish, distribute, sublicense, and/or
3806 - * sell copies of the Software, and to permit persons to whom the
3807 - * Software is furnished to do so, subject to the following
3808 - * conditions:
3809 - *
3810 - * The above copyright notice and this permission notice shall be
3811 - * included in all copies or substantial portions of the Software.
3812 - *
3813 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3814 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3815 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3816 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3817 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3818 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3819 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3820 - * OTHER DEALINGS IN THE SOFTWARE.
3821 */
3822
3823 /dts-v1/;
3824 @@ -61,6 +24,20 @@
3825 serial1 = &duart1;
3826 serial2 = &duart2;
3827 serial3 = &duart3;
3828 +
3829 + emi1_slot1 = &ls1046mdio_s1;
3830 + emi1_slot2 = &ls1046mdio_s2;
3831 + emi1_slot4 = &ls1046mdio_s4;
3832 +
3833 + sgmii_s1_p1 = &sgmii_phy_s1_p1;
3834 + sgmii_s1_p2 = &sgmii_phy_s1_p2;
3835 + sgmii_s1_p3 = &sgmii_phy_s1_p3;
3836 + sgmii_s1_p4 = &sgmii_phy_s1_p4;
3837 + sgmii_s4_p1 = &sgmii_phy_s4_p1;
3838 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
3839 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
3840 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
3841 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
3842 };
3843
3844 chosen {
3845 @@ -188,8 +165,9 @@
3846 };
3847
3848 fpga: board-control@2,0 {
3849 - compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis";
3850 + compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-bus";
3851 reg = <0x2 0x0 0x0000100>;
3852 + ranges = <0 2 0 0x100>;
3853 };
3854 };
3855
3856 @@ -206,9 +184,145 @@
3857 compatible = "spansion,m25p80";
3858 #address-cells = <1>;
3859 #size-cells = <1>;
3860 - spi-max-frequency = <20000000>;
3861 + spi-max-frequency = <50000000>;
3862 reg = <0>;
3863 + spi-rx-bus-width = <4>;
3864 + spi-tx-bus-width = <4>;
3865 };
3866 };
3867
3868 #include "fsl-ls1046-post.dtsi"
3869 +
3870 +&fman0 {
3871 + ethernet@e0000 {
3872 + phy-handle = <&qsgmii_phy_s2_p1>;
3873 + phy-connection-type = "sgmii";
3874 + };
3875 +
3876 + ethernet@e2000 {
3877 + phy-handle = <&sgmii_phy_s4_p1>;
3878 + phy-connection-type = "sgmii";
3879 + };
3880 +
3881 + ethernet@e4000 {
3882 + phy-handle = <&rgmii_phy1>;
3883 + phy-connection-type = "rgmii";
3884 + };
3885 +
3886 + ethernet@e6000 {
3887 + phy-handle = <&rgmii_phy2>;
3888 + phy-connection-type = "rgmii";
3889 + };
3890 +
3891 + ethernet@e8000 {
3892 + phy-handle = <&sgmii_phy_s1_p3>;
3893 + phy-connection-type = "sgmii";
3894 + };
3895 +
3896 + ethernet@ea000 {
3897 + phy-handle = <&sgmii_phy_s1_p4>;
3898 + phy-connection-type = "sgmii";
3899 + };
3900 +
3901 + ethernet@f0000 { /* DTSEC9/10GEC1 */
3902 + phy-handle = <&sgmii_phy_s1_p1>;
3903 + phy-connection-type = "xgmii";
3904 + };
3905 +
3906 + ethernet@f2000 { /* DTSEC10/10GEC2 */
3907 + phy-handle = <&sgmii_phy_s1_p2>;
3908 + phy-connection-type = "xgmii";
3909 + };
3910 +};
3911 +
3912 +&fpga {
3913 + #address-cells = <1>;
3914 + #size-cells = <1>;
3915 + mdio-mux-emi1 {
3916 + compatible = "mdio-mux-mmioreg", "mdio-mux";
3917 + mdio-parent-bus = <&mdio0>;
3918 + #address-cells = <1>;
3919 + #size-cells = <0>;
3920 + reg = <0x54 1>; /* BRDCFG4 */
3921 + mux-mask = <0xe0>; /* EMI1 */
3922 +
3923 + /* On-board RGMII1 PHY */
3924 + ls1046mdio0: mdio@0 {
3925 + reg = <0>;
3926 + #address-cells = <1>;
3927 + #size-cells = <0>;
3928 +
3929 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
3930 + reg = <0x1>;
3931 + };
3932 + };
3933 +
3934 + /* On-board RGMII2 PHY */
3935 + ls1046mdio1: mdio@1 {
3936 + reg = <0x20>;
3937 + #address-cells = <1>;
3938 + #size-cells = <0>;
3939 +
3940 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
3941 + reg = <0x2>;
3942 + };
3943 + };
3944 +
3945 + /* Slot 1 */
3946 + ls1046mdio_s1: mdio@2 {
3947 + reg = <0x40>;
3948 + #address-cells = <1>;
3949 + #size-cells = <0>;
3950 + status = "disabled";
3951 +
3952 + sgmii_phy_s1_p1: ethernet-phy@1c {
3953 + reg = <0x1c>;
3954 + };
3955 +
3956 + sgmii_phy_s1_p2: ethernet-phy@1d {
3957 + reg = <0x1d>;
3958 + };
3959 +
3960 + sgmii_phy_s1_p3: ethernet-phy@1e {
3961 + reg = <0x1e>;
3962 + };
3963 +
3964 + sgmii_phy_s1_p4: ethernet-phy@1f {
3965 + reg = <0x1f>;
3966 + };
3967 + };
3968 +
3969 + /* Slot 2 */
3970 + ls1046mdio_s2: mdio@3 {
3971 + reg = <0x60>;
3972 + #address-cells = <1>;
3973 + #size-cells = <0>;
3974 + status = "disabled";
3975 +
3976 + qsgmii_phy_s2_p1: ethernet-phy@8 {
3977 + reg = <0x8>;
3978 + };
3979 + qsgmii_phy_s2_p2: ethernet-phy@9 {
3980 + reg = <0x9>;
3981 + };
3982 + qsgmii_phy_s2_p3: ethernet-phy@a {
3983 + reg = <0xa>;
3984 + };
3985 + qsgmii_phy_s2_p4: ethernet-phy@b {
3986 + reg = <0xb>;
3987 + };
3988 + };
3989 +
3990 + /* Slot 4 */
3991 + ls1046mdio_s4: mdio@5 {
3992 + reg = <0x80>;
3993 + #address-cells = <1>;
3994 + #size-cells = <0>;
3995 + status = "disabled";
3996 +
3997 + sgmii_phy_s4_p1: ethernet-phy@1c {
3998 + reg = <0x1c>;
3999 + };
4000 + };
4001 + };
4002 +};
4003 --- /dev/null
4004 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
4005 @@ -0,0 +1,307 @@
4006 +/*
4007 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4008 + *
4009 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
4010 + *
4011 + * Mingkai Hu <Mingkai.hu@freescale.com>
4012 + *
4013 + * This file is dual-licensed: you can use it either under the terms
4014 + * of the GPLv2 or the X11 license, at your option. Note that this dual
4015 + * licensing only applies to this file, and not this project as a
4016 + * whole.
4017 + *
4018 + * a) This library is free software; you can redistribute it and/or
4019 + * modify it under the terms of the GNU General Public License as
4020 + * published by the Free Software Foundation; either version 2 of the
4021 + * License, or (at your option) any later version.
4022 + *
4023 + * This library is distributed in the hope that it will be useful,
4024 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4025 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4026 + * GNU General Public License for more details.
4027 + *
4028 + * Or, alternatively,
4029 + *
4030 + * b) Permission is hereby granted, free of charge, to any person
4031 + * obtaining a copy of this software and associated documentation
4032 + * files (the "Software"), to deal in the Software without
4033 + * restriction, including without limitation the rights to use,
4034 + * copy, modify, merge, publish, distribute, sublicense, and/or
4035 + * sell copies of the Software, and to permit persons to whom the
4036 + * Software is furnished to do so, subject to the following
4037 + * conditions:
4038 + *
4039 + * The above copyright notice and this permission notice shall be
4040 + * included in all copies or substantial portions of the Software.
4041 + *
4042 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4043 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4044 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4045 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4046 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4047 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4048 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4049 + * OTHER DEALINGS IN THE SOFTWARE.
4050 + */
4051 +
4052 +#include "fsl-ls1046a-rdb.dts"
4053 +#include "qoriq-qman-portals-sdk.dtsi"
4054 +#include "qoriq-bman-portals-sdk.dtsi"
4055 +
4056 +&bman_fbpr {
4057 + compatible = "fsl,bman-fbpr";
4058 + alloc-ranges = <0 0 0x10000 0>;
4059 +};
4060 +&qman_fqd {
4061 + compatible = "fsl,qman-fqd";
4062 + alloc-ranges = <0 0 0x10000 0>;
4063 +};
4064 +&qman_pfdr {
4065 + compatible = "fsl,qman-pfdr";
4066 + alloc-ranges = <0 0 0x10000 0>;
4067 +};
4068 +
4069 +&soc {
4070 +/delete-property/ dma-coherent;
4071 +
4072 +#include "qoriq-dpaa-eth.dtsi"
4073 +#include "qoriq-fman3-0-6oh.dtsi"
4074 +
4075 +pcie@3400000 {
4076 + /delete-property/ iommu-map;
4077 +};
4078 +
4079 +pcie@3500000 {
4080 + /delete-property/ iommu-map;
4081 +};
4082 +
4083 +pcie@3600000 {
4084 + /delete-property/ iommu-map;
4085 +};
4086 +
4087 +/delete-node/ iommu@9000000;
4088 +};
4089 +
4090 +&fsldpaa {
4091 + ethernet@0 {
4092 + status = "disabled";
4093 + };
4094 + ethernet@1 {
4095 + status = "disabled";
4096 + };
4097 + ethernet@9 {
4098 + compatible = "fsl,dpa-ethernet";
4099 + fsl,fman-mac = <&enet7>;
4100 + dma-coherent;
4101 + };
4102 +};
4103 +
4104 +&fman0 {
4105 + compatible = "fsl,fman", "simple-bus";
4106 +};
4107 +
4108 +&mdio9 {
4109 + pcsphy6: ethernet-phy@0 {
4110 + backplane-mode = "10gbase-kr";
4111 + compatible = "ethernet-phy-ieee802.3-c45";
4112 + reg = <0x0>;
4113 + fsl,lane-handle = <&serdes1>;
4114 + fsl,lane-reg = <0x8C0 0x40>; /* lane D */
4115 + };
4116 +};
4117 +
4118 +&mdio10 {
4119 + pcsphy7: ethernet-phy@0 {
4120 + backplane-mode = "10gbase-kr";
4121 + compatible = "ethernet-phy-ieee802.3-c45";
4122 + reg = <0x0>;
4123 + fsl,lane-handle = <&serdes1>;
4124 + fsl,lane-reg = <0x880 0x40>; /* lane C */
4125 + };
4126 +};
4127 +
4128 +/* Update MAC connections to backplane PHYs
4129 + * &mac9 {
4130 + * phy-handle = <&pcsphy6>;
4131 + *};
4132 + *
4133 + *&mac10 {
4134 + * phy-handle = <&pcsphy7>;
4135 + *};
4136 +*/
4137 +
4138 +&clockgen {
4139 + dma-coherent;
4140 +};
4141 +
4142 +&scfg {
4143 + dma-coherent;
4144 +};
4145 +
4146 +&crypto {
4147 + dma-coherent;
4148 +};
4149 +
4150 +&dcfg {
4151 + dma-coherent;
4152 +};
4153 +
4154 +&ifc {
4155 + dma-coherent;
4156 +};
4157 +
4158 +&qspi {
4159 + dma-coherent;
4160 +};
4161 +
4162 +&esdhc {
4163 + dma-coherent;
4164 +};
4165 +
4166 +&ddr {
4167 + dma-coherent;
4168 +};
4169 +
4170 +&tmu {
4171 + dma-coherent;
4172 +};
4173 +
4174 +&qman {
4175 + dma-coherent;
4176 +};
4177 +
4178 +&bman {
4179 + dma-coherent;
4180 +};
4181 +
4182 +&bportals {
4183 + dma-coherent;
4184 +};
4185 +
4186 +&qportals {
4187 + dma-coherent;
4188 +};
4189 +
4190 +&dspi {
4191 + dma-coherent;
4192 +};
4193 +
4194 +&i2c0 {
4195 + dma-coherent;
4196 +};
4197 +
4198 +&i2c1 {
4199 + dma-coherent;
4200 +};
4201 +
4202 +&i2c2 {
4203 + dma-coherent;
4204 +};
4205 +
4206 +&i2c3 {
4207 + dma-coherent;
4208 +};
4209 +
4210 +&duart0 {
4211 + dma-coherent;
4212 +};
4213 +
4214 +&duart1 {
4215 + dma-coherent;
4216 +};
4217 +
4218 +&duart2 {
4219 + dma-coherent;
4220 +};
4221 +
4222 +&duart3 {
4223 + dma-coherent;
4224 +};
4225 +
4226 +&gpio0 {
4227 + dma-coherent;
4228 +};
4229 +
4230 +&gpio1 {
4231 + dma-coherent;
4232 +};
4233 +
4234 +&gpio2 {
4235 + dma-coherent;
4236 +};
4237 +
4238 +&gpio3 {
4239 + dma-coherent;
4240 +};
4241 +
4242 +&lpuart0 {
4243 + dma-coherent;
4244 +};
4245 +
4246 +&lpuart1 {
4247 + dma-coherent;
4248 +};
4249 +
4250 +&lpuart2 {
4251 + dma-coherent;
4252 +};
4253 +
4254 +&lpuart3 {
4255 + dma-coherent;
4256 +};
4257 +
4258 +&lpuart4 {
4259 + dma-coherent;
4260 +};
4261 +
4262 +&lpuart5 {
4263 + dma-coherent;
4264 +};
4265 +
4266 +&ftm0 {
4267 + dma-coherent;
4268 +};
4269 +
4270 +&wdog0 {
4271 + dma-coherent;
4272 +};
4273 +
4274 +&edma0 {
4275 + dma-coherent;
4276 +};
4277 +
4278 +&sata {
4279 + dma-coherent;
4280 +};
4281 +
4282 +&qdma {
4283 + dma-coherent;
4284 +};
4285 +
4286 +&msi1 {
4287 + dma-coherent;
4288 +};
4289 +
4290 +&msi2 {
4291 + dma-coherent;
4292 +};
4293 +
4294 +&msi3 {
4295 + dma-coherent;
4296 +};
4297 +
4298 +&fman0 {
4299 + dma-coherent;
4300 +};
4301 +
4302 +&ptp_timer0 {
4303 + dma-coherent;
4304 +};
4305 +
4306 +&serdes1 {
4307 + dma-coherent;
4308 +};
4309 +
4310 +&fsldpaa {
4311 + dma-coherent;
4312 +};
4313 --- /dev/null
4314 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
4315 @@ -0,0 +1,133 @@
4316 +/*
4317 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4318 + *
4319 + * Copyright (C) 2016, Freescale Semiconductor
4320 + *
4321 + * This file is licensed under the terms of the GNU General Public
4322 + * License version 2. This program is licensed "as is" without any
4323 + * warranty of any kind, whether express or implied.
4324 + */
4325 +
4326 +#include "fsl-ls1046a-rdb-sdk.dts"
4327 +
4328 +&soc {
4329 + bp7: buffer-pool@7 {
4330 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4331 + fsl,bpid = <7>;
4332 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
4333 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
4334 + dma-coherent;
4335 + };
4336 +
4337 + bp8: buffer-pool@8 {
4338 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4339 + fsl,bpid = <8>;
4340 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
4341 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
4342 + dma-coherent;
4343 + };
4344 +
4345 + bp9: buffer-pool@9 {
4346 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4347 + fsl,bpid = <9>;
4348 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
4349 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
4350 + dma-coherent;
4351 + };
4352 +
4353 + fsl,dpaa {
4354 + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
4355 + dma-coherent;
4356 +
4357 + ethernet@2 {
4358 + compatible = "fsl,dpa-ethernet-init";
4359 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4360 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
4361 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
4362 + };
4363 +
4364 + ethernet@3 {
4365 + compatible = "fsl,dpa-ethernet-init";
4366 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4367 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
4368 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
4369 + };
4370 +
4371 + ethernet@4 {
4372 + compatible = "fsl,dpa-ethernet-init";
4373 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4374 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
4375 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
4376 + };
4377 +
4378 + ethernet@5 {
4379 + compatible = "fsl,dpa-ethernet-init";
4380 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4381 + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>;
4382 + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>;
4383 + };
4384 +
4385 + ethernet@8 {
4386 + compatible = "fsl,dpa-ethernet-init";
4387 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4388 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
4389 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
4390 + };
4391 +
4392 + ethernet@9 {
4393 + compatible = "fsl,dpa-ethernet-init";
4394 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4395 + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
4396 + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
4397 + };
4398 +
4399 + dpa-fman0-oh@2 {
4400 + compatible = "fsl,dpa-oh";
4401 + /* Define frame queues for the OH port*/
4402 + /* <OH Rx error, OH Rx default> */
4403 + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>;
4404 + fsl,fman-oh-port = <&fman0_oh2>;
4405 + };
4406 + };
4407 +
4408 + pcie@3400000 {
4409 + /delete-property/ iommu-map;
4410 + };
4411 +
4412 + pcie@3500000 {
4413 + /delete-property/ iommu-map;
4414 + };
4415 +
4416 + pcie@3600000 {
4417 + /delete-property/ iommu-map;
4418 + };
4419 +
4420 + /delete-node/ iommu@9000000;
4421 +};
4422 +/ {
4423 + reserved-memory {
4424 + #address-cells = <2>;
4425 + #size-cells = <2>;
4426 + ranges;
4427 +
4428 + /* For legacy usdpaa based use-cases, update the size and
4429 + alignment parameters. e.g. to allocate 256 MB memory:
4430 + size = <0 0x10000000>;
4431 + alignment = <0 0x10000000>;
4432 + */
4433 + usdpaa_mem: usdpaa_mem {
4434 + compatible = "fsl,usdpaa-mem";
4435 + alloc-ranges = <0 0 0x10000 0>;
4436 + size = <0 0x1000>;
4437 + alignment = <0 0x1000>;
4438 + };
4439 + };
4440 +};
4441 +
4442 +&fman0 {
4443 + fman0_oh2: port@83000 {
4444 + cell-index = <1>;
4445 + compatible = "fsl,fman-port-oh";
4446 + reg = <0x83000 0x1000>;
4447 + };
4448 +};
4449 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
4450 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
4451 @@ -1,47 +1,10 @@
4452 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4453 /*
4454 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4455 *
4456 * Copyright 2016 Freescale Semiconductor, Inc.
4457 *
4458 * Mingkai Hu <mingkai.hu@nxp.com>
4459 - *
4460 - * This file is dual-licensed: you can use it either under the terms
4461 - * of the GPLv2 or the X11 license, at your option. Note that this dual
4462 - * licensing only applies to this file, and not this project as a
4463 - * whole.
4464 - *
4465 - * a) This library is free software; you can redistribute it and/or
4466 - * modify it under the terms of the GNU General Public License as
4467 - * published by the Free Software Foundation; either version 2 of the
4468 - * License, or (at your option) any later version.
4469 - *
4470 - * This library is distributed in the hope that it will be useful,
4471 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
4472 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4473 - * GNU General Public License for more details.
4474 - *
4475 - * Or, alternatively,
4476 - *
4477 - * b) Permission is hereby granted, free of charge, to any person
4478 - * obtaining a copy of this software and associated documentation
4479 - * files (the "Software"), to deal in the Software without
4480 - * restriction, including without limitation the rights to use,
4481 - * copy, modify, merge, publish, distribute, sublicense, and/or
4482 - * sell copies of the Software, and to permit persons to whom the
4483 - * Software is furnished to do so, subject to the following
4484 - * conditions:
4485 - *
4486 - * The above copyright notice and this permission notice shall be
4487 - * included in all copies or substantial portions of the Software.
4488 - *
4489 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4490 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4491 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4492 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4493 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4494 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4495 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4496 - * OTHER DEALINGS IN THE SOFTWARE.
4497 */
4498
4499 /dts-v1/;
4500 @@ -139,21 +102,26 @@
4501 num-cs = <2>;
4502 bus-num = <0>;
4503 status = "okay";
4504 + fsl,qspi-has-second-chip;
4505
4506 qflash0: s25fs512s@0 {
4507 compatible = "spansion,m25p80";
4508 #address-cells = <1>;
4509 #size-cells = <1>;
4510 - spi-max-frequency = <20000000>;
4511 + spi-max-frequency = <50000000>;
4512 reg = <0>;
4513 + spi-rx-bus-width = <4>;
4514 + spi-tx-bus-width = <4>;
4515 };
4516
4517 qflash1: s25fs512s@1 {
4518 compatible = "spansion,m25p80";
4519 #address-cells = <1>;
4520 #size-cells = <1>;
4521 - spi-max-frequency = <20000000>;
4522 + spi-max-frequency = <50000000>;
4523 reg = <1>;
4524 + spi-rx-bus-width = <4>;
4525 + spi-tx-bus-width = <4>;
4526 };
4527 };
4528
4529 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
4530 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
4531 @@ -1,47 +1,10 @@
4532 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4533 /*
4534 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4535 *
4536 * Copyright 2016 Freescale Semiconductor, Inc.
4537 *
4538 * Mingkai Hu <mingkai.hu@nxp.com>
4539 - *
4540 - * This file is dual-licensed: you can use it either under the terms
4541 - * of the GPLv2 or the X11 license, at your option. Note that this dual
4542 - * licensing only applies to this file, and not this project as a
4543 - * whole.
4544 - *
4545 - * a) This library is free software; you can redistribute it and/or
4546 - * modify it under the terms of the GNU General Public License as
4547 - * published by the Free Software Foundation; either version 2 of the
4548 - * License, or (at your option) any later version.
4549 - *
4550 - * This library is distributed in the hope that it will be useful,
4551 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
4552 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4553 - * GNU General Public License for more details.
4554 - *
4555 - * Or, alternatively,
4556 - *
4557 - * b) Permission is hereby granted, free of charge, to any person
4558 - * obtaining a copy of this software and associated documentation
4559 - * files (the "Software"), to deal in the Software without
4560 - * restriction, including without limitation the rights to use,
4561 - * copy, modify, merge, publish, distribute, sublicense, and/or
4562 - * sell copies of the Software, and to permit persons to whom the
4563 - * Software is furnished to do so, subject to the following
4564 - * conditions:
4565 - *
4566 - * The above copyright notice and this permission notice shall be
4567 - * included in all copies or substantial portions of the Software.
4568 - *
4569 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4570 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4571 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4572 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4573 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4574 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4575 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4576 - * OTHER DEALINGS IN THE SOFTWARE.
4577 */
4578
4579 #include <dt-bindings/interrupt-controller/arm-gic.h>
4580 @@ -70,7 +33,7 @@
4581 #address-cells = <1>;
4582 #size-cells = <0>;
4583
4584 - cpu0: cpu@0 {
4585 + cooling_map0: cpu0: cpu@0 {
4586 device_type = "cpu";
4587 compatible = "arm,cortex-a72";
4588 reg = <0x0>;
4589 @@ -122,7 +85,7 @@
4590 CPU_PH20: cpu-ph20 {
4591 compatible = "arm,idle-state";
4592 idle-state-name = "PH20";
4593 - arm,psci-suspend-param = <0x00010000>;
4594 + arm,psci-suspend-param = <0x0>;
4595 entry-latency-us = <1000>;
4596 exit-latency-us = <1000>;
4597 min-residency-us = <3000>;
4598 @@ -188,6 +151,8 @@
4599 #address-cells = <2>;
4600 #size-cells = <2>;
4601 ranges;
4602 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
4603 + dma-coherent;
4604
4605 ddr: memory-controller@1080000 {
4606 compatible = "fsl,qoriq-memory-controller";
4607 @@ -214,7 +179,6 @@
4608 clock-names = "qspi_en", "qspi";
4609 clocks = <&clockgen 4 1>, <&clockgen 4 1>;
4610 big-endian;
4611 - fsl,qspi-has-second-chip;
4612 status = "disabled";
4613 };
4614
4615 @@ -229,6 +193,49 @@
4616 bus-width = <4>;
4617 };
4618
4619 + smmu: iommu@9000000 {
4620 + compatible = "arm,mmu-500";
4621 + reg = <0 0x9000000 0 0x400000>;
4622 + dma-coherent;
4623 + stream-match-mask = <0x7f00>;
4624 + #global-interrupts = <2>;
4625 + #iommu-cells = <1>;
4626 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4627 + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
4628 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4629 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4630 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4631 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4632 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4633 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4634 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4635 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4636 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4637 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4638 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4639 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4640 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4641 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4642 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4643 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4644 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4645 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4646 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4647 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4648 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4649 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4650 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4651 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4652 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4653 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4654 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4655 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4656 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4657 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4658 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4659 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
4660 + };
4661 +
4662 scfg: scfg@1570000 {
4663 compatible = "fsl,ls1046a-scfg", "syscon";
4664 reg = <0x0 0x1570000 0x0 0x10000>;
4665 @@ -304,7 +311,7 @@
4666
4667 dcfg: dcfg@1ee0000 {
4668 compatible = "fsl,ls1046a-dcfg", "syscon";
4669 - reg = <0x0 0x1ee0000 0x0 0x10000>;
4670 + reg = <0x0 0x1ee0000 0x0 0x1000>;
4671 big-endian;
4672 };
4673
4674 @@ -362,36 +369,7 @@
4675 #thermal-sensor-cells = <1>;
4676 };
4677
4678 - thermal-zones {
4679 - cpu_thermal: cpu-thermal {
4680 - polling-delay-passive = <1000>;
4681 - polling-delay = <5000>;
4682 - thermal-sensors = <&tmu 3>;
4683 -
4684 - trips {
4685 - cpu_alert: cpu-alert {
4686 - temperature = <85000>;
4687 - hysteresis = <2000>;
4688 - type = "passive";
4689 - };
4690 -
4691 - cpu_crit: cpu-crit {
4692 - temperature = <95000>;
4693 - hysteresis = <2000>;
4694 - type = "critical";
4695 - };
4696 - };
4697 -
4698 - cooling-maps {
4699 - map0 {
4700 - trip = <&cpu_alert>;
4701 - cooling-device =
4702 - <&cpu0 THERMAL_NO_LIMIT
4703 - THERMAL_NO_LIMIT>;
4704 - };
4705 - };
4706 - };
4707 - };
4708 + #include "fsl-tmu.dtsi"
4709
4710 dspi: dspi@2100000 {
4711 compatible = "fsl,ls1021a-v1.0-dspi";
4712 @@ -407,7 +385,7 @@
4713 };
4714
4715 i2c0: i2c@2180000 {
4716 - compatible = "fsl,vf610-i2c";
4717 + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c";
4718 #address-cells = <1>;
4719 #size-cells = <0>;
4720 reg = <0x0 0x2180000 0x0 0x10000>;
4721 @@ -416,6 +394,7 @@
4722 dmas = <&edma0 1 39>,
4723 <&edma0 1 38>;
4724 dma-names = "tx", "rx";
4725 + scl-gpios = <&gpio3 12 0>;
4726 status = "disabled";
4727 };
4728
4729 @@ -440,12 +419,13 @@
4730 };
4731
4732 i2c3: i2c@21b0000 {
4733 - compatible = "fsl,vf610-i2c";
4734 + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c";
4735 #address-cells = <1>;
4736 #size-cells = <0>;
4737 reg = <0x0 0x21b0000 0x0 0x10000>;
4738 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
4739 clocks = <&clockgen 4 1>;
4740 + scl-gpios = <&gpio3 12 0>;
4741 status = "disabled";
4742 };
4743
4744 @@ -571,6 +551,15 @@
4745 status = "disabled";
4746 };
4747
4748 + ftm0: ftm0@29d0000 {
4749 + compatible = "fsl,ls1046a-ftm-alarm";
4750 + reg = <0x0 0x29d0000 0x0 0x10000>,
4751 + <0x0 0x1ee2140 0x0 0x4>;
4752 + reg-names = "ftm", "pmctrl";
4753 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
4754 + big-endian;
4755 + };
4756 +
4757 wdog0: watchdog@2ad0000 {
4758 compatible = "fsl,imx21-wdt";
4759 reg = <0x0 0x2ad0000 0x0 0x10000>;
4760 @@ -595,40 +584,81 @@
4761 <&clockgen 4 1>;
4762 };
4763
4764 - usb0: usb@2f00000 {
4765 - compatible = "snps,dwc3";
4766 - reg = <0x0 0x2f00000 0x0 0x10000>;
4767 - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4768 - dr_mode = "host";
4769 - snps,quirk-frame-length-adjustment = <0x20>;
4770 - snps,dis_rxdet_inp3_quirk;
4771 - };
4772 -
4773 - usb1: usb@3000000 {
4774 - compatible = "snps,dwc3";
4775 - reg = <0x0 0x3000000 0x0 0x10000>;
4776 - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4777 - dr_mode = "host";
4778 - snps,quirk-frame-length-adjustment = <0x20>;
4779 - snps,dis_rxdet_inp3_quirk;
4780 - };
4781 -
4782 - usb2: usb@3100000 {
4783 - compatible = "snps,dwc3";
4784 - reg = <0x0 0x3100000 0x0 0x10000>;
4785 - interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4786 - dr_mode = "host";
4787 - snps,quirk-frame-length-adjustment = <0x20>;
4788 - snps,dis_rxdet_inp3_quirk;
4789 - };
4790 -
4791 - sata: sata@3200000 {
4792 - compatible = "fsl,ls1046a-ahci";
4793 - reg = <0x0 0x3200000 0x0 0x10000>,
4794 - <0x0 0x20140520 0x0 0x4>;
4795 - reg-names = "ahci", "sata-ecc";
4796 - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4797 - clocks = <&clockgen 4 1>;
4798 + aux_bus: aux_bus {
4799 + #address-cells = <2>;
4800 + #size-cells = <2>;
4801 + compatible = "simple-bus";
4802 + ranges;
4803 + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
4804 +
4805 + usb0: usb@2f00000 {
4806 + compatible = "snps,dwc3";
4807 + reg = <0x0 0x2f00000 0x0 0x10000>;
4808 + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4809 + dr_mode = "host";
4810 + snps,quirk-frame-length-adjustment = <0x20>;
4811 + snps,dis_rxdet_inp3_quirk;
4812 + usb3-lpm-capable;
4813 + snps,dis-u1u2-when-u3-quirk;
4814 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4815 + snps,host-vbus-glitches;
4816 + };
4817 +
4818 + usb1: usb@3000000 {
4819 + compatible = "snps,dwc3";
4820 + reg = <0x0 0x3000000 0x0 0x10000>;
4821 + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4822 + dr_mode = "host";
4823 + snps,quirk-frame-length-adjustment = <0x20>;
4824 + snps,dis_rxdet_inp3_quirk;
4825 + usb3-lpm-capable;
4826 + snps,dis-u1u2-when-u3-quirk;
4827 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4828 + snps,host-vbus-glitches;
4829 + };
4830 +
4831 + usb2: usb@3100000 {
4832 + compatible = "snps,dwc3";
4833 + reg = <0x0 0x3100000 0x0 0x10000>;
4834 + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4835 + dr_mode = "host";
4836 + snps,quirk-frame-length-adjustment = <0x20>;
4837 + snps,dis_rxdet_inp3_quirk;
4838 + usb3-lpm-capable;
4839 + snps,dis-u1u2-when-u3-quirk;
4840 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4841 + snps,host-vbus-glitches;
4842 + };
4843 +
4844 + sata: sata@3200000 {
4845 + compatible = "fsl,ls1046a-ahci";
4846 + reg = <0x0 0x3200000 0x0 0x10000>,
4847 + <0x0 0x20140520 0x0 0x4>;
4848 + reg-names = "ahci", "sata-ecc";
4849 + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4850 + clocks = <&clockgen 4 1>;
4851 + };
4852 + };
4853 +
4854 + qdma: qdma@8380000 {
4855 + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
4856 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
4857 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
4858 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
4859 + interrupts = <0 153 0x4>,
4860 + <0 39 0x4>,
4861 + <0 40 0x4>,
4862 + <0 41 0x4>,
4863 + <0 42 0x4>;
4864 + interrupt-names = "qdma-error", "qdma-queue0",
4865 + "qdma-queue1", "qdma-queue2", "qdma-queue3";
4866 + channels = <8>;
4867 + block-number = <1>;
4868 + block-offset = <0x10000>;
4869 + queues = <2>;
4870 + status-sizes = <64>;
4871 + queue-sizes = <64 64>;
4872 + big-endian;
4873 };
4874
4875 msi1: msi-controller@1580000 {
4876 @@ -661,6 +691,125 @@
4877 <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
4878 };
4879
4880 + pcie@3400000 {
4881 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4882 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
4883 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
4884 + reg-names = "regs", "config";
4885 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
4886 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
4887 + interrupt-names = "pme", "aer";
4888 + #address-cells = <3>;
4889 + #size-cells = <2>;
4890 + device_type = "pci";
4891 + dma-coherent;
4892 + iommu-map = <0 &smmu 0 1>;
4893 + num-lanes = <4>;
4894 + bus-range = <0x0 0xff>;
4895 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
4896 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4897 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4898 + #interrupt-cells = <1>;
4899 + interrupt-map-mask = <0 0 0 7>;
4900 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4901 + <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4902 + <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4903 + <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
4904 + status = "disabled";
4905 + };
4906 +
4907 + pcie_ep@3400000 {
4908 + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
4909 + reg = <0x00 0x03400000 0x0 0x00100000
4910 + 0x40 0x00000000 0x8 0x00000000>;
4911 + reg-names = "regs", "addr_space";
4912 + num-ib-windows = <6>;
4913 + num-ob-windows = <8>;
4914 + num-lanes = <2>;
4915 + status = "disabled";
4916 + };
4917 +
4918 + pcie@3500000 {
4919 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4920 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
4921 + 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
4922 + reg-names = "regs", "config";
4923 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
4924 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
4925 + interrupt-names = "pme", "aer";
4926 + #address-cells = <3>;
4927 + #size-cells = <2>;
4928 + device_type = "pci";
4929 + dma-coherent;
4930 + iommu-map = <0 &smmu 0 1>;
4931 + num-lanes = <2>;
4932 + bus-range = <0x0 0xff>;
4933 + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
4934 + 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4935 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4936 + #interrupt-cells = <1>;
4937 + interrupt-map-mask = <0 0 0 7>;
4938 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4939 + <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4940 + <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4941 + <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
4942 + status = "disabled";
4943 + };
4944 +
4945 + pcie_ep@3500000 {
4946 + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
4947 + reg = <0x00 0x03500000 0x0 0x00100000
4948 + 0x48 0x00000000 0x8 0x00000000>;
4949 + reg-names = "regs", "addr_space";
4950 + num-ib-windows = <6>;
4951 + num-ob-windows = <8>;
4952 + num-lanes = <2>;
4953 + status = "disabled";
4954 + };
4955 +
4956 + pcie@3600000 {
4957 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4958 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
4959 + 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
4960 + reg-names = "regs", "config";
4961 + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
4962 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
4963 + interrupt-names = "pme", "aer";
4964 + #address-cells = <3>;
4965 + #size-cells = <2>;
4966 + device_type = "pci";
4967 + dma-coherent;
4968 + iommu-map = <0 &smmu 0 1>;
4969 + num-lanes = <2>;
4970 + bus-range = <0x0 0xff>;
4971 + ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
4972 + 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4973 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4974 + #interrupt-cells = <1>;
4975 + interrupt-map-mask = <0 0 0 7>;
4976 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4977 + <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4978 + <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4979 + <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
4980 + status = "disabled";
4981 + };
4982 +
4983 + pcie_ep@3600000 {
4984 + compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep";
4985 + reg = <0x00 0x03600000 0x0 0x00100000
4986 + 0x50 0x00000000 0x8 0x00000000>;
4987 + reg-names = "regs", "addr_space";
4988 + num-ib-windows = <6>;
4989 + num-ob-windows = <8>;
4990 + num-lanes = <2>;
4991 + status = "disabled";
4992 + };
4993 +
4994 + serdes1: serdes@1ea0000 {
4995 + reg = <0x0 0x1ea0000 0 0x00002000>;
4996 + compatible = "fsl,serdes-10g";
4997 + };
4998 +
4999 };
5000
5001 reserved-memory {
5002 @@ -689,7 +838,36 @@
5003 no-map;
5004 };
5005 };
5006 +
5007 + firmware {
5008 + optee {
5009 + compatible = "linaro,optee-tz";
5010 + method = "smc";
5011 + };
5012 + };
5013 };
5014
5015 #include "qoriq-qman-portals.dtsi"
5016 #include "qoriq-bman-portals.dtsi"
5017 +
5018 +&thermal_zones {
5019 + thermal-zone0 {
5020 + status = "okay";
5021 + };
5022 +
5023 + thermal-zone1 {
5024 + status = "okay";
5025 + };
5026 +
5027 + thermal-zone2 {
5028 + status = "okay";
5029 + };
5030 +
5031 + thermal-zone3 {
5032 + status = "okay";
5033 + };
5034 +
5035 + thermal-zone4 {
5036 + status = "okay";
5037 + };
5038 +};
5039 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
5040 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
5041 @@ -1,3 +1,4 @@
5042 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5043 /*
5044 * Device Tree file for NXP LS1088A QDS Board.
5045 *
5046 @@ -5,43 +6,6 @@
5047 *
5048 * Harninder Rai <harninder.rai@nxp.com>
5049 *
5050 - * This file is dual-licensed: you can use it either under the terms
5051 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5052 - * licensing only applies to this file, and not this project as a
5053 - * whole.
5054 - *
5055 - * a) This library is free software; you can redistribute it and/or
5056 - * modify it under the terms of the GNU General Public License as
5057 - * published by the Free Software Foundation; either version 2 of the
5058 - * License, or (at your option) any later version.
5059 - *
5060 - * This library is distributed in the hope that it will be useful,
5061 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5062 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5063 - * GNU General Public License for more details.
5064 - *
5065 - * Or, alternatively,
5066 - *
5067 - * b) Permission is hereby granted, free of charge, to any person
5068 - * obtaining a copy of this software and associated documentation
5069 - * files (the "Software"), to deal in the Software without
5070 - * restriction, including without limitation the rights to use,
5071 - * copy, modify, merge, publish, distribute, sublicense, and/or
5072 - * sell copies of the Software, and to permit persons to whom the
5073 - * Software is furnished to do so, subject to the following
5074 - * conditions:
5075 - *
5076 - * The above copyright notice and this permission notice shall be
5077 - * included in all copies or substantial portions of the Software.
5078 - *
5079 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5080 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5081 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5082 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5083 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5084 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5085 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5086 - * OTHER DEALINGS IN THE SOFTWARE.
5087 */
5088
5089 /dts-v1/;
5090 @@ -134,6 +98,30 @@
5091 };
5092 };
5093
5094 +&qspi {
5095 + status = "okay";
5096 + fsl,qspi-has-second-chip;
5097 + qflash0: s25fs512s@0 {
5098 + compatible = "spansion,m25p80";
5099 + #address-cells = <1>;
5100 + #size-cells = <1>;
5101 + spi-max-frequency = <20000000>;
5102 + reg = <0>;
5103 + spi-rx-bus-width = <4>;
5104 + spi-tx-bus-width = <4>;
5105 + };
5106 +
5107 + qflash1: s25fs512s@1 {
5108 + compatible = "spansion,m25p80";
5109 + #address-cells = <1>;
5110 + #size-cells = <1>;
5111 + spi-max-frequency = <20000000>;
5112 + reg = <1>;
5113 + spi-rx-bus-width = <4>;
5114 + spi-tx-bus-width = <4>;
5115 + };
5116 +};
5117 +
5118 &duart0 {
5119 status = "okay";
5120 };
5121 @@ -149,3 +137,29 @@
5122 &sata {
5123 status = "okay";
5124 };
5125 +
5126 +&pcs_mdio1 {
5127 + pcs_phy1: ethernet-phy@0 {
5128 + backplane-mode = "10gbase-kr";
5129 + compatible = "ethernet-phy-ieee802.3-c45";
5130 + reg = <0x0>;
5131 + fsl,lane-handle = <&serdes1>;
5132 + fsl,lane-reg = <0x840 0x40>;/* lane B */
5133 + };
5134 +};
5135 +
5136 +&pcs_mdio2 {
5137 + pcs_phy2: ethernet-phy@0 {
5138 + backplane-mode = "10gbase-kr";
5139 + compatible = "ethernet-phy-ieee802.3-c45";
5140 + reg = <0x0>;
5141 + fsl,lane-handle = <&serdes1>;
5142 + fsl,lane-reg = <0x800 0x40>;/* lane A */
5143 + };
5144 +};
5145 +
5146 +/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
5147 + * &dpmac1 {
5148 + * phy-handle = <&pcs_phy1>;
5149 + * };
5150 + */
5151 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
5152 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
5153 @@ -1,3 +1,4 @@
5154 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5155 /*
5156 * Device Tree file for NXP LS1088A RDB Board.
5157 *
5158 @@ -5,43 +6,6 @@
5159 *
5160 * Harninder Rai <harninder.rai@nxp.com>
5161 *
5162 - * This file is dual-licensed: you can use it either under the terms
5163 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5164 - * licensing only applies to this file, and not this project as a
5165 - * whole.
5166 - *
5167 - * a) This library is free software; you can redistribute it and/or
5168 - * modify it under the terms of the GNU General Public License as
5169 - * published by the Free Software Foundation; either version 2 of the
5170 - * License, or (at your option) any later version.
5171 - *
5172 - * This library is distributed in the hope that it will be useful,
5173 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5174 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5175 - * GNU General Public License for more details.
5176 - *
5177 - * Or, alternatively,
5178 - *
5179 - * b) Permission is hereby granted, free of charge, to any person
5180 - * obtaining a copy of this software and associated documentation
5181 - * files (the "Software"), to deal in the Software without
5182 - * restriction, including without limitation the rights to use,
5183 - * copy, modify, merge, publish, distribute, sublicense, and/or
5184 - * sell copies of the Software, and to permit persons to whom the
5185 - * Software is furnished to do so, subject to the following
5186 - * conditions:
5187 - *
5188 - * The above copyright notice and this permission notice shall be
5189 - * included in all copies or substantial portions of the Software.
5190 - *
5191 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5192 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5193 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5194 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5195 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5196 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5197 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5198 - * OTHER DEALINGS IN THE SOFTWARE.
5199 */
5200
5201 /dts-v1/;
5202 @@ -110,6 +74,31 @@
5203 };
5204 };
5205
5206 +&qspi {
5207 + status = "okay";
5208 + fsl,qspi-has-second-chip;
5209 + qflash0: s25fs512s@0 {
5210 + compatible = "spansion,m25p80";
5211 + #address-cells = <1>;
5212 + #size-cells = <1>;
5213 + spi-max-frequency = <20000000>;
5214 + reg = <0>;
5215 + spi-rx-bus-width = <4>;
5216 + spi-tx-bus-width = <4>;
5217 + };
5218 +
5219 + qflash1: s25fs512s@1 {
5220 + compatible = "spansion,m25p80";
5221 + #address-cells = <1>;
5222 + #size-cells = <1>;
5223 + spi-max-frequency = <20000000>;
5224 + reg = <1>;
5225 + spi-rx-bus-width = <4>;
5226 + spi-tx-bus-width = <4>;
5227 + };
5228 +
5229 +};
5230 +
5231 &duart0 {
5232 status = "okay";
5233 };
5234 @@ -118,6 +107,14 @@
5235 status = "okay";
5236 };
5237
5238 +&usb0 {
5239 + status = "okay";
5240 +};
5241 +
5242 +&usb1 {
5243 + status = "okay";
5244 +};
5245 +
5246 &esdhc {
5247 status = "okay";
5248 };
5249 @@ -125,3 +122,82 @@
5250 &sata {
5251 status = "okay";
5252 };
5253 +
5254 +&emdio1 {
5255 + /* Freescale F104 PHY1 */
5256 + mdio1_phy1: emdio1_phy@1 {
5257 + reg = <0x1c>;
5258 + phy-connection-type = "qsgmii";
5259 + };
5260 + mdio1_phy2: emdio1_phy@2 {
5261 + reg = <0x1d>;
5262 + phy-connection-type = "qsgmii";
5263 + };
5264 + mdio1_phy3: emdio1_phy@3 {
5265 + reg = <0x1e>;
5266 + phy-connection-type = "qsgmii";
5267 + };
5268 + mdio1_phy4: emdio1_phy@4 {
5269 + reg = <0x1f>;
5270 + phy-connection-type = "qsgmii";
5271 + };
5272 + /* F104 PHY2 */
5273 + mdio1_phy5: emdio1_phy@5 {
5274 + reg = <0x0c>;
5275 + phy-connection-type = "qsgmii";
5276 + };
5277 + mdio1_phy6: emdio1_phy@6 {
5278 + reg = <0x0d>;
5279 + phy-connection-type = "qsgmii";
5280 + };
5281 + mdio1_phy7: emdio1_phy@7 {
5282 + reg = <0x0e>;
5283 + phy-connection-type = "qsgmii";
5284 + };
5285 + mdio1_phy8: emdio1_phy@8 {
5286 + reg = <0x0f>;
5287 + phy-connection-type = "qsgmii";
5288 + };
5289 +};
5290 +
5291 +&emdio2 {
5292 + /* Aquantia AQR105 10G PHY */
5293 + mdio2_phy1: emdio2_phy@1 {
5294 + compatible = "ethernet-phy-ieee802.3-c45";
5295 + interrupts = <0 2 0x4>;
5296 + reg = <0x0>;
5297 + phy-connection-type = "xfi";
5298 + };
5299 +};
5300 +
5301 +/* DPMAC connections to external PHYs
5302 + * based on LS1088A RM RevC - $24.1.2 SerDes Options
5303 + */
5304 +/* DPMAC1 is 10G SFP+, fixed link */
5305 +&dpmac2 {
5306 + phy-handle = <&mdio2_phy1>;
5307 +};
5308 +&dpmac3 {
5309 + phy-handle = <&mdio1_phy5>;
5310 +};
5311 +&dpmac4 {
5312 + phy-handle = <&mdio1_phy6>;
5313 +};
5314 +&dpmac5 {
5315 + phy-handle = <&mdio1_phy7>;
5316 +};
5317 +&dpmac6 {
5318 + phy-handle = <&mdio1_phy8>;
5319 +};
5320 +&dpmac7 {
5321 + phy-handle = <&mdio1_phy1>;
5322 +};
5323 +&dpmac8 {
5324 + phy-handle = <&mdio1_phy2>;
5325 +};
5326 +&dpmac9 {
5327 + phy-handle = <&mdio1_phy3>;
5328 +};
5329 +&dpmac10 {
5330 + phy-handle = <&mdio1_phy4>;
5331 +};
5332 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5333 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5334 @@ -1,3 +1,4 @@
5335 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5336 /*
5337 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5338 *
5339 @@ -5,43 +6,6 @@
5340 *
5341 * Harninder Rai <harninder.rai@nxp.com>
5342 *
5343 - * This file is dual-licensed: you can use it either under the terms
5344 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5345 - * licensing only applies to this file, and not this project as a
5346 - * whole.
5347 - *
5348 - * a) This library is free software; you can redistribute it and/or
5349 - * modify it under the terms of the GNU General Public License as
5350 - * published by the Free Software Foundation; either version 2 of the
5351 - * License, or (at your option) any later version.
5352 - *
5353 - * This library is distributed in the hope that it will be useful,
5354 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5355 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5356 - * GNU General Public License for more details.
5357 - *
5358 - * Or, alternatively,
5359 - *
5360 - * b) Permission is hereby granted, free of charge, to any person
5361 - * obtaining a copy of this software and associated documentation
5362 - * files (the "Software"), to deal in the Software without
5363 - * restriction, including without limitation the rights to use,
5364 - * copy, modify, merge, publish, distribute, sublicense, and/or
5365 - * sell copies of the Software, and to permit persons to whom the
5366 - * Software is furnished to do so, subject to the following
5367 - * conditions:
5368 - *
5369 - * The above copyright notice and this permission notice shall be
5370 - * included in all copies or substantial portions of the Software.
5371 - *
5372 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5373 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5374 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5375 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5376 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5377 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5378 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5379 - * OTHER DEALINGS IN THE SOFTWARE.
5380 */
5381 #include <dt-bindings/interrupt-controller/arm-gic.h>
5382 #include <dt-bindings/thermal/thermal.h>
5383 @@ -61,7 +25,7 @@
5384 #size-cells = <0>;
5385
5386 /* We have 2 clusters having 4 Cortex-A53 cores each */
5387 - cpu0: cpu@0 {
5388 + cooling_map0: cpu0: cpu@0 {
5389 device_type = "cpu";
5390 compatible = "arm,cortex-a53";
5391 reg = <0x0>;
5392 @@ -94,7 +58,7 @@
5393 cpu-idle-states = <&CPU_PH20>;
5394 };
5395
5396 - cpu4: cpu@100 {
5397 + cooling_map1: cpu4: cpu@100 {
5398 device_type = "cpu";
5399 compatible = "arm,cortex-a53";
5400 reg = <0x100>;
5401 @@ -130,7 +94,7 @@
5402 CPU_PH20: cpu-ph20 {
5403 compatible = "arm,idle-state";
5404 idle-state-name = "PH20";
5405 - arm,psci-suspend-param = <0x00010000>;
5406 + arm,psci-suspend-param = <0x0>;
5407 entry-latency-us = <1000>;
5408 exit-latency-us = <1000>;
5409 min-residency-us = <3000>;
5410 @@ -147,6 +111,15 @@
5411 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
5412 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
5413 interrupts = <1 9 IRQ_TYPE_LEVEL_HIGH>;
5414 + #address-cells = <2>;
5415 + #size-cells = <2>;
5416 + ranges;
5417 +
5418 + its: gic-its@6020000 {
5419 + compatible = "arm,gic-v3-its";
5420 + msi-controller;
5421 + reg = <0x0 0x6020000 0 0x20000>;
5422 + };
5423 };
5424
5425 timer {
5426 @@ -169,11 +142,31 @@
5427 clock-output-names = "sysclk";
5428 };
5429
5430 + dcfg: dcfg@1e00000 {
5431 + compatible = "fsl,ls1088a-dcfg", "syscon";
5432 + reg = <0x0 0x1e00000 0x0 0x10000>;
5433 + little-endian;
5434 + };
5435 +
5436 + rstcr: syscon@1e60000 {
5437 + compatible = "fsl,ls1088a-rstcr", "syscon";
5438 + reg = <0x0 0x1e60000 0x0 0x4>;
5439 + };
5440 +
5441 + reboot {
5442 + compatible = "syscon-reboot";
5443 + regmap = <&rstcr>;
5444 + offset = <0x0>;
5445 + mask = <0x02>;
5446 + };
5447 +
5448 +
5449 soc {
5450 compatible = "simple-bus";
5451 #address-cells = <2>;
5452 #size-cells = <2>;
5453 ranges;
5454 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
5455
5456 clockgen: clocking@1300000 {
5457 compatible = "fsl,ls1088a-clockgen";
5458 @@ -229,43 +222,7 @@
5459 #thermal-sensor-cells = <1>;
5460 };
5461
5462 - thermal-zones {
5463 - cpu_thermal: cpu-thermal {
5464 - polling-delay-passive = <1000>;
5465 - polling-delay = <5000>;
5466 - thermal-sensors = <&tmu 0>;
5467 -
5468 - trips {
5469 - cpu_alert: cpu-alert {
5470 - temperature = <85000>;
5471 - hysteresis = <2000>;
5472 - type = "passive";
5473 - };
5474 -
5475 - cpu_crit: cpu-crit {
5476 - temperature = <95000>;
5477 - hysteresis = <2000>;
5478 - type = "critical";
5479 - };
5480 - };
5481 -
5482 - cooling-maps {
5483 - map0 {
5484 - trip = <&cpu_alert>;
5485 - cooling-device =
5486 - <&cpu0 THERMAL_NO_LIMIT
5487 - THERMAL_NO_LIMIT>;
5488 - };
5489 -
5490 - map1 {
5491 - trip = <&cpu_alert>;
5492 - cooling-device =
5493 - <&cpu4 THERMAL_NO_LIMIT
5494 - THERMAL_NO_LIMIT>;
5495 - };
5496 - };
5497 - };
5498 - };
5499 + #include "fsl-tmu.dtsi"
5500
5501 duart0: serial@21c0500 {
5502 compatible = "fsl,ns16550", "ns16550a";
5503 @@ -283,6 +240,62 @@
5504 status = "disabled";
5505 };
5506
5507 + cluster1_core0_watchdog: wdt@c000000 {
5508 + compatible = "arm,sp805-wdt", "arm,primecell";
5509 + reg = <0x0 0xc000000 0x0 0x1000>;
5510 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5511 + clock-names = "apb_pclk", "wdog_clk";
5512 + };
5513 +
5514 + cluster1_core1_watchdog: wdt@c010000 {
5515 + compatible = "arm,sp805-wdt", "arm,primecell";
5516 + reg = <0x0 0xc010000 0x0 0x1000>;
5517 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5518 + clock-names = "apb_pclk", "wdog_clk";
5519 + };
5520 +
5521 + cluster1_core2_watchdog: wdt@c020000 {
5522 + compatible = "arm,sp805-wdt", "arm,primecell";
5523 + reg = <0x0 0xc020000 0x0 0x1000>;
5524 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5525 + clock-names = "apb_pclk", "wdog_clk";
5526 + };
5527 +
5528 + cluster1_core3_watchdog: wdt@c030000 {
5529 + compatible = "arm,sp805-wdt", "arm,primecell";
5530 + reg = <0x0 0xc030000 0x0 0x1000>;
5531 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5532 + clock-names = "apb_pclk", "wdog_clk";
5533 + };
5534 +
5535 + cluster2_core0_watchdog: wdt@c100000 {
5536 + compatible = "arm,sp805-wdt", "arm,primecell";
5537 + reg = <0x0 0xc100000 0x0 0x1000>;
5538 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5539 + clock-names = "apb_pclk", "wdog_clk";
5540 + };
5541 +
5542 + cluster2_core1_watchdog: wdt@c110000 {
5543 + compatible = "arm,sp805-wdt", "arm,primecell";
5544 + reg = <0x0 0xc110000 0x0 0x1000>;
5545 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5546 + clock-names = "apb_pclk", "wdog_clk";
5547 + };
5548 +
5549 + cluster2_core2_watchdog: wdt@c120000 {
5550 + compatible = "arm,sp805-wdt", "arm,primecell";
5551 + reg = <0x0 0xc120000 0x0 0x1000>;
5552 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5553 + clock-names = "apb_pclk", "wdog_clk";
5554 + };
5555 +
5556 + cluster2_core3_watchdog: wdt@c130000 {
5557 + compatible = "arm,sp805-wdt", "arm,primecell";
5558 + reg = <0x0 0xc130000 0x0 0x1000>;
5559 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5560 + clock-names = "apb_pclk", "wdog_clk";
5561 + };
5562 +
5563 gpio0: gpio@2300000 {
5564 compatible = "fsl,qoriq-gpio";
5565 reg = <0x0 0x2300000 0x0 0x10000>;
5566 @@ -323,6 +336,72 @@
5567 #interrupt-cells = <2>;
5568 };
5569
5570 + /* TODO: WRIOP (CCSR?) */
5571 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
5572 + * E-MDIO1: 0x1_6000
5573 + */
5574 + compatible = "fsl,fman-memac-mdio";
5575 + reg = <0x0 0x8B96000 0x0 0x1000>;
5576 + device_type = "mdio";
5577 + little-endian; /* force the driver in LE mode */
5578 +
5579 + /* Not necessary on the QDS, but needed on the RDB */
5580 + #address-cells = <1>;
5581 + #size-cells = <0>;
5582 + };
5583 +
5584 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
5585 + * E-MDIO2: 0x1_7000
5586 + */
5587 + compatible = "fsl,fman-memac-mdio";
5588 + reg = <0x0 0x8B97000 0x0 0x1000>;
5589 + device_type = "mdio";
5590 + little-endian; /* force the driver in LE mode */
5591 +
5592 + #address-cells = <1>;
5593 + #size-cells = <0>;
5594 + };
5595 +
5596 + pcs_mdio1: mdio@0x8c07000 {
5597 + compatible = "fsl,fman-memac-mdio";
5598 + reg = <0x0 0x8c07000 0x0 0x1000>;
5599 + device_type = "mdio";
5600 + little-endian;
5601 +
5602 + #address-cells = <1>;
5603 + #size-cells = <0>;
5604 + };
5605 +
5606 + pcs_mdio2: mdio@0x8c0b000 {
5607 + compatible = "fsl,fman-memac-mdio";
5608 + reg = <0x0 0x8c0b000 0x0 0x1000>;
5609 + device_type = "mdio";
5610 + little-endian;
5611 +
5612 + #address-cells = <1>;
5613 + #size-cells = <0>;
5614 + };
5615 +
5616 + pcs_mdio3: mdio@0x8c0f000 {
5617 + compatible = "fsl,fman-memac-mdio";
5618 + reg = <0x0 0x8c0f000 0x0 0x1000>;
5619 + device_type = "mdio";
5620 + little-endian;
5621 +
5622 + #address-cells = <1>;
5623 + #size-cells = <0>;
5624 + };
5625 +
5626 + pcs_mdio4: mdio@0x8c13000 {
5627 + compatible = "fsl,fman-memac-mdio";
5628 + reg = <0x0 0x8c13000 0x0 0x1000>;
5629 + device_type = "mdio";
5630 + little-endian;
5631 +
5632 + #address-cells = <1>;
5633 + #size-cells = <0>;
5634 + };
5635 +
5636 ifc: ifc@2240000 {
5637 compatible = "fsl,ifc", "simple-bus";
5638 reg = <0x0 0x2240000 0x0 0x20000>;
5639 @@ -333,13 +412,22 @@
5640 status = "disabled";
5641 };
5642
5643 + ftm0: ftm0@2800000 {
5644 + compatible = "fsl,ls1088a-ftm-alarm";
5645 + reg = <0x0 0x2800000 0x0 0x10000>,
5646 + <0x0 0x1e34050 0x0 0x4>;
5647 + reg-names = "ftm", "pmctrl";
5648 + interrupts = <0 44 4>;
5649 + };
5650 +
5651 i2c0: i2c@2000000 {
5652 - compatible = "fsl,vf610-i2c";
5653 + compatible = "fsl,vf610-i2c", "fsl,ls1088a-vf610-i2c";
5654 #address-cells = <1>;
5655 #size-cells = <0>;
5656 reg = <0x0 0x2000000 0x0 0x10000>;
5657 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5658 - clocks = <&clockgen 4 3>;
5659 + clocks = <&clockgen 4 7>;
5660 + scl-gpios = <&gpio3 30 0>;
5661 status = "disabled";
5662 };
5663
5664 @@ -349,7 +437,7 @@
5665 #size-cells = <0>;
5666 reg = <0x0 0x2010000 0x0 0x10000>;
5667 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5668 - clocks = <&clockgen 4 3>;
5669 + clocks = <&clockgen 4 7>;
5670 status = "disabled";
5671 };
5672
5673 @@ -359,7 +447,7 @@
5674 #size-cells = <0>;
5675 reg = <0x0 0x2020000 0x0 0x10000>;
5676 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5677 - clocks = <&clockgen 4 3>;
5678 + clocks = <&clockgen 4 7>;
5679 status = "disabled";
5680 };
5681
5682 @@ -369,7 +457,7 @@
5683 #size-cells = <0>;
5684 reg = <0x0 0x2030000 0x0 0x10000>;
5685 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5686 - clocks = <&clockgen 4 3>;
5687 + clocks = <&clockgen 4 7>;
5688 status = "disabled";
5689 };
5690
5691 @@ -385,6 +473,28 @@
5692 status = "disabled";
5693 };
5694
5695 + usb0: usb3@3100000 {
5696 + compatible = "snps,dwc3";
5697 + reg = <0x0 0x3100000 0x0 0x10000>;
5698 + interrupts = <0 80 0x4>; /* Level high type */
5699 + dr_mode = "host";
5700 + configure-gfladj;
5701 + snps,dis_rxdet_inp3_quirk;
5702 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
5703 + snps,host-vbus-glitches;
5704 + };
5705 +
5706 + usb1: usb3@3110000 {
5707 + compatible = "snps,dwc3";
5708 + reg = <0x0 0x3110000 0x0 0x10000>;
5709 + interrupts = <0 81 0x4>; /* Level high type */
5710 + dr_mode = "host";
5711 + configure-gfladj;
5712 + snps,dis_rxdet_inp3_quirk;
5713 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
5714 + snps,host-vbus-glitches;
5715 + };
5716 +
5717 sata: sata@3200000 {
5718 compatible = "fsl,ls1088a-ahci";
5719 reg = <0x0 0x3200000 0x0 0x10000>,
5720 @@ -395,6 +505,17 @@
5721 dma-coherent;
5722 status = "disabled";
5723 };
5724 + qspi: quadspi@20c0000 {
5725 + compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
5726 + #address-cells = <1>;
5727 + #size-cells = <0>;
5728 + reg = <0x0 0x20c0000 0x0 0x10000>,
5729 + <0x0 0x20000000 0x0 0x10000000>;
5730 + reg-names = "QuadSPI", "QuadSPI-memory";
5731 + interrupts = <0 25 0x4>; /* Level high type */
5732 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5733 + clock-names = "qspi_en", "qspi";
5734 + };
5735
5736 crypto: crypto@8000000 {
5737 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
5738 @@ -434,6 +555,267 @@
5739 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
5740 };
5741 };
5742 +
5743 + pcie@3400000 {
5744 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5745 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
5746 + 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
5747 + reg-names = "regs", "config";
5748 + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5749 + interrupt-names = "aer";
5750 + #address-cells = <3>;
5751 + #size-cells = <2>;
5752 + device_type = "pci";
5753 + dma-coherent;
5754 + num-lanes = <4>;
5755 + bus-range = <0x0 0xff>;
5756 + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
5757 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5758 + msi-parent = <&its>;
5759 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5760 + #interrupt-cells = <1>;
5761 + interrupt-map-mask = <0 0 0 7>;
5762 + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
5763 + <0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>,
5764 + <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
5765 + <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
5766 + status = "disabled";
5767 + };
5768 +
5769 + pcie@3500000 {
5770 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5771 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
5772 + 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
5773 + reg-names = "regs", "config";
5774 + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5775 + interrupt-names = "aer";
5776 + #address-cells = <3>;
5777 + #size-cells = <2>;
5778 + device_type = "pci";
5779 + dma-coherent;
5780 + num-lanes = <4>;
5781 + bus-range = <0x0 0xff>;
5782 + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
5783 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5784 + msi-parent = <&its>;
5785 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5786 + #interrupt-cells = <1>;
5787 + interrupt-map-mask = <0 0 0 7>;
5788 + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
5789 + <0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>,
5790 + <0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>,
5791 + <0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
5792 + status = "disabled";
5793 + };
5794 +
5795 + pcie@3600000 {
5796 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5797 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
5798 + 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
5799 + reg-names = "regs", "config";
5800 + interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5801 + interrupt-names = "aer";
5802 + #address-cells = <3>;
5803 + #size-cells = <2>;
5804 + device_type = "pci";
5805 + dma-coherent;
5806 + num-lanes = <8>;
5807 + bus-range = <0x0 0xff>;
5808 + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
5809 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5810 + msi-parent = <&its>;
5811 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5812 + #interrupt-cells = <1>;
5813 + interrupt-map-mask = <0 0 0 7>;
5814 + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
5815 + <0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>,
5816 + <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
5817 + <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
5818 + status = "disabled";
5819 + };
5820 +
5821 + fsl_mc: fsl-mc@80c000000 {
5822 + compatible = "fsl,qoriq-mc";
5823 + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
5824 + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
5825 + msi-parent = <&its>;
5826 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
5827 + dma-coherent;
5828 + #address-cells = <3>;
5829 + #size-cells = <1>;
5830 +
5831 + /*
5832 + * Region type 0x0 - MC portals
5833 + * Region type 0x1 - QBMAN portals
5834 + */
5835 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
5836 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
5837 +
5838 + dpmacs {
5839 + #address-cells = <1>;
5840 + #size-cells = <0>;
5841 +
5842 + dpmac1: dpmac@1 {
5843 + compatible = "fsl,qoriq-mc-dpmac";
5844 + reg = <1>;
5845 + };
5846 +
5847 + dpmac2: dpmac@2 {
5848 + compatible = "fsl,qoriq-mc-dpmac";
5849 + reg = <2>;
5850 + };
5851 +
5852 + dpmac3: dpmac@3 {
5853 + compatible = "fsl,qoriq-mc-dpmac";
5854 + reg = <3>;
5855 + };
5856 +
5857 + dpmac4: dpmac@4 {
5858 + compatible = "fsl,qoriq-mc-dpmac";
5859 + reg = <4>;
5860 + };
5861 +
5862 + dpmac5: dpmac@5 {
5863 + compatible = "fsl,qoriq-mc-dpmac";
5864 + reg = <5>;
5865 + };
5866 +
5867 + dpmac6: dpmac@6 {
5868 + compatible = "fsl,qoriq-mc-dpmac";
5869 + reg = <6>;
5870 + };
5871 +
5872 + dpmac7: dpmac@7 {
5873 + compatible = "fsl,qoriq-mc-dpmac";
5874 + reg = <7>;
5875 + };
5876 +
5877 + dpmac8: dpmac@8 {
5878 + compatible = "fsl,qoriq-mc-dpmac";
5879 + reg = <8>;
5880 + };
5881 +
5882 + dpmac9: dpmac@9 {
5883 + compatible = "fsl,qoriq-mc-dpmac";
5884 + reg = <9>;
5885 + };
5886 +
5887 + dpmac10: dpmac@a {
5888 + compatible = "fsl,qoriq-mc-dpmac";
5889 + reg = <0xa>;
5890 + };
5891 + };
5892 + };
5893 +
5894 + smmu: iommu@5000000 {
5895 + compatible = "arm,mmu-500";
5896 + reg = <0 0x5000000 0 0x800000>;
5897 + #global-interrupts = <12>;
5898 + #iommu-cells = <1>;
5899 + stream-match-mask = <0x7C00>;
5900 + interrupts = <0 13 4>, /* global secure fault */
5901 + <0 14 4>, /* combined secure interrupt */
5902 + <0 15 4>, /* global non-secure fault */
5903 + <0 16 4>, /* combined non-secure interrupt */
5904 + /* performance counter interrupts 0-7 */
5905 + <0 211 4>,
5906 + <0 212 4>,
5907 + <0 213 4>,
5908 + <0 214 4>,
5909 + <0 215 4>,
5910 + <0 216 4>,
5911 + <0 217 4>,
5912 + <0 218 4>,
5913 + /* per context interrupt, 64 interrupts */
5914 + <0 146 4>,
5915 + <0 147 4>,
5916 + <0 148 4>,
5917 + <0 149 4>,
5918 + <0 150 4>,
5919 + <0 151 4>,
5920 + <0 152 4>,
5921 + <0 153 4>,
5922 + <0 154 4>,
5923 + <0 155 4>,
5924 + <0 156 4>,
5925 + <0 157 4>,
5926 + <0 158 4>,
5927 + <0 159 4>,
5928 + <0 160 4>,
5929 + <0 161 4>,
5930 + <0 162 4>,
5931 + <0 163 4>,
5932 + <0 164 4>,
5933 + <0 165 4>,
5934 + <0 166 4>,
5935 + <0 167 4>,
5936 + <0 168 4>,
5937 + <0 169 4>,
5938 + <0 170 4>,
5939 + <0 171 4>,
5940 + <0 172 4>,
5941 + <0 173 4>,
5942 + <0 174 4>,
5943 + <0 175 4>,
5944 + <0 176 4>,
5945 + <0 177 4>,
5946 + <0 178 4>,
5947 + <0 179 4>,
5948 + <0 180 4>,
5949 + <0 181 4>,
5950 + <0 182 4>,
5951 + <0 183 4>,
5952 + <0 184 4>,
5953 + <0 185 4>,
5954 + <0 186 4>,
5955 + <0 187 4>,
5956 + <0 188 4>,
5957 + <0 189 4>,
5958 + <0 190 4>,
5959 + <0 191 4>,
5960 + <0 192 4>,
5961 + <0 193 4>,
5962 + <0 194 4>,
5963 + <0 195 4>,
5964 + <0 196 4>,
5965 + <0 197 4>,
5966 + <0 198 4>,
5967 + <0 199 4>,
5968 + <0 200 4>,
5969 + <0 201 4>,
5970 + <0 202 4>,
5971 + <0 203 4>,
5972 + <0 204 4>,
5973 + <0 205 4>,
5974 + <0 206 4>,
5975 + <0 207 4>,
5976 + <0 208 4>,
5977 + <0 209 4>;
5978 + };
5979 +
5980 + serdes1: serdes@1ea0000 {
5981 + compatible = "fsl,serdes-10g";
5982 + reg = <0x0 0x1ea0000 0 0x00002000>;
5983 + little-endian;
5984 + };
5985 };
5986
5987 + firmware {
5988 + optee {
5989 + compatible = "linaro,optee-tz";
5990 + method = "smc";
5991 + };
5992 + };
5993 +};
5994 +
5995 +#include "fsl-tmu-map1.dtsi"
5996 +
5997 +&thermal_zones {
5998 + thermal-zone0 {
5999 + status = "okay";
6000 + };
6001 +
6002 + thermal-zone1 {
6003 + status = "okay";
6004 + };
6005 };
6006 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
6007 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
6008 @@ -1,3 +1,4 @@
6009 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6010 /*
6011 * Device Tree file for Freescale LS2080a QDS Board.
6012 *
6013 @@ -7,43 +8,6 @@
6014 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6015 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6016 *
6017 - * This file is dual-licensed: you can use it either under the terms
6018 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6019 - * licensing only applies to this file, and not this project as a
6020 - * whole.
6021 - *
6022 - * a) This library is free software; you can redistribute it and/or
6023 - * modify it under the terms of the GNU General Public License as
6024 - * published by the Free Software Foundation; either version 2 of the
6025 - * License, or (at your option) any later version.
6026 - *
6027 - * This library is distributed in the hope that it will be useful,
6028 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6029 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6030 - * GNU General Public License for more details.
6031 - *
6032 - * Or, alternatively,
6033 - *
6034 - * b) Permission is hereby granted, free of charge, to any person
6035 - * obtaining a copy of this software and associated documentation
6036 - * files (the "Software"), to deal in the Software without
6037 - * restriction, including without limitation the rights to use,
6038 - * copy, modify, merge, publish, distribute, sublicense, and/or
6039 - * sell copies of the Software, and to permit persons to whom the
6040 - * Software is furnished to do so, subject to the following
6041 - * conditions:
6042 - *
6043 - * The above copyright notice and this permission notice shall be
6044 - * included in all copies or substantial portions of the Software.
6045 - *
6046 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6047 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6048 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6049 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6050 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6051 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6052 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6053 - * OTHER DEALINGS IN THE SOFTWARE.
6054 */
6055
6056 /dts-v1/;
6057 @@ -59,3 +23,65 @@
6058 stdout-path = "serial0:115200n8";
6059 };
6060 };
6061 +
6062 +&ifc {
6063 + boardctrl: board-control@3,0 {
6064 + #address-cells = <1>;
6065 + #size-cells = <1>;
6066 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
6067 + reg = <3 0 0x300>; /* TODO check address */
6068 + ranges = <0 3 0 0x300>;
6069 +
6070 + mdio_mux_emi1 {
6071 + compatible = "mdio-mux-mmioreg", "mdio-mux";
6072 + mdio-parent-bus = <&emdio1>;
6073 + reg = <0x54 1>; /* BRDCFG4 */
6074 + mux-mask = <0xe0>; /* EMI1_MDIO */
6075 +
6076 + #address-cells=<1>;
6077 + #size-cells = <0>;
6078 +
6079 + /* Child MDIO buses, one for each riser card:
6080 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6081 + * VSC8234 PHYs on the riser cards.
6082 + */
6083 +
6084 + mdio_mux3: mdio@60 {
6085 + reg = <0x60>;
6086 + #address-cells = <1>;
6087 + #size-cells = <0>;
6088 +
6089 + mdio0_phy12: mdio_phy0@1c {
6090 + reg = <0x1c>;
6091 + phy-connection-type = "sgmii";
6092 + };
6093 + mdio0_phy13: mdio_phy1@1d {
6094 + reg = <0x1d>;
6095 + phy-connection-type = "sgmii";
6096 + };
6097 + mdio0_phy14: mdio_phy2@1e {
6098 + reg = <0x1e>;
6099 + phy-connection-type = "sgmii";
6100 + };
6101 + mdio0_phy15: mdio_phy3@1f {
6102 + reg = <0x1f>;
6103 + phy-connection-type = "sgmii";
6104 + };
6105 + };
6106 + };
6107 + };
6108 +};
6109 +
6110 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6111 +&dpmac9 {
6112 + phy-handle = <&mdio0_phy12>;
6113 +};
6114 +&dpmac10 {
6115 + phy-handle = <&mdio0_phy13>;
6116 +};
6117 +&dpmac11 {
6118 + phy-handle = <&mdio0_phy14>;
6119 +};
6120 +&dpmac12 {
6121 + phy-handle = <&mdio0_phy15>;
6122 +};
6123 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6124 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6125 @@ -1,3 +1,4 @@
6126 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6127 /*
6128 * Device Tree file for Freescale LS2080a RDB Board.
6129 *
6130 @@ -7,43 +8,6 @@
6131 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6132 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6133 *
6134 - * This file is dual-licensed: you can use it either under the terms
6135 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6136 - * licensing only applies to this file, and not this project as a
6137 - * whole.
6138 - *
6139 - * a) This library is free software; you can redistribute it and/or
6140 - * modify it under the terms of the GNU General Public License as
6141 - * published by the Free Software Foundation; either version 2 of the
6142 - * License, or (at your option) any later version.
6143 - *
6144 - * This library is distributed in the hope that it will be useful,
6145 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6146 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6147 - * GNU General Public License for more details.
6148 - *
6149 - * Or, alternatively,
6150 - *
6151 - * b) Permission is hereby granted, free of charge, to any person
6152 - * obtaining a copy of this software and associated documentation
6153 - * files (the "Software"), to deal in the Software without
6154 - * restriction, including without limitation the rights to use,
6155 - * copy, modify, merge, publish, distribute, sublicense, and/or
6156 - * sell copies of the Software, and to permit persons to whom the
6157 - * Software is furnished to do so, subject to the following
6158 - * conditions:
6159 - *
6160 - * The above copyright notice and this permission notice shall be
6161 - * included in all copies or substantial portions of the Software.
6162 - *
6163 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6164 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6165 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6166 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6167 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6168 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6169 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6170 - * OTHER DEALINGS IN THE SOFTWARE.
6171 */
6172
6173 /dts-v1/;
6174 @@ -59,3 +23,83 @@
6175 stdout-path = "serial1:115200n8";
6176 };
6177 };
6178 +
6179 +&emdio1 {
6180 + status = "disabled";
6181 + /* CS4340 PHYs */
6182 + mdio1_phy1: emdio1_phy@1 {
6183 + reg = <0x10>;
6184 + phy-connection-type = "xfi";
6185 + };
6186 + mdio1_phy2: emdio1_phy@2 {
6187 + reg = <0x11>;
6188 + phy-connection-type = "xfi";
6189 + };
6190 + mdio1_phy3: emdio1_phy@3 {
6191 + reg = <0x12>;
6192 + phy-connection-type = "xfi";
6193 + };
6194 + mdio1_phy4: emdio1_phy@4 {
6195 + reg = <0x13>;
6196 + phy-connection-type = "xfi";
6197 + };
6198 +};
6199 +
6200 +&emdio2 {
6201 + /* AQR405 PHYs */
6202 + mdio2_phy1: emdio2_phy@1 {
6203 + compatible = "ethernet-phy-ieee802.3-c45";
6204 + interrupts = <0 1 0x4>; /* Level high type */
6205 + reg = <0x0>;
6206 + phy-connection-type = "xfi";
6207 + };
6208 + mdio2_phy2: emdio2_phy@2 {
6209 + compatible = "ethernet-phy-ieee802.3-c45";
6210 + interrupts = <0 2 0x4>; /* Level high type */
6211 + reg = <0x1>;
6212 + phy-connection-type = "xfi";
6213 + };
6214 + mdio2_phy3: emdio2_phy@3 {
6215 + compatible = "ethernet-phy-ieee802.3-c45";
6216 + interrupts = <0 4 0x4>; /* Level high type */
6217 + reg = <0x2>;
6218 + phy-connection-type = "xfi";
6219 + };
6220 + mdio2_phy4: emdio2_phy@4 {
6221 + compatible = "ethernet-phy-ieee802.3-c45";
6222 + interrupts = <0 5 0x4>; /* Level high type */
6223 + reg = <0x3>;
6224 + phy-connection-type = "xfi";
6225 + };
6226 +};
6227 +
6228 +/* Update DPMAC connections to external PHYs, under the assumption of
6229 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6230 + */
6231 +/* Leave Cortina nodes commented out until driver is integrated
6232 + *&dpmac1 {
6233 + * phy-handle = <&mdio1_phy1>;
6234 + *};
6235 + *&dpmac2 {
6236 + * phy-handle = <&mdio1_phy2>;
6237 + *};
6238 + *&dpmac3 {
6239 + * phy-handle = <&mdio1_phy3>;
6240 + *};
6241 + *&dpmac4 {
6242 + * phy-handle = <&mdio1_phy4>;
6243 + *};
6244 + */
6245 +
6246 +&dpmac5 {
6247 + phy-handle = <&mdio2_phy1>;
6248 +};
6249 +&dpmac6 {
6250 + phy-handle = <&mdio2_phy2>;
6251 +};
6252 +&dpmac7 {
6253 + phy-handle = <&mdio2_phy3>;
6254 +};
6255 +&dpmac8 {
6256 + phy-handle = <&mdio2_phy4>;
6257 +};
6258 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6259 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6260 @@ -1,3 +1,4 @@
6261 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6262 /*
6263 * Device Tree file for Freescale LS2080a software Simulator model
6264 *
6265 @@ -5,43 +6,6 @@
6266 *
6267 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6268 *
6269 - * This file is dual-licensed: you can use it either under the terms
6270 - * of the GPL or the X11 license, at your option. Note that this dual
6271 - * licensing only applies to this file, and not this project as a
6272 - * whole.
6273 - *
6274 - * a) This library is free software; you can redistribute it and/or
6275 - * modify it under the terms of the GNU General Public License as
6276 - * published by the Free Software Foundation; either version 2 of the
6277 - * License, or (at your option) any later version.
6278 - *
6279 - * This library is distributed in the hope that it will be useful,
6280 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6281 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6282 - * GNU General Public License for more details.
6283 - *
6284 - * Or, alternatively,
6285 - *
6286 - * b) Permission is hereby granted, free of charge, to any person
6287 - * obtaining a copy of this software and associated documentation
6288 - * files (the "Software"), to deal in the Software without
6289 - * restriction, including without limitation the rights to use,
6290 - * copy, modify, merge, publish, distribute, sublicense, and/or
6291 - * sell copies of the Software, and to permit persons to whom the
6292 - * Software is furnished to do so, subject to the following
6293 - * conditions:
6294 - *
6295 - * The above copyright notice and this permission notice shall be
6296 - * included in all copies or substantial portions of the Software.
6297 - *
6298 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6299 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6300 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6301 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6302 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6303 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6304 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6305 - * OTHER DEALINGS IN THE SOFTWARE.
6306 */
6307
6308 /dts-v1/;
6309 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6310 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6311 @@ -1,3 +1,4 @@
6312 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6313 /*
6314 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6315 *
6316 @@ -6,49 +7,12 @@
6317 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6318 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6319 *
6320 - * This file is dual-licensed: you can use it either under the terms
6321 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6322 - * licensing only applies to this file, and not this project as a
6323 - * whole.
6324 - *
6325 - * a) This library is free software; you can redistribute it and/or
6326 - * modify it under the terms of the GNU General Public License as
6327 - * published by the Free Software Foundation; either version 2 of the
6328 - * License, or (at your option) any later version.
6329 - *
6330 - * This library is distributed in the hope that it will be useful,
6331 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6332 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6333 - * GNU General Public License for more details.
6334 - *
6335 - * Or, alternatively,
6336 - *
6337 - * b) Permission is hereby granted, free of charge, to any person
6338 - * obtaining a copy of this software and associated documentation
6339 - * files (the "Software"), to deal in the Software without
6340 - * restriction, including without limitation the rights to use,
6341 - * copy, modify, merge, publish, distribute, sublicense, and/or
6342 - * sell copies of the Software, and to permit persons to whom the
6343 - * Software is furnished to do so, subject to the following
6344 - * conditions:
6345 - *
6346 - * The above copyright notice and this permission notice shall be
6347 - * included in all copies or substantial portions of the Software.
6348 - *
6349 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6350 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6351 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6352 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6353 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6354 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6355 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6356 - * OTHER DEALINGS IN THE SOFTWARE.
6357 */
6358
6359 #include "fsl-ls208xa.dtsi"
6360
6361 &cpu {
6362 - cpu0: cpu@0 {
6363 + cooling_map0: cpu0: cpu@0 {
6364 device_type = "cpu";
6365 compatible = "arm,cortex-a57";
6366 reg = <0x0>;
6367 @@ -67,7 +31,7 @@
6368 next-level-cache = <&cluster0_l2>;
6369 };
6370
6371 - cpu2: cpu@100 {
6372 + cooling_map1: cpu2: cpu@100 {
6373 device_type = "cpu";
6374 compatible = "arm,cortex-a57";
6375 reg = <0x100>;
6376 @@ -86,7 +50,7 @@
6377 next-level-cache = <&cluster1_l2>;
6378 };
6379
6380 - cpu4: cpu@200 {
6381 + cooling_map2: cpu4: cpu@200 {
6382 device_type = "cpu";
6383 compatible = "arm,cortex-a57";
6384 reg = <0x200>;
6385 @@ -105,7 +69,7 @@
6386 next-level-cache = <&cluster2_l2>;
6387 };
6388
6389 - cpu6: cpu@300 {
6390 + cooling_map3: cpu6: cpu@300 {
6391 device_type = "cpu";
6392 compatible = "arm,cortex-a57";
6393 reg = <0x300>;
6394 @@ -150,6 +114,10 @@
6395 };
6396 };
6397
6398 +&timer {
6399 + fsl,erratum-a008585;
6400 +};
6401 +
6402 &pcie1 {
6403 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6404 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
6405 --- /dev/null
6406 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
6407 @@ -0,0 +1,163 @@
6408 +/*
6409 + * Device Tree file for NXP LS2081A RDB Board.
6410 + *
6411 + * Copyright 2017 NXP
6412 + *
6413 + * Priyanka Jain <priyanka.jain@nxp.com>
6414 + *
6415 + * This file is dual-licensed: you can use it either under the terms
6416 + * of the GPLv2 or the X11 license, at your option. Note that this dual
6417 + * licensing only applies to this file, and not this project as a
6418 + * whole.
6419 + *
6420 + * a) This library is free software; you can redistribute it and/or
6421 + * modify it under the terms of the GNU General Public License as
6422 + * published by the Free Software Foundation; either version 2 of the
6423 + * License, or (at your option) any later version.
6424 + *
6425 + * This library is distributed in the hope that it will be useful,
6426 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6427 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6428 + * GNU General Public License for more details.
6429 + *
6430 + * Or, alternatively,
6431 + *
6432 + * b) Permission is hereby granted, free of charge, to any person
6433 + * obtaining a copy of this software and associated documentation
6434 + * files (the "Software"), to deal in the Software without
6435 + * restriction, including without limitation the rights to use,
6436 + * copy, modify, merge, publish, distribute, sublicense, and/or
6437 + * sell copies of the Software, and to permit persons to whom the
6438 + * Software is furnished to do so, subject to the following
6439 + * conditions:
6440 + *
6441 + * The above copyright notice and this permission notice shall be
6442 + * included in all copies or substantial portions of the Software.
6443 + *
6444 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6445 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6446 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6447 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6448 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6449 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6450 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6451 + * OTHER DEALINGS IN THE SOFTWARE.
6452 + */
6453 +
6454 +/dts-v1/;
6455 +
6456 +#include "fsl-ls2088a.dtsi"
6457 +
6458 +/ {
6459 + model = "NXP Layerscape 2081A RDB Board";
6460 + compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
6461 +
6462 + aliases {
6463 + serial0 = &serial0;
6464 + serial1 = &serial1;
6465 + };
6466 +
6467 + chosen {
6468 + stdout-path = "serial1:115200n8";
6469 + };
6470 +};
6471 +
6472 +&esdhc {
6473 + status = "okay";
6474 +};
6475 +
6476 +&ifc {
6477 + status = "disabled";
6478 +};
6479 +
6480 +&i2c0 {
6481 + status = "okay";
6482 + pca9547@75 {
6483 + compatible = "nxp,pca9547";
6484 + reg = <0x75>;
6485 + #address-cells = <1>;
6486 + #size-cells = <0>;
6487 + i2c@1 {
6488 + #address-cells = <1>;
6489 + #size-cells = <0>;
6490 + reg = <0x01>;
6491 + rtc@51 {
6492 + compatible = "nxp,pcf2129";
6493 + reg = <0x51>;
6494 + };
6495 + };
6496 +
6497 + i2c@2 {
6498 + #address-cells = <1>;
6499 + #size-cells = <0>;
6500 + reg = <0x02>;
6501 +
6502 + ina220@40 {
6503 + compatible = "ti,ina220";
6504 + reg = <0x40>;
6505 + shunt-resistor = <500>;
6506 + };
6507 + };
6508 +
6509 + i2c@3 {
6510 + #address-cells = <1>;
6511 + #size-cells = <0>;
6512 + reg = <0x3>;
6513 +
6514 + adt7481@4c {
6515 + compatible = "adi,adt7461";
6516 + reg = <0x4c>;
6517 + };
6518 + };
6519 + };
6520 +};
6521 +
6522 +&dspi {
6523 + status = "okay";
6524 + dflash0: n25q512a {
6525 + #address-cells = <1>;
6526 + #size-cells = <1>;
6527 + compatible = "st,m25p80";
6528 + spi-max-frequency = <3000000>;
6529 + reg = <0>;
6530 + };
6531 +};
6532 +
6533 +&qspi {
6534 + status = "okay";
6535 + fsl,qspi-has-second-chip;
6536 + flash0: s25fs512s@0 {
6537 + #address-cells = <1>;
6538 + #size-cells = <1>;
6539 + compatible = "spansion,m25p80";
6540 + spi-rx-bus-width = <4>;
6541 + spi-tx-bus-width = <4>;
6542 + spi-max-frequency = <20000000>;
6543 + reg = <0>;
6544 + };
6545 + flash1: s25fs512s@1 {
6546 + #address-cells = <1>;
6547 + #size-cells = <1>;
6548 + spi-rx-bus-width = <4>;
6549 + spi-tx-bus-width = <4>;
6550 + compatible = "spansion,m25p80";
6551 + spi-max-frequency = <20000000>;
6552 + reg = <1>;
6553 + };
6554 +};
6555 +
6556 +&sata0 {
6557 + status = "okay";
6558 +};
6559 +
6560 +&sata1 {
6561 + status = "okay";
6562 +};
6563 +
6564 +&usb0 {
6565 + status = "okay";
6566 +};
6567 +
6568 +&usb1 {
6569 + status = "okay";
6570 +};
6571 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
6572 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
6573 @@ -1,3 +1,4 @@
6574 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6575 /*
6576 * Device Tree file for Freescale LS2088A QDS Board.
6577 *
6578 @@ -6,43 +7,6 @@
6579 *
6580 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6581 *
6582 - * This file is dual-licensed: you can use it either under the terms
6583 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6584 - * licensing only applies to this file, and not this project as a
6585 - * whole.
6586 - *
6587 - * a) This library is free software; you can redistribute it and/or
6588 - * modify it under the terms of the GNU General Public License as
6589 - * published by the Free Software Foundation; either version 2 of the
6590 - * License, or (at your option) any later version.
6591 - *
6592 - * This library is distributed in the hope that it will be useful,
6593 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6594 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6595 - * GNU General Public License for more details.
6596 - *
6597 - * Or, alternatively,
6598 - *
6599 - * b) Permission is hereby granted, free of charge, to any person
6600 - * obtaining a copy of this software and associated documentation
6601 - * files (the "Software"), to deal in the Software without
6602 - * restriction, including without limitation the rights to use,
6603 - * copy, modify, merge, publish, distribute, sublicense, and/or
6604 - * sell copies of the Software, and to permit persons to whom the
6605 - * Software is furnished to do so, subject to the following
6606 - * conditions:
6607 - *
6608 - * The above copyright notice and this permission notice shall be
6609 - * included in all copies or substantial portions of the Software.
6610 - *
6611 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6612 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6613 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6614 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6615 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6616 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6617 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6618 - * OTHER DEALINGS IN THE SOFTWARE.
6619 */
6620
6621 /dts-v1/;
6622 @@ -58,3 +22,123 @@
6623 stdout-path = "serial0:115200n8";
6624 };
6625 };
6626 +
6627 +&ifc {
6628 + boardctrl: board-control@3,0 {
6629 + #address-cells = <1>;
6630 + #size-cells = <1>;
6631 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
6632 + reg = <3 0 0x300>; /* TODO check address */
6633 + ranges = <0 3 0 0x300>;
6634 +
6635 + mdio_mux_emi1 {
6636 + compatible = "mdio-mux-mmioreg", "mdio-mux";
6637 + mdio-parent-bus = <&emdio1>;
6638 + reg = <0x54 1>; /* BRDCFG4 */
6639 + mux-mask = <0xe0>; /* EMI1_MDIO */
6640 +
6641 + #address-cells=<1>;
6642 + #size-cells = <0>;
6643 +
6644 + /* Child MDIO buses, one for each riser card:
6645 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6646 + * VSC8234 PHYs on the riser cards.
6647 + */
6648 +
6649 + mdio_mux3: mdio@60 {
6650 + reg = <0x60>;
6651 + #address-cells = <1>;
6652 + #size-cells = <0>;
6653 +
6654 + mdio0_phy12: mdio_phy0@1c {
6655 + reg = <0x1c>;
6656 + phy-connection-type = "sgmii";
6657 + };
6658 + mdio0_phy13: mdio_phy1@1d {
6659 + reg = <0x1d>;
6660 + phy-connection-type = "sgmii";
6661 + };
6662 + mdio0_phy14: mdio_phy2@1e {
6663 + reg = <0x1e>;
6664 + phy-connection-type = "sgmii";
6665 + };
6666 + mdio0_phy15: mdio_phy3@1f {
6667 + reg = <0x1f>;
6668 + phy-connection-type = "sgmii";
6669 + };
6670 + };
6671 + };
6672 + };
6673 +};
6674 +
6675 +&pcs_mdio1 {
6676 + pcs_phy1: ethernet-phy@0 {
6677 + backplane-mode = "10gbase-kr";
6678 + compatible = "ethernet-phy-ieee802.3-c45";
6679 + reg = <0x0>;
6680 + fsl,lane-handle = <&serdes1>;
6681 + fsl,lane-reg = <0x9C0 0x40>;/* lane H */
6682 + };
6683 +};
6684 +
6685 +&pcs_mdio2 {
6686 + pcs_phy2: ethernet-phy@0 {
6687 + backplane-mode = "10gbase-kr";
6688 + compatible = "ethernet-phy-ieee802.3-c45";
6689 + reg = <0x0>;
6690 + fsl,lane-handle = <&serdes1>;
6691 + fsl,lane-reg = <0x980 0x40>;/* lane G */
6692 + };
6693 +};
6694 +
6695 +&pcs_mdio3 {
6696 + pcs_phy3: ethernet-phy@0 {
6697 + backplane-mode = "10gbase-kr";
6698 + compatible = "ethernet-phy-ieee802.3-c45";
6699 + reg = <0x0>;
6700 + fsl,lane-handle = <&serdes1>;
6701 + fsl,lane-reg = <0x940 0x40>;/* lane F */
6702 + };
6703 +};
6704 +
6705 +&pcs_mdio4 {
6706 + pcs_phy4: ethernet-phy@0 {
6707 + backplane-mode = "10gbase-kr";
6708 + compatible = "ethernet-phy-ieee802.3-c45";
6709 + reg = <0x0>;
6710 + fsl,lane-handle = <&serdes1>;
6711 + fsl,lane-reg = <0x900 0x40>;/* lane E */
6712 + };
6713 +};
6714 +
6715 +/* Update DPMAC connections to backplane PHYs, under SerDes 0x2a_0xXX.
6716 + * &dpmac1 {
6717 + * phy-handle = <&pcs_phy1>;
6718 + * };
6719 + *
6720 + * &dpmac2 {
6721 + * phy-handle = <&pcs_phy2>;
6722 + * };
6723 + *
6724 + * &dpmac3 {
6725 + * phy-handle = <&pcs_phy3>;
6726 + * };
6727 + *
6728 + * &dpmac4 {
6729 + * phy-handle = <&pcs_phy4>;
6730 + * };
6731 + */
6732 +
6733 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6734 +&dpmac9 {
6735 + phy-handle = <&mdio0_phy12>;
6736 +};
6737 +&dpmac10 {
6738 + phy-handle = <&mdio0_phy13>;
6739 +};
6740 +&dpmac11 {
6741 + phy-handle = <&mdio0_phy14>;
6742 +};
6743 +&dpmac12 {
6744 + phy-handle = <&mdio0_phy15>;
6745 +};
6746 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
6747 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
6748 @@ -1,3 +1,4 @@
6749 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6750 /*
6751 * Device Tree file for Freescale LS2088A RDB Board.
6752 *
6753 @@ -6,43 +7,6 @@
6754 *
6755 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6756 *
6757 - * This file is dual-licensed: you can use it either under the terms
6758 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6759 - * licensing only applies to this file, and not this project as a
6760 - * whole.
6761 - *
6762 - * a) This library is free software; you can redistribute it and/or
6763 - * modify it under the terms of the GNU General Public License as
6764 - * published by the Free Software Foundation; either version 2 of the
6765 - * License, or (at your option) any later version.
6766 - *
6767 - * This library is distributed in the hope that it will be useful,
6768 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6769 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6770 - * GNU General Public License for more details.
6771 - *
6772 - * Or, alternatively,
6773 - *
6774 - * b) Permission is hereby granted, free of charge, to any person
6775 - * obtaining a copy of this software and associated documentation
6776 - * files (the "Software"), to deal in the Software without
6777 - * restriction, including without limitation the rights to use,
6778 - * copy, modify, merge, publish, distribute, sublicense, and/or
6779 - * sell copies of the Software, and to permit persons to whom the
6780 - * Software is furnished to do so, subject to the following
6781 - * conditions:
6782 - *
6783 - * The above copyright notice and this permission notice shall be
6784 - * included in all copies or substantial portions of the Software.
6785 - *
6786 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6787 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6788 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6789 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6790 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6791 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6792 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6793 - * OTHER DEALINGS IN THE SOFTWARE.
6794 */
6795
6796 /dts-v1/;
6797 @@ -58,3 +22,83 @@
6798 stdout-path = "serial1:115200n8";
6799 };
6800 };
6801 +
6802 +&emdio1 {
6803 + status = "disabled";
6804 + /* CS4340 PHYs */
6805 + mdio1_phy1: emdio1_phy@1 {
6806 + reg = <0x10>;
6807 + phy-connection-type = "xfi";
6808 + };
6809 + mdio1_phy2: emdio1_phy@2 {
6810 + reg = <0x11>;
6811 + phy-connection-type = "xfi";
6812 + };
6813 + mdio1_phy3: emdio1_phy@3 {
6814 + reg = <0x12>;
6815 + phy-connection-type = "xfi";
6816 + };
6817 + mdio1_phy4: emdio1_phy@4 {
6818 + reg = <0x13>;
6819 + phy-connection-type = "xfi";
6820 + };
6821 +};
6822 +
6823 +&emdio2 {
6824 + /* AQR405 PHYs */
6825 + mdio2_phy1: emdio2_phy@1 {
6826 + compatible = "ethernet-phy-ieee802.3-c45";
6827 + interrupts = <0 1 0x4>; /* Level high type */
6828 + reg = <0x0>;
6829 + phy-connection-type = "xfi";
6830 + };
6831 + mdio2_phy2: emdio2_phy@2 {
6832 + compatible = "ethernet-phy-ieee802.3-c45";
6833 + interrupts = <0 2 0x4>; /* Level high type */
6834 + reg = <0x1>;
6835 + phy-connection-type = "xfi";
6836 + };
6837 + mdio2_phy3: emdio2_phy@3 {
6838 + compatible = "ethernet-phy-ieee802.3-c45";
6839 + interrupts = <0 4 0x4>; /* Level high type */
6840 + reg = <0x2>;
6841 + phy-connection-type = "xfi";
6842 + };
6843 + mdio2_phy4: emdio2_phy@4 {
6844 + compatible = "ethernet-phy-ieee802.3-c45";
6845 + interrupts = <0 5 0x4>; /* Level high type */
6846 + reg = <0x3>;
6847 + phy-connection-type = "xfi";
6848 + };
6849 +};
6850 +
6851 +/* Update DPMAC connections to external PHYs, under the assumption of
6852 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6853 + */
6854 +/* Leave Cortina PHYs commented out until proper driver is integrated
6855 + *&dpmac1 {
6856 + * phy-handle = <&mdio1_phy1>;
6857 + *};
6858 + *&dpmac2 {
6859 + * phy-handle = <&mdio1_phy2>;
6860 + *};
6861 + *&dpmac3 {
6862 + * phy-handle = <&mdio1_phy3>;
6863 + *};
6864 + *&dpmac4 {
6865 + * phy-handle = <&mdio1_phy4>;
6866 + *};
6867 + */
6868 +
6869 +&dpmac5 {
6870 + phy-handle = <&mdio2_phy1>;
6871 +};
6872 +&dpmac6 {
6873 + phy-handle = <&mdio2_phy2>;
6874 +};
6875 +&dpmac7 {
6876 + phy-handle = <&mdio2_phy3>;
6877 +};
6878 +&dpmac8 {
6879 + phy-handle = <&mdio2_phy4>;
6880 +};
6881 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
6882 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
6883 @@ -1,3 +1,4 @@
6884 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6885 /*
6886 * Device Tree Include file for Freescale Layerscape-2088A family SoC.
6887 *
6888 @@ -6,49 +7,12 @@
6889 *
6890 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6891 *
6892 - * This file is dual-licensed: you can use it either under the terms
6893 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6894 - * licensing only applies to this file, and not this project as a
6895 - * whole.
6896 - *
6897 - * a) This library is free software; you can redistribute it and/or
6898 - * modify it under the terms of the GNU General Public License as
6899 - * published by the Free Software Foundation; either version 2 of the
6900 - * License, or (at your option) any later version.
6901 - *
6902 - * This library is distributed in the hope that it will be useful,
6903 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6904 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6905 - * GNU General Public License for more details.
6906 - *
6907 - * Or, alternatively,
6908 - *
6909 - * b) Permission is hereby granted, free of charge, to any person
6910 - * obtaining a copy of this software and associated documentation
6911 - * files (the "Software"), to deal in the Software without
6912 - * restriction, including without limitation the rights to use,
6913 - * copy, modify, merge, publish, distribute, sublicense, and/or
6914 - * sell copies of the Software, and to permit persons to whom the
6915 - * Software is furnished to do so, subject to the following
6916 - * conditions:
6917 - *
6918 - * The above copyright notice and this permission notice shall be
6919 - * included in all copies or substantial portions of the Software.
6920 - *
6921 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6922 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6923 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6924 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6925 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6926 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6927 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6928 - * OTHER DEALINGS IN THE SOFTWARE.
6929 */
6930
6931 #include "fsl-ls208xa.dtsi"
6932
6933 &cpu {
6934 - cpu0: cpu@0 {
6935 + cooling_map0: cpu0: cpu@0 {
6936 device_type = "cpu";
6937 compatible = "arm,cortex-a72";
6938 reg = <0x0>;
6939 @@ -67,7 +31,7 @@
6940 next-level-cache = <&cluster0_l2>;
6941 };
6942
6943 - cpu2: cpu@100 {
6944 + cooling_map1: cpu2: cpu@100 {
6945 device_type = "cpu";
6946 compatible = "arm,cortex-a72";
6947 reg = <0x100>;
6948 @@ -86,7 +50,7 @@
6949 next-level-cache = <&cluster1_l2>;
6950 };
6951
6952 - cpu4: cpu@200 {
6953 + cooling_map2: cpu4: cpu@200 {
6954 device_type = "cpu";
6955 compatible = "arm,cortex-a72";
6956 reg = <0x200>;
6957 @@ -105,7 +69,7 @@
6958 next-level-cache = <&cluster2_l2>;
6959 };
6960
6961 - cpu6: cpu@300 {
6962 + cooling_map3: cpu6: cpu@300 {
6963 device_type = "cpu";
6964 compatible = "arm,cortex-a72";
6965 reg = <0x300>;
6966 @@ -143,7 +107,7 @@
6967 CPU_PW20: cpu-pw20 {
6968 compatible = "arm,idle-state";
6969 idle-state-name = "PW20";
6970 - arm,psci-suspend-param = <0x00010000>;
6971 + arm,psci-suspend-param = <0x0>;
6972 entry-latency-us = <2000>;
6973 exit-latency-us = <2000>;
6974 min-residency-us = <6000>;
6975 @@ -151,6 +115,7 @@
6976 };
6977
6978 &pcie1 {
6979 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6980 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6981 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
6982
6983 @@ -159,6 +124,7 @@
6984 };
6985
6986 &pcie2 {
6987 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6988 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
6989 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
6990
6991 @@ -167,6 +133,7 @@
6992 };
6993
6994 &pcie3 {
6995 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6996 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
6997 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
6998
6999 @@ -175,6 +142,7 @@
7000 };
7001
7002 &pcie4 {
7003 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
7004 reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
7005 0x38 0x00000000 0x0 0x00002000>; /* configuration space */
7006
7007 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
7008 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
7009 @@ -1,3 +1,4 @@
7010 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7011 /*
7012 * Device Tree file for Freescale LS2080A QDS Board.
7013 *
7014 @@ -6,43 +7,6 @@
7015 *
7016 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7017 *
7018 - * This file is dual-licensed: you can use it either under the terms
7019 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7020 - * licensing only applies to this file, and not this project as a
7021 - * whole.
7022 - *
7023 - * a) This library is free software; you can redistribute it and/or
7024 - * modify it under the terms of the GNU General Public License as
7025 - * published by the Free Software Foundation; either version 2 of the
7026 - * License, or (at your option) any later version.
7027 - *
7028 - * This library is distributed in the hope that it will be useful,
7029 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7030 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7031 - * GNU General Public License for more details.
7032 - *
7033 - * Or, alternatively,
7034 - *
7035 - * b) Permission is hereby granted, free of charge, to any person
7036 - * obtaining a copy of this software and associated documentation
7037 - * files (the "Software"), to deal in the Software without
7038 - * restriction, including without limitation the rights to use,
7039 - * copy, modify, merge, publish, distribute, sublicense, and/or
7040 - * sell copies of the Software, and to permit persons to whom the
7041 - * Software is furnished to do so, subject to the following
7042 - * conditions:
7043 - *
7044 - * The above copyright notice and this permission notice shall be
7045 - * included in all copies or substantial portions of the Software.
7046 - *
7047 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7048 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7049 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7050 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7051 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7052 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7053 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7054 - * OTHER DEALINGS IN THE SOFTWARE.
7055 */
7056
7057 &esdhc {
7058 @@ -165,16 +129,21 @@
7059
7060 &qspi {
7061 status = "okay";
7062 + fsl,qspi-has-second-chip;
7063 flash0: s25fl256s1@0 {
7064 #address-cells = <1>;
7065 #size-cells = <1>;
7066 compatible = "st,m25p80";
7067 + spi-rx-bus-width = <4>;
7068 + spi-tx-bus-width = <4>;
7069 spi-max-frequency = <20000000>;
7070 reg = <0>;
7071 };
7072 flash2: s25fl256s1@2 {
7073 #address-cells = <1>;
7074 #size-cells = <1>;
7075 + spi-rx-bus-width = <4>;
7076 + spi-tx-bus-width = <4>;
7077 compatible = "st,m25p80";
7078 spi-max-frequency = <20000000>;
7079 reg = <0>;
7080 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
7081 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
7082 @@ -1,3 +1,4 @@
7083 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7084 /*
7085 * Device Tree file for Freescale LS2080A RDB Board.
7086 *
7087 @@ -6,43 +7,6 @@
7088 *
7089 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7090 *
7091 - * This file is dual-licensed: you can use it either under the terms
7092 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7093 - * licensing only applies to this file, and not this project as a
7094 - * whole.
7095 - *
7096 - * a) This library is free software; you can redistribute it and/or
7097 - * modify it under the terms of the GNU General Public License as
7098 - * published by the Free Software Foundation; either version 2 of the
7099 - * License, or (at your option) any later version.
7100 - *
7101 - * This library is distributed in the hope that it will be useful,
7102 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7103 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7104 - * GNU General Public License for more details.
7105 - *
7106 - * Or, alternatively,
7107 - *
7108 - * b) Permission is hereby granted, free of charge, to any person
7109 - * obtaining a copy of this software and associated documentation
7110 - * files (the "Software"), to deal in the Software without
7111 - * restriction, including without limitation the rights to use,
7112 - * copy, modify, merge, publish, distribute, sublicense, and/or
7113 - * sell copies of the Software, and to permit persons to whom the
7114 - * Software is furnished to do so, subject to the following
7115 - * conditions:
7116 - *
7117 - * The above copyright notice and this permission notice shall be
7118 - * included in all copies or substantial portions of the Software.
7119 - *
7120 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7121 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7122 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7123 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7124 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7125 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7126 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7127 - * OTHER DEALINGS IN THE SOFTWARE.
7128 */
7129
7130 &esdhc {
7131 @@ -85,6 +49,7 @@
7132 reg = <0x75>;
7133 #address-cells = <1>;
7134 #size-cells = <0>;
7135 + i2c-mux-never-disable;
7136 i2c@1 {
7137 #address-cells = <1>;
7138 #size-cells = <0>;
7139 @@ -95,6 +60,17 @@
7140 };
7141 };
7142
7143 + i2c@2 {
7144 + #address-cells = <1>;
7145 + #size-cells = <0>;
7146 + reg = <0x02>;
7147 + ina220@40 {
7148 + compatible = "ti,ina220";
7149 + reg = <0x40>;
7150 + shunt-resistor = <500>;
7151 + };
7152 + };
7153 +
7154 i2c@3 {
7155 #address-cells = <1>;
7156 #size-cells = <0>;
7157 @@ -132,7 +108,15 @@
7158 };
7159
7160 &qspi {
7161 - status = "disabled";
7162 + status = "okay";
7163 + flash0: s25fs512s@0 {
7164 + #address-cells = <1>;
7165 + #size-cells = <1>;
7166 + compatible = "spansion,m25p80";
7167 + m25p,fast-read;
7168 + spi-max-frequency = <20000000>;
7169 + reg = <0>;
7170 + };
7171 };
7172
7173 &sata0 {
7174 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
7175 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
7176 @@ -1,3 +1,4 @@
7177 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7178 /*
7179 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
7180 *
7181 @@ -6,43 +7,6 @@
7182 *
7183 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7184 *
7185 - * This file is dual-licensed: you can use it either under the terms
7186 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7187 - * licensing only applies to this file, and not this project as a
7188 - * whole.
7189 - *
7190 - * a) This library is free software; you can redistribute it and/or
7191 - * modify it under the terms of the GNU General Public License as
7192 - * published by the Free Software Foundation; either version 2 of the
7193 - * License, or (at your option) any later version.
7194 - *
7195 - * This library is distributed in the hope that it will be useful,
7196 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7197 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7198 - * GNU General Public License for more details.
7199 - *
7200 - * Or, alternatively,
7201 - *
7202 - * b) Permission is hereby granted, free of charge, to any person
7203 - * obtaining a copy of this software and associated documentation
7204 - * files (the "Software"), to deal in the Software without
7205 - * restriction, including without limitation the rights to use,
7206 - * copy, modify, merge, publish, distribute, sublicense, and/or
7207 - * sell copies of the Software, and to permit persons to whom the
7208 - * Software is furnished to do so, subject to the following
7209 - * conditions:
7210 - *
7211 - * The above copyright notice and this permission notice shall be
7212 - * included in all copies or substantial portions of the Software.
7213 - *
7214 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7215 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7216 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7217 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7218 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7219 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7220 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7221 - * OTHER DEALINGS IN THE SOFTWARE.
7222 */
7223
7224 #include <dt-bindings/thermal/thermal.h>
7225 @@ -111,13 +75,12 @@
7226 mask = <0x2>;
7227 };
7228
7229 - timer {
7230 + timer: timer {
7231 compatible = "arm,armv8-timer";
7232 interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
7233 <1 14 4>, /* Physical Non-Secure PPI, active-low */
7234 <1 11 4>, /* Virtual PPI, active-low */
7235 <1 10 4>; /* Hypervisor PPI, active-low */
7236 - fsl,erratum-a008585;
7237 };
7238
7239 pmu {
7240 @@ -135,6 +98,7 @@
7241 #address-cells = <2>;
7242 #size-cells = <2>;
7243 ranges;
7244 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
7245
7246 clockgen: clocking@1300000 {
7247 compatible = "fsl,ls2080a-clockgen";
7248 @@ -194,54 +158,7 @@
7249 #thermal-sensor-cells = <1>;
7250 };
7251
7252 - thermal-zones {
7253 - cpu_thermal: cpu-thermal {
7254 - polling-delay-passive = <1000>;
7255 - polling-delay = <5000>;
7256 -
7257 - thermal-sensors = <&tmu 4>;
7258 -
7259 - trips {
7260 - cpu_alert: cpu-alert {
7261 - temperature = <75000>;
7262 - hysteresis = <2000>;
7263 - type = "passive";
7264 - };
7265 - cpu_crit: cpu-crit {
7266 - temperature = <85000>;
7267 - hysteresis = <2000>;
7268 - type = "critical";
7269 - };
7270 - };
7271 -
7272 - cooling-maps {
7273 - map0 {
7274 - trip = <&cpu_alert>;
7275 - cooling-device =
7276 - <&cpu0 THERMAL_NO_LIMIT
7277 - THERMAL_NO_LIMIT>;
7278 - };
7279 - map1 {
7280 - trip = <&cpu_alert>;
7281 - cooling-device =
7282 - <&cpu2 THERMAL_NO_LIMIT
7283 - THERMAL_NO_LIMIT>;
7284 - };
7285 - map2 {
7286 - trip = <&cpu_alert>;
7287 - cooling-device =
7288 - <&cpu4 THERMAL_NO_LIMIT
7289 - THERMAL_NO_LIMIT>;
7290 - };
7291 - map3 {
7292 - trip = <&cpu_alert>;
7293 - cooling-device =
7294 - <&cpu6 THERMAL_NO_LIMIT
7295 - THERMAL_NO_LIMIT>;
7296 - };
7297 - };
7298 - };
7299 - };
7300 + #include "fsl-tmu.dtsi"
7301
7302 serial0: serial@21c0500 {
7303 compatible = "fsl,ns16550", "ns16550a";
7304 @@ -357,6 +274,8 @@
7305 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
7306 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
7307 msi-parent = <&its>;
7308 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
7309 + dma-coherent;
7310 #address-cells = <3>;
7311 #size-cells = <1>;
7312
7313 @@ -460,6 +379,8 @@
7314 compatible = "arm,mmu-500";
7315 reg = <0 0x5000000 0 0x800000>;
7316 #global-interrupts = <12>;
7317 + #iommu-cells = <1>;
7318 + stream-match-mask = <0x7C00>;
7319 interrupts = <0 13 4>, /* global secure fault */
7320 <0 14 4>, /* combined secure interrupt */
7321 <0 15 4>, /* global non-secure fault */
7322 @@ -502,7 +423,6 @@
7323 <0 204 4>, <0 205 4>,
7324 <0 206 4>, <0 207 4>,
7325 <0 208 4>, <0 209 4>;
7326 - mmu-masters = <&fsl_mc 0x300 0>;
7327 };
7328
7329 dspi: dspi@2100000 {
7330 @@ -574,15 +494,126 @@
7331 #interrupt-cells = <2>;
7332 };
7333
7334 + /* TODO: WRIOP (CCSR?) */
7335 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
7336 + * E-MDIO1: 0x1_6000
7337 + */
7338 + compatible = "fsl,fman-memac-mdio";
7339 + reg = <0x0 0x8B96000 0x0 0x1000>;
7340 + device_type = "mdio"; /* TODO: is this necessary? */
7341 + little-endian; /* force the driver in LE mode */
7342 +
7343 + /* Not necessary on the QDS, but needed on the RDB */
7344 + #address-cells = <1>;
7345 + #size-cells = <0>;
7346 + };
7347 +
7348 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
7349 + * E-MDIO2: 0x1_7000
7350 + */
7351 + compatible = "fsl,fman-memac-mdio";
7352 + reg = <0x0 0x8B97000 0x0 0x1000>;
7353 + device_type = "mdio"; /* TODO: is this necessary? */
7354 + little-endian; /* force the driver in LE mode */
7355 +
7356 + #address-cells = <1>;
7357 + #size-cells = <0>;
7358 + };
7359 +
7360 + pcs_mdio1: mdio@0x8c07000 {
7361 + compatible = "fsl,fman-memac-mdio";
7362 + reg = <0x0 0x8c07000 0x0 0x1000>;
7363 + device_type = "mdio";
7364 + little-endian;
7365 +
7366 + #address-cells = <1>;
7367 + #size-cells = <0>;
7368 + };
7369 +
7370 + pcs_mdio2: mdio@0x8c0b000 {
7371 + compatible = "fsl,fman-memac-mdio";
7372 + reg = <0x0 0x8c0b000 0x0 0x1000>;
7373 + device_type = "mdio";
7374 + little-endian;
7375 +
7376 + #address-cells = <1>;
7377 + #size-cells = <0>;
7378 + };
7379 +
7380 + pcs_mdio3: mdio@0x8c0f000 {
7381 + compatible = "fsl,fman-memac-mdio";
7382 + reg = <0x0 0x8c0f000 0x0 0x1000>;
7383 + device_type = "mdio";
7384 + little-endian;
7385 +
7386 + #address-cells = <1>;
7387 + #size-cells = <0>;
7388 + };
7389 +
7390 + pcs_mdio4: mdio@0x8c13000 {
7391 + compatible = "fsl,fman-memac-mdio";
7392 + reg = <0x0 0x8c13000 0x0 0x1000>;
7393 + device_type = "mdio";
7394 + little-endian;
7395 +
7396 + #address-cells = <1>;
7397 + #size-cells = <0>;
7398 + };
7399 +
7400 + pcs_mdio5: mdio@0x8c17000 {
7401 + status = "disabled";
7402 + compatible = "fsl,fman-memac-mdio";
7403 + reg = <0x0 0x8c17000 0x0 0x1000>;
7404 + device_type = "mdio";
7405 + little-endian;
7406 +
7407 + #address-cells = <1>;
7408 + #size-cells = <0>;
7409 + };
7410 +
7411 + pcs_mdio6: mdio@0x8c1b000 {
7412 + status = "disabled";
7413 + compatible = "fsl,fman-memac-mdio";
7414 + reg = <0x0 0x8c1b000 0x0 0x1000>;
7415 + device_type = "mdio";
7416 + little-endian;
7417 +
7418 + #address-cells = <1>;
7419 + #size-cells = <0>;
7420 + };
7421 +
7422 + pcs_mdio7: mdio@0x8c1f000 {
7423 + status = "disabled";
7424 + compatible = "fsl,fman-memac-mdio";
7425 + reg = <0x0 0x8c1f000 0x0 0x1000>;
7426 + device_type = "mdio";
7427 + little-endian;
7428 +
7429 + #address-cells = <1>;
7430 + #size-cells = <0>;
7431 + };
7432 +
7433 + pcs_mdio8: mdio@0x8c23000 {
7434 + status = "disabled";
7435 + compatible = "fsl,fman-memac-mdio";
7436 + reg = <0x0 0x8c23000 0x0 0x1000>;
7437 + device_type = "mdio";
7438 + little-endian;
7439 +
7440 + #address-cells = <1>;
7441 + #size-cells = <0>;
7442 + };
7443 +
7444 i2c0: i2c@2000000 {
7445 status = "disabled";
7446 - compatible = "fsl,vf610-i2c";
7447 + compatible = "fsl,vf610-i2c", "fsl,ls208xa-vf610-i2c";
7448 #address-cells = <1>;
7449 #size-cells = <0>;
7450 reg = <0x0 0x2000000 0x0 0x10000>;
7451 interrupts = <0 34 0x4>; /* Level high type */
7452 clock-names = "i2c";
7453 - clocks = <&clockgen 4 3>;
7454 + clocks = <&clockgen 4 1>;
7455 + scl-gpios = <&gpio3 10 0>;
7456 };
7457
7458 i2c1: i2c@2010000 {
7459 @@ -593,7 +624,7 @@
7460 reg = <0x0 0x2010000 0x0 0x10000>;
7461 interrupts = <0 34 0x4>; /* Level high type */
7462 clock-names = "i2c";
7463 - clocks = <&clockgen 4 3>;
7464 + clocks = <&clockgen 4 1>;
7465 };
7466
7467 i2c2: i2c@2020000 {
7468 @@ -604,7 +635,7 @@
7469 reg = <0x0 0x2020000 0x0 0x10000>;
7470 interrupts = <0 35 0x4>; /* Level high type */
7471 clock-names = "i2c";
7472 - clocks = <&clockgen 4 3>;
7473 + clocks = <&clockgen 4 1>;
7474 };
7475
7476 i2c3: i2c@2030000 {
7477 @@ -615,7 +646,7 @@
7478 reg = <0x0 0x2030000 0x0 0x10000>;
7479 interrupts = <0 35 0x4>; /* Level high type */
7480 clock-names = "i2c";
7481 - clocks = <&clockgen 4 3>;
7482 + clocks = <&clockgen 4 1>;
7483 };
7484
7485 ifc: ifc@2240000 {
7486 @@ -648,8 +679,8 @@
7487 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7488 "snps,dw-pcie";
7489 reg-names = "regs", "config";
7490 - interrupts = <0 108 0x4>; /* Level high type */
7491 - interrupt-names = "intr";
7492 + interrupts = <0 108 0x4>; /* aer interrupt */
7493 + interrupt-names = "aer";
7494 #address-cells = <3>;
7495 #size-cells = <2>;
7496 device_type = "pci";
7497 @@ -657,20 +688,22 @@
7498 num-lanes = <4>;
7499 bus-range = <0x0 0xff>;
7500 msi-parent = <&its>;
7501 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7502 #interrupt-cells = <1>;
7503 interrupt-map-mask = <0 0 0 7>;
7504 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
7505 <0000 0 0 2 &gic 0 0 0 110 4>,
7506 <0000 0 0 3 &gic 0 0 0 111 4>,
7507 <0000 0 0 4 &gic 0 0 0 112 4>;
7508 + status = "disabled";
7509 };
7510
7511 pcie2: pcie@3500000 {
7512 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7513 "snps,dw-pcie";
7514 reg-names = "regs", "config";
7515 - interrupts = <0 113 0x4>; /* Level high type */
7516 - interrupt-names = "intr";
7517 + interrupts = <0 113 0x4>; /* aer interrupt */
7518 + interrupt-names = "aer";
7519 #address-cells = <3>;
7520 #size-cells = <2>;
7521 device_type = "pci";
7522 @@ -678,20 +711,22 @@
7523 num-lanes = <4>;
7524 bus-range = <0x0 0xff>;
7525 msi-parent = <&its>;
7526 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7527 #interrupt-cells = <1>;
7528 interrupt-map-mask = <0 0 0 7>;
7529 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
7530 <0000 0 0 2 &gic 0 0 0 115 4>,
7531 <0000 0 0 3 &gic 0 0 0 116 4>,
7532 <0000 0 0 4 &gic 0 0 0 117 4>;
7533 + status = "disabled";
7534 };
7535
7536 pcie3: pcie@3600000 {
7537 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7538 "snps,dw-pcie";
7539 reg-names = "regs", "config";
7540 - interrupts = <0 118 0x4>; /* Level high type */
7541 - interrupt-names = "intr";
7542 + interrupts = <0 118 0x4>; /* aer interrupt */
7543 + interrupt-names = "aer";
7544 #address-cells = <3>;
7545 #size-cells = <2>;
7546 device_type = "pci";
7547 @@ -699,20 +734,22 @@
7548 num-lanes = <8>;
7549 bus-range = <0x0 0xff>;
7550 msi-parent = <&its>;
7551 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7552 #interrupt-cells = <1>;
7553 interrupt-map-mask = <0 0 0 7>;
7554 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
7555 <0000 0 0 2 &gic 0 0 0 120 4>,
7556 <0000 0 0 3 &gic 0 0 0 121 4>,
7557 <0000 0 0 4 &gic 0 0 0 122 4>;
7558 + status = "disabled";
7559 };
7560
7561 pcie4: pcie@3700000 {
7562 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7563 "snps,dw-pcie";
7564 reg-names = "regs", "config";
7565 - interrupts = <0 123 0x4>; /* Level high type */
7566 - interrupt-names = "intr";
7567 + interrupts = <0 123 0x4>; /* aer interrupt */
7568 + interrupt-names = "aer";
7569 #address-cells = <3>;
7570 #size-cells = <2>;
7571 device_type = "pci";
7572 @@ -720,12 +757,14 @@
7573 num-lanes = <4>;
7574 bus-range = <0x0 0xff>;
7575 msi-parent = <&its>;
7576 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7577 #interrupt-cells = <1>;
7578 interrupt-map-mask = <0 0 0 7>;
7579 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
7580 <0000 0 0 2 &gic 0 0 0 125 4>,
7581 <0000 0 0 3 &gic 0 0 0 126 4>,
7582 <0000 0 0 4 &gic 0 0 0 127 4>;
7583 + status = "disabled";
7584 };
7585
7586 sata0: sata@3200000 {
7587 @@ -754,6 +793,8 @@
7588 dr_mode = "host";
7589 snps,quirk-frame-length-adjustment = <0x20>;
7590 snps,dis_rxdet_inp3_quirk;
7591 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7592 + snps,host-vbus-glitches;
7593 };
7594
7595 usb1: usb3@3110000 {
7596 @@ -764,6 +805,14 @@
7597 dr_mode = "host";
7598 snps,quirk-frame-length-adjustment = <0x20>;
7599 snps,dis_rxdet_inp3_quirk;
7600 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7601 + snps,host-vbus-glitches;
7602 + };
7603 +
7604 + serdes1: serdes@1ea0000 {
7605 + compatible = "fsl,serdes-10g";
7606 + reg = <0x0 0x1ea0000 0 0x00002000>;
7607 + little-endian;
7608 };
7609
7610 ccn@4000000 {
7611 @@ -771,6 +820,14 @@
7612 reg = <0x0 0x04000000 0x0 0x01000000>;
7613 interrupts = <0 12 4>;
7614 };
7615 +
7616 + ftm0: ftm0@2800000 {
7617 + compatible = "fsl,ls208xa-ftm-alarm";
7618 + reg = <0x0 0x2800000 0x0 0x10000>,
7619 + <0x0 0x1e34050 0x0 0x4>;
7620 + reg-names = "ftm", "pmctrl";
7621 + interrupts = <0 44 4>;
7622 + };
7623 };
7624
7625 ddr1: memory-controller@1080000 {
7626 @@ -786,4 +843,44 @@
7627 interrupts = <0 18 0x4>;
7628 little-endian;
7629 };
7630 +
7631 + firmware {
7632 + optee {
7633 + compatible = "linaro,optee-tz";
7634 + method = "smc";
7635 + };
7636 + };
7637 +};
7638 +
7639 +#include "fsl-tmu-map1.dtsi"
7640 +#include "fsl-tmu-map2.dtsi"
7641 +#include "fsl-tmu-map3.dtsi"
7642 +&thermal_zones {
7643 + thermal-zone1 {
7644 + status = "okay";
7645 + };
7646 +
7647 + thermal-zone2{
7648 + status = "okay";
7649 + };
7650 +
7651 + thermal-zone3{
7652 + status = "okay";
7653 + };
7654 +
7655 + thermal-zone4{
7656 + status = "okay";
7657 + };
7658 +
7659 + thermal-zone5{
7660 + status = "okay";
7661 + };
7662 +
7663 + thermal-zone6{
7664 + status = "okay";
7665 + };
7666 +
7667 + thermal-zone7 {
7668 + status = "okay";
7669 + };
7670 };
7671 --- /dev/null
7672 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
7673 @@ -0,0 +1,353 @@
7674 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
7675 +//
7676 +// Device Tree file for LX2160AQDS
7677 +//
7678 +// Copyright 2018 NXP
7679 +
7680 +/dts-v1/;
7681 +
7682 +#include "fsl-lx2160a.dtsi"
7683 +
7684 +/ {
7685 + model = "NXP Layerscape LX2160AQDS";
7686 + compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
7687 +
7688 + aliases {
7689 + crypto = &crypto;
7690 + serial0 = &uart0;
7691 + };
7692 +
7693 + chosen {
7694 + stdout-path = "serial0:115200n8";
7695 + };
7696 +
7697 + sb_3v3: regulator-sb3v3 {
7698 + compatible = "regulator-fixed";
7699 + regulator-name = "MC34717-3.3VSB";
7700 + regulator-min-microvolt = <3300000>;
7701 + regulator-max-microvolt = <3300000>;
7702 + regulator-boot-on;
7703 + regulator-always-on;
7704 + };
7705 +
7706 + mdio-mux-1 {
7707 + compatible = "mdio-mux-multiplexer";
7708 + mux-controls = <&mux 0>;
7709 + mdio-parent-bus = <&emdio1>;
7710 + #address-cells=<1>;
7711 + #size-cells = <0>;
7712 +
7713 + mdio@0 { /* On-board PHY #1 RGMI1*/
7714 + reg = <0x00>;
7715 + #address-cells = <1>;
7716 + #size-cells = <0>;
7717 + };
7718 +
7719 + mdio@8 { /* On-board PHY #2 RGMI2*/
7720 + reg = <0x8>;
7721 + #address-cells = <1>;
7722 + #size-cells = <0>;
7723 + };
7724 +
7725 + mdio@18 { /* Slot #1 */
7726 + reg = <0x18>;
7727 + #address-cells = <1>;
7728 + #size-cells = <0>;
7729 + };
7730 +
7731 + mdio@19 { /* Slot #2 */
7732 + reg = <0x19>;
7733 + #address-cells = <1>;
7734 + #size-cells = <0>;
7735 + };
7736 +
7737 + mdio@1a { /* Slot #3 */
7738 + reg = <0x1a>;
7739 + #address-cells = <1>;
7740 + #size-cells = <0>;
7741 + };
7742 +
7743 + mdio@1b { /* Slot #4 */
7744 + reg = <0x1b>;
7745 + #address-cells = <1>;
7746 + #size-cells = <0>;
7747 + };
7748 +
7749 + mdio@1c { /* Slot #5 */
7750 + reg = <0x1c>;
7751 + #address-cells = <1>;
7752 + #size-cells = <0>;
7753 + };
7754 +
7755 + mdio@1d { /* Slot #6 */
7756 + reg = <0x1d>;
7757 + #address-cells = <1>;
7758 + #size-cells = <0>;
7759 + };
7760 +
7761 + mdio@1e { /* Slot #7 */
7762 + reg = <0x1e>;
7763 + #address-cells = <1>;
7764 + #size-cells = <0>;
7765 + };
7766 +
7767 + mdio@1f { /* Slot #8 */
7768 + reg = <0x1f>;
7769 + #address-cells = <1>;
7770 + #size-cells = <0>;
7771 + };
7772 + };
7773 +
7774 + mdio-mux-2 {
7775 + compatible = "mdio-mux-multiplexer";
7776 + mux-controls = <&mux 1>;
7777 + mdio-parent-bus = <&emdio2>;
7778 + #address-cells=<1>;
7779 + #size-cells = <0>;
7780 +
7781 + mdio@0 { /* Slot #1 (secondary EMI) */
7782 + reg = <0x00>;
7783 + #address-cells = <1>;
7784 + #size-cells = <0>;
7785 + };
7786 +
7787 + mdio@1 { /* Slot #2 (secondary EMI) */
7788 + reg = <0x01>;
7789 + #address-cells = <1>;
7790 + #size-cells = <0>;
7791 + };
7792 +
7793 + mdio@2 { /* Slot #3 (secondary EMI) */
7794 + reg = <0x02>;
7795 + #address-cells = <1>;
7796 + #size-cells = <0>;
7797 + };
7798 +
7799 + mdio@3 { /* Slot #4 (secondary EMI) */
7800 + reg = <0x03>;
7801 + #address-cells = <1>;
7802 + #size-cells = <0>;
7803 + };
7804 +
7805 + mdio@4 { /* Slot #5 (secondary EMI) */
7806 + reg = <0x04>;
7807 + #address-cells = <1>;
7808 + #size-cells = <0>;
7809 + };
7810 +
7811 + mdio@5 { /* Slot #6 (secondary EMI) */
7812 + reg = <0x05>;
7813 + #address-cells = <1>;
7814 + #size-cells = <0>;
7815 + };
7816 +
7817 + mdio@6 { /* Slot #7 (secondary EMI) */
7818 + reg = <0x06>;
7819 + #address-cells = <1>;
7820 + #size-cells = <0>;
7821 + };
7822 +
7823 + mdio@7 { /* Slot #8 (secondary EMI) */
7824 + reg = <0x07>;
7825 + #address-cells = <1>;
7826 + #size-cells = <0>;
7827 + };
7828 + };
7829 +};
7830 +
7831 +&crypto {
7832 + status = "okay";
7833 +};
7834 +
7835 +&dspi0 {
7836 + status = "okay";
7837 +
7838 + dflash0: flash@0 {
7839 + #address-cells = <1>;
7840 + #size-cells = <1>;
7841 + compatible = "jedec,spi-nor";
7842 + reg = <0>;
7843 + spi-max-frequency = <1000000>;
7844 + };
7845 +};
7846 +
7847 +&dspi1 {
7848 + status = "okay";
7849 +
7850 + dflash1: flash@0 {
7851 + #address-cells = <1>;
7852 + #size-cells = <1>;
7853 + compatible = "jedec,spi-nor";
7854 + reg = <0>;
7855 + spi-max-frequency = <1000000>;
7856 + };
7857 +};
7858 +
7859 +&dspi2 {
7860 + status = "okay";
7861 +
7862 + dflash2: flash@0 {
7863 + #address-cells = <1>;
7864 + #size-cells = <1>;
7865 + compatible = "jedec,spi-nor";
7866 + reg = <0>;
7867 + spi-max-frequency = <1000000>;
7868 + };
7869 +};
7870 +
7871 +&emdio1 {
7872 + status = "okay";
7873 +};
7874 +
7875 +&emdio2 {
7876 + status = "okay";
7877 +};
7878 +
7879 +&esdhc0 {
7880 + status = "okay";
7881 +};
7882 +
7883 +&esdhc1 {
7884 + status = "okay";
7885 +};
7886 +
7887 +&i2c0 {
7888 + status = "okay";
7889 +
7890 + fpga@66 {
7891 + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
7892 + "simple-mfd";
7893 + reg = <0x66>;
7894 +
7895 + mux: mux-controller {
7896 + compatible = "reg-mux";
7897 + #mux-control-cells = <1>;
7898 + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
7899 + <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
7900 + };
7901 + };
7902 +
7903 + i2c-mux@77 {
7904 + compatible = "nxp,pca9547";
7905 + reg = <0x77>;
7906 + #address-cells = <1>;
7907 + #size-cells = <0>;
7908 +
7909 + i2c@2 {
7910 + #address-cells = <1>;
7911 + #size-cells = <0>;
7912 + reg = <0x2>;
7913 +
7914 + power-monitor@40 {
7915 + compatible = "ti,ina220";
7916 + reg = <0x40>;
7917 + shunt-resistor = <500>;
7918 + };
7919 +
7920 + power-monitor@41 {
7921 + compatible = "ti,ina220";
7922 + reg = <0x41>;
7923 + shunt-resistor = <1000>;
7924 + };
7925 + };
7926 +
7927 + i2c@3 {
7928 + #address-cells = <1>;
7929 + #size-cells = <0>;
7930 + reg = <0x3>;
7931 +
7932 + temperature-sensor@4c {
7933 + compatible = "nxp,sa56004";
7934 + reg = <0x4c>;
7935 + vcc-supply = <&sb_3v3>;
7936 + };
7937 +
7938 + temperature-sensor@4d {
7939 + compatible = "nxp,sa56004";
7940 + reg = <0x4d>;
7941 + vcc-supply = <&sb_3v3>;
7942 + };
7943 +
7944 + rtc@51 {
7945 + compatible = "nxp,pcf2129";
7946 + reg = <0x51>;
7947 + };
7948 + };
7949 + };
7950 +};
7951 +
7952 +&uart0 {
7953 + status = "okay";
7954 +};
7955 +
7956 +&uart1 {
7957 + status = "okay";
7958 +};
7959 +
7960 +&usb0 {
7961 + status = "okay";
7962 +};
7963 +
7964 +&usb1 {
7965 + status = "okay";
7966 +};
7967 +
7968 +&pcs_mdio1 {
7969 + pcs_phy1: ethernet-phy@0 {
7970 + compatible = "ethernet-phy-ieee802.3-c45";
7971 + backplane-mode = "40gbase-kr";
7972 + reg = <0x0>;
7973 + fsl,lane-handle = <&serdes1>;
7974 + fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */
7975 + };
7976 +};
7977 +
7978 +&pcs_mdio2 {
7979 + pcs_phy2: ethernet-phy@0 {
7980 + compatible = "ethernet-phy-ieee802.3-c45";
7981 + backplane-mode = "40gbase-kr";
7982 + reg = <0x0>;
7983 + fsl,lane-handle = <&serdes1>;
7984 + fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */
7985 + };
7986 +};
7987 +
7988 +&pcs_mdio3 {
7989 + pcs_phy3: ethernet-phy@0 {
7990 + compatible = "ethernet-phy-ieee802.3-c45";
7991 + backplane-mode = "10gbase-kr";
7992 + reg = <0x0>;
7993 + fsl,lane-handle = <&serdes1>;
7994 + fsl,lane-reg = <0xF00 0x100>; /* lane H */
7995 + };
7996 +};
7997 +
7998 +&pcs_mdio4 {
7999 + pcs_phy4: ethernet-phy@0 {
8000 + compatible = "ethernet-phy-ieee802.3-c45";
8001 + backplane-mode = "10gbase-kr";
8002 + reg = <0x0>;
8003 + fsl,lane-handle = <&serdes1>;
8004 + fsl,lane-reg = <0xE00 0x100>; /* lane G */
8005 + };
8006 +};
8007 +
8008 +/* Update DPMAC connections to 40G backplane PHYs
8009 + * &dpmac1 {
8010 + * phy-handle = <&pcs_phy1>;
8011 + * };
8012 + *
8013 + * &dpmac2 {
8014 + * phy-handle = <&pcs_phy2>;
8015 + * };
8016 + */
8017 +
8018 +/* Update DPMAC connections to 10G backplane PHYs
8019 + * &dpmac3 {
8020 + * phy-handle = <&pcs_phy3>;
8021 + * };
8022 + *
8023 + * &dpmac4 {
8024 + * phy-handle = <&pcs_phy4>;
8025 + * };
8026 + */
8027 --- /dev/null
8028 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
8029 @@ -0,0 +1,233 @@
8030 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
8031 +//
8032 +// Device Tree file for LX2160ARDB
8033 +//
8034 +// Copyright 2018 NXP
8035 +
8036 +/dts-v1/;
8037 +
8038 +#include "fsl-lx2160a.dtsi"
8039 +
8040 +/ {
8041 + model = "NXP Layerscape LX2160ARDB";
8042 + compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
8043 +
8044 + aliases {
8045 + crypto = &crypto;
8046 + serial0 = &uart0;
8047 + };
8048 +
8049 + chosen {
8050 + stdout-path = "serial0:115200n8";
8051 + };
8052 +
8053 + sb_3v3: regulator-sb3v3 {
8054 + compatible = "regulator-fixed";
8055 + regulator-name = "MC34717-3.3VSB";
8056 + regulator-min-microvolt = <3300000>;
8057 + regulator-max-microvolt = <3300000>;
8058 + regulator-boot-on;
8059 + regulator-always-on;
8060 + };
8061 +};
8062 +
8063 +&crypto {
8064 + status = "okay";
8065 +};
8066 +
8067 +&emdio1 {
8068 + status = "okay";
8069 +};
8070 +
8071 +&emdio2 {
8072 + status = "okay";
8073 +};
8074 +
8075 +&esdhc0 {
8076 + sd-uhs-sdr104;
8077 + sd-uhs-sdr50;
8078 + sd-uhs-sdr25;
8079 + sd-uhs-sdr12;
8080 + status = "okay";
8081 +};
8082 +
8083 +&esdhc1 {
8084 + mmc-hs200-1_8v;
8085 + mmc-hs400-1_8v;
8086 + bus-width = <8>;
8087 + status = "okay";
8088 +};
8089 +
8090 +&i2c0 {
8091 + status = "okay";
8092 +
8093 + i2c-mux@77 {
8094 + compatible = "nxp,pca9547";
8095 + reg = <0x77>;
8096 + #address-cells = <1>;
8097 + #size-cells = <0>;
8098 +
8099 + i2c@2 {
8100 + #address-cells = <1>;
8101 + #size-cells = <0>;
8102 + reg = <0x2>;
8103 +
8104 + power-monitor@40 {
8105 + compatible = "ti,ina220";
8106 + reg = <0x40>;
8107 + shunt-resistor = <1000>;
8108 + };
8109 + };
8110 +
8111 + i2c@3 {
8112 + #address-cells = <1>;
8113 + #size-cells = <0>;
8114 + reg = <0x3>;
8115 +
8116 + temperature-sensor@4c {
8117 + compatible = "nxp,sa56004";
8118 + reg = <0x4c>;
8119 + vcc-supply = <&sb_3v3>;
8120 + };
8121 +
8122 + temperature-sensor@4d {
8123 + compatible = "nxp,sa56004";
8124 + reg = <0x4d>;
8125 + vcc-supply = <&sb_3v3>;
8126 + };
8127 + };
8128 + };
8129 +};
8130 +
8131 +&i2c4 {
8132 + status = "okay";
8133 +
8134 + rtc@51 {
8135 + compatible = "nxp,pcf2129";
8136 + reg = <0x51>;
8137 + // IRQ10_B
8138 + interrupts = <0 150 0x4>;
8139 + };
8140 +};
8141 +
8142 +&fspi {
8143 + status = "okay";
8144 + nxp,fspi-has-second-chip;
8145 + flash0: mt35xu512aba@0 {
8146 + #address-cells = <1>;
8147 + #size-cells = <1>;
8148 + compatible = "micron,m25p80";
8149 + m25p,fast-read;
8150 + spi-max-frequency = <50000000>;
8151 + reg = <0>;
8152 + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
8153 + spi-rx-bus-width = <8>;
8154 + spi-tx-bus-width = <1>;
8155 + };
8156 +
8157 + flash1: mt35xu512aba@1 {
8158 + #address-cells = <1>;
8159 + #size-cells = <1>;
8160 + compatible = "micron,m25p80";
8161 + m25p,fast-read;
8162 + spi-max-frequency = <50000000>;
8163 + reg = <1>;
8164 + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
8165 + spi-rx-bus-width = <8>;
8166 + spi-tx-bus-width = <1>;
8167 + };
8168 +};
8169 +
8170 +&uart0 {
8171 + status = "okay";
8172 +};
8173 +
8174 +&uart1 {
8175 + status = "okay";
8176 +};
8177 +
8178 +&usb0 {
8179 + status = "okay";
8180 +};
8181 +
8182 +&usb1 {
8183 + status = "okay";
8184 +};
8185 +
8186 +&emdio1 {
8187 + rgmii_phy1: ethernet-phy@1 {
8188 + /* AR8035 PHY - "compatible" property not strictly needed */
8189 + compatible = "ethernet-phy-id004d.d072";
8190 + reg = <0x1>;
8191 + /* Poll mode - no "interrupts" property defined */
8192 + };
8193 + rgmii_phy2: ethernet-phy@2 {
8194 + /* AR8035 PHY - "compatible" property not strictly needed */
8195 + compatible = "ethernet-phy-id004d.d072";
8196 + reg = <0x2>;
8197 + /* Poll mode - no "interrupts" property defined */
8198 + };
8199 + aquantia_phy1: ethernet-phy@4 {
8200 + /* AQR107 PHY - "compatible" property not strictly needed */
8201 + compatible = "ethernet-phy-ieee802.3-c45";
8202 + reg = <0x4>;
8203 + /* Poll mode - no "interrupts" property defined */
8204 + };
8205 + aquantia_phy2: ethernet-phy@5 {
8206 + /* AQR107 PHY - "compatible" property not strictly needed */
8207 + compatible = "ethernet-phy-ieee802.3-c45";
8208 + reg = <0x5>;
8209 + /* Poll mode - no "interrupts" property defined */
8210 + };
8211 +};
8212 +
8213 +&emdio2 {
8214 + inphi_phy: ethernet-phy@0 {
8215 + compatible = "ethernet-phy-id0210.7440";
8216 + reg = <0x0>;
8217 + };
8218 +};
8219 +
8220 +&dpmac3 {
8221 + phy-handle = <&aquantia_phy1>;
8222 + phy-connection-type = "xgmii";
8223 +};
8224 +
8225 +&dpmac4 {
8226 + phy-handle = <&aquantia_phy2>;
8227 + phy-connection-type = "xgmii";
8228 +};
8229 +
8230 +&dpmac5 {
8231 + phy-handle = <&inphi_phy>;
8232 +};
8233 +
8234 +&dpmac6 {
8235 + phy-handle = <&inphi_phy>;
8236 +};
8237 +
8238 +&dpmac17 {
8239 + phy-handle = <&rgmii_phy1>;
8240 + phy-connection-type = "rgmii-id";
8241 +};
8242 +
8243 +&dpmac18 {
8244 + phy-handle = <&rgmii_phy2>;
8245 + phy-connection-type = "rgmii-id";
8246 +};
8247 +
8248 +&sata0 {
8249 + status = "okay";
8250 +};
8251 +
8252 +&sata1 {
8253 + status = "okay";
8254 +};
8255 +
8256 +&sata2 {
8257 + status = "okay";
8258 +};
8259 +
8260 +&sata3 {
8261 + status = "okay";
8262 +};
8263 --- /dev/null
8264 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
8265 @@ -0,0 +1,1318 @@
8266 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
8267 +//
8268 +// Device Tree Include file for Layerscape-LX2160A family SoC.
8269 +//
8270 +// Copyright 2018 NXP
8271 +
8272 +#include <dt-bindings/gpio/gpio.h>
8273 +#include <dt-bindings/interrupt-controller/arm-gic.h>
8274 +
8275 +/memreserve/ 0x80000000 0x00010000;
8276 +
8277 +/ {
8278 + compatible = "fsl,lx2160a";
8279 + interrupt-parent = <&gic>;
8280 + #address-cells = <2>;
8281 + #size-cells = <2>;
8282 +
8283 + cpus {
8284 + #address-cells = <1>;
8285 + #size-cells = <0>;
8286 +
8287 + // 8 clusters having 2 Cortex-A72 cores each
8288 + cpu@0 {
8289 + device_type = "cpu";
8290 + compatible = "arm,cortex-a72";
8291 + enable-method = "psci";
8292 + reg = <0x0>;
8293 + clocks = <&clockgen 1 0>;
8294 + d-cache-size = <0x8000>;
8295 + d-cache-line-size = <64>;
8296 + d-cache-sets = <128>;
8297 + i-cache-size = <0xC000>;
8298 + i-cache-line-size = <64>;
8299 + i-cache-sets = <192>;
8300 + next-level-cache = <&cluster0_l2>;
8301 + };
8302 +
8303 + cpu@1 {
8304 + device_type = "cpu";
8305 + compatible = "arm,cortex-a72";
8306 + enable-method = "psci";
8307 + reg = <0x1>;
8308 + clocks = <&clockgen 1 0>;
8309 + d-cache-size = <0x8000>;
8310 + d-cache-line-size = <64>;
8311 + d-cache-sets = <128>;
8312 + i-cache-size = <0xC000>;
8313 + i-cache-line-size = <64>;
8314 + i-cache-sets = <192>;
8315 + next-level-cache = <&cluster0_l2>;
8316 + };
8317 +
8318 + cpu@100 {
8319 + device_type = "cpu";
8320 + compatible = "arm,cortex-a72";
8321 + enable-method = "psci";
8322 + reg = <0x100>;
8323 + clocks = <&clockgen 1 1>;
8324 + d-cache-size = <0x8000>;
8325 + d-cache-line-size = <64>;
8326 + d-cache-sets = <128>;
8327 + i-cache-size = <0xC000>;
8328 + i-cache-line-size = <64>;
8329 + i-cache-sets = <192>;
8330 + next-level-cache = <&cluster1_l2>;
8331 + };
8332 +
8333 + cpu@101 {
8334 + device_type = "cpu";
8335 + compatible = "arm,cortex-a72";
8336 + enable-method = "psci";
8337 + reg = <0x101>;
8338 + clocks = <&clockgen 1 1>;
8339 + d-cache-size = <0x8000>;
8340 + d-cache-line-size = <64>;
8341 + d-cache-sets = <128>;
8342 + i-cache-size = <0xC000>;
8343 + i-cache-line-size = <64>;
8344 + i-cache-sets = <192>;
8345 + next-level-cache = <&cluster1_l2>;
8346 + };
8347 +
8348 + cpu@200 {
8349 + device_type = "cpu";
8350 + compatible = "arm,cortex-a72";
8351 + enable-method = "psci";
8352 + reg = <0x200>;
8353 + clocks = <&clockgen 1 2>;
8354 + d-cache-size = <0x8000>;
8355 + d-cache-line-size = <64>;
8356 + d-cache-sets = <128>;
8357 + i-cache-size = <0xC000>;
8358 + i-cache-line-size = <64>;
8359 + i-cache-sets = <192>;
8360 + next-level-cache = <&cluster2_l2>;
8361 + };
8362 +
8363 + cpu@201 {
8364 + device_type = "cpu";
8365 + compatible = "arm,cortex-a72";
8366 + enable-method = "psci";
8367 + reg = <0x201>;
8368 + clocks = <&clockgen 1 2>;
8369 + d-cache-size = <0x8000>;
8370 + d-cache-line-size = <64>;
8371 + d-cache-sets = <128>;
8372 + i-cache-size = <0xC000>;
8373 + i-cache-line-size = <64>;
8374 + i-cache-sets = <192>;
8375 + next-level-cache = <&cluster2_l2>;
8376 + };
8377 +
8378 + cpu@300 {
8379 + device_type = "cpu";
8380 + compatible = "arm,cortex-a72";
8381 + enable-method = "psci";
8382 + reg = <0x300>;
8383 + clocks = <&clockgen 1 3>;
8384 + d-cache-size = <0x8000>;
8385 + d-cache-line-size = <64>;
8386 + d-cache-sets = <128>;
8387 + i-cache-size = <0xC000>;
8388 + i-cache-line-size = <64>;
8389 + i-cache-sets = <192>;
8390 + next-level-cache = <&cluster3_l2>;
8391 + };
8392 +
8393 + cpu@301 {
8394 + device_type = "cpu";
8395 + compatible = "arm,cortex-a72";
8396 + enable-method = "psci";
8397 + reg = <0x301>;
8398 + clocks = <&clockgen 1 3>;
8399 + d-cache-size = <0x8000>;
8400 + d-cache-line-size = <64>;
8401 + d-cache-sets = <128>;
8402 + i-cache-size = <0xC000>;
8403 + i-cache-line-size = <64>;
8404 + i-cache-sets = <192>;
8405 + next-level-cache = <&cluster3_l2>;
8406 + };
8407 +
8408 + cpu@400 {
8409 + device_type = "cpu";
8410 + compatible = "arm,cortex-a72";
8411 + enable-method = "psci";
8412 + reg = <0x400>;
8413 + clocks = <&clockgen 1 4>;
8414 + d-cache-size = <0x8000>;
8415 + d-cache-line-size = <64>;
8416 + d-cache-sets = <128>;
8417 + i-cache-size = <0xC000>;
8418 + i-cache-line-size = <64>;
8419 + i-cache-sets = <192>;
8420 + next-level-cache = <&cluster4_l2>;
8421 + };
8422 +
8423 + cpu@401 {
8424 + device_type = "cpu";
8425 + compatible = "arm,cortex-a72";
8426 + enable-method = "psci";
8427 + reg = <0x401>;
8428 + clocks = <&clockgen 1 4>;
8429 + d-cache-size = <0x8000>;
8430 + d-cache-line-size = <64>;
8431 + d-cache-sets = <128>;
8432 + i-cache-size = <0xC000>;
8433 + i-cache-line-size = <64>;
8434 + i-cache-sets = <192>;
8435 + next-level-cache = <&cluster4_l2>;
8436 + };
8437 +
8438 + cpu@500 {
8439 + device_type = "cpu";
8440 + compatible = "arm,cortex-a72";
8441 + enable-method = "psci";
8442 + reg = <0x500>;
8443 + clocks = <&clockgen 1 5>;
8444 + d-cache-size = <0x8000>;
8445 + d-cache-line-size = <64>;
8446 + d-cache-sets = <128>;
8447 + i-cache-size = <0xC000>;
8448 + i-cache-line-size = <64>;
8449 + i-cache-sets = <192>;
8450 + next-level-cache = <&cluster5_l2>;
8451 + };
8452 +
8453 + cpu@501 {
8454 + device_type = "cpu";
8455 + compatible = "arm,cortex-a72";
8456 + enable-method = "psci";
8457 + reg = <0x501>;
8458 + clocks = <&clockgen 1 5>;
8459 + d-cache-size = <0x8000>;
8460 + d-cache-line-size = <64>;
8461 + d-cache-sets = <128>;
8462 + i-cache-size = <0xC000>;
8463 + i-cache-line-size = <64>;
8464 + i-cache-sets = <192>;
8465 + next-level-cache = <&cluster5_l2>;
8466 + };
8467 +
8468 + cpu@600 {
8469 + device_type = "cpu";
8470 + compatible = "arm,cortex-a72";
8471 + enable-method = "psci";
8472 + reg = <0x600>;
8473 + clocks = <&clockgen 1 6>;
8474 + d-cache-size = <0x8000>;
8475 + d-cache-line-size = <64>;
8476 + d-cache-sets = <128>;
8477 + i-cache-size = <0xC000>;
8478 + i-cache-line-size = <64>;
8479 + i-cache-sets = <192>;
8480 + next-level-cache = <&cluster6_l2>;
8481 + };
8482 +
8483 + cpu@601 {
8484 + device_type = "cpu";
8485 + compatible = "arm,cortex-a72";
8486 + enable-method = "psci";
8487 + reg = <0x601>;
8488 + clocks = <&clockgen 1 6>;
8489 + d-cache-size = <0x8000>;
8490 + d-cache-line-size = <64>;
8491 + d-cache-sets = <128>;
8492 + i-cache-size = <0xC000>;
8493 + i-cache-line-size = <64>;
8494 + i-cache-sets = <192>;
8495 + next-level-cache = <&cluster6_l2>;
8496 + };
8497 +
8498 + cpu@700 {
8499 + device_type = "cpu";
8500 + compatible = "arm,cortex-a72";
8501 + enable-method = "psci";
8502 + reg = <0x700>;
8503 + clocks = <&clockgen 1 7>;
8504 + d-cache-size = <0x8000>;
8505 + d-cache-line-size = <64>;
8506 + d-cache-sets = <128>;
8507 + i-cache-size = <0xC000>;
8508 + i-cache-line-size = <64>;
8509 + i-cache-sets = <192>;
8510 + next-level-cache = <&cluster7_l2>;
8511 + };
8512 +
8513 + cpu@701 {
8514 + device_type = "cpu";
8515 + compatible = "arm,cortex-a72";
8516 + enable-method = "psci";
8517 + reg = <0x701>;
8518 + clocks = <&clockgen 1 7>;
8519 + d-cache-size = <0x8000>;
8520 + d-cache-line-size = <64>;
8521 + d-cache-sets = <128>;
8522 + i-cache-size = <0xC000>;
8523 + i-cache-line-size = <64>;
8524 + i-cache-sets = <192>;
8525 + next-level-cache = <&cluster7_l2>;
8526 + };
8527 +
8528 + cluster0_l2: l2-cache0 {
8529 + compatible = "cache";
8530 + cache-size = <0x100000>;
8531 + cache-line-size = <64>;
8532 + cache-sets = <1024>;
8533 + cache-level = <2>;
8534 + };
8535 +
8536 + cluster1_l2: l2-cache1 {
8537 + compatible = "cache";
8538 + cache-size = <0x100000>;
8539 + cache-line-size = <64>;
8540 + cache-sets = <1024>;
8541 + cache-level = <2>;
8542 + };
8543 +
8544 + cluster2_l2: l2-cache2 {
8545 + compatible = "cache";
8546 + cache-size = <0x100000>;
8547 + cache-line-size = <64>;
8548 + cache-sets = <1024>;
8549 + cache-level = <2>;
8550 + };
8551 +
8552 + cluster3_l2: l2-cache3 {
8553 + compatible = "cache";
8554 + cache-size = <0x100000>;
8555 + cache-line-size = <64>;
8556 + cache-sets = <1024>;
8557 + cache-level = <2>;
8558 + };
8559 +
8560 + cluster4_l2: l2-cache4 {
8561 + compatible = "cache";
8562 + cache-size = <0x100000>;
8563 + cache-line-size = <64>;
8564 + cache-sets = <1024>;
8565 + cache-level = <2>;
8566 + };
8567 +
8568 + cluster5_l2: l2-cache5 {
8569 + compatible = "cache";
8570 + cache-size = <0x100000>;
8571 + cache-line-size = <64>;
8572 + cache-sets = <1024>;
8573 + cache-level = <2>;
8574 + };
8575 +
8576 + cluster6_l2: l2-cache6 {
8577 + compatible = "cache";
8578 + cache-size = <0x100000>;
8579 + cache-line-size = <64>;
8580 + cache-sets = <1024>;
8581 + cache-level = <2>;
8582 + };
8583 +
8584 + cluster7_l2: l2-cache7 {
8585 + compatible = "cache";
8586 + cache-size = <0x100000>;
8587 + cache-line-size = <64>;
8588 + cache-sets = <1024>;
8589 + cache-level = <2>;
8590 + };
8591 + };
8592 +
8593 + gic: interrupt-controller@6000000 {
8594 + compatible = "arm,gic-v3";
8595 + reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
8596 + <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
8597 + // SGI_base)
8598 + <0x0 0x0c0c0000 0 0x2000>, // GICC
8599 + <0x0 0x0c0d0000 0 0x1000>, // GICH
8600 + <0x0 0x0c0e0000 0 0x20000>; // GICV
8601 + #interrupt-cells = <3>;
8602 + #address-cells = <2>;
8603 + #size-cells = <2>;
8604 + ranges;
8605 + interrupt-controller;
8606 + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
8607 +
8608 + its: gic-its@6020000 {
8609 + compatible = "arm,gic-v3-its";
8610 + msi-controller;
8611 + reg = <0x0 0x6020000 0 0x20000>;
8612 + };
8613 + };
8614 +
8615 + timer {
8616 + compatible = "arm,armv8-timer";
8617 + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
8618 + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
8619 + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
8620 + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
8621 + };
8622 +
8623 + pmu {
8624 + compatible = "arm,cortex-a72-pmu";
8625 + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
8626 + };
8627 +
8628 + psci {
8629 + compatible = "arm,psci-0.2";
8630 + method = "smc";
8631 + };
8632 +
8633 + memory@80000000 {
8634 + // DRAM space - 1, size : 2 GB DRAM
8635 + device_type = "memory";
8636 + reg = <0x00000000 0x80000000 0 0x80000000>;
8637 + };
8638 +
8639 + ddr1: memory-controller@1080000 {
8640 + compatible = "fsl,qoriq-memory-controller";
8641 + reg = <0x0 0x1080000 0x0 0x1000>;
8642 + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
8643 + little-endian;
8644 + };
8645 +
8646 + ddr2: memory-controller@1090000 {
8647 + compatible = "fsl,qoriq-memory-controller";
8648 + reg = <0x0 0x1090000 0x0 0x1000>;
8649 + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
8650 + little-endian;
8651 + };
8652 +
8653 + sysclk: sysclk {
8654 + compatible = "fixed-clock";
8655 + #clock-cells = <0>;
8656 + clock-frequency = <100000000>;
8657 + clock-output-names = "sysclk";
8658 + };
8659 +
8660 + soc {
8661 + compatible = "simple-bus";
8662 + #address-cells = <2>;
8663 + #size-cells = <2>;
8664 + ranges;
8665 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
8666 +
8667 + crypto: crypto@8000000 {
8668 + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
8669 + fsl,sec-era = <10>;
8670 + #address-cells = <1>;
8671 + #size-cells = <1>;
8672 + ranges = <0x0 0x00 0x8000000 0x100000>;
8673 + reg = <0x00 0x8000000 0x0 0x100000>;
8674 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
8675 + dma-coherent;
8676 + status = "disabled";
8677 +
8678 + sec_jr0: jr@10000 {
8679 + compatible = "fsl,sec-v5.0-job-ring",
8680 + "fsl,sec-v4.0-job-ring";
8681 + reg = <0x10000 0x10000>;
8682 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
8683 + };
8684 +
8685 + sec_jr1: jr@20000 {
8686 + compatible = "fsl,sec-v5.0-job-ring",
8687 + "fsl,sec-v4.0-job-ring";
8688 + reg = <0x20000 0x10000>;
8689 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
8690 + };
8691 +
8692 + sec_jr2: jr@30000 {
8693 + compatible = "fsl,sec-v5.0-job-ring",
8694 + "fsl,sec-v4.0-job-ring";
8695 + reg = <0x30000 0x10000>;
8696 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
8697 + };
8698 +
8699 + sec_jr3: jr@40000 {
8700 + compatible = "fsl,sec-v5.0-job-ring",
8701 + "fsl,sec-v4.0-job-ring";
8702 + reg = <0x40000 0x10000>;
8703 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
8704 + };
8705 + };
8706 +
8707 + clockgen: clock-controller@1300000 {
8708 + compatible = "fsl,lx2160a-clockgen";
8709 + reg = <0 0x1300000 0 0xa0000>;
8710 + #clock-cells = <2>;
8711 + clocks = <&sysclk>;
8712 + };
8713 +
8714 + dcfg: syscon@1e00000 {
8715 + compatible = "fsl,lx2160a-dcfg", "syscon";
8716 + reg = <0x0 0x1e00000 0x0 0x10000>;
8717 + little-endian;
8718 + };
8719 +
8720 + /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
8721 + emdio1: mdio@8b96000 {
8722 + compatible = "fsl,fman-memac-mdio";
8723 + reg = <0x0 0x8b96000 0x0 0x1000>;
8724 + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
8725 + #address-cells = <1>;
8726 + #size-cells = <0>;
8727 + little-endian; /* force the driver in LE mode */
8728 + status = "disabled";
8729 + };
8730 +
8731 + /* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */
8732 + emdio2: mdio@8b97000 {
8733 + compatible = "fsl,fman-memac-mdio";
8734 + reg = <0x0 0x8b97000 0x0 0x1000>;
8735 + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
8736 + #address-cells = <1>;
8737 + #size-cells = <0>;
8738 + little-endian; /* force the driver in LE mode */
8739 + status = "disabled";
8740 + };
8741 +
8742 + pcs_mdio1: mdio@0x8c07000 {
8743 + compatible = "fsl,fman-memac-mdio";
8744 + reg = <0x0 0x8c07000 0x0 0x1000>;
8745 + device_type = "mdio";
8746 + little-endian;
8747 +
8748 + #address-cells = <1>;
8749 + #size-cells = <0>;
8750 + };
8751 +
8752 + pcs_mdio2: mdio@0x8c0b000 {
8753 + compatible = "fsl,fman-memac-mdio";
8754 + reg = <0x0 0x8c0b000 0x0 0x1000>;
8755 + device_type = "mdio";
8756 + little-endian;
8757 +
8758 + #address-cells = <1>;
8759 + #size-cells = <0>;
8760 + };
8761 +
8762 + pcs_mdio3: mdio@0x8c0f000 {
8763 + compatible = "fsl,fman-memac-mdio";
8764 + reg = <0x0 0x8c0f000 0x0 0x1000>;
8765 + device_type = "mdio";
8766 + little-endian;
8767 +
8768 + #address-cells = <1>;
8769 + #size-cells = <0>;
8770 + };
8771 +
8772 + pcs_mdio4: mdio@0x8c13000 {
8773 + compatible = "fsl,fman-memac-mdio";
8774 + reg = <0x0 0x8c13000 0x0 0x1000>;
8775 + device_type = "mdio";
8776 + little-endian;
8777 +
8778 + #address-cells = <1>;
8779 + #size-cells = <0>;
8780 + };
8781 +
8782 + pcs_mdio5: mdio@0x8c17000 {
8783 + compatible = "fsl,fman-memac-mdio";
8784 + reg = <0x0 0x8c17000 0x0 0x1000>;
8785 + device_type = "mdio";
8786 + little-endian;
8787 +
8788 + #address-cells = <1>;
8789 + #size-cells = <0>;
8790 + };
8791 +
8792 + pcs_mdio6: mdio@0x8c1b000 {
8793 + compatible = "fsl,fman-memac-mdio";
8794 + reg = <0x0 0x8c1b000 0x0 0x1000>;
8795 + device_type = "mdio";
8796 + little-endian;
8797 +
8798 + #address-cells = <1>;
8799 + #size-cells = <0>;
8800 + };
8801 +
8802 + pcs_mdio7: mdio@0x8c1f000 {
8803 + compatible = "fsl,fman-memac-mdio";
8804 + reg = <0x0 0x8c1f000 0x0 0x1000>;
8805 + device_type = "mdio";
8806 + little-endian;
8807 +
8808 + #address-cells = <1>;
8809 + #size-cells = <0>;
8810 + };
8811 +
8812 + pcs_mdio8: mdio@0x8c23000 {
8813 + compatible = "fsl,fman-memac-mdio";
8814 + reg = <0x0 0x8c23000 0x0 0x1000>;
8815 + device_type = "mdio";
8816 + little-endian;
8817 +
8818 + #address-cells = <1>;
8819 + #size-cells = <0>;
8820 + };
8821 +
8822 + serdes1: serdes@1ea0000 {
8823 + compatible = "fsl,serdes-28g";
8824 + reg = <0x0 0x1ea0000 0 0x00002000>;
8825 + little-endian;
8826 + };
8827 +
8828 + i2c0: i2c@2000000 {
8829 + compatible = "fsl,vf610-i2c";
8830 + #address-cells = <1>;
8831 + #size-cells = <0>;
8832 + reg = <0x0 0x2000000 0x0 0x10000>;
8833 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
8834 + clock-names = "i2c";
8835 + clocks = <&clockgen 4 7>;
8836 + scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
8837 + status = "disabled";
8838 + };
8839 +
8840 + i2c1: i2c@2010000 {
8841 + compatible = "fsl,vf610-i2c";
8842 + #address-cells = <1>;
8843 + #size-cells = <0>;
8844 + reg = <0x0 0x2010000 0x0 0x10000>;
8845 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
8846 + clock-names = "i2c";
8847 + clocks = <&clockgen 4 7>;
8848 + status = "disabled";
8849 + };
8850 +
8851 + i2c2: i2c@2020000 {
8852 + compatible = "fsl,vf610-i2c";
8853 + #address-cells = <1>;
8854 + #size-cells = <0>;
8855 + reg = <0x0 0x2020000 0x0 0x10000>;
8856 + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
8857 + clock-names = "i2c";
8858 + clocks = <&clockgen 4 7>;
8859 + status = "disabled";
8860 + };
8861 +
8862 + i2c3: i2c@2030000 {
8863 + compatible = "fsl,vf610-i2c";
8864 + #address-cells = <1>;
8865 + #size-cells = <0>;
8866 + reg = <0x0 0x2030000 0x0 0x10000>;
8867 + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
8868 + clock-names = "i2c";
8869 + clocks = <&clockgen 4 7>;
8870 + status = "disabled";
8871 + };
8872 +
8873 + i2c4: i2c@2040000 {
8874 + compatible = "fsl,vf610-i2c";
8875 + #address-cells = <1>;
8876 + #size-cells = <0>;
8877 + reg = <0x0 0x2040000 0x0 0x10000>;
8878 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8879 + clock-names = "i2c";
8880 + clocks = <&clockgen 4 7>;
8881 + scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
8882 + status = "disabled";
8883 + };
8884 +
8885 + i2c5: i2c@2050000 {
8886 + compatible = "fsl,vf610-i2c";
8887 + #address-cells = <1>;
8888 + #size-cells = <0>;
8889 + reg = <0x0 0x2050000 0x0 0x10000>;
8890 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8891 + clock-names = "i2c";
8892 + clocks = <&clockgen 4 7>;
8893 + status = "disabled";
8894 + };
8895 +
8896 + i2c6: i2c@2060000 {
8897 + compatible = "fsl,vf610-i2c";
8898 + #address-cells = <1>;
8899 + #size-cells = <0>;
8900 + reg = <0x0 0x2060000 0x0 0x10000>;
8901 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
8902 + clock-names = "i2c";
8903 + clocks = <&clockgen 4 7>;
8904 + status = "disabled";
8905 + };
8906 +
8907 + i2c7: i2c@2070000 {
8908 + compatible = "fsl,vf610-i2c";
8909 + #address-cells = <1>;
8910 + #size-cells = <0>;
8911 + reg = <0x0 0x2070000 0x0 0x10000>;
8912 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
8913 + clock-names = "i2c";
8914 + clocks = <&clockgen 4 7>;
8915 + status = "disabled";
8916 + };
8917 +
8918 + dspi0: spi@2100000 {
8919 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8920 + #address-cells = <1>;
8921 + #size-cells = <0>;
8922 + reg = <0x0 0x2100000 0x0 0x10000>;
8923 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
8924 + clocks = <&clockgen 4 7>;
8925 + clock-names = "dspi";
8926 + spi-num-chipselects = <5>;
8927 + bus-num = <0>;
8928 + status = "disabled";
8929 + };
8930 +
8931 + dspi1: spi@2110000 {
8932 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8933 + #address-cells = <1>;
8934 + #size-cells = <0>;
8935 + reg = <0x0 0x2110000 0x0 0x10000>;
8936 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
8937 + clocks = <&clockgen 4 7>;
8938 + clock-names = "dspi";
8939 + spi-num-chipselects = <5>;
8940 + bus-num = <1>;
8941 + status = "disabled";
8942 + };
8943 +
8944 + dspi2: spi@2120000 {
8945 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8946 + #address-cells = <1>;
8947 + #size-cells = <0>;
8948 + reg = <0x0 0x2120000 0x0 0x10000>;
8949 + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
8950 + clocks = <&clockgen 4 7>;
8951 + clock-names = "dspi";
8952 + spi-num-chipselects = <5>;
8953 + bus-num = <2>;
8954 + status = "disabled";
8955 + };
8956 +
8957 + esdhc0: esdhc@2140000 {
8958 + compatible = "fsl,esdhc";
8959 + reg = <0x0 0x2140000 0x0 0x10000>;
8960 + interrupts = <0 28 0x4>; /* Level high type */
8961 + clocks = <&clockgen 4 1>;
8962 + voltage-ranges = <1800 1800 3300 3300>;
8963 + sdhci,auto-cmd12;
8964 + little-endian;
8965 + bus-width = <4>;
8966 + status = "disabled";
8967 + };
8968 +
8969 + esdhc1: esdhc@2150000 {
8970 + compatible = "fsl,esdhc";
8971 + reg = <0x0 0x2150000 0x0 0x10000>;
8972 + interrupts = <0 63 0x4>; /* Level high type */
8973 + clocks = <&clockgen 4 1>;
8974 + voltage-ranges = <1800 1800 3300 3300>;
8975 + sdhci,auto-cmd12;
8976 + broken-cd;
8977 + little-endian;
8978 + bus-width = <4>;
8979 + status = "disabled";
8980 + };
8981 +
8982 + uart0: serial@21c0000 {
8983 + compatible = "arm,sbsa-uart","arm,pl011";
8984 + reg = <0x0 0x21c0000 0x0 0x1000>;
8985 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
8986 + current-speed = <115200>;
8987 + status = "disabled";
8988 + };
8989 +
8990 + uart1: serial@21d0000 {
8991 + compatible = "arm,sbsa-uart","arm,pl011";
8992 + reg = <0x0 0x21d0000 0x0 0x1000>;
8993 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
8994 + current-speed = <115200>;
8995 + status = "disabled";
8996 + };
8997 +
8998 + uart2: serial@21e0000 {
8999 + compatible = "arm,sbsa-uart","arm,pl011";
9000 + reg = <0x0 0x21e0000 0x0 0x1000>;
9001 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
9002 + current-speed = <115200>;
9003 + status = "disabled";
9004 + };
9005 +
9006 + uart3: serial@21f0000 {
9007 + compatible = "arm,sbsa-uart","arm,pl011";
9008 + reg = <0x0 0x21f0000 0x0 0x1000>;
9009 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
9010 + current-speed = <115200>;
9011 + status = "disabled";
9012 + };
9013 +
9014 + gpio0: gpio@2300000 {
9015 + compatible = "fsl,qoriq-gpio";
9016 + reg = <0x0 0x2300000 0x0 0x10000>;
9017 + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
9018 + gpio-controller;
9019 + little-endian;
9020 + #gpio-cells = <2>;
9021 + interrupt-controller;
9022 + #interrupt-cells = <2>;
9023 + };
9024 +
9025 + gpio1: gpio@2310000 {
9026 + compatible = "fsl,qoriq-gpio";
9027 + reg = <0x0 0x2310000 0x0 0x10000>;
9028 + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
9029 + gpio-controller;
9030 + little-endian;
9031 + #gpio-cells = <2>;
9032 + interrupt-controller;
9033 + #interrupt-cells = <2>;
9034 + };
9035 +
9036 + gpio2: gpio@2320000 {
9037 + compatible = "fsl,qoriq-gpio";
9038 + reg = <0x0 0x2320000 0x0 0x10000>;
9039 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
9040 + gpio-controller;
9041 + little-endian;
9042 + #gpio-cells = <2>;
9043 + interrupt-controller;
9044 + #interrupt-cells = <2>;
9045 + };
9046 +
9047 + gpio3: gpio@2330000 {
9048 + compatible = "fsl,qoriq-gpio";
9049 + reg = <0x0 0x2330000 0x0 0x10000>;
9050 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
9051 + gpio-controller;
9052 + little-endian;
9053 + #gpio-cells = <2>;
9054 + interrupt-controller;
9055 + #interrupt-cells = <2>;
9056 + };
9057 +
9058 + watchdog@23a0000 {
9059 + compatible = "arm,sbsa-gwdt";
9060 + reg = <0x0 0x23a0000 0 0x1000>,
9061 + <0x0 0x2390000 0 0x1000>;
9062 + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
9063 + timeout-sec = <30>;
9064 + };
9065 +
9066 + ftm0: ftm0@2800000 {
9067 + compatible = "fsl,ftm-alarm", "fsl,lx2160a-ftm-alarm";
9068 + reg = <0x0 0x2800000 0x0 0x10000>,
9069 + <0x0 0x1e34050 0x0 0x4>;
9070 + reg-names = "ftm", "FlexTimer1";
9071 + interrupts = <0 44 0x4>;
9072 + status = "okay";
9073 + };
9074 +
9075 + usb0: usb@3100000 {
9076 + compatible = "snps,dwc3";
9077 + reg = <0x0 0x3100000 0x0 0x10000>;
9078 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
9079 + dr_mode = "host";
9080 + snps,quirk-frame-length-adjustment = <0x20>;
9081 + snps,dis_rxdet_inp3_quirk;
9082 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
9083 + snps,host-vbus-glitches;
9084 + status = "disabled";
9085 + };
9086 +
9087 + usb1: usb@3110000 {
9088 + compatible = "snps,dwc3";
9089 + reg = <0x0 0x3110000 0x0 0x10000>;
9090 + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
9091 + dr_mode = "host";
9092 + snps,quirk-frame-length-adjustment = <0x20>;
9093 + snps,dis_rxdet_inp3_quirk;
9094 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
9095 + snps,host-vbus-glitches;
9096 + status = "disabled";
9097 + };
9098 +
9099 + smmu: iommu@5000000 {
9100 + compatible = "arm,mmu-500";
9101 + reg = <0 0x5000000 0 0x800000>;
9102 + #iommu-cells = <1>;
9103 + #global-interrupts = <14>;
9104 + // global secure fault
9105 + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
9106 + // combined secure
9107 + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
9108 + // global non-secure fault
9109 + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
9110 + // combined non-secure
9111 + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
9112 + // performance counter interrupts 0-9
9113 + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
9114 + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
9115 + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
9116 + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
9117 + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
9118 + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
9119 + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
9120 + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
9121 + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
9122 + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
9123 + // per context interrupt, 64 interrupts
9124 + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
9125 + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
9126 + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
9127 + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
9128 + <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
9129 + <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
9130 + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
9131 + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
9132 + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
9133 + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
9134 + <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
9135 + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
9136 + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
9137 + <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
9138 + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
9139 + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
9140 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
9141 + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
9142 + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
9143 + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
9144 + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
9145 + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
9146 + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
9147 + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
9148 + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
9149 + <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
9150 + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
9151 + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
9152 + <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
9153 + <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
9154 + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
9155 + <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
9156 + <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
9157 + <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
9158 + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
9159 + <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
9160 + <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
9161 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
9162 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
9163 + <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
9164 + <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
9165 + <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
9166 + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
9167 + <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
9168 + <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
9169 + <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
9170 + <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
9171 + <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
9172 + <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
9173 + <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
9174 + <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
9175 + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
9176 + <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
9177 + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
9178 + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
9179 + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
9180 + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
9181 + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
9182 + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
9183 + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
9184 + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
9185 + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
9186 + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
9187 + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
9188 + dma-coherent;
9189 + };
9190 +
9191 + fsl_mc: fsl-mc@80c000000 {
9192 + compatible = "fsl,qoriq-mc";
9193 + reg = <0x00000008 0x0c000000 0 0x40>,
9194 + <0x00000000 0x08340000 0 0x40000>;
9195 + msi-parent = <&its>;
9196 + /* iommu-map property is fixed up by u-boot */
9197 + iommu-map = <0 &smmu 0 0>;
9198 + dma-coherent;
9199 + #address-cells = <3>;
9200 + #size-cells = <1>;
9201 +
9202 + /*
9203 + * Region type 0x0 - MC portals
9204 + * Region type 0x1 - QBMAN portals
9205 + */
9206 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
9207 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
9208 +
9209 + /*
9210 + * Define the maximum number of MACs present on the SoC.
9211 + */
9212 + dpmacs {
9213 + #address-cells = <1>;
9214 + #size-cells = <0>;
9215 +
9216 + dpmac1: dpmac@1 {
9217 + compatible = "fsl,qoriq-mc-dpmac";
9218 + reg = <0x1>;
9219 + };
9220 +
9221 + dpmac2: dpmac@2 {
9222 + compatible = "fsl,qoriq-mc-dpmac";
9223 + reg = <0x2>;
9224 + };
9225 +
9226 + dpmac3: dpmac@3 {
9227 + compatible = "fsl,qoriq-mc-dpmac";
9228 + reg = <0x3>;
9229 + };
9230 +
9231 + dpmac4: dpmac@4 {
9232 + compatible = "fsl,qoriq-mc-dpmac";
9233 + reg = <0x4>;
9234 + };
9235 +
9236 + dpmac5: dpmac@5 {
9237 + compatible = "fsl,qoriq-mc-dpmac";
9238 + reg = <0x5>;
9239 + };
9240 +
9241 + dpmac6: dpmac@6 {
9242 + compatible = "fsl,qoriq-mc-dpmac";
9243 + reg = <0x6>;
9244 + };
9245 +
9246 + dpmac7: dpmac@7 {
9247 + compatible = "fsl,qoriq-mc-dpmac";
9248 + reg = <0x7>;
9249 + };
9250 +
9251 + dpmac8: dpmac@8 {
9252 + compatible = "fsl,qoriq-mc-dpmac";
9253 + reg = <0x8>;
9254 + };
9255 +
9256 + dpmac9: dpmac@9 {
9257 + compatible = "fsl,qoriq-mc-dpmac";
9258 + reg = <0x9>;
9259 + };
9260 +
9261 + dpmac10: dpmac@a {
9262 + compatible = "fsl,qoriq-mc-dpmac";
9263 + reg = <0xa>;
9264 + };
9265 +
9266 + dpmac11: dpmac@b {
9267 + compatible = "fsl,qoriq-mc-dpmac";
9268 + reg = <0xb>;
9269 + };
9270 +
9271 + dpmac12: dpmac@c {
9272 + compatible = "fsl,qoriq-mc-dpmac";
9273 + reg = <0xc>;
9274 + };
9275 +
9276 + dpmac13: dpmac@d {
9277 + compatible = "fsl,qoriq-mc-dpmac";
9278 + reg = <0xd>;
9279 + };
9280 +
9281 + dpmac14: dpmac@e {
9282 + compatible = "fsl,qoriq-mc-dpmac";
9283 + reg = <0xe>;
9284 + };
9285 +
9286 + dpmac15: dpmac@f {
9287 + compatible = "fsl,qoriq-mc-dpmac";
9288 + reg = <0xf>;
9289 + };
9290 +
9291 + dpmac16: dpmac@10 {
9292 + compatible = "fsl,qoriq-mc-dpmac";
9293 + reg = <0x10>;
9294 + };
9295 +
9296 + dpmac17: dpmac@11 {
9297 + compatible = "fsl,qoriq-mc-dpmac";
9298 + reg = <0x11>;
9299 + };
9300 +
9301 + dpmac18: dpmac@12 {
9302 + compatible = "fsl,qoriq-mc-dpmac";
9303 + reg = <0x12>;
9304 + };
9305 + };
9306 + };
9307 +
9308 + fspi: flexspi@20c0000 {
9309 + status = "disabled";
9310 + compatible = "nxp,lx2160a-fspi";
9311 + #address-cells = <1>;
9312 + #size-cells = <0>;
9313 + reg = <0x0 0x20c0000 0x0 0x10000>,
9314 + <0x0 0x20000000 0x0 0x10000000>;
9315 + reg-names = "FSPI", "FSPI-memory";
9316 + interrupts = <0 25 0x4>; /* Level high type */
9317 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
9318 + clock-names = "fspi_en", "fspi";
9319 + };
9320 +
9321 + sata0: sata@3200000 {
9322 + status = "disabled";
9323 + compatible = "fsl,lx2160a-ahci";
9324 + reg = <0x0 0x3200000 0x0 0x10000>;
9325 + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
9326 + clocks = <&clockgen 4 3>;
9327 + dma-coherent;
9328 + };
9329 +
9330 + sata1: sata@3210000 {
9331 + status = "disabled";
9332 + compatible = "fsl,lx2160a-ahci";
9333 + reg = <0x0 0x3210000 0x0 0x10000>;
9334 + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
9335 + clocks = <&clockgen 4 3>;
9336 + dma-coherent;
9337 + };
9338 +
9339 + sata2: sata@3220000 {
9340 + status = "disabled";
9341 + compatible = "fsl,lx2160a-ahci";
9342 + reg = <0x0 0x3220000 0x0 0x10000>;
9343 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
9344 + clocks = <&clockgen 4 3>;
9345 + dma-coherent;
9346 + };
9347 +
9348 + sata3: sata@3230000 {
9349 + status = "disabled";
9350 + compatible = "fsl,lx2160a-ahci";
9351 + reg = <0x0 0x3230000 0x0 0x10000>;
9352 + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
9353 + clocks = <&clockgen 4 3>;
9354 + dma-coherent;
9355 + };
9356 +
9357 + pcie@3400000 {
9358 + compatible = "fsl,lx2160a-pcie";
9359 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
9360 + 0x80 0x00000000 0x0 0x00001000>; /* configuration space */
9361 + reg-names = "csr_axi_slave", "config_axi_slave";
9362 + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9363 + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9364 + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9365 + interrupt-names = "aer", "pme", "intr";
9366 + #address-cells = <3>;
9367 + #size-cells = <2>;
9368 + device_type = "pci";
9369 + dma-coherent;
9370 + apio-wins = <8>;
9371 + ppio-wins = <8>;
9372 + bus-range = <0x0 0xff>;
9373 + ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9374 + msi-parent = <&its>;
9375 + #interrupt-cells = <1>;
9376 + interrupt-map-mask = <0 0 0 7>;
9377 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
9378 + <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
9379 + <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
9380 + <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
9381 + status = "disabled";
9382 + };
9383 +
9384 + pcie_ep@3400000 {
9385 + compatible = "fsl,lx2160a-pcie-ep";
9386 + reg = <0x00 0x03400000 0x0 0x00100000
9387 + 0x80 0x00000000 0x8 0x00000000>;
9388 + reg-names = "regs", "addr_space";
9389 + num-ob-windows = <256>;
9390 + status = "disabled";
9391 + };
9392 +
9393 + pcie@3500000 {
9394 + compatible = "fsl,lx2160a-pcie";
9395 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
9396 + 0x88 0x00000000 0x0 0x00001000>; /* configuration space */
9397 + reg-names = "csr_axi_slave", "config_axi_slave";
9398 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9399 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9400 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9401 + interrupt-names = "aer", "pme", "intr";
9402 + #address-cells = <3>;
9403 + #size-cells = <2>;
9404 + device_type = "pci";
9405 + dma-coherent;
9406 + apio-wins = <8>;
9407 + ppio-wins = <8>;
9408 + bus-range = <0x0 0xff>;
9409 + ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9410 + msi-parent = <&its>;
9411 + #interrupt-cells = <1>;
9412 + interrupt-map-mask = <0 0 0 7>;
9413 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
9414 + <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
9415 + <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
9416 + <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
9417 + status = "disabled";
9418 + };
9419 +
9420 + pcie_ep@3500000 {
9421 + compatible = "fsl,lx2160a-pcie-ep";
9422 + reg = <0x00 0x03500000 0x0 0x00100000
9423 + 0x88 0x00000000 0x8 0x00000000>;
9424 + reg-names = "regs", "addr_space";
9425 + num-ob-windows = <256>;
9426 + status = "disabled";
9427 + };
9428 +
9429 + pcie@3600000 {
9430 + compatible = "fsl,lx2160a-pcie";
9431 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
9432 + 0x90 0x00000000 0x0 0x00001000>; /* configuration space */
9433 + reg-names = "csr_axi_slave", "config_axi_slave";
9434 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9435 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9436 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9437 + interrupt-names = "aer", "pme", "intr";
9438 + #address-cells = <3>;
9439 + #size-cells = <2>;
9440 + device_type = "pci";
9441 + dma-coherent;
9442 + apio-wins = <8>;
9443 + ppio-wins = <8>;
9444 + bus-range = <0x0 0xff>;
9445 + ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9446 + msi-parent = <&its>;
9447 + #interrupt-cells = <1>;
9448 + interrupt-map-mask = <0 0 0 7>;
9449 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
9450 + <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
9451 + <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
9452 + <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
9453 + status = "disabled";
9454 + };
9455 +
9456 + pcie_ep@3600000 {
9457 + compatible = "fsl,lx2160a-pcie-ep";
9458 + reg = <0x00 0x03600000 0x0 0x00100000
9459 + 0x90 0x00000000 0x8 0x00000000>;
9460 + reg-names = "regs", "addr_space";
9461 + num-ob-windows = <256>;
9462 + max-functions = <2>;
9463 + status = "disabled";
9464 + };
9465 +
9466 + pcie@3700000 {
9467 + compatible = "fsl,lx2160a-pcie";
9468 + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
9469 + 0x98 0x00000000 0x0 0x00001000>; /* configuration space */
9470 + reg-names = "csr_axi_slave", "config_axi_slave";
9471 + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9472 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9473 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9474 + interrupt-names = "aer", "pme", "intr";
9475 + #address-cells = <3>;
9476 + #size-cells = <2>;
9477 + device_type = "pci";
9478 + dma-coherent;
9479 + apio-wins = <8>;
9480 + ppio-wins = <8>;
9481 + bus-range = <0x0 0xff>;
9482 + ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9483 + msi-parent = <&its>;
9484 + #interrupt-cells = <1>;
9485 + interrupt-map-mask = <0 0 0 7>;
9486 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
9487 + <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
9488 + <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
9489 + <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
9490 + status = "disabled";
9491 + };
9492 +
9493 + pcie_ep@3700000 {
9494 + compatible = "fsl,lx2160a-pcie-ep";
9495 + reg = <0x00 0x03700000 0x0 0x00100000
9496 + 0x98 0x00000000 0x8 0x00000000>;
9497 + reg-names = "regs", "addr_space";
9498 + num-ob-windows = <256>;
9499 + status = "disabled";
9500 + };
9501 +
9502 + pcie@3800000 {
9503 + compatible = "fsl,lx2160a-pcie";
9504 + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */
9505 + 0xa0 0x00000000 0x0 0x00001000>; /* configuration space */
9506 + reg-names = "csr_axi_slave", "config_axi_slave";
9507 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9508 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9509 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9510 + interrupt-names = "aer", "pme", "intr";
9511 + #address-cells = <3>;
9512 + #size-cells = <2>;
9513 + device_type = "pci";
9514 + dma-coherent;
9515 + apio-wins = <8>;
9516 + ppio-wins = <8>;
9517 + bus-range = <0x0 0xff>;
9518 + ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9519 + msi-parent = <&its>;
9520 + #interrupt-cells = <1>;
9521 + interrupt-map-mask = <0 0 0 7>;
9522 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
9523 + <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
9524 + <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
9525 + <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
9526 + status = "disabled";
9527 + };
9528 +
9529 + pcie_ep@3800000 {
9530 + compatible = "fsl,lx2160a-pcie-ep";
9531 + reg = <0x00 0x03800000 0x0 0x00100000
9532 + 0xa0 0x00000000 0x8 0x00000000>;
9533 + reg-names = "regs", "addr_space";
9534 + num-ob-windows = <256>;
9535 + max-functions = <2>;
9536 + status = "disabled";
9537 + };
9538 +
9539 + pcie@3900000 {
9540 + compatible = "fsl,lx2160a-pcie";
9541 + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */
9542 + 0xa8 0x00000000 0x0 0x00001000>; /* configuration space */
9543 + reg-names = "csr_axi_slave", "config_axi_slave";
9544 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9545 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9546 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9547 + interrupt-names = "aer", "pme", "intr";
9548 + #address-cells = <3>;
9549 + #size-cells = <2>;
9550 + device_type = "pci";
9551 + dma-coherent;
9552 + apio-wins = <8>;
9553 + ppio-wins = <8>;
9554 + bus-range = <0x0 0xff>;
9555 + ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9556 + msi-parent = <&its>;
9557 + #interrupt-cells = <1>;
9558 + interrupt-map-mask = <0 0 0 7>;
9559 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
9560 + <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
9561 + <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
9562 + <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
9563 + status = "disabled";
9564 + };
9565 +
9566 + pcie_ep@3900000 {
9567 + compatible = "fsl,lx2160a-pcie-ep";
9568 + reg = <0x00 0x03900000 0x0 0x00100000
9569 + 0xa8 0x00000000 0x8 0x00000000>;
9570 + reg-names = "regs", "addr_space";
9571 + num-ob-windows = <256>;
9572 + status = "disabled";
9573 + };
9574 +
9575 + };
9576 +
9577 + firmware {
9578 + optee {
9579 + compatible = "linaro,optee-tz";
9580 + method = "smc";
9581 + };
9582 + };
9583 +};
9584 --- /dev/null
9585 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
9586 @@ -0,0 +1,99 @@
9587 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9588 +/*
9589 + * Device Tree Include file for Thermal Monitor Unit.
9590 + *
9591 + * Copyright 2018 NXP
9592 + *
9593 + * Tang Yuantian <andy.tang@nxp.com>
9594 + *
9595 + */
9596 +
9597 +&thermal_zones {
9598 + thermal-zone0 {
9599 + cooling-maps {
9600 + map1 {
9601 + trip = <&alert0>;
9602 + cooling-device =
9603 + <&cooling_map1 THERMAL_NO_LIMIT
9604 + THERMAL_NO_LIMIT>;
9605 + };
9606 + };
9607 + };
9608 +
9609 + thermal-zone1 {
9610 + cooling-maps {
9611 + map1 {
9612 + trip = <&alert1>;
9613 + cooling-device =
9614 + <&cooling_map1 THERMAL_NO_LIMIT
9615 + THERMAL_NO_LIMIT>;
9616 + };
9617 + };
9618 + };
9619 +
9620 + thermal-zone2 {
9621 + cooling-maps {
9622 + map1 {
9623 + trip = <&alert2>;
9624 + cooling-device =
9625 + <&cooling_map1 THERMAL_NO_LIMIT
9626 + THERMAL_NO_LIMIT>;
9627 + };
9628 + };
9629 + };
9630 +
9631 + thermal-zone3 {
9632 + cooling-maps {
9633 + map1 {
9634 + trip = <&alert3>;
9635 + cooling-device =
9636 + <&cooling_map1 THERMAL_NO_LIMIT
9637 + THERMAL_NO_LIMIT>;
9638 + };
9639 + };
9640 + };
9641 +
9642 + thermal-zone4 {
9643 + cooling-maps {
9644 + map1 {
9645 + trip = <&alert4>;
9646 + cooling-device =
9647 + <&cooling_map1 THERMAL_NO_LIMIT
9648 + THERMAL_NO_LIMIT>;
9649 + };
9650 + };
9651 + };
9652 +
9653 + thermal-zone5 {
9654 + cooling-maps {
9655 + map1 {
9656 + trip = <&alert5>;
9657 + cooling-device =
9658 + <&cooling_map1 THERMAL_NO_LIMIT
9659 + THERMAL_NO_LIMIT>;
9660 + };
9661 + };
9662 + };
9663 +
9664 + thermal-zone6 {
9665 + cooling-maps {
9666 + map1 {
9667 + trip = <&alert6>;
9668 + cooling-device =
9669 + <&cooling_map1 THERMAL_NO_LIMIT
9670 + THERMAL_NO_LIMIT>;
9671 + };
9672 + };
9673 + };
9674 +
9675 + thermal-zone7 {
9676 + cooling-maps {
9677 + map1 {
9678 + trip = <&alert7>;
9679 + cooling-device =
9680 + <&cooling_map1 THERMAL_NO_LIMIT
9681 + THERMAL_NO_LIMIT>;
9682 + };
9683 + };
9684 + };
9685 +};
9686 --- /dev/null
9687 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
9688 @@ -0,0 +1,99 @@
9689 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9690 +/*
9691 + * Device Tree Include file for Thermal Monitor Unit.
9692 + *
9693 + * Copyright 2018 NXP
9694 + *
9695 + * Tang Yuantian <andy.tang@nxp.com>
9696 + *
9697 + */
9698 +
9699 +&thermal_zones {
9700 + thermal-zone0 {
9701 + cooling-maps {
9702 + map2 {
9703 + trip = <&alert0>;
9704 + cooling-device =
9705 + <&cooling_map2 THERMAL_NO_LIMIT
9706 + THERMAL_NO_LIMIT>;
9707 + };
9708 + };
9709 + };
9710 +
9711 + thermal-zone1 {
9712 + cooling-maps {
9713 + map2 {
9714 + trip = <&alert1>;
9715 + cooling-device =
9716 + <&cooling_map2 THERMAL_NO_LIMIT
9717 + THERMAL_NO_LIMIT>;
9718 + };
9719 + };
9720 + };
9721 +
9722 + thermal-zone2 {
9723 + cooling-maps {
9724 + map2 {
9725 + trip = <&alert2>;
9726 + cooling-device =
9727 + <&cooling_map2 THERMAL_NO_LIMIT
9728 + THERMAL_NO_LIMIT>;
9729 + };
9730 + };
9731 + };
9732 +
9733 + thermal-zone3 {
9734 + cooling-maps {
9735 + map2 {
9736 + trip = <&alert3>;
9737 + cooling-device =
9738 + <&cooling_map2 THERMAL_NO_LIMIT
9739 + THERMAL_NO_LIMIT>;
9740 + };
9741 + };
9742 + };
9743 +
9744 + thermal-zone4 {
9745 + cooling-maps {
9746 + map2 {
9747 + trip = <&alert4>;
9748 + cooling-device =
9749 + <&cooling_map2 THERMAL_NO_LIMIT
9750 + THERMAL_NO_LIMIT>;
9751 + };
9752 + };
9753 + };
9754 +
9755 + thermal-zone5 {
9756 + cooling-maps {
9757 + map2 {
9758 + trip = <&alert5>;
9759 + cooling-device =
9760 + <&cooling_map2 THERMAL_NO_LIMIT
9761 + THERMAL_NO_LIMIT>;
9762 + };
9763 + };
9764 + };
9765 +
9766 + thermal-zone6 {
9767 + cooling-maps {
9768 + map2 {
9769 + trip = <&alert6>;
9770 + cooling-device =
9771 + <&cooling_map2 THERMAL_NO_LIMIT
9772 + THERMAL_NO_LIMIT>;
9773 + };
9774 + };
9775 + };
9776 +
9777 + thermal-zone7 {
9778 + cooling-maps {
9779 + map2 {
9780 + trip = <&alert7>;
9781 + cooling-device =
9782 + <&cooling_map2 THERMAL_NO_LIMIT
9783 + THERMAL_NO_LIMIT>;
9784 + };
9785 + };
9786 + };
9787 +};
9788 --- /dev/null
9789 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
9790 @@ -0,0 +1,99 @@
9791 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9792 +/*
9793 + * Device Tree Include file for Thermal Monitor Unit.
9794 + *
9795 + * Copyright 2018 NXP
9796 + *
9797 + * Tang Yuantian <andy.tang@nxp.com>
9798 + *
9799 + */
9800 +
9801 +&thermal_zones {
9802 + thermal-zone0 {
9803 + cooling-maps {
9804 + map3 {
9805 + trip = <&alert0>;
9806 + cooling-device =
9807 + <&cooling_map3 THERMAL_NO_LIMIT
9808 + THERMAL_NO_LIMIT>;
9809 + };
9810 + };
9811 + };
9812 +
9813 + thermal-zone1 {
9814 + cooling-maps {
9815 + map3 {
9816 + trip = <&alert1>;
9817 + cooling-device =
9818 + <&cooling_map3 THERMAL_NO_LIMIT
9819 + THERMAL_NO_LIMIT>;
9820 + };
9821 + };
9822 + };
9823 +
9824 + thermal-zone2 {
9825 + cooling-maps {
9826 + map3 {
9827 + trip = <&alert2>;
9828 + cooling-device =
9829 + <&cooling_map3 THERMAL_NO_LIMIT
9830 + THERMAL_NO_LIMIT>;
9831 + };
9832 + };
9833 + };
9834 +
9835 + thermal-zone3 {
9836 + cooling-maps {
9837 + map3 {
9838 + trip = <&alert3>;
9839 + cooling-device =
9840 + <&cooling_map3 THERMAL_NO_LIMIT
9841 + THERMAL_NO_LIMIT>;
9842 + };
9843 + };
9844 + };
9845 +
9846 + thermal-zone4 {
9847 + cooling-maps {
9848 + map3 {
9849 + trip = <&alert4>;
9850 + cooling-device =
9851 + <&cooling_map3 THERMAL_NO_LIMIT
9852 + THERMAL_NO_LIMIT>;
9853 + };
9854 + };
9855 + };
9856 +
9857 + thermal-zone5 {
9858 + cooling-maps {
9859 + map3 {
9860 + trip = <&alert5>;
9861 + cooling-device =
9862 + <&cooling_map3 THERMAL_NO_LIMIT
9863 + THERMAL_NO_LIMIT>;
9864 + };
9865 + };
9866 + };
9867 +
9868 + thermal-zone6 {
9869 + cooling-maps {
9870 + map3 {
9871 + trip = <&alert6>;
9872 + cooling-device =
9873 + <&cooling_map3 THERMAL_NO_LIMIT
9874 + THERMAL_NO_LIMIT>;
9875 + };
9876 + };
9877 + };
9878 +
9879 + thermal-zone7 {
9880 + cooling-maps {
9881 + map3 {
9882 + trip = <&alert7>;
9883 + cooling-device =
9884 + <&cooling_map3 THERMAL_NO_LIMIT
9885 + THERMAL_NO_LIMIT>;
9886 + };
9887 + };
9888 + };
9889 +};
9890 --- /dev/null
9891 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
9892 @@ -0,0 +1,251 @@
9893 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9894 +/*
9895 + * Device Tree Include file for Thermal Monitor Unit.
9896 + *
9897 + * Copyright 2018 NXP
9898 + *
9899 + * Tang Yuantian <andy.tang@nxp.com>
9900 + *
9901 + */
9902 +
9903 +thermal_zones: thermal-zones {
9904 + thermal_zone0: thermal-zone0 {
9905 + polling-delay-passive = <1000>;
9906 + polling-delay = <5000>;
9907 + thermal-sensors = <&tmu 0>;
9908 + status = "disabled";
9909 +
9910 + trips {
9911 + alert0: alert0 {
9912 + temperature = <75000>;
9913 + hysteresis = <2000>;
9914 + type = "passive";
9915 + };
9916 +
9917 + crit0: crit0 {
9918 + temperature = <85000>;
9919 + hysteresis = <2000>;
9920 + type = "critical";
9921 + };
9922 + };
9923 +
9924 + cooling-maps {
9925 + map0 {
9926 + trip = <&alert0>;
9927 + cooling-device =
9928 + <&cooling_map0 THERMAL_NO_LIMIT
9929 + THERMAL_NO_LIMIT>;
9930 + };
9931 + };
9932 + };
9933 +
9934 + thermal-zone1 {
9935 + polling-delay-passive = <1000>;
9936 + polling-delay = <5000>;
9937 + thermal-sensors = <&tmu 1>;
9938 + status = "disabled";
9939 +
9940 + trips {
9941 + alert1: alert1 {
9942 + temperature = <75000>;
9943 + hysteresis = <2000>;
9944 + type = "passive";
9945 + };
9946 +
9947 + crit1: crit1 {
9948 + temperature = <85000>;
9949 + hysteresis = <2000>;
9950 + type = "critical";
9951 + };
9952 + };
9953 +
9954 + cooling-maps {
9955 + map0 {
9956 + trip = <&alert1>;
9957 + cooling-device =
9958 + <&cooling_map0 THERMAL_NO_LIMIT
9959 + THERMAL_NO_LIMIT>;
9960 + };
9961 + };
9962 + };
9963 +
9964 + thermal-zone2 {
9965 + polling-delay-passive = <1000>;
9966 + polling-delay = <5000>;
9967 + thermal-sensors = <&tmu 2>;
9968 + status = "disabled";
9969 +
9970 + trips {
9971 + alert2: alert2 {
9972 + temperature = <75000>;
9973 + hysteresis = <2000>;
9974 + type = "passive";
9975 + };
9976 +
9977 + crit2: crit2 {
9978 + temperature = <85000>;
9979 + hysteresis = <2000>;
9980 + type = "critical";
9981 + };
9982 + };
9983 +
9984 + cooling-maps {
9985 + map0 {
9986 + trip = <&alert2>;
9987 + cooling-device =
9988 + <&cooling_map0 THERMAL_NO_LIMIT
9989 + THERMAL_NO_LIMIT>;
9990 + };
9991 + };
9992 + };
9993 +
9994 + thermal-zone3 {
9995 + polling-delay-passive = <1000>;
9996 + polling-delay = <5000>;
9997 + thermal-sensors = <&tmu 3>;
9998 + status = "disabled";
9999 +
10000 + trips {
10001 + alert3: alert3 {
10002 + temperature = <75000>;
10003 + hysteresis = <2000>;
10004 + type = "passive";
10005 + };
10006 +
10007 + crit3: crit3 {
10008 + temperature = <85000>;
10009 + hysteresis = <2000>;
10010 + type = "critical";
10011 + };
10012 + };
10013 +
10014 + cooling-maps {
10015 + map0 {
10016 + trip = <&alert3>;
10017 + cooling-device =
10018 + <&cooling_map0 THERMAL_NO_LIMIT
10019 + THERMAL_NO_LIMIT>;
10020 + };
10021 + };
10022 + };
10023 +
10024 + thermal-zone4 {
10025 + polling-delay-passive = <1000>;
10026 + polling-delay = <5000>;
10027 + thermal-sensors = <&tmu 4>;
10028 + status = "disabled";
10029 +
10030 + trips {
10031 + alert4: alert4 {
10032 + temperature = <75000>;
10033 + hysteresis = <2000>;
10034 + type = "passive";
10035 + };
10036 +
10037 + crit4: crit4 {
10038 + temperature = <85000>;
10039 + hysteresis = <2000>;
10040 + type = "critical";
10041 + };
10042 + };
10043 +
10044 + cooling-maps {
10045 + map0 {
10046 + trip = <&alert4>;
10047 + cooling-device =
10048 + <&cooling_map0 THERMAL_NO_LIMIT
10049 + THERMAL_NO_LIMIT>;
10050 + };
10051 + };
10052 + };
10053 +
10054 + thermal-zone5 {
10055 + polling-delay-passive = <1000>;
10056 + polling-delay = <5000>;
10057 + thermal-sensors = <&tmu 5>;
10058 + status = "disabled";
10059 +
10060 + trips {
10061 + alert5: alert5 {
10062 + temperature = <75000>;
10063 + hysteresis = <2000>;
10064 + type = "passive";
10065 + };
10066 +
10067 + crit5: crit5 {
10068 + temperature = <85000>;
10069 + hysteresis = <2000>;
10070 + type = "critical";
10071 + };
10072 + };
10073 +
10074 + cooling-maps {
10075 + map0 {
10076 + trip = <&alert5>;
10077 + cooling-device =
10078 + <&cooling_map0 THERMAL_NO_LIMIT
10079 + THERMAL_NO_LIMIT>;
10080 + };
10081 + };
10082 + };
10083 +
10084 + thermal-zone6 {
10085 + polling-delay-passive = <1000>;
10086 + polling-delay = <5000>;
10087 + thermal-sensors = <&tmu 6>;
10088 + status = "disabled";
10089 +
10090 + trips {
10091 + alert6: alert6 {
10092 + temperature = <75000>;
10093 + hysteresis = <2000>;
10094 + type = "passive";
10095 + };
10096 +
10097 + crit6: crit6 {
10098 + temperature = <85000>;
10099 + hysteresis = <2000>;
10100 + type = "critical";
10101 + };
10102 + };
10103 +
10104 + cooling-maps {
10105 + map0 {
10106 + trip = <&alert6>;
10107 + cooling-device =
10108 + <&cooling_map0 THERMAL_NO_LIMIT
10109 + THERMAL_NO_LIMIT>;
10110 + };
10111 + };
10112 + };
10113 +
10114 + thermal-zone7 {
10115 + polling-delay-passive = <1000>;
10116 + polling-delay = <5000>;
10117 + thermal-sensors = <&tmu 7>;
10118 + status = "disabled";
10119 +
10120 + trips {
10121 + alert7: alert7 {
10122 + temperature = <75000>;
10123 + hysteresis = <2000>;
10124 + type = "passive";
10125 + };
10126 +
10127 + crit7: crit7 {
10128 + temperature = <85000>;
10129 + hysteresis = <2000>;
10130 + type = "critical";
10131 + };
10132 + };
10133 +
10134 + cooling-maps {
10135 + map0 {
10136 + trip = <&alert7>;
10137 + cooling-device =
10138 + <&cooling_map0 THERMAL_NO_LIMIT
10139 + THERMAL_NO_LIMIT>;
10140 + };
10141 + };
10142 + };
10143 +};
10144 --- /dev/null
10145 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi
10146 @@ -0,0 +1,55 @@
10147 +/*
10148 + * QorIQ BMan SDK Portals device tree nodes
10149 + *
10150 + * Copyright 2011-2016 Freescale Semiconductor Inc.
10151 + * Copyright 2017 NXP
10152 + *
10153 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10154 + */
10155 +
10156 +&bportals {
10157 + bman-portal@0 {
10158 + cell-index = <0>;
10159 + };
10160 +
10161 + bman-portal@10000 {
10162 + cell-index = <1>;
10163 + };
10164 +
10165 + bman-portal@20000 {
10166 + cell-index = <2>;
10167 + };
10168 +
10169 + bman-portal@30000 {
10170 + cell-index = <3>;
10171 + };
10172 +
10173 + bman-portal@40000 {
10174 + cell-index = <4>;
10175 + };
10176 +
10177 + bman-portal@50000 {
10178 + cell-index = <5>;
10179 + };
10180 +
10181 + bman-portal@60000 {
10182 + cell-index = <6>;
10183 + };
10184 +
10185 + bman-portal@70000 {
10186 + cell-index = <7>;
10187 + };
10188 +
10189 + bman-portal@80000 {
10190 + cell-index = <8>;
10191 + };
10192 +
10193 + bman-portal@90000 {
10194 + cell-index = <9>;
10195 + };
10196 +
10197 + bman-bpids@0 {
10198 + compatible = "fsl,bpid-range";
10199 + fsl,bpid-range = <32 32>;
10200 + };
10201 +};
10202 --- a/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi
10203 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi
10204 @@ -1,9 +1,9 @@
10205 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10206 /*
10207 * QorIQ BMan Portals device tree
10208 *
10209 * Copyright 2011-2016 Freescale Semiconductor Inc.
10210 *
10211 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10212 */
10213
10214 &bportals {
10215 @@ -68,4 +68,10 @@
10216 reg = <0x80000 0x4000>, <0x4080000 0x4000>;
10217 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
10218 };
10219 +
10220 + bman-portal@90000 {
10221 + compatible = "fsl,bman-portal";
10222 + reg = <0x90000 0x4000>, <0x4090000 0x4000>;
10223 + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
10224 + };
10225 };
10226 --- /dev/null
10227 +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
10228 @@ -0,0 +1,97 @@
10229 +/*
10230 + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
10231 + *
10232 + * Copyright 2012 - 2015 Freescale Semiconductor Inc.
10233 + *
10234 + * Redistribution and use in source and binary forms, with or without
10235 + * modification, are permitted provided that the following conditions are met:
10236 + * * Redistributions of source code must retain the above copyright
10237 + * notice, this list of conditions and the following disclaimer.
10238 + * * Redistributions in binary form must reproduce the above copyright
10239 + * notice, this list of conditions and the following disclaimer in the
10240 + * documentation and/or other materials provided with the distribution.
10241 + * * Neither the name of Freescale Semiconductor nor the
10242 + * names of its contributors may be used to endorse or promote products
10243 + * derived from this software without specific prior written permission.
10244 + *
10245 + *
10246 + * ALTERNATIVELY, this software may be distributed under the terms of the
10247 + * GNU General Public License ("GPL") as published by the Free Software
10248 + * Foundation, either version 2 of that License or (at your option) any
10249 + * later version.
10250 + *
10251 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
10252 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
10253 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
10254 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
10255 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10256 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
10257 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
10258 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
10259 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
10260 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
10261 + */
10262 +
10263 +fsldpaa: fsl,dpaa {
10264 + compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa";
10265 + ethernet@0 {
10266 + compatible = "fsl,dpa-ethernet";
10267 + fsl,fman-mac = <&enet0>;
10268 + dma-coherent;
10269 + };
10270 + ethernet@1 {
10271 + compatible = "fsl,dpa-ethernet";
10272 + fsl,fman-mac = <&enet1>;
10273 + dma-coherent;
10274 + };
10275 + ethernet@2 {
10276 + compatible = "fsl,dpa-ethernet";
10277 + fsl,fman-mac = <&enet2>;
10278 + dma-coherent;
10279 + };
10280 + ethernet@3 {
10281 + compatible = "fsl,dpa-ethernet";
10282 + fsl,fman-mac = <&enet3>;
10283 + dma-coherent;
10284 + };
10285 + ethernet@4 {
10286 + compatible = "fsl,dpa-ethernet";
10287 + fsl,fman-mac = <&enet4>;
10288 + dma-coherent;
10289 + };
10290 + ethernet@5 {
10291 + compatible = "fsl,dpa-ethernet";
10292 + fsl,fman-mac = <&enet5>;
10293 + dma-coherent;
10294 + };
10295 + ethernet@8 {
10296 + compatible = "fsl,dpa-ethernet";
10297 + fsl,fman-mac = <&enet6>;
10298 + dma-coherent;
10299 + };
10300 + ethernet@6 {
10301 + compatible = "fsl,im-ethernet";
10302 + fsl,fman-mac = <&enet2>;
10303 + dma-coherent;
10304 + fpmevt-sel = <0>;
10305 + };
10306 + ethernet@7 {
10307 + compatible = "fsl,im-ethernet";
10308 + fsl,fman-mac = <&enet3>;
10309 + dma-coherent;
10310 + fpmevt-sel = <1>;
10311 + };
10312 + ethernet@10 {
10313 + compatible = "fsl,im-ethernet";
10314 + fsl,fman-mac = <&enet4>;
10315 + dma-coherent;
10316 + fpmevt-sel = <2>;
10317 + };
10318 + ethernet@11 {
10319 + compatible = "fsl,im-ethernet";
10320 + fsl,fman-mac = <&enet5>;
10321 + dma-coherent;
10322 + fpmevt-sel = <3>;
10323 + };
10324 +};
10325 +
10326 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
10327 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
10328 @@ -1,27 +1,28 @@
10329 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10330 /*
10331 * QorIQ FMan v3 10g port #0 device tree
10332 *
10333 * Copyright 2012-2015 Freescale Semiconductor Inc.
10334 *
10335 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10336 */
10337
10338 fman@1a00000 {
10339 fman0_rx_0x10: port@90000 {
10340 cell-index = <0x10>;
10341 - compatible = "fsl,fman-v3-port-rx";
10342 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10343 reg = <0x90000 0x1000>;
10344 fsl,fman-10g-port;
10345 };
10346
10347 fman0_tx_0x30: port@b0000 {
10348 cell-index = <0x30>;
10349 - compatible = "fsl,fman-v3-port-tx";
10350 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10351 reg = <0xb0000 0x1000>;
10352 fsl,fman-10g-port;
10353 + fsl,qman-channel-id = <0x800>;
10354 };
10355
10356 - ethernet@f0000 {
10357 + mac9: ethernet@f0000 {
10358 cell-index = <0x8>;
10359 compatible = "fsl,fman-memac";
10360 reg = <0xf0000 0x1000>;
10361 @@ -29,7 +30,7 @@ fman@1a00000 {
10362 pcsphy-handle = <&pcsphy6>;
10363 };
10364
10365 - mdio@f1000 {
10366 + mdio9: mdio@f1000 {
10367 #address-cells = <1>;
10368 #size-cells = <0>;
10369 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10370 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
10371 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
10372 @@ -1,27 +1,28 @@
10373 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10374 /*
10375 * QorIQ FMan v3 10g port #1 device tree
10376 *
10377 * Copyright 2012-2015 Freescale Semiconductor Inc.
10378 *
10379 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10380 */
10381
10382 fman@1a00000 {
10383 fman0_rx_0x11: port@91000 {
10384 cell-index = <0x11>;
10385 - compatible = "fsl,fman-v3-port-rx";
10386 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10387 reg = <0x91000 0x1000>;
10388 fsl,fman-10g-port;
10389 };
10390
10391 fman0_tx_0x31: port@b1000 {
10392 cell-index = <0x31>;
10393 - compatible = "fsl,fman-v3-port-tx";
10394 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10395 reg = <0xb1000 0x1000>;
10396 fsl,fman-10g-port;
10397 + fsl,qman-channel-id = <0x801>;
10398 };
10399
10400 - ethernet@f2000 {
10401 + mac10: ethernet@f2000 {
10402 cell-index = <0x9>;
10403 compatible = "fsl,fman-memac";
10404 reg = <0xf2000 0x1000>;
10405 @@ -29,7 +30,7 @@ fman@1a00000 {
10406 pcsphy-handle = <&pcsphy7>;
10407 };
10408
10409 - mdio@f3000 {
10410 + mdio10: mdio@f3000 {
10411 #address-cells = <1>;
10412 #size-cells = <0>;
10413 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10414 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
10415 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
10416 @@ -1,22 +1,23 @@
10417 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10418 /*
10419 * QorIQ FMan v3 1g port #0 device tree
10420 *
10421 * Copyright 2012-2015 Freescale Semiconductor Inc.
10422 *
10423 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10424 */
10425
10426 fman@1a00000 {
10427 fman0_rx_0x08: port@88000 {
10428 cell-index = <0x8>;
10429 - compatible = "fsl,fman-v3-port-rx";
10430 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10431 reg = <0x88000 0x1000>;
10432 };
10433
10434 fman0_tx_0x28: port@a8000 {
10435 cell-index = <0x28>;
10436 - compatible = "fsl,fman-v3-port-tx";
10437 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10438 reg = <0xa8000 0x1000>;
10439 + fsl,qman-channel-id = <0x802>;
10440 };
10441
10442 ethernet@e0000 {
10443 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
10444 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
10445 @@ -1,22 +1,23 @@
10446 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10447 /*
10448 * QorIQ FMan v3 1g port #1 device tree
10449 *
10450 * Copyright 2012-2015 Freescale Semiconductor Inc.
10451 *
10452 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10453 */
10454
10455 fman@1a00000 {
10456 fman0_rx_0x09: port@89000 {
10457 cell-index = <0x9>;
10458 - compatible = "fsl,fman-v3-port-rx";
10459 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10460 reg = <0x89000 0x1000>;
10461 };
10462
10463 fman0_tx_0x29: port@a9000 {
10464 cell-index = <0x29>;
10465 - compatible = "fsl,fman-v3-port-tx";
10466 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10467 reg = <0xa9000 0x1000>;
10468 + fsl,qman-channel-id = <0x803>;
10469 };
10470
10471 ethernet@e2000 {
10472 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
10473 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
10474 @@ -1,22 +1,23 @@
10475 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10476 /*
10477 * QorIQ FMan v3 1g port #2 device tree
10478 *
10479 * Copyright 2012-2015 Freescale Semiconductor Inc.
10480 *
10481 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10482 */
10483
10484 fman@1a00000 {
10485 fman0_rx_0x0a: port@8a000 {
10486 cell-index = <0xa>;
10487 - compatible = "fsl,fman-v3-port-rx";
10488 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10489 reg = <0x8a000 0x1000>;
10490 };
10491
10492 fman0_tx_0x2a: port@aa000 {
10493 cell-index = <0x2a>;
10494 - compatible = "fsl,fman-v3-port-tx";
10495 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10496 reg = <0xaa000 0x1000>;
10497 + fsl,qman-channel-id = <0x804>;
10498 };
10499
10500 ethernet@e4000 {
10501 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
10502 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
10503 @@ -1,22 +1,23 @@
10504 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10505 /*
10506 * QorIQ FMan v3 1g port #3 device tree
10507 *
10508 * Copyright 2012-2015 Freescale Semiconductor Inc.
10509 *
10510 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10511 */
10512
10513 fman@1a00000 {
10514 fman0_rx_0x0b: port@8b000 {
10515 cell-index = <0xb>;
10516 - compatible = "fsl,fman-v3-port-rx";
10517 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10518 reg = <0x8b000 0x1000>;
10519 };
10520
10521 fman0_tx_0x2b: port@ab000 {
10522 cell-index = <0x2b>;
10523 - compatible = "fsl,fman-v3-port-tx";
10524 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10525 reg = <0xab000 0x1000>;
10526 + fsl,qman-channel-id = <0x805>;
10527 };
10528
10529 ethernet@e6000 {
10530 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
10531 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
10532 @@ -1,22 +1,23 @@
10533 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10534 /*
10535 * QorIQ FMan v3 1g port #4 device tree
10536 *
10537 * Copyright 2012-2015 Freescale Semiconductor Inc.
10538 *
10539 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10540 */
10541
10542 fman@1a00000 {
10543 fman0_rx_0x0c: port@8c000 {
10544 cell-index = <0xc>;
10545 - compatible = "fsl,fman-v3-port-rx";
10546 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10547 reg = <0x8c000 0x1000>;
10548 };
10549
10550 fman0_tx_0x2c: port@ac000 {
10551 cell-index = <0x2c>;
10552 - compatible = "fsl,fman-v3-port-tx";
10553 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10554 reg = <0xac000 0x1000>;
10555 + fsl,qman-channel-id = <0x806>;
10556 };
10557
10558 ethernet@e8000 {
10559 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
10560 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
10561 @@ -1,22 +1,23 @@
10562 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10563 /*
10564 * QorIQ FMan v3 1g port #5 device tree
10565 *
10566 * Copyright 2012-2015 Freescale Semiconductor Inc.
10567 *
10568 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10569 */
10570
10571 fman@1a00000 {
10572 fman0_rx_0x0d: port@8d000 {
10573 cell-index = <0xd>;
10574 - compatible = "fsl,fman-v3-port-rx";
10575 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10576 reg = <0x8d000 0x1000>;
10577 };
10578
10579 fman0_tx_0x2d: port@ad000 {
10580 cell-index = <0x2d>;
10581 - compatible = "fsl,fman-v3-port-tx";
10582 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10583 reg = <0xad000 0x1000>;
10584 + fsl,qman-channel-id = <0x807>;
10585 };
10586
10587 ethernet@ea000 {
10588 --- /dev/null
10589 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
10590 @@ -0,0 +1,47 @@
10591 +/*
10592 + * QorIQ FMan v3 OH ports device tree
10593 + *
10594 + * Copyright 2012-2015 Freescale Semiconductor Inc.
10595 + *
10596 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10597 + */
10598 +
10599 +fman@1a00000 {
10600 +
10601 + fman0_oh1: port@82000 {
10602 + cell-index = <0>;
10603 + compatible = "fsl,fman-port-oh";
10604 + reg = <0x82000 0x1000>;
10605 + };
10606 +
10607 + fman0_oh2: port@83000 {
10608 + cell-index = <1>;
10609 + compatible = "fsl,fman-port-oh";
10610 + reg = <0x83000 0x1000>;
10611 + };
10612 +
10613 + fman0_oh3: port@84000 {
10614 + cell-index = <2>;
10615 + compatible = "fsl,fman-port-oh";
10616 + reg = <0x84000 0x1000>;
10617 + };
10618 +
10619 + fman0_oh4: port@85000 {
10620 + cell-index = <3>;
10621 + compatible = "fsl,fman-port-oh";
10622 + reg = <0x85000 0x1000>;
10623 + };
10624 +
10625 + fman0_oh5: port@86000 {
10626 + cell-index = <4>;
10627 + compatible = "fsl,fman-port-oh";
10628 + reg = <0x86000 0x1000>;
10629 + };
10630 +
10631 + fman0_oh6: port@87000 {
10632 + cell-index = <5>;
10633 + compatible = "fsl,fman-port-oh";
10634 + reg = <0x87000 0x1000>;
10635 + };
10636 +
10637 +};
10638 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
10639 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
10640 @@ -1,9 +1,9 @@
10641 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10642 /*
10643 * QorIQ FMan v3 device tree
10644 *
10645 * Copyright 2012-2015 Freescale Semiconductor Inc.
10646 *
10647 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10648 */
10649
10650 fman0: fman@1a00000 {
10651 @@ -11,53 +11,104 @@ fman0: fman@1a00000 {
10652 #size-cells = <1>;
10653 cell-index = <0>;
10654 compatible = "fsl,fman";
10655 - ranges = <0x0 0x0 0x1a00000 0x100000>;
10656 - reg = <0x0 0x1a00000 0x0 0x100000>;
10657 + ranges = <0x0 0x0 0x1a00000 0xfe000>;
10658 + reg = <0x0 0x1a00000 0x0 0xfe000>;
10659 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
10660 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
10661 clocks = <&clockgen 3 0>;
10662 clock-names = "fmanclk";
10663 fsl,qman-channel-range = <0x800 0x10>;
10664 + ptimer-handle = <&ptp_timer0>;
10665 +
10666 + cc {
10667 + compatible = "fsl,fman-cc";
10668 + };
10669
10670 muram@0 {
10671 compatible = "fsl,fman-muram";
10672 reg = <0x0 0x60000>;
10673 };
10674
10675 + bmi@80000 {
10676 + compatible = "fsl,fman-bmi";
10677 + reg = <0x80000 0x400>;
10678 + };
10679 +
10680 + qmi@80400 {
10681 + compatible = "fsl,fman-qmi";
10682 + reg = <0x80400 0x400>;
10683 + };
10684 +
10685 fman0_oh_0x2: port@82000 {
10686 cell-index = <0x2>;
10687 compatible = "fsl,fman-v3-port-oh";
10688 reg = <0x82000 0x1000>;
10689 + fsl,qman-channel-id = <0x809>;
10690 };
10691
10692 fman0_oh_0x3: port@83000 {
10693 cell-index = <0x3>;
10694 compatible = "fsl,fman-v3-port-oh";
10695 reg = <0x83000 0x1000>;
10696 + fsl,qman-channel-id = <0x80a>;
10697 };
10698
10699 fman0_oh_0x4: port@84000 {
10700 cell-index = <0x4>;
10701 compatible = "fsl,fman-v3-port-oh";
10702 reg = <0x84000 0x1000>;
10703 + fsl,qman-channel-id = <0x80b>;
10704 };
10705
10706 fman0_oh_0x5: port@85000 {
10707 cell-index = <0x5>;
10708 compatible = "fsl,fman-v3-port-oh";
10709 reg = <0x85000 0x1000>;
10710 + fsl,qman-channel-id = <0x80c>;
10711 };
10712
10713 fman0_oh_0x6: port@86000 {
10714 cell-index = <0x6>;
10715 compatible = "fsl,fman-v3-port-oh";
10716 reg = <0x86000 0x1000>;
10717 + fsl,qman-channel-id = <0x80d>;
10718 };
10719
10720 fman0_oh_0x7: port@87000 {
10721 cell-index = <0x7>;
10722 compatible = "fsl,fman-v3-port-oh";
10723 reg = <0x87000 0x1000>;
10724 + fsl,qman-channel-id = <0x80e>;
10725 + };
10726 +
10727 + policer@c0000 {
10728 + compatible = "fsl,fman-policer";
10729 + reg = <0xc0000 0x1000>;
10730 + };
10731 +
10732 + keygen@c1000 {
10733 + compatible = "fsl,fman-keygen";
10734 + reg = <0xc1000 0x1000>;
10735 + };
10736 +
10737 + dma@c2000 {
10738 + compatible = "fsl,fman-dma";
10739 + reg = <0xc2000 0x1000>;
10740 + };
10741 +
10742 + fpm@c3000 {
10743 + compatible = "fsl,fman-fpm";
10744 + reg = <0xc3000 0x1000>;
10745 + };
10746 +
10747 + parser@c7000 {
10748 + compatible = "fsl,fman-parser";
10749 + reg = <0xc7000 0x1000>;
10750 + };
10751 +
10752 + vsps@dc000 {
10753 + compatible = "fsl,fman-vsps";
10754 + reg = <0xdc000 0x1000>;
10755 };
10756
10757 mdio0: mdio@fc000 {
10758 @@ -73,9 +124,11 @@ fman0: fman@1a00000 {
10759 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10760 reg = <0xfd000 0x1000>;
10761 };
10762 +};
10763
10764 - ptp_timer0: ptp-timer@fe000 {
10765 - compatible = "fsl,fman-ptp-timer";
10766 - reg = <0xfe000 0x1000>;
10767 - };
10768 +ptp_timer0: ptp-timer@1afe000 {
10769 + compatible = "fsl,fman-ptp-timer";
10770 + reg = <0x0 0x1afe000 0x0 0x1000>;
10771 + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
10772 + clocks = <&clockgen 3 0>;
10773 };
10774 --- /dev/null
10775 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi
10776 @@ -0,0 +1,38 @@
10777 +/*
10778 + * QorIQ QMan SDK Portals device tree nodes
10779 + *
10780 + * Copyright 2011-2016 Freescale Semiconductor Inc.
10781 + * Copyright 2017 NXP
10782 + *
10783 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10784 + */
10785 +
10786 +&qportals {
10787 + qman-fqids@0 {
10788 + compatible = "fsl,fqid-range";
10789 + fsl,fqid-range = <256 256>;
10790 + };
10791 +
10792 + qman-fqids@1 {
10793 + compatible = "fsl,fqid-range";
10794 + fsl,fqid-range = <32768 32768>;
10795 + };
10796 +
10797 + qman-pools@0 {
10798 + compatible = "fsl,pool-channel-range";
10799 + fsl,pool-channel-range = <0x401 0xf>;
10800 + };
10801 +
10802 + qman-cgrids@0 {
10803 + compatible = "fsl,cgrid-range";
10804 + fsl,cgrid-range = <0 256>;
10805 + };
10806 +
10807 + qman-ceetm@0 {
10808 + compatible = "fsl,qman-ceetm";
10809 + fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
10810 + fsl,ceetm-sp-range = <0 16>;
10811 + fsl,ceetm-lni-range = <0 8>;
10812 + fsl,ceetm-channel-range = <0 32>;
10813 + };
10814 +};
10815 --- a/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi
10816 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi
10817 @@ -1,9 +1,9 @@
10818 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10819 /*
10820 * QorIQ QMan Portals device tree
10821 *
10822 * Copyright 2011-2016 Freescale Semiconductor Inc.
10823 *
10824 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10825 */
10826
10827 &qportals {
10828 @@ -77,4 +77,11 @@
10829 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
10830 cell-index = <8>;
10831 };
10832 +
10833 + qportal9: qman-portal@90000 {
10834 + compatible = "fsl,qman-portal";
10835 + reg = <0x90000 0x4000>, <0x4090000 0x4000>;
10836 + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
10837 + cell-index = <9>;
10838 + };
10839 };
10840 --- a/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts
10841 +++ b/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts
10842 @@ -330,3 +330,32 @@
10843 &sata {
10844 status = "disabled";
10845 };
10846 +
10847 +/* Additions for Layerscape SDK (4.4/4.9) Kernel only
10848 + * These kernels need additional setup for FMan/QMan DMA shared memory
10849 + */
10850 +
10851 +#include "qoriq-qman-portals-sdk.dtsi"
10852 +#include "qoriq-bman-portals-sdk.dtsi"
10853 +
10854 +&bman_fbpr {
10855 + compatible = "fsl,bman-fbpr";
10856 + alloc-ranges = <0 0 0x10000 0>;
10857 +};
10858 +&qman_fqd {
10859 + compatible = "fsl,qman-fqd";
10860 + alloc-ranges = <0 0 0x10000 0>;
10861 +};
10862 +&qman_pfdr {
10863 + compatible = "fsl,qman-pfdr";
10864 + alloc-ranges = <0 0 0x10000 0>;
10865 +};
10866 +
10867 +&soc {
10868 +#include "qoriq-dpaa-eth.dtsi"
10869 +#include "qoriq-fman3-0-6oh.dtsi"
10870 +};
10871 +
10872 +&fman0 {
10873 + compatible = "fsl,fman", "simple-bus";
10874 +};
10875 --- a/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts
10876 +++ b/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts
10877 @@ -251,3 +251,32 @@
10878 &sata {
10879 status = "disabled";
10880 };
10881 +
10882 +/* Additions for Layerscape SDK (4.4/4.9) Kernel only
10883 + * These kernels need additional setup for FMan/QMan DMA shared memory
10884 + */
10885 +
10886 +#include "qoriq-qman-portals-sdk.dtsi"
10887 +#include "qoriq-bman-portals-sdk.dtsi"
10888 +
10889 +&bman_fbpr {
10890 + compatible = "fsl,bman-fbpr";
10891 + alloc-ranges = <0 0 0x10000 0>;
10892 +};
10893 +&qman_fqd {
10894 + compatible = "fsl,qman-fqd";
10895 + alloc-ranges = <0 0 0x10000 0>;
10896 +};
10897 +&qman_pfdr {
10898 + compatible = "fsl,qman-pfdr";
10899 + alloc-ranges = <0 0 0x10000 0>;
10900 +};
10901 +
10902 +&soc {
10903 +#include "qoriq-dpaa-eth.dtsi"
10904 +#include "qoriq-fman3-0-6oh.dtsi"
10905 +};
10906 +
10907 +&fman0 {
10908 + compatible = "fsl,fman", "simple-bus";
10909 +};
Staging tree of Mathias Kresin