bffed9e85687fcfed8f4af84e9211fa43e46be1c
[openwrt/staging/mkresin.git] / target / linux / brcm2708 / patches-4.19 / 950-0659-drm-vc4-Fix-TILE_Y_OFFSET-definitions.patch
1 From c1fffc2a7dbf7e59aaef36378fb14d1c3dc016a6 Mon Sep 17 00:00:00 2001
2 From: Eric Anholt <eric@anholt.net>
3 Date: Fri, 3 Aug 2018 11:22:27 +0200
4 Subject: [PATCH] drm/vc4: Fix TILE_Y_OFFSET definitions
5
6 Y_OFFSET field starts at bit 8 not 7.
7
8 Signed-off-by: Eric Anholt <eric@anholt.net>
9 Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
10 Link: https://patchwork.freedesktop.org/patch/msgid/20180803092231.26446-1-boris.brezillon@bootlin.com
11 ---
12 drivers/gpu/drm/vc4/vc4_regs.h | 4 ++--
13 1 file changed, 2 insertions(+), 2 deletions(-)
14
15 --- a/drivers/gpu/drm/vc4/vc4_regs.h
16 +++ b/drivers/gpu/drm/vc4/vc4_regs.h
17 @@ -1043,8 +1043,8 @@ enum hvs_pixel_format {
18 #define SCALER_PITCH0_TILE_LINE_DIR BIT(15)
19 #define SCALER_PITCH0_TILE_INITIAL_LINE_DIR BIT(14)
20 /* Y offset within a tile. */
21 -#define SCALER_PITCH0_TILE_Y_OFFSET_MASK VC4_MASK(13, 7)
22 -#define SCALER_PITCH0_TILE_Y_OFFSET_SHIFT 7
23 +#define SCALER_PITCH0_TILE_Y_OFFSET_MASK VC4_MASK(13, 8)
24 +#define SCALER_PITCH0_TILE_Y_OFFSET_SHIFT 8
25 #define SCALER_PITCH0_TILE_WIDTH_R_MASK VC4_MASK(6, 0)
26 #define SCALER_PITCH0_TILE_WIDTH_R_SHIFT 0
27