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brcm63xx: rename target to bcm63xx
[openwrt/staging/mkresin.git] / target / linux / brcm2708 / patches-4.19 / 950-0056-BCM2708-Add-core-Device-Tree-support.patch
1 From d04105f6d48f160f4b7ab874ed7f878c2b84b466 Mon Sep 17 00:00:00 2001
2 From: notro <notro@tronnes.org>
3 Date: Wed, 9 Jul 2014 14:46:08 +0200
4 Subject: [PATCH] BCM2708: Add core Device Tree support
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Add the bare minimum needed to boot BCM2708 from a Device Tree.
10
11 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
12
13 BCM2708: DT: change 'axi' nodename to 'soc'
14
15 Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
16 The VC4 bootloader fills in certain properties in the 'axi' subtree,
17 but since this is part of an upstreaming effort, the name is changed.
18
19 Signed-off-by: Noralf Tronnes notro@tronnes.org
20
21 BCM2708_DT: Correct length of the peripheral space
22
23 Use dts-dirs feature for overlays.
24
25 The kernel makefiles have a dts-dirs target that is for vendor subdirectories.
26
27 Using this fixes the install_dtbs target, which previously did not install the overlays.
28
29 BCM270X_DT: configure I2S DMA channels
30
31 Signed-off-by: Matthias Reichl <hias@horus.com>
32
33 BCM270X_DT: switch to bcm2835-i2s
34
35 I2S soundcard drivers with proper devicetree support (i.e. not linking
36 to the cpu_dai/platform via name but to cpu/platform via of_node)
37 will work out of the box without any modifications.
38
39 When the kernel is compiled without devicetree support the platform
40 code will instantiate the bcm2708-i2s driver and I2S soundcard drivers
41 will link to it via name, as before.
42
43 Signed-off-by: Matthias Reichl <hias@horus.com>
44
45 SDIO-overlay: add poll_once-boolean parameter
46
47 Add paramter to toggle sdio-device-polling
48 done every second or once at boot-time.
49
50 Signed-off-by: Patrick Boettcher <patrick.boettcher@posteo.de>
51
52 BCM270X_DT: Make mmc overlay compatible with current firmware
53
54 The original DT overlay logic followed a merge-then-patch procedure,
55 i.e. parameters are applied to the loaded overlay before the overlay
56 is merged into the base DTB. This sequence has been changed to
57 patch-then-merge, in order to support parameterised node names, and
58 to protect against bad overlays. As a result, overrides (parameters)
59 must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB.
60
61 mmc-overlay.dts (that switches back to the original mmc sdcard
62 driver) is the only overlay violating that rule, and this patch
63 fixes it.
64
65 bcm270x_dt: Use the sdhost MMC controller by default
66
67 The "mmc" overlay reverts to using the other controller.
68
69 squash: Add cprman to dt
70
71 BCM270X_DT: Use clk_core for I2C interfaces
72
73 BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi
74
75 The mainline Device Tree files are quite close to downstream now.
76 Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
77 for our dts files.
78
79 Mainline dts files are based on these files:
80
81 bcm2835-rpi.dtsi
82 bcm2835.dtsi bcm2836.dtsi
83 bcm283x.dtsi
84
85 Current downstream are based on these:
86
87 bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
88 bcm2708_common.dtsi
89
90 This patch introduces this dependency:
91
92 bcm2708.dtsi bcm2709.dtsi
93 bcm2708-rpi.dtsi
94 bcm270x.dtsi
95 bcm2835.dtsi bcm2836.dtsi
96 bcm283x.dtsi
97
98 And:
99 bcm2710.dtsi
100 bcm2708-rpi.dtsi
101 bcm270x.dtsi
102 bcm283x.dtsi
103
104 bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
105 bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
106
107 Other changes:
108 - The led node has moved from /soc/leds to /leds. This is not a problem
109 since the label is used to reference it.
110 - The clk_osc reg property changes from 6 to 3.
111 - The gpu nodes has their interrupt property set in the base file.
112 - the clocks label does not point to the /clocks node anymore, but
113 points to the cprman node. This is not a problem since the overlays
114 that use the clock node refer to it directly: target-path = "/clocks";
115 - some nodes now have 2 labels since mainline and downstream differs in
116 this respect: cprman/clocks, spi0/spi, gpu/vc4.
117 - some nodes doesn't have an explicit status = "okay" since they're not
118 disabled in the base file: watchdog and random.
119 - gpiomem doesn't need an explicit status = "okay".
120 - bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
121 it's now set directly in that file.
122 - bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
123 - Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
124
125 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
126
127 BCM270X_DT: Use raspberrypi-power to turn on USB power
128
129 Use the raspberrypi-power driver to turn on USB power.
130
131 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
132
133 BCM270X_DT: Add a .dtbo target, use for overlays
134
135 Change the filenames and extensions to keep the pre-DDT style of
136 overlay (<name>-overlay.dtb) distinct from new ones that use a
137 different style of local fixups (<name>.dtbo), and to match other
138 platforms.
139
140 The RPi firmware uses the DDTK trailer atom to choose which type of
141 overlay to use for each kernel.
142
143 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
144
145 BCM270X_DT: Don't generate "linux,phandle" props
146
147 The EPAPR standard says to use "phandle" properties to store phandles,
148 rather than the deprecated "linux,phandle" version. By default, dtc
149 generates both, but adding "-H epapr" causes it to only generate
150 "phandle"s, saving some space and clutter.
151
152 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
153
154 BCM270X_DT: Add overlay for enc28j60 on SPI2
155
156 Works on SPI2 for compute module
157
158 BCM270X_DT: Add midi-uart0 overlay
159
160 MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The
161 midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock
162 so that requesting 38.4kbaud actually gets 31.25kbaud.
163
164 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
165
166 BCM270X_DT: Add i2c-sensor overlay
167
168 The i2c-sensor overlay is a container for various pressure and
169 temperature sensors, currently bmp085 and bmp280. The standalone
170 bmp085_i2c-sensor overlay is now deprecated.
171
172 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
173
174 BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752)
175
176 We now create overlays as .dtbo files.
177
178 build: support for .dtbo files for dtb overlays
179
180 Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb.
181 Patch the kernel, which has faulty rules to generate .dtbo the way yocto does
182
183 Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
184 Signed-off-by: Khem Raj <raj.khem@gmail.com>
185
186 BCM270X: Drop position requirement for CMA in VC4 overlay.
187
188 No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f,
189 and will probably let peeople that want to choose a larger CMA
190 allocation (particularly on pi0/1).
191
192 Signed-off-by: Eric Anholt <eric@anholt.net>
193
194 BCM270X_DT: RPi Device Tree tidy
195
196 Use the upstream sdhost node, add thermal-zones, and factor out some
197 common elements.
198
199 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
200
201 kbuild: Silence unhelpful DTC warnings
202
203 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
204 ---
205 .gitignore | 2 +-
206 arch/arm/Makefile | 2 +
207 arch/arm/boot/dts/Makefile | 21 +
208 arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 166 ++
209 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 122 ++
210 arch/arm/boot/dts/bcm2708-rpi-b.dts | 112 +
211 arch/arm/boot/dts/bcm2708-rpi-cm.dts | 95 +
212 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 17 +
213 arch/arm/boot/dts/bcm2708-rpi.dtsi | 159 ++
214 arch/arm/boot/dts/bcm2708.dtsi | 11 +
215 arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 123 ++
216 arch/arm/boot/dts/bcm2709.dtsi | 19 +
217 arch/arm/boot/dts/bcm270x.dtsi | 152 ++
218 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 183 ++
219 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 191 ++
220 arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 129 ++
221 arch/arm/boot/dts/bcm2710.dtsi | 29 +
222 arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +-
223 arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 17 +
224 arch/arm/boot/dts/overlays/Makefile | 145 ++
225 arch/arm/boot/dts/overlays/README | 1952 +++++++++++++++++
226 .../dts/overlays/adau1977-adc-overlay.dts | 40 +
227 .../dts/overlays/adau7002-simple-overlay.dts | 52 +
228 .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 +
229 .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 +
230 .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 +
231 .../overlays/akkordion-iqdacplus-overlay.dts | 49 +
232 .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 +
233 .../dts/overlays/allo-digione-overlay.dts | 44 +
234 .../allo-katana-dac-audio-overlay.dts | 57 +
235 .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 +
236 ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 55 +
237 .../boot/dts/overlays/applepi-dac-overlay.dts | 57 +
238 .../boot/dts/overlays/at86rf233-overlay.dts | 57 +
239 .../overlays/audioinjector-addons-overlay.dts | 59 +
240 .../audioinjector-wm8731-audio-overlay.dts | 39 +
241 .../boot/dts/overlays/audremap-overlay.dts | 19 +
242 .../boot/dts/overlays/balena-fin-overlay.dts | 79 +
243 .../overlays/bmp085_i2c-sensor-overlay.dts | 23 +
244 arch/arm/boot/dts/overlays/dht11-overlay.dts | 39 +
245 .../dts/overlays/dionaudio-loco-overlay.dts | 39 +
246 .../overlays/dionaudio-loco-v2-overlay.dts | 49 +
247 arch/arm/boot/dts/overlays/dpi18-overlay.dts | 31 +
248 arch/arm/boot/dts/overlays/dpi24-overlay.dts | 31 +
249 .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 20 +
250 arch/arm/boot/dts/overlays/dwc2-overlay.dts | 28 +
251 .../boot/dts/overlays/enc28j60-overlay.dts | 53 +
252 .../dts/overlays/enc28j60-spi2-overlay.dts | 47 +
253 .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 +
254 .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +
255 arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 +
256 .../googlevoicehat-soundcard-overlay.dts | 49 +
257 .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 48 +
258 .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 +
259 .../boot/dts/overlays/gpio-key-overlay.dts | 48 +
260 .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 +
261 .../dts/overlays/gpio-poweroff-overlay.dts | 36 +
262 .../dts/overlays/gpio-shutdown-overlay.dts | 80 +
263 .../dts/overlays/hifiberry-amp-overlay.dts | 39 +
264 .../dts/overlays/hifiberry-dac-overlay.dts | 34 +
265 .../overlays/hifiberry-dacplus-overlay.dts | 59 +
266 .../dts/overlays/hifiberry-digi-overlay.dts | 41 +
267 .../overlays/hifiberry-digi-pro-overlay.dts | 43 +
268 arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 +
269 arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 ++
270 .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 +
271 .../boot/dts/overlays/i2c-gpio-overlay.dts | 43 +
272 .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 ++
273 .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 +
274 .../dts/overlays/i2c-rtc-gpio-overlay.dts | 183 ++
275 .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 181 ++
276 .../boot/dts/overlays/i2c-sensor-overlay.dts | 223 ++
277 .../dts/overlays/i2c0-bcm2708-overlay.dts | 69 +
278 .../dts/overlays/i2c1-bcm2708-overlay.dts | 43 +
279 .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 +
280 .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 +
281 .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 +
282 .../iqaudio-digi-wm8804-audio-overlay.dts | 47 +
283 .../dts/overlays/jedec-spi-nor-overlay.dts | 309 +++
284 .../dts/overlays/justboom-dac-overlay.dts | 46 +
285 .../dts/overlays/justboom-digi-overlay.dts | 41 +
286 .../boot/dts/overlays/lirc-rpi-overlay.dts | 57 +
287 .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 +
288 .../boot/dts/overlays/mbed-dac-overlay.dts | 64 +
289 .../boot/dts/overlays/mcp23017-overlay.dts | 54 +
290 .../boot/dts/overlays/mcp23s17-overlay.dts | 732 +++++++
291 .../dts/overlays/mcp2515-can0-overlay.dts | 73 +
292 .../dts/overlays/mcp2515-can1-overlay.dts | 73 +
293 .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 ++
294 .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 ++
295 .../dts/overlays/media-center-overlay.dts | 134 ++
296 .../boot/dts/overlays/midi-uart0-overlay.dts | 36 +
297 .../boot/dts/overlays/midi-uart1-overlay.dts | 43 +
298 arch/arm/boot/dts/overlays/mmc-overlay.dts | 39 +
299 .../arm/boot/dts/overlays/mpu6050-overlay.dts | 28 +
300 .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 +
301 .../arm/boot/dts/overlays/papirus-overlay.dts | 89 +
302 .../boot/dts/overlays/pi3-act-led-overlay.dts | 27 +
303 .../dts/overlays/pi3-disable-bt-overlay.dts | 46 +
304 .../dts/overlays/pi3-disable-wifi-overlay.dts | 13 +
305 .../dts/overlays/pi3-miniuart-bt-overlay.dts | 74 +
306 arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 +
307 .../boot/dts/overlays/piscreen-overlay.dts | 102 +
308 .../boot/dts/overlays/piscreen2r-overlay.dts | 106 +
309 .../arm/boot/dts/overlays/pisound-overlay.dts | 120 +
310 .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 +
311 .../overlays/pitft28-capacitive-overlay.dts | 91 +
312 .../overlays/pitft28-resistive-overlay.dts | 121 +
313 .../overlays/pitft35-resistive-overlay.dts | 121 +
314 .../boot/dts/overlays/pps-gpio-overlay.dts | 38 +
315 .../boot/dts/overlays/pwm-2chan-overlay.dts | 47 +
316 .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 +
317 arch/arm/boot/dts/overlays/pwm-overlay.dts | 43 +
318 .../arm/boot/dts/overlays/qca7000-overlay.dts | 52 +
319 .../dts/overlays/rotary-encoder-overlay.dts | 59 +
320 .../dts/overlays/rpi-backlight-overlay.dts | 21 +
321 .../overlays/rpi-cirrus-wm5102-overlay.dts | 146 ++
322 .../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 +
323 .../boot/dts/overlays/rpi-display-overlay.dts | 91 +
324 .../boot/dts/overlays/rpi-ft5406-overlay.dts | 30 +
325 .../boot/dts/overlays/rpi-proto-overlay.dts | 39 +
326 .../boot/dts/overlays/rpi-sense-overlay.dts | 47 +
327 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 31 +
328 .../rra-digidac1-wm8741-audio-overlay.dts | 49 +
329 .../dts/overlays/sc16is750-i2c-overlay.dts | 37 +
330 .../dts/overlays/sc16is752-i2c-overlay.dts | 40 +
331 .../dts/overlays/sc16is752-spi1-overlay.dts | 61 +
332 arch/arm/boot/dts/overlays/sdhost-overlay.dts | 31 +
333 .../boot/dts/overlays/sdio-1bit-overlay.dts | 63 +
334 arch/arm/boot/dts/overlays/sdio-overlay.dts | 63 +
335 .../arm/boot/dts/overlays/sdtweak-overlay.dts | 25 +
336 .../arm/boot/dts/overlays/smi-dev-overlay.dts | 18 +
337 .../boot/dts/overlays/smi-nand-overlay.dts | 69 +
338 arch/arm/boot/dts/overlays/smi-overlay.dts | 37 +
339 .../dts/overlays/spi-gpio35-39-overlay.dts | 31 +
340 .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 +
341 .../arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 +
342 .../boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 +
343 .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 +
344 .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 +
345 .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 +
346 .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 +
347 .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 +
348 .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 +
349 .../dts/overlays/superaudioboard-overlay.dts | 73 +
350 arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 ++++++++++++++
351 .../boot/dts/overlays/tinylcd35-overlay.dts | 224 ++
352 arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 +
353 arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 +
354 .../upstream-aux-interrupt-overlay.dts | 33 +
355 .../boot/dts/overlays/upstream-overlay.dts | 154 ++
356 .../dts/overlays/vc4-fkms-v3d-overlay.dts | 89 +
357 .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 151 ++
358 arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 +
359 .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 41 +
360 .../dts/overlays/w1-gpio-pullup-overlay.dts | 43 +
361 .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 +
362 scripts/Makefile.dtbinst | 8 +-
363 scripts/Makefile.lib | 13 +
364 159 files changed, 14852 insertions(+), 4 deletions(-)
365 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-0-w.dts
366 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
367 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts
368 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts
369 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
370 create mode 100644 arch/arm/boot/dts/bcm2708-rpi.dtsi
371 create mode 100644 arch/arm/boot/dts/bcm2708.dtsi
372 create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts
373 create mode 100644 arch/arm/boot/dts/bcm2709.dtsi
374 create mode 100644 arch/arm/boot/dts/bcm270x.dtsi
375 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
376 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
377 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
378 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
379 create mode 100644 arch/arm/boot/dts/overlays/Makefile
380 create mode 100644 arch/arm/boot/dts/overlays/README
381 create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
382 create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
383 create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
384 create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts
385 create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts
386 create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
387 create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
388 create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts
389 create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
390 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
391 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
392 create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
393 create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts
394 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
395 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
396 create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
397 create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts
398 create mode 100644 arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
399 create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts
400 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
401 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
402 create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
403 create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
404 create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
405 create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts
406 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts
407 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
408 create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts
409 create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
410 create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts
411 create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
412 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
413 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
414 create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts
415 create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
416 create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
417 create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
418 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
419 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
420 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
421 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
422 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
423 create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts
424 create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts
425 create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
426 create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
427 create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
428 create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
429 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
430 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
431 create mode 100644 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
432 create mode 100644 arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
433 create mode 100644 arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
434 create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
435 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
436 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
437 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
438 create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
439 create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
440 create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
441 create mode 100644 arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts
442 create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts
443 create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
444 create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
445 create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
446 create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
447 create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
448 create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts
449 create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
450 create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts
451 create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
452 create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
453 create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts
454 create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts
455 create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts
456 create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts
457 create mode 100644 arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
458 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
459 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
460 create mode 100644 arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
461 create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts
462 create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts
463 create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
464 create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
465 create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
466 create mode 100644 arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
467 create mode 100644 arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
468 create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
469 create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
470 create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
471 create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
472 create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts
473 create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts
474 create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
475 create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
476 create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
477 create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
478 create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts
479 create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
480 create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
481 create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
482 create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
483 create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
484 create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
485 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
486 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
487 create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts
488 create mode 100644 arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts
489 create mode 100644 arch/arm/boot/dts/overlays/sdio-overlay.dts
490 create mode 100644 arch/arm/boot/dts/overlays/sdtweak-overlay.dts
491 create mode 100644 arch/arm/boot/dts/overlays/smi-dev-overlay.dts
492 create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
493 create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts
494 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
495 create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
496 create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
497 create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
498 create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
499 create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
500 create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
501 create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
502 create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
503 create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
504 create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
505 create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts
506 create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
507 create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts
508 create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts
509 create mode 100644 arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts
510 create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
511 create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
512 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
513 create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts
514 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
515 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
516 create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts
517
518 --- a/.gitignore
519 +++ b/.gitignore
520 @@ -15,7 +15,7 @@
521 *.bin
522 *.bz2
523 *.c.[012]*.*
524 -*.dtb
525 +*.dtb*
526 *.dtb.S
527 *.dwo
528 *.elf
529 --- a/arch/arm/Makefile
530 +++ b/arch/arm/Makefile
531 @@ -341,6 +341,8 @@ $(INSTALL_TARGETS):
532
533 %.dtb: | scripts
534 $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
535 +%.dtbo: | scripts
536 + $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
537
538 PHONY += dtbs dtbs_install
539
540 --- a/arch/arm/boot/dts/Makefile
541 +++ b/arch/arm/boot/dts/Makefile
542 @@ -1,4 +1,15 @@
543 # SPDX-License-Identifier: GPL-2.0
544 +
545 +dtb-$(CONFIG_ARCH_BCM2835) += \
546 + bcm2708-rpi-b.dtb \
547 + bcm2708-rpi-b-plus.dtb \
548 + bcm2708-rpi-cm.dtb \
549 + bcm2708-rpi-0-w.dtb \
550 + bcm2709-rpi-2-b.dtb \
551 + bcm2710-rpi-3-b.dtb \
552 + bcm2710-rpi-3-b-plus.dtb \
553 + bcm2710-rpi-cm3.dtb
554 +
555 dtb-$(CONFIG_ARCH_ALPINE) += \
556 alpine-db.dtb
557 dtb-$(CONFIG_MACH_ARTPEC6) += \
558 @@ -1207,3 +1218,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
559 aspeed-bmc-opp-zaius.dtb \
560 aspeed-bmc-portwell-neptune.dtb \
561 aspeed-bmc-quanta-q71l.dtb
562 +
563 +targets += dtbs dtbs_install
564 +targets += $(dtb-y)
565 +
566 +subdir-y := overlays
567 +
568 +# Enable fixups to support overlays on BCM2835 platforms
569 +ifeq ($(CONFIG_ARCH_BCM2835),y)
570 + DTC_FLAGS ?= -@
571 +endif
572 --- /dev/null
573 +++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts
574 @@ -0,0 +1,166 @@
575 +/dts-v1/;
576 +
577 +#include "bcm2708.dtsi"
578 +
579 +/ {
580 + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
581 + model = "Raspberry Pi Zero W";
582 +
583 + chosen {
584 + bootargs = "8250.nr_uarts=1";
585 + };
586 +
587 + aliases {
588 + serial0 = &uart1;
589 + serial1 = &uart0;
590 + };
591 +};
592 +
593 +&gpio {
594 + spi0_pins: spi0_pins {
595 + brcm,pins = <9 10 11>;
596 + brcm,function = <4>; /* alt0 */
597 + };
598 +
599 + spi0_cs_pins: spi0_cs_pins {
600 + brcm,pins = <8 7>;
601 + brcm,function = <1>; /* output */
602 + };
603 +
604 + i2c0_pins: i2c0 {
605 + brcm,pins = <0 1>;
606 + brcm,function = <4>;
607 + };
608 +
609 + i2c1_pins: i2c1 {
610 + brcm,pins = <2 3>;
611 + brcm,function = <4>;
612 + };
613 +
614 + i2s_pins: i2s {
615 + brcm,pins = <18 19 20 21>;
616 + brcm,function = <4>; /* alt0 */
617 + };
618 +
619 + sdio_pins: sdio_pins {
620 + brcm,pins = <34 35 36 37 38 39>;
621 + brcm,function = <7>; /* ALT3 = SD1 */
622 + brcm,pull = <0 2 2 2 2 2>;
623 + };
624 +
625 + bt_pins: bt_pins {
626 + brcm,pins = <43>;
627 + brcm,function = <4>; /* alt0:GPCLK2 */
628 + brcm,pull = <0>; /* none */
629 + };
630 +
631 + uart0_pins: uart0_pins {
632 + brcm,pins = <30 31 32 33>;
633 + brcm,function = <7>; /* alt3=UART0 */
634 + brcm,pull = <2 0 0 2>; /* up none none up */
635 + };
636 +
637 + uart1_pins: uart1_pins {
638 + brcm,pins;
639 + brcm,function;
640 + brcm,pull;
641 + };
642 +
643 + audio_pins: audio_pins {
644 + brcm,pins = <>;
645 + brcm,function = <>;
646 + };
647 +};
648 +
649 +&mmc {
650 + pinctrl-names = "default";
651 + pinctrl-0 = <&sdio_pins>;
652 + non-removable;
653 + bus-width = <4>;
654 + status = "okay";
655 +};
656 +
657 +&uart0 {
658 + pinctrl-names = "default";
659 + pinctrl-0 = <&uart0_pins &bt_pins>;
660 + status = "okay";
661 +};
662 +
663 +&uart1 {
664 + pinctrl-names = "default";
665 + pinctrl-0 = <&uart1_pins>;
666 + status = "okay";
667 +};
668 +
669 +&spi0 {
670 + pinctrl-names = "default";
671 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
672 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
673 +
674 + spidev0: spidev@0{
675 + compatible = "spidev";
676 + reg = <0>; /* CE0 */
677 + #address-cells = <1>;
678 + #size-cells = <0>;
679 + spi-max-frequency = <125000000>;
680 + };
681 +
682 + spidev1: spidev@1{
683 + compatible = "spidev";
684 + reg = <1>; /* CE1 */
685 + #address-cells = <1>;
686 + #size-cells = <0>;
687 + spi-max-frequency = <125000000>;
688 + };
689 +};
690 +
691 +&i2c0 {
692 + pinctrl-names = "default";
693 + pinctrl-0 = <&i2c0_pins>;
694 + clock-frequency = <100000>;
695 +};
696 +
697 +&i2c1 {
698 + pinctrl-names = "default";
699 + pinctrl-0 = <&i2c1_pins>;
700 + clock-frequency = <100000>;
701 +};
702 +
703 +&i2c2 {
704 + clock-frequency = <100000>;
705 +};
706 +
707 +&i2s {
708 + #sound-dai-cells = <0>;
709 + pinctrl-names = "default";
710 + pinctrl-0 = <&i2s_pins>;
711 +};
712 +
713 +&random {
714 + status = "okay";
715 +};
716 +
717 +&leds {
718 + act_led: act {
719 + label = "led0";
720 + linux,default-trigger = "mmc0";
721 + gpios = <&gpio 47 0>;
722 + };
723 +};
724 +
725 +&hdmi {
726 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
727 +};
728 +
729 +&audio {
730 + pinctrl-names = "default";
731 + pinctrl-0 = <&audio_pins>;
732 +};
733 +
734 +/ {
735 + __overrides__ {
736 + act_led_gpio = <&act_led>,"gpios:4";
737 + act_led_activelow = <&act_led>,"gpios:8";
738 + act_led_trigger = <&act_led>,"linux,default-trigger";
739 + };
740 +};
741 --- /dev/null
742 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
743 @@ -0,0 +1,122 @@
744 +/dts-v1/;
745 +
746 +#include "bcm2708.dtsi"
747 +#include "bcm283x-rpi-smsc9514.dtsi"
748 +
749 +/ {
750 + model = "Raspberry Pi Model B+";
751 +};
752 +
753 +&gpio {
754 + spi0_pins: spi0_pins {
755 + brcm,pins = <9 10 11>;
756 + brcm,function = <4>; /* alt0 */
757 + };
758 +
759 + spi0_cs_pins: spi0_cs_pins {
760 + brcm,pins = <8 7>;
761 + brcm,function = <1>; /* output */
762 + };
763 +
764 + i2c0_pins: i2c0 {
765 + brcm,pins = <0 1>;
766 + brcm,function = <4>;
767 + };
768 +
769 + i2c1_pins: i2c1 {
770 + brcm,pins = <2 3>;
771 + brcm,function = <4>;
772 + };
773 +
774 + i2s_pins: i2s {
775 + brcm,pins = <18 19 20 21>;
776 + brcm,function = <4>; /* alt0 */
777 + };
778 +
779 + audio_pins: audio_pins {
780 + brcm,pins = <40 45>;
781 + brcm,function = <4>;
782 + };
783 +};
784 +
785 +&uart0 {
786 + status = "okay";
787 +};
788 +
789 +&spi0 {
790 + pinctrl-names = "default";
791 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
792 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
793 +
794 + spidev0: spidev@0{
795 + compatible = "spidev";
796 + reg = <0>; /* CE0 */
797 + #address-cells = <1>;
798 + #size-cells = <0>;
799 + spi-max-frequency = <125000000>;
800 + };
801 +
802 + spidev1: spidev@1{
803 + compatible = "spidev";
804 + reg = <1>; /* CE1 */
805 + #address-cells = <1>;
806 + #size-cells = <0>;
807 + spi-max-frequency = <125000000>;
808 + };
809 +};
810 +
811 +&i2c0 {
812 + pinctrl-names = "default";
813 + pinctrl-0 = <&i2c0_pins>;
814 + clock-frequency = <100000>;
815 +};
816 +
817 +&i2c1 {
818 + pinctrl-names = "default";
819 + pinctrl-0 = <&i2c1_pins>;
820 + clock-frequency = <100000>;
821 +};
822 +
823 +&i2c2 {
824 + clock-frequency = <100000>;
825 +};
826 +
827 +&i2s {
828 + pinctrl-names = "default";
829 + pinctrl-0 = <&i2s_pins>;
830 +};
831 +
832 +&leds {
833 + act_led: act {
834 + label = "led0";
835 + linux,default-trigger = "mmc0";
836 + gpios = <&gpio 47 0>;
837 + };
838 +
839 + pwr_led: pwr {
840 + label = "led1";
841 + linux,default-trigger = "input";
842 + gpios = <&gpio 35 0>;
843 + };
844 +};
845 +
846 +&hdmi {
847 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
848 +};
849 +
850 +&audio {
851 + pinctrl-names = "default";
852 + pinctrl-0 = <&audio_pins>;
853 +};
854 +
855 +/ {
856 + __overrides__ {
857 + act_led_gpio = <&act_led>,"gpios:4";
858 + act_led_activelow = <&act_led>,"gpios:8";
859 + act_led_trigger = <&act_led>,"linux,default-trigger";
860 +
861 + pwr_led_gpio = <&pwr_led>,"gpios:4";
862 + pwr_led_activelow = <&pwr_led>,"gpios:8";
863 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
864 + };
865 +};
866 --- /dev/null
867 +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
868 @@ -0,0 +1,112 @@
869 +/dts-v1/;
870 +
871 +#include "bcm2708.dtsi"
872 +#include "bcm283x-rpi-smsc9512.dtsi"
873 +
874 +/ {
875 + model = "Raspberry Pi Model B";
876 +};
877 +
878 +&gpio {
879 + spi0_pins: spi0_pins {
880 + brcm,pins = <9 10 11>;
881 + brcm,function = <4>; /* alt0 */
882 + };
883 +
884 + spi0_cs_pins: spi0_cs_pins {
885 + brcm,pins = <8 7>;
886 + brcm,function = <1>; /* output */
887 + };
888 +
889 + i2c0_pins: i2c0 {
890 + brcm,pins = <0 1>;
891 + brcm,function = <4>;
892 + };
893 +
894 + i2c1_pins: i2c1 {
895 + brcm,pins = <2 3>;
896 + brcm,function = <4>;
897 + };
898 +
899 + i2s_pins: i2s {
900 + brcm,pins = <28 29 30 31>;
901 + brcm,function = <6>; /* alt2 */
902 + };
903 +
904 + audio_pins: audio_pins {
905 + brcm,pins = <40 45>;
906 + brcm,function = <4>;
907 + };
908 +};
909 +
910 +&uart0 {
911 + status = "okay";
912 +};
913 +
914 +&spi0 {
915 + pinctrl-names = "default";
916 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
917 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
918 +
919 + spidev0: spidev@0{
920 + compatible = "spidev";
921 + reg = <0>; /* CE0 */
922 + #address-cells = <1>;
923 + #size-cells = <0>;
924 + spi-max-frequency = <125000000>;
925 + };
926 +
927 + spidev1: spidev@1{
928 + compatible = "spidev";
929 + reg = <1>; /* CE1 */
930 + #address-cells = <1>;
931 + #size-cells = <0>;
932 + spi-max-frequency = <125000000>;
933 + };
934 +};
935 +
936 +&i2c0 {
937 + pinctrl-names = "default";
938 + pinctrl-0 = <&i2c0_pins>;
939 + clock-frequency = <100000>;
940 +};
941 +
942 +&i2c1 {
943 + pinctrl-names = "default";
944 + pinctrl-0 = <&i2c1_pins>;
945 + clock-frequency = <100000>;
946 +};
947 +
948 +&i2c2 {
949 + clock-frequency = <100000>;
950 +};
951 +
952 +&i2s {
953 + pinctrl-names = "default";
954 + pinctrl-0 = <&i2s_pins>;
955 +};
956 +
957 +&leds {
958 + act_led: act {
959 + label = "led0";
960 + linux,default-trigger = "mmc0";
961 + gpios = <&gpio 16 1>;
962 + };
963 +};
964 +
965 +&hdmi {
966 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
967 +};
968 +
969 +&audio {
970 + pinctrl-names = "default";
971 + pinctrl-0 = <&audio_pins>;
972 +};
973 +
974 +/ {
975 + __overrides__ {
976 + act_led_gpio = <&act_led>,"gpios:4";
977 + act_led_activelow = <&act_led>,"gpios:8";
978 + act_led_trigger = <&act_led>,"linux,default-trigger";
979 + };
980 +};
981 --- /dev/null
982 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
983 @@ -0,0 +1,95 @@
984 +/dts-v1/;
985 +
986 +#include "bcm2708-rpi-cm.dtsi"
987 +
988 +/ {
989 + model = "Raspberry Pi Compute Module";
990 +};
991 +
992 +&uart0 {
993 + status = "okay";
994 +};
995 +
996 +&gpio {
997 + spi0_pins: spi0_pins {
998 + brcm,pins = <9 10 11>;
999 + brcm,function = <4>; /* alt0 */
1000 + };
1001 +
1002 + spi0_cs_pins: spi0_cs_pins {
1003 + brcm,pins = <8 7>;
1004 + brcm,function = <1>; /* output */
1005 + };
1006 +
1007 + i2c0_pins: i2c0 {
1008 + brcm,pins = <0 1>;
1009 + brcm,function = <4>;
1010 + };
1011 +
1012 + i2c1_pins: i2c1 {
1013 + brcm,pins = <2 3>;
1014 + brcm,function = <4>;
1015 + };
1016 +
1017 + i2s_pins: i2s {
1018 + brcm,pins = <18 19 20 21>;
1019 + brcm,function = <4>; /* alt0 */
1020 + };
1021 +
1022 + audio_pins: audio_pins {
1023 + brcm,pins;
1024 + brcm,function;
1025 + };
1026 +};
1027 +
1028 +&spi0 {
1029 + pinctrl-names = "default";
1030 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1031 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1032 +
1033 + spidev0: spidev@0{
1034 + compatible = "spidev";
1035 + reg = <0>; /* CE0 */
1036 + #address-cells = <1>;
1037 + #size-cells = <0>;
1038 + spi-max-frequency = <125000000>;
1039 + };
1040 +
1041 + spidev1: spidev@1{
1042 + compatible = "spidev";
1043 + reg = <1>; /* CE1 */
1044 + #address-cells = <1>;
1045 + #size-cells = <0>;
1046 + spi-max-frequency = <125000000>;
1047 + };
1048 +};
1049 +
1050 +&i2c0 {
1051 + pinctrl-names = "default";
1052 + pinctrl-0 = <&i2c0_pins>;
1053 + clock-frequency = <100000>;
1054 +};
1055 +
1056 +&i2c1 {
1057 + pinctrl-names = "default";
1058 + pinctrl-0 = <&i2c1_pins>;
1059 + clock-frequency = <100000>;
1060 +};
1061 +
1062 +&i2c2 {
1063 + clock-frequency = <100000>;
1064 +};
1065 +
1066 +&i2s {
1067 + pinctrl-names = "default";
1068 + pinctrl-0 = <&i2s_pins>;
1069 +};
1070 +
1071 +&audio {
1072 + pinctrl-names = "default";
1073 + pinctrl-0 = <&audio_pins>;
1074 +};
1075 +
1076 +&hdmi {
1077 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1078 +};
1079 --- /dev/null
1080 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1081 @@ -0,0 +1,17 @@
1082 +#include "bcm2708.dtsi"
1083 +
1084 +&leds {
1085 + act_led: act {
1086 + label = "led0";
1087 + linux,default-trigger = "mmc0";
1088 + gpios = <&gpio 47 0>;
1089 + };
1090 +};
1091 +
1092 +/ {
1093 + __overrides__ {
1094 + act_led_gpio = <&act_led>,"gpios:4";
1095 + act_led_activelow = <&act_led>,"gpios:8";
1096 + act_led_trigger = <&act_led>,"linux,default-trigger";
1097 + };
1098 +};
1099 --- /dev/null
1100 +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1101 @@ -0,0 +1,159 @@
1102 +/* Downstream version of bcm2835-rpi.dtsi */
1103 +
1104 +#include <dt-bindings/power/raspberrypi-power.h>
1105 +
1106 +/ {
1107 + memory {
1108 + device_type = "memory";
1109 + reg = <0x0 0x0>;
1110 + };
1111 +
1112 + aliases {
1113 + audio = &audio;
1114 + aux = &aux;
1115 + sound = &sound;
1116 + soc = &soc;
1117 + dma = &dma;
1118 + intc = &intc;
1119 + watchdog = &watchdog;
1120 + random = &random;
1121 + mailbox = &mailbox;
1122 + gpio = &gpio;
1123 + uart0 = &uart0;
1124 + sdhost = &sdhost;
1125 + mmc0 = &sdhost;
1126 + i2s = &i2s;
1127 + spi0 = &spi0;
1128 + i2c0 = &i2c0;
1129 + uart1 = &uart1;
1130 + spi1 = &spi1;
1131 + spi2 = &spi2;
1132 + mmc = &mmc;
1133 + mmc1 = &mmc;
1134 + i2c1 = &i2c1;
1135 + i2c2 = &i2c2;
1136 + usb = &usb;
1137 + leds = &leds;
1138 + fb = &fb;
1139 + thermal = &thermal;
1140 + axiperf = &axiperf;
1141 + };
1142 +
1143 + leds: leds {
1144 + compatible = "gpio-leds";
1145 + };
1146 +
1147 + soc {
1148 + gpiomem {
1149 + compatible = "brcm,bcm2835-gpiomem";
1150 + reg = <0x7e200000 0x1000>;
1151 + };
1152 +
1153 + firmware: firmware {
1154 + compatible = "raspberrypi,bcm2835-firmware";
1155 + mboxes = <&mailbox>;
1156 + };
1157 +
1158 + power: power {
1159 + compatible = "raspberrypi,bcm2835-power";
1160 + firmware = <&firmware>;
1161 + #power-domain-cells = <1>;
1162 + };
1163 +
1164 + fb: fb {
1165 + compatible = "brcm,bcm2708-fb";
1166 + firmware = <&firmware>;
1167 + status = "disabled";
1168 + };
1169 +
1170 + mailbox@7e00b840 {
1171 + compatible = "brcm,bcm2835-vchiq";
1172 + reg = <0x7e00b840 0x3c>;
1173 + interrupts = <0 2>;
1174 + };
1175 +
1176 + vcsm: vcsm {
1177 + compatible = "raspberrypi,bcm2835-vcsm";
1178 + firmware = <&firmware>;
1179 + status = "okay";
1180 + };
1181 +
1182 + /* Onboard audio */
1183 + audio: audio {
1184 + compatible = "brcm,bcm2835-audio";
1185 + brcm,pwm-channels = <8>;
1186 + status = "disabled";
1187 + };
1188 +
1189 + /* External sound card */
1190 + sound: sound {
1191 + status = "disabled";
1192 + };
1193 + };
1194 +
1195 + __overrides__ {
1196 + cache_line_size;
1197 +
1198 + uart0 = <&uart0>,"status";
1199 + uart1 = <&uart1>,"status";
1200 + i2s = <&i2s>,"status";
1201 + spi = <&spi0>,"status";
1202 + i2c0 = <&i2c0>,"status";
1203 + i2c1 = <&i2c1>,"status";
1204 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
1205 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
1206 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
1207 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
1208 +
1209 + audio = <&audio>,"status";
1210 + watchdog = <&watchdog>,"status";
1211 + random = <&random>,"status";
1212 + sd_overclock = <&sdhost>,"brcm,overclock-50:0";
1213 + sd_force_pio = <&sdhost>,"brcm,force-pio?";
1214 + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
1215 + sd_debug = <&sdhost>,"brcm,debug";
1216 + sdio_overclock = <&mmc>,"brcm,overclock-50:0";
1217 + axiperf = <&axiperf>,"status";
1218 + };
1219 +};
1220 +
1221 +&dma {
1222 + brcm,dma-channel-mask = <0x7f34>;
1223 +};
1224 +
1225 +&hdmi {
1226 + power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
1227 +};
1228 +
1229 +&usb {
1230 + power-domains = <&power RPI_POWER_DOMAIN_USB>;
1231 +};
1232 +
1233 +&clocks {
1234 + firmware = <&firmware>;
1235 +};
1236 +
1237 +sdhost_pins: &sdhost_gpio48 {
1238 + /* Add alias */
1239 +};
1240 +
1241 +&sdhost {
1242 + pinctrl-names = "default";
1243 + pinctrl-0 = <&sdhost_gpio48>;
1244 + bus-width = <4>;
1245 + brcm,overclock-50 = <0>;
1246 + brcm,pio-limit = <1>;
1247 + status = "okay";
1248 +};
1249 +
1250 +&fb {
1251 + status = "okay";
1252 +};
1253 +
1254 +&cpu_thermal {
1255 + /delete-node/ trips;
1256 +};
1257 +
1258 +&vec {
1259 + status = "disabled";
1260 +};
1261 --- /dev/null
1262 +++ b/arch/arm/boot/dts/bcm2708.dtsi
1263 @@ -0,0 +1,11 @@
1264 +#include "bcm2835.dtsi"
1265 +#include "bcm270x.dtsi"
1266 +#include "bcm2708-rpi.dtsi"
1267 +
1268 +/ {
1269 + /delete-node/ cpus;
1270 +
1271 + __overrides__ {
1272 + arm_freq;
1273 + };
1274 +};
1275 --- /dev/null
1276 +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1277 @@ -0,0 +1,123 @@
1278 +/dts-v1/;
1279 +
1280 +#include "bcm2709.dtsi"
1281 +#include "bcm283x-rpi-smsc9514.dtsi"
1282 +
1283 +/ {
1284 + compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
1285 + model = "Raspberry Pi 2 Model B";
1286 +};
1287 +
1288 +&gpio {
1289 + spi0_pins: spi0_pins {
1290 + brcm,pins = <9 10 11>;
1291 + brcm,function = <4>; /* alt0 */
1292 + };
1293 +
1294 + spi0_cs_pins: spi0_cs_pins {
1295 + brcm,pins = <8 7>;
1296 + brcm,function = <1>; /* output */
1297 + };
1298 +
1299 + i2c0_pins: i2c0 {
1300 + brcm,pins = <0 1>;
1301 + brcm,function = <4>;
1302 + };
1303 +
1304 + i2c1_pins: i2c1 {
1305 + brcm,pins = <2 3>;
1306 + brcm,function = <4>;
1307 + };
1308 +
1309 + i2s_pins: i2s {
1310 + brcm,pins = <18 19 20 21>;
1311 + brcm,function = <4>; /* alt0 */
1312 + };
1313 +
1314 + audio_pins: audio_pins {
1315 + brcm,pins = <40 45>;
1316 + brcm,function = <4>;
1317 + };
1318 +};
1319 +
1320 +&uart0 {
1321 + status = "okay";
1322 +};
1323 +
1324 +&spi0 {
1325 + pinctrl-names = "default";
1326 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1327 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1328 +
1329 + spidev0: spidev@0{
1330 + compatible = "spidev";
1331 + reg = <0>; /* CE0 */
1332 + #address-cells = <1>;
1333 + #size-cells = <0>;
1334 + spi-max-frequency = <125000000>;
1335 + };
1336 +
1337 + spidev1: spidev@1{
1338 + compatible = "spidev";
1339 + reg = <1>; /* CE1 */
1340 + #address-cells = <1>;
1341 + #size-cells = <0>;
1342 + spi-max-frequency = <125000000>;
1343 + };
1344 +};
1345 +
1346 +&i2c0 {
1347 + pinctrl-names = "default";
1348 + pinctrl-0 = <&i2c0_pins>;
1349 + clock-frequency = <100000>;
1350 +};
1351 +
1352 +&i2c1 {
1353 + pinctrl-names = "default";
1354 + pinctrl-0 = <&i2c1_pins>;
1355 + clock-frequency = <100000>;
1356 +};
1357 +
1358 +&i2c2 {
1359 + clock-frequency = <100000>;
1360 +};
1361 +
1362 +&i2s {
1363 + pinctrl-names = "default";
1364 + pinctrl-0 = <&i2s_pins>;
1365 +};
1366 +
1367 +&leds {
1368 + act_led: act {
1369 + label = "led0";
1370 + linux,default-trigger = "mmc0";
1371 + gpios = <&gpio 47 0>;
1372 + };
1373 +
1374 + pwr_led: pwr {
1375 + label = "led1";
1376 + linux,default-trigger = "input";
1377 + gpios = <&gpio 35 0>;
1378 + };
1379 +};
1380 +
1381 +&hdmi {
1382 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1383 +};
1384 +
1385 +&audio {
1386 + pinctrl-names = "default";
1387 + pinctrl-0 = <&audio_pins>;
1388 +};
1389 +
1390 +/ {
1391 + __overrides__ {
1392 + act_led_gpio = <&act_led>,"gpios:4";
1393 + act_led_activelow = <&act_led>,"gpios:8";
1394 + act_led_trigger = <&act_led>,"linux,default-trigger";
1395 +
1396 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1397 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1398 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1399 + };
1400 +};
1401 --- /dev/null
1402 +++ b/arch/arm/boot/dts/bcm2709.dtsi
1403 @@ -0,0 +1,19 @@
1404 +#include "bcm2836.dtsi"
1405 +#include "bcm270x.dtsi"
1406 +#include "bcm2708-rpi.dtsi"
1407 +
1408 +/ {
1409 + soc {
1410 + ranges = <0x7e000000 0x3f000000 0x01000000>,
1411 + <0x40000000 0x40000000 0x00040000>;
1412 +
1413 + /delete-node/ timer@7e003000;
1414 + };
1415 +
1416 + __overrides__ {
1417 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
1418 + <&v7_cpu1>, "clock-frequency:0",
1419 + <&v7_cpu2>, "clock-frequency:0",
1420 + <&v7_cpu3>, "clock-frequency:0";
1421 + };
1422 +};
1423 --- /dev/null
1424 +++ b/arch/arm/boot/dts/bcm270x.dtsi
1425 @@ -0,0 +1,152 @@
1426 +/* Downstream bcm283x.dtsi diff */
1427 +#include <dt-bindings/power/raspberrypi-power.h>
1428 +
1429 +/ {
1430 + chosen {
1431 + bootargs = "";
1432 + /delete-property/ stdout-path;
1433 + };
1434 +
1435 + soc: soc {
1436 +
1437 + watchdog: watchdog@7e100000 {
1438 + /* Add alias */
1439 + };
1440 +
1441 + random: rng@7e104000 {
1442 + /* Add alias */
1443 + };
1444 +
1445 + gpio@7e200000 { /* gpio */
1446 + interrupts = <2 17>, <2 18>;
1447 + };
1448 +
1449 + serial@7e201000 { /* uart0 */
1450 + /* Enable CTS bug workaround */
1451 + cts-event-workaround;
1452 + };
1453 +
1454 + i2s@7e203000 { /* i2s */
1455 + #sound-dai-cells = <0>;
1456 + reg = <0x7e203000 0x24>;
1457 + clocks = <&clocks BCM2835_CLOCK_PCM>;
1458 + };
1459 +
1460 + spi0: spi@7e204000 {
1461 + /* Add alias */
1462 + dmas = <&dma 6>, <&dma 7>;
1463 + dma-names = "tx", "rx";
1464 + };
1465 +
1466 + pixelvalve0: pixelvalve@7e206000 {
1467 + /* Add alias */
1468 + status = "disabled";
1469 + };
1470 +
1471 + pixelvalve1: pixelvalve@7e207000 {
1472 + /* Add alias */
1473 + status = "disabled";
1474 + };
1475 +
1476 + dpi: dpi@7e208000 {
1477 + compatible = "brcm,bcm2835-dpi";
1478 + reg = <0x7e208000 0x8c>;
1479 + clocks = <&clocks BCM2835_CLOCK_VPU>,
1480 + <&clocks BCM2835_CLOCK_DPI>;
1481 + clock-names = "core", "pixel";
1482 + #address-cells = <1>;
1483 + #size-cells = <0>;
1484 + status = "disabled";
1485 + };
1486 +
1487 + /delete-node/ sdhci@7e300000;
1488 +
1489 + mmc: mmc@7e300000 {
1490 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
1491 + reg = <0x7e300000 0x100>;
1492 + interrupts = <2 30>;
1493 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
1494 + dmas = <&dma 11>;
1495 + dma-names = "rx-tx";
1496 + brcm,overclock-50 = <0>;
1497 + status = "disabled";
1498 + };
1499 +
1500 + hvs: hvs@7e400000 {
1501 + /* Add alias */
1502 + status = "disabled";
1503 + };
1504 +
1505 + firmwarekms: firmwarekms@7e600000 {
1506 + compatible = "raspberrypi,rpi-firmware-kms";
1507 + /* SMI interrupt reg */
1508 + reg = <0x7e600000 0x100>;
1509 + interrupts = <2 16>;
1510 + brcm,firmware = <&firmware>;
1511 + status = "disabled";
1512 + };
1513 +
1514 + smi: smi@7e600000 {
1515 + compatible = "brcm,bcm2835-smi";
1516 + reg = <0x7e600000 0x100>;
1517 + interrupts = <2 16>;
1518 + clocks = <&clocks BCM2835_CLOCK_SMI>;
1519 + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
1520 + assigned-clock-rates = <125000000>;
1521 + dmas = <&dma 4>;
1522 + dma-names = "rx-tx";
1523 + status = "disabled";
1524 + };
1525 +
1526 + pixelvalve2: pixelvalve@7e807000 {
1527 + /* Add alias */
1528 + status = "disabled";
1529 + };
1530 +
1531 + hdmi@7e902000 { /* hdmi */
1532 + status = "disabled";
1533 + };
1534 +
1535 + usb@7e980000 { /* usb */
1536 + compatible = "brcm,bcm2708-usb";
1537 + reg = <0x7e980000 0x10000>,
1538 + <0x7e006000 0x1000>;
1539 + interrupts = <2 0>,
1540 + <1 9>;
1541 + };
1542 +
1543 + v3d@7ec00000 { /* vd3 */
1544 + compatible = "brcm,vc4-v3d";
1545 + power-domains = <&power RPI_POWER_DOMAIN_V3D>;
1546 + status = "disabled";
1547 + };
1548 +
1549 + axiperf: axiperf {
1550 + compatible = "brcm,bcm2835-axiperf";
1551 + reg = <0x7e009800 0x100>,
1552 + <0x7ee08000 0x100>;
1553 + firmware = <&firmware>;
1554 + status = "disabled";
1555 + };
1556 + };
1557 +
1558 + vdd_5v0_reg: fixedregulator_5v0 {
1559 + compatible = "regulator-fixed";
1560 + regulator-name = "5v0";
1561 + regulator-min-microvolt = <5000000>;
1562 + regulator-max-microvolt = <5000000>;
1563 + regulator-always-on;
1564 + };
1565 +
1566 + vdd_3v3_reg: fixedregulator_3v3 {
1567 + compatible = "regulator-fixed";
1568 + regulator-name = "3v3";
1569 + regulator-min-microvolt = <3300000>;
1570 + regulator-max-microvolt = <3300000>;
1571 + regulator-always-on;
1572 + };
1573 +};
1574 +
1575 +&vc4 {
1576 + status = "disabled";
1577 +};
1578 --- /dev/null
1579 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
1580 @@ -0,0 +1,183 @@
1581 +/dts-v1/;
1582 +
1583 +#include "bcm2710.dtsi"
1584 +#include "bcm283x-rpi-lan7515.dtsi"
1585 +
1586 +/ {
1587 + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
1588 + model = "Raspberry Pi 3 Model B+";
1589 +
1590 + chosen {
1591 + bootargs = "8250.nr_uarts=1";
1592 + };
1593 +
1594 + aliases {
1595 + serial0 = &uart1;
1596 + serial1 = &uart0;
1597 + };
1598 +};
1599 +
1600 +&gpio {
1601 + spi0_pins: spi0_pins {
1602 + brcm,pins = <9 10 11>;
1603 + brcm,function = <4>; /* alt0 */
1604 + };
1605 +
1606 + spi0_cs_pins: spi0_cs_pins {
1607 + brcm,pins = <8 7>;
1608 + brcm,function = <1>; /* output */
1609 + };
1610 +
1611 + i2c0_pins: i2c0 {
1612 + brcm,pins = <0 1>;
1613 + brcm,function = <4>;
1614 + };
1615 +
1616 + i2c1_pins: i2c1 {
1617 + brcm,pins = <2 3>;
1618 + brcm,function = <4>;
1619 + };
1620 +
1621 + i2s_pins: i2s {
1622 + brcm,pins = <18 19 20 21>;
1623 + brcm,function = <4>; /* alt0 */
1624 + };
1625 +
1626 + sdio_pins: sdio_pins {
1627 + brcm,pins = <34 35 36 37 38 39>;
1628 + brcm,function = <7>; // alt3 = SD1
1629 + brcm,pull = <0 2 2 2 2 2>;
1630 + };
1631 +
1632 + bt_pins: bt_pins {
1633 + brcm,pins = <43>;
1634 + brcm,function = <4>; /* alt0:GPCLK2 */
1635 + brcm,pull = <0>;
1636 + };
1637 +
1638 + uart0_pins: uart0_pins {
1639 + brcm,pins = <32 33>;
1640 + brcm,function = <7>; /* alt3=UART0 */
1641 + brcm,pull = <0 2>;
1642 + };
1643 +
1644 + uart1_pins: uart1_pins {
1645 + brcm,pins;
1646 + brcm,function;
1647 + brcm,pull;
1648 + };
1649 +
1650 + audio_pins: audio_pins {
1651 + brcm,pins = <40 41>;
1652 + brcm,function = <4>;
1653 + };
1654 +};
1655 +
1656 +&mmc {
1657 + pinctrl-names = "default";
1658 + pinctrl-0 = <&sdio_pins>;
1659 + non-removable;
1660 + bus-width = <4>;
1661 + status = "okay";
1662 + brcm,overclock-50 = <0>;
1663 +};
1664 +
1665 +&soc {
1666 + expgpio: expgpio {
1667 + compatible = "brcm,bcm2835-expgpio";
1668 + gpio-controller;
1669 + #gpio-cells = <2>;
1670 + firmware = <&firmware>;
1671 + status = "okay";
1672 + };
1673 +};
1674 +
1675 +&uart0 {
1676 + pinctrl-names = "default";
1677 + pinctrl-0 = <&uart0_pins &bt_pins>;
1678 + status = "okay";
1679 +};
1680 +
1681 +&uart1 {
1682 + pinctrl-names = "default";
1683 + pinctrl-0 = <&uart1_pins>;
1684 + status = "okay";
1685 +};
1686 +
1687 +&spi0 {
1688 + pinctrl-names = "default";
1689 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1690 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1691 +
1692 + spidev0: spidev@0{
1693 + compatible = "spidev";
1694 + reg = <0>; /* CE0 */
1695 + #address-cells = <1>;
1696 + #size-cells = <0>;
1697 + spi-max-frequency = <125000000>;
1698 + };
1699 +
1700 + spidev1: spidev@1{
1701 + compatible = "spidev";
1702 + reg = <1>; /* CE1 */
1703 + #address-cells = <1>;
1704 + #size-cells = <0>;
1705 + spi-max-frequency = <125000000>;
1706 + };
1707 +};
1708 +
1709 +&i2c0 {
1710 + pinctrl-names = "default";
1711 + pinctrl-0 = <&i2c0_pins>;
1712 + clock-frequency = <100000>;
1713 +};
1714 +
1715 +&i2c1 {
1716 + pinctrl-names = "default";
1717 + pinctrl-0 = <&i2c1_pins>;
1718 + clock-frequency = <100000>;
1719 +};
1720 +
1721 +&i2c2 {
1722 + clock-frequency = <100000>;
1723 +};
1724 +
1725 +&i2s {
1726 + pinctrl-names = "default";
1727 + pinctrl-0 = <&i2s_pins>;
1728 +};
1729 +
1730 +&leds {
1731 + act_led: act {
1732 + label = "led0";
1733 + linux,default-trigger = "mmc0";
1734 + gpios = <&gpio 29 0>;
1735 + };
1736 +
1737 + pwr_led: pwr {
1738 + label = "led1";
1739 + linux,default-trigger = "default-on";
1740 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
1741 + };
1742 +};
1743 +
1744 +&hdmi {
1745 + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
1746 +};
1747 +
1748 +&audio {
1749 + pinctrl-names = "default";
1750 + pinctrl-0 = <&audio_pins>;
1751 +};
1752 +
1753 +/ {
1754 + __overrides__ {
1755 + act_led_gpio = <&act_led>,"gpios:4";
1756 + act_led_activelow = <&act_led>,"gpios:8";
1757 + act_led_trigger = <&act_led>,"linux,default-trigger";
1758 +
1759 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1760 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1761 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1762 + };
1763 +};
1764 --- /dev/null
1765 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
1766 @@ -0,0 +1,191 @@
1767 +/dts-v1/;
1768 +
1769 +#include "bcm2710.dtsi"
1770 +#include "bcm283x-rpi-smsc9514.dtsi"
1771 +
1772 +/ {
1773 + compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
1774 + model = "Raspberry Pi 3 Model B";
1775 +
1776 + chosen {
1777 + bootargs = "8250.nr_uarts=1";
1778 + };
1779 +
1780 + aliases {
1781 + serial0 = &uart1;
1782 + serial1 = &uart0;
1783 + };
1784 +};
1785 +
1786 +&gpio {
1787 + spi0_pins: spi0_pins {
1788 + brcm,pins = <9 10 11>;
1789 + brcm,function = <4>; /* alt0 */
1790 + };
1791 +
1792 + spi0_cs_pins: spi0_cs_pins {
1793 + brcm,pins = <8 7>;
1794 + brcm,function = <1>; /* output */
1795 + };
1796 +
1797 + i2c0_pins: i2c0 {
1798 + brcm,pins = <0 1>;
1799 + brcm,function = <4>;
1800 + };
1801 +
1802 + i2c1_pins: i2c1 {
1803 + brcm,pins = <2 3>;
1804 + brcm,function = <4>;
1805 + };
1806 +
1807 + i2s_pins: i2s {
1808 + brcm,pins = <18 19 20 21>;
1809 + brcm,function = <4>; /* alt0 */
1810 + };
1811 +
1812 + sdio_pins: sdio_pins {
1813 + brcm,pins = <34 35 36 37 38 39>;
1814 + brcm,function = <7>; // alt3 = SD1
1815 + brcm,pull = <0 2 2 2 2 2>;
1816 + };
1817 +
1818 + bt_pins: bt_pins {
1819 + brcm,pins = <43>;
1820 + brcm,function = <4>; /* alt0:GPCLK2 */
1821 + brcm,pull = <0>;
1822 + };
1823 +
1824 + uart0_pins: uart0_pins {
1825 + brcm,pins = <32 33>;
1826 + brcm,function = <7>; /* alt3=UART0 */
1827 + brcm,pull = <0 2>;
1828 + };
1829 +
1830 + uart1_pins: uart1_pins {
1831 + brcm,pins;
1832 + brcm,function;
1833 + brcm,pull;
1834 + };
1835 +
1836 + audio_pins: audio_pins {
1837 + brcm,pins = <40 41>;
1838 + brcm,function = <4>;
1839 + };
1840 +};
1841 +
1842 +&mmc {
1843 + pinctrl-names = "default";
1844 + pinctrl-0 = <&sdio_pins>;
1845 + non-removable;
1846 + bus-width = <4>;
1847 + status = "okay";
1848 + brcm,overclock-50 = <0>;
1849 +};
1850 +
1851 +&soc {
1852 + virtgpio: virtgpio {
1853 + compatible = "brcm,bcm2835-virtgpio";
1854 + gpio-controller;
1855 + #gpio-cells = <2>;
1856 + firmware = <&firmware>;
1857 + status = "okay";
1858 + };
1859 +
1860 + expgpio: expgpio {
1861 + compatible = "brcm,bcm2835-expgpio";
1862 + gpio-controller;
1863 + #gpio-cells = <2>;
1864 + firmware = <&firmware>;
1865 + status = "okay";
1866 + };
1867 +};
1868 +
1869 +&uart0 {
1870 + pinctrl-names = "default";
1871 + pinctrl-0 = <&uart0_pins &bt_pins>;
1872 + status = "okay";
1873 +};
1874 +
1875 +&uart1 {
1876 + pinctrl-names = "default";
1877 + pinctrl-0 = <&uart1_pins>;
1878 + status = "okay";
1879 +};
1880 +
1881 +&spi0 {
1882 + pinctrl-names = "default";
1883 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1884 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1885 +
1886 + spidev0: spidev@0{
1887 + compatible = "spidev";
1888 + reg = <0>; /* CE0 */
1889 + #address-cells = <1>;
1890 + #size-cells = <0>;
1891 + spi-max-frequency = <125000000>;
1892 + };
1893 +
1894 + spidev1: spidev@1{
1895 + compatible = "spidev";
1896 + reg = <1>; /* CE1 */
1897 + #address-cells = <1>;
1898 + #size-cells = <0>;
1899 + spi-max-frequency = <125000000>;
1900 + };
1901 +};
1902 +
1903 +&i2c0 {
1904 + pinctrl-names = "default";
1905 + pinctrl-0 = <&i2c0_pins>;
1906 + clock-frequency = <100000>;
1907 +};
1908 +
1909 +&i2c1 {
1910 + pinctrl-names = "default";
1911 + pinctrl-0 = <&i2c1_pins>;
1912 + clock-frequency = <100000>;
1913 +};
1914 +
1915 +&i2c2 {
1916 + clock-frequency = <100000>;
1917 +};
1918 +
1919 +&i2s {
1920 + pinctrl-names = "default";
1921 + pinctrl-0 = <&i2s_pins>;
1922 +};
1923 +
1924 +&leds {
1925 + act_led: act {
1926 + label = "led0";
1927 + linux,default-trigger = "mmc0";
1928 + gpios = <&virtgpio 0 0>;
1929 + };
1930 +
1931 + pwr_led: pwr {
1932 + label = "led1";
1933 + linux,default-trigger = "input";
1934 + gpios = <&expgpio 7 0>;
1935 + };
1936 +};
1937 +
1938 +&hdmi {
1939 + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
1940 +};
1941 +
1942 +&audio {
1943 + pinctrl-names = "default";
1944 + pinctrl-0 = <&audio_pins>;
1945 +};
1946 +
1947 +/ {
1948 + __overrides__ {
1949 + act_led_gpio = <&act_led>,"gpios:4";
1950 + act_led_activelow = <&act_led>,"gpios:8";
1951 + act_led_trigger = <&act_led>,"linux,default-trigger";
1952 +
1953 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1954 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1955 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1956 + };
1957 +};
1958 --- /dev/null
1959 +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
1960 @@ -0,0 +1,129 @@
1961 +/dts-v1/;
1962 +
1963 +#include "bcm2710.dtsi"
1964 +
1965 +/ {
1966 + model = "Raspberry Pi Compute Module 3";
1967 +};
1968 +
1969 +&uart0 {
1970 + status = "okay";
1971 +};
1972 +
1973 +&gpio {
1974 + spi0_pins: spi0_pins {
1975 + brcm,pins = <9 10 11>;
1976 + brcm,function = <4>; /* alt0 */
1977 + };
1978 +
1979 + spi0_cs_pins: spi0_cs_pins {
1980 + brcm,pins = <8 7>;
1981 + brcm,function = <1>; /* output */
1982 + };
1983 +
1984 + i2c0_pins: i2c0 {
1985 + brcm,pins = <0 1>;
1986 + brcm,function = <4>;
1987 + };
1988 +
1989 + i2c1_pins: i2c1 {
1990 + brcm,pins = <2 3>;
1991 + brcm,function = <4>;
1992 + };
1993 +
1994 + i2s_pins: i2s {
1995 + brcm,pins = <18 19 20 21>;
1996 + brcm,function = <4>; /* alt0 */
1997 + };
1998 +
1999 + audio_pins: audio_pins {
2000 + brcm,pins;
2001 + brcm,function;
2002 + };
2003 +};
2004 +
2005 +&soc {
2006 + virtgpio: virtgpio {
2007 + compatible = "brcm,bcm2835-virtgpio";
2008 + gpio-controller;
2009 + #gpio-cells = <2>;
2010 + firmware = <&firmware>;
2011 + status = "okay";
2012 + };
2013 +
2014 + expgpio: expgpio {
2015 + compatible = "brcm,bcm2835-expgpio";
2016 + gpio-controller;
2017 + #gpio-cells = <2>;
2018 + firmware = <&firmware>;
2019 + status = "okay";
2020 + };
2021 +};
2022 +
2023 +&spi0 {
2024 + pinctrl-names = "default";
2025 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2026 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2027 +
2028 + spidev0: spidev@0{
2029 + compatible = "spidev";
2030 + reg = <0>; /* CE0 */
2031 + #address-cells = <1>;
2032 + #size-cells = <0>;
2033 + spi-max-frequency = <125000000>;
2034 + };
2035 +
2036 + spidev1: spidev@1{
2037 + compatible = "spidev";
2038 + reg = <1>; /* CE1 */
2039 + #address-cells = <1>;
2040 + #size-cells = <0>;
2041 + spi-max-frequency = <125000000>;
2042 + };
2043 +};
2044 +
2045 +&i2c0 {
2046 + pinctrl-names = "default";
2047 + pinctrl-0 = <&i2c0_pins>;
2048 + clock-frequency = <100000>;
2049 +};
2050 +
2051 +&i2c1 {
2052 + pinctrl-names = "default";
2053 + pinctrl-0 = <&i2c1_pins>;
2054 + clock-frequency = <100000>;
2055 +};
2056 +
2057 +&i2c2 {
2058 + clock-frequency = <100000>;
2059 +};
2060 +
2061 +&i2s {
2062 + pinctrl-names = "default";
2063 + pinctrl-0 = <&i2s_pins>;
2064 +};
2065 +
2066 +&leds {
2067 + act_led: act {
2068 + label = "led0";
2069 + linux,default-trigger = "mmc0";
2070 + gpios = <&virtgpio 0 0>;
2071 + };
2072 +};
2073 +
2074 +&hdmi {
2075 + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
2076 +};
2077 +
2078 +&audio {
2079 + pinctrl-names = "default";
2080 + pinctrl-0 = <&audio_pins>;
2081 +};
2082 +
2083 +/ {
2084 + __overrides__ {
2085 + act_led_gpio = <&act_led>,"gpios:4";
2086 + act_led_activelow = <&act_led>,"gpios:8";
2087 + act_led_trigger = <&act_led>,"linux,default-trigger";
2088 + };
2089 +};
2090 --- /dev/null
2091 +++ b/arch/arm/boot/dts/bcm2710.dtsi
2092 @@ -0,0 +1,29 @@
2093 +#include "bcm2837.dtsi"
2094 +#include "bcm270x.dtsi"
2095 +#include "bcm2708-rpi.dtsi"
2096 +
2097 +/ {
2098 + compatible = "brcm,bcm2837", "brcm,bcm2836";
2099 +
2100 + soc {
2101 +
2102 + arm-pmu {
2103 +#ifdef RPI364
2104 + compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
2105 +#else
2106 + compatible = "arm,cortex-a7-pmu";
2107 +#endif
2108 + interrupt-parent = <&local_intc>;
2109 + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
2110 + };
2111 +
2112 + /delete-node/ timer@7e003000;
2113 + };
2114 +
2115 + __overrides__ {
2116 + arm_freq = <&cpu0>, "clock-frequency:0",
2117 + <&cpu1>, "clock-frequency:0",
2118 + <&cpu2>, "clock-frequency:0",
2119 + <&cpu3>, "clock-frequency:0";
2120 + };
2121 +};
2122 --- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
2123 +++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
2124 @@ -21,7 +21,24 @@
2125 ethernet: ethernet@1 {
2126 compatible = "usb424,7800";
2127 reg = <1>;
2128 + microchip,eee-enabled;
2129 + microchip,tx-lpi-timer = <600>; /* non-aggressive*/
2130 + /*
2131 + * led0 = 1:link1000/activity
2132 + * led1 = 6:link10/100/activity
2133 + */
2134 + microchip,led-modes = <1 6>;
2135 };
2136 };
2137 };
2138 };
2139 +
2140 +
2141 +/ {
2142 + __overrides__ {
2143 + eee = <&ethernet>,"microchip,eee-enabled?";
2144 + tx_lpi_timer = <&ethernet>,"microchip,tx-lpi-timer:0";
2145 + eth_led0 = <&ethernet>,"microchip,led-modes:0";
2146 + eth_led1 = <&ethernet>,"microchip,led-modes:4";
2147 + };
2148 +};
2149 --- /dev/null
2150 +++ b/arch/arm/boot/dts/overlays/Makefile
2151 @@ -0,0 +1,145 @@
2152 +# Overlays for the Raspberry Pi platform
2153 +
2154 +dtbo-$(CONFIG_ARCH_BCM2835) += \
2155 + adau1977-adc.dtbo \
2156 + adau7002-simple.dtbo \
2157 + ads1015.dtbo \
2158 + ads1115.dtbo \
2159 + ads7846.dtbo \
2160 + akkordion-iqdacplus.dtbo \
2161 + allo-boss-dac-pcm512x-audio.dtbo \
2162 + allo-digione.dtbo \
2163 + allo-katana-dac-audio.dtbo \
2164 + allo-piano-dac-pcm512x-audio.dtbo \
2165 + allo-piano-dac-plus-pcm512x-audio.dtbo \
2166 + applepi-dac.dtbo \
2167 + at86rf233.dtbo \
2168 + audioinjector-addons.dtbo \
2169 + audioinjector-wm8731-audio.dtbo \
2170 + audremap.dtbo \
2171 + balena-fin.dtbo \
2172 + bmp085_i2c-sensor.dtbo \
2173 + dht11.dtbo \
2174 + dionaudio-loco.dtbo \
2175 + dionaudio-loco-v2.dtbo \
2176 + dpi18.dtbo \
2177 + dpi24.dtbo \
2178 + dwc-otg.dtbo \
2179 + dwc2.dtbo \
2180 + enc28j60.dtbo \
2181 + enc28j60-spi2.dtbo \
2182 + exc3000.dtbo \
2183 + fe-pi-audio.dtbo \
2184 + goodix.dtbo \
2185 + googlevoicehat-soundcard.dtbo \
2186 + gpio-ir.dtbo \
2187 + gpio-ir-tx.dtbo \
2188 + gpio-key.dtbo \
2189 + gpio-no-irq.dtbo \
2190 + gpio-poweroff.dtbo \
2191 + gpio-shutdown.dtbo \
2192 + hifiberry-amp.dtbo \
2193 + hifiberry-dac.dtbo \
2194 + hifiberry-dacplus.dtbo \
2195 + hifiberry-digi.dtbo \
2196 + hifiberry-digi-pro.dtbo \
2197 + hy28a.dtbo \
2198 + hy28b.dtbo \
2199 + i2c-bcm2708.dtbo \
2200 + i2c-gpio.dtbo \
2201 + i2c-mux.dtbo \
2202 + i2c-pwm-pca9685a.dtbo \
2203 + i2c-rtc.dtbo \
2204 + i2c-rtc-gpio.dtbo \
2205 + i2c-sensor.dtbo \
2206 + i2c0-bcm2708.dtbo \
2207 + i2c1-bcm2708.dtbo \
2208 + i2s-gpio28-31.dtbo \
2209 + iqaudio-dac.dtbo \
2210 + iqaudio-dacplus.dtbo \
2211 + iqaudio-digi-wm8804-audio.dtbo \
2212 + jedec-spi-nor.dtbo \
2213 + justboom-dac.dtbo \
2214 + justboom-digi.dtbo \
2215 + lirc-rpi.dtbo \
2216 + ltc294x.dtbo \
2217 + mbed-dac.dtbo \
2218 + mcp23017.dtbo \
2219 + mcp23s17.dtbo \
2220 + mcp2515-can0.dtbo \
2221 + mcp2515-can1.dtbo \
2222 + mcp3008.dtbo \
2223 + mcp3202.dtbo \
2224 + media-center.dtbo \
2225 + midi-uart0.dtbo \
2226 + midi-uart1.dtbo \
2227 + mmc.dtbo \
2228 + mpu6050.dtbo \
2229 + mz61581.dtbo \
2230 + papirus.dtbo \
2231 + pi3-act-led.dtbo \
2232 + pi3-disable-bt.dtbo \
2233 + pi3-disable-wifi.dtbo \
2234 + pi3-miniuart-bt.dtbo \
2235 + pibell.dtbo \
2236 + piscreen.dtbo \
2237 + piscreen2r.dtbo \
2238 + pisound.dtbo \
2239 + pitft22.dtbo \
2240 + pitft28-capacitive.dtbo \
2241 + pitft28-resistive.dtbo \
2242 + pitft35-resistive.dtbo \
2243 + pps-gpio.dtbo \
2244 + pwm.dtbo \
2245 + pwm-2chan.dtbo \
2246 + pwm-ir-tx.dtbo \
2247 + qca7000.dtbo \
2248 + rotary-encoder.dtbo \
2249 + rpi-backlight.dtbo \
2250 + rpi-cirrus-wm5102.dtbo \
2251 + rpi-dac.dtbo \
2252 + rpi-display.dtbo \
2253 + rpi-ft5406.dtbo \
2254 + rpi-proto.dtbo \
2255 + rpi-sense.dtbo \
2256 + rpi-tv.dtbo \
2257 + rra-digidac1-wm8741-audio.dtbo \
2258 + sc16is750-i2c.dtbo \
2259 + sc16is752-i2c.dtbo \
2260 + sc16is752-spi1.dtbo \
2261 + sdhost.dtbo \
2262 + sdio.dtbo \
2263 + sdio-1bit.dtbo \
2264 + sdtweak.dtbo \
2265 + smi.dtbo \
2266 + smi-dev.dtbo \
2267 + smi-nand.dtbo \
2268 + spi-gpio35-39.dtbo \
2269 + spi-rtc.dtbo \
2270 + spi0-cs.dtbo \
2271 + spi0-hw-cs.dtbo \
2272 + spi1-1cs.dtbo \
2273 + spi1-2cs.dtbo \
2274 + spi1-3cs.dtbo \
2275 + spi2-1cs.dtbo \
2276 + spi2-2cs.dtbo \
2277 + spi2-3cs.dtbo \
2278 + superaudioboard.dtbo \
2279 + sx150x.dtbo \
2280 + tinylcd35.dtbo \
2281 + uart0.dtbo \
2282 + uart1.dtbo \
2283 + upstream.dtbo \
2284 + upstream-aux-interrupt.dtbo \
2285 + vc4-fkms-v3d.dtbo \
2286 + vc4-kms-v3d.dtbo \
2287 + vga666.dtbo \
2288 + w1-gpio.dtbo \
2289 + w1-gpio-pullup.dtbo \
2290 + wittypi.dtbo
2291 +
2292 +targets += dtbs dtbs_install
2293 +targets += $(dtbo-y)
2294 +
2295 +always := $(dtbo-y)
2296 +clean-files := *.dtbo
2297 --- /dev/null
2298 +++ b/arch/arm/boot/dts/overlays/README
2299 @@ -0,0 +1,1952 @@
2300 +Introduction
2301 +============
2302 +
2303 +This directory contains Device Tree overlays. Device Tree makes it possible
2304 +to support many hardware configurations with a single kernel and without the
2305 +need to explicitly load or blacklist kernel modules. Note that this isn't a
2306 +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
2307 +are still configured by the board support code, but the intention is to
2308 +eventually reach that goal.
2309 +
2310 +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
2311 +default, the Raspberry Pi kernel boots with device tree enabled. You can
2312 +completely disable DT usage (for now) by adding:
2313 +
2314 + device_tree=
2315 +
2316 +to your config.txt, which should cause your Pi to revert to the old way of
2317 +doing things after a reboot.
2318 +
2319 +In /boot you will find a .dtb for each base platform. This describes the
2320 +hardware that is part of the Raspberry Pi board. The loader (start.elf and its
2321 +siblings) selects the .dtb file appropriate for the platform by name, and reads
2322 +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
2323 +are disabled, but they can be enabled using Device Tree parameters:
2324 +
2325 + dtparam=i2c=on,i2s=on,spi=on
2326 +
2327 +However, this shouldn't be necessary in many use cases because loading an
2328 +overlay that requires one of those interfaces will cause it to be enabled
2329 +automatically, and it is advisable to only enable interfaces if they are
2330 +needed.
2331 +
2332 +Configuring additional, optional hardware is done using Device Tree overlays
2333 +(see below).
2334 +
2335 +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
2336 +not the physical pin numbers.
2337 +
2338 +raspi-config
2339 +============
2340 +
2341 +The Advanced Options section of the raspi-config utility can enable and disable
2342 +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
2343 +is possible to both enable an interface and blacklist the driver, if for some
2344 +reason you should want to defer the loading.
2345 +
2346 +Modules
2347 +=======
2348 +
2349 +As well as describing the hardware, Device Tree also gives enough information
2350 +to allow suitable driver modules to be located and loaded, with the corollary
2351 +that unneeded modules are not loaded. As a result it should be possible to
2352 +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
2353 +have its contents deleted (or commented out).
2354 +
2355 +Using Overlays
2356 +==============
2357 +
2358 +Overlays are loaded using the "dtoverlay" directive. As an example, consider
2359 +the popular lirc-rpi module, the Linux Infrared Remote Control driver. In the
2360 +pre-DT world this would be loaded from /etc/modules, with an explicit
2361 +"modprobe lirc-rpi" command, or programmatically by lircd. With DT enabled,
2362 +this becomes a line in config.txt:
2363 +
2364 + dtoverlay=lirc-rpi
2365 +
2366 +This causes the file /boot/overlays/lirc-rpi.dtbo to be loaded. By
2367 +default it will use GPIOs 17 (out) and 18 (in), but this can be modified using
2368 +DT parameters:
2369 +
2370 + dtoverlay=lirc-rpi,gpio_out_pin=17,gpio_in_pin=13
2371 +
2372 +Parameters always have default values, although in some cases (e.g. "w1-gpio")
2373 +it is necessary to provided multiple overlays in order to get the desired
2374 +behaviour. See the list of overlays below for a description of the parameters
2375 +and their defaults.
2376 +
2377 +The Overlay and Parameter Reference
2378 +===================================
2379 +
2380 +N.B. When editing this file, please preserve the indentation levels to make it
2381 +simple to parse programmatically. NO HARD TABS.
2382 +
2383 +
2384 +Name: <The base DTB>
2385 +Info: Configures the base Raspberry Pi hardware
2386 +Load: <loaded automatically>
2387 +Params:
2388 + audio Set to "on" to enable the onboard ALSA audio
2389 + interface (default "off")
2390 +
2391 + eee Enable Energy Efficient Ethernet support for
2392 + compatible devices (default "on"). See also
2393 + "tx_lpi_timer".
2394 +
2395 + eth_led0 Set mode of LED0 (usually orange) (default
2396 + "1"). The legal values are:
2397 + 0=link/activity 1=link1000/activity
2398 + 2=link100/activity 3=link10/activity
2399 + 4=link100/1000/activity 5=link10/1000/activity
2400 + 6=link10/100/activity 14=off 15=on
2401 +
2402 + eth_led1 Set mode of LED1 (usually green) (default
2403 + "6"). See eth_led0 for legal values.
2404 +
2405 + i2c_arm Set to "on" to enable the ARM's i2c interface
2406 + (default "off")
2407 +
2408 + i2c_vc Set to "on" to enable the i2c interface
2409 + usually reserved for the VideoCore processor
2410 + (default "off")
2411 +
2412 + i2c An alias for i2c_arm
2413 +
2414 + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
2415 + (default "100000")
2416 +
2417 + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
2418 + (default "100000")
2419 +
2420 + i2c_baudrate An alias for i2c_arm_baudrate
2421 +
2422 + i2s Set to "on" to enable the i2s interface
2423 + (default "off")
2424 +
2425 + spi Set to "on" to enable the spi interfaces
2426 + (default "off")
2427 +
2428 + random Set to "on" to enable the hardware random
2429 + number generator (default "on")
2430 +
2431 + sd_overclock Clock (in MHz) to use when the MMC framework
2432 + requests 50MHz
2433 +
2434 + sd_force_pio Disable DMA support for SD driver (default off)
2435 +
2436 + sd_pio_limit Number of blocks above which to use DMA for
2437 + SD card (default 1)
2438 +
2439 + sd_debug Enable debug output from SD driver (default off)
2440 +
2441 + sdio_overclock Clock (in MHz) to use when the MMC framework
2442 + requests 50MHz for the SDIO/WiFi interface.
2443 +
2444 + tx_lpi_timer Set the delay in microseconds between going idle
2445 + and entering the low power state (default 600).
2446 + Requires EEE to be enabled - see "eee".
2447 +
2448 + uart0 Set to "off" to disable uart0 (default "on")
2449 +
2450 + uart1 Set to "on" or "off" to enable or disable uart1
2451 + (default varies)
2452 +
2453 + watchdog Set to "on" to enable the hardware watchdog
2454 + (default "off")
2455 +
2456 + act_led_trigger Choose which activity the LED tracks.
2457 + Use "heartbeat" for a nice load indicator.
2458 + (default "mmc")
2459 +
2460 + act_led_activelow Set to "on" to invert the sense of the LED
2461 + (default "off")
2462 + N.B. For Pi3 see pi3-act-led overlay.
2463 +
2464 + act_led_gpio Set which GPIO to use for the activity LED
2465 + (in case you want to connect it to an external
2466 + device)
2467 + (default "16" on a non-Plus board, "47" on a
2468 + Plus or Pi 2)
2469 + N.B. For Pi3 see pi3-act-led overlay.
2470 +
2471 + pwr_led_trigger
2472 + pwr_led_activelow
2473 + pwr_led_gpio
2474 + As for act_led_*, but using the PWR LED.
2475 + Not available on Model A/B boards.
2476 +
2477 + N.B. It is recommended to only enable those interfaces that are needed.
2478 + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
2479 + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
2480 + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
2481 + interfaces i2c0 and i2c1. Use of the numeric variants is still possible
2482 + but deprecated because the ARM/VC assignments differ between board
2483 + revisions. The same board-specific mapping applies to i2c_baudrate,
2484 + and the other i2c baudrate parameters.
2485 +
2486 +
2487 +Name: adau1977-adc
2488 +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
2489 + and I2S for data.
2490 +Load: dtoverlay=adau1977-adc
2491 +Params: <None>
2492 +
2493 +
2494 +Name: adau7002-simple
2495 +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
2496 +Load: dtoverlay=adau7002-simple,<param>=<val>
2497 +Params: card-name Override the default, "adau7002", card name.
2498 +
2499 +
2500 +Name: ads1015
2501 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
2502 +Load: dtoverlay=ads1015,<param>=<val>
2503 +Params: addr I2C bus address of device. Set based on how the
2504 + addr pin is wired. (default=0x48 assumes addr
2505 + is pulled to GND)
2506 + cha_enable Enable virtual channel a. (default=true)
2507 + cha_cfg Set the configuration for virtual channel a.
2508 + (default=4 configures this channel for the
2509 + voltage at A0 with respect to GND)
2510 + cha_datarate Set the datarate (samples/sec) for this channel.
2511 + (default=4 sets 1600 sps)
2512 + cha_gain Set the gain of the Programmable Gain
2513 + Amplifier for this channel. (default=2 sets the
2514 + full scale of the channel to 2.048 Volts)
2515 +
2516 + Channel (ch) parameters can be set for each enabled channel.
2517 + A maximum of 4 channels can be enabled (letters a thru d).
2518 + For more information refer to the device datasheet at:
2519 + http://www.ti.com/lit/ds/symlink/ads1015.pdf
2520 +
2521 +
2522 +Name: ads1115
2523 +Info: Texas Instruments ADS1115 ADC
2524 +Load: dtoverlay=ads1115,<param>[=<val>]
2525 +Params: addr I2C bus address of device. Set based on how the
2526 + addr pin is wired. (default=0x48 assumes addr
2527 + is pulled to GND)
2528 + cha_enable Enable virtual channel a.
2529 + cha_cfg Set the configuration for virtual channel a.
2530 + (default=4 configures this channel for the
2531 + voltage at A0 with respect to GND)
2532 + cha_datarate Set the datarate (samples/sec) for this channel.
2533 + (default=7 sets 860 sps)
2534 + cha_gain Set the gain of the Programmable Gain
2535 + Amplifier for this channel. (Default 1 sets the
2536 + full scale of the channel to 4.096 Volts)
2537 +
2538 + Channel parameters can be set for each enabled channel.
2539 + A maximum of 4 channels can be enabled (letters a thru d).
2540 + For more information refer to the device datasheet at:
2541 + http://www.ti.com/lit/ds/symlink/ads1115.pdf
2542 +
2543 +
2544 +Name: ads7846
2545 +Info: ADS7846 Touch controller
2546 +Load: dtoverlay=ads7846,<param>=<val>
2547 +Params: cs SPI bus Chip Select (default 1)
2548 + speed SPI bus speed (default 2MHz, max 3.25MHz)
2549 + penirq GPIO used for PENIRQ. REQUIRED
2550 + penirq_pull Set GPIO pull (default 0=none, 2=pullup)
2551 + swapxy Swap x and y axis
2552 + xmin Minimum value on the X axis (default 0)
2553 + ymin Minimum value on the Y axis (default 0)
2554 + xmax Maximum value on the X axis (default 4095)
2555 + ymax Maximum value on the Y axis (default 4095)
2556 + pmin Minimum reported pressure value (default 0)
2557 + pmax Maximum reported pressure value (default 65535)
2558 + xohms Touchpanel sensitivity (X-plate resistance)
2559 + (default 400)
2560 +
2561 + penirq is required and usually xohms (60-100) has to be set as well.
2562 + Apart from that, pmax (255) and swapxy are also common.
2563 + The rest of the calibration can be done with xinput-calibrator.
2564 + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
2565 + Device Tree binding document:
2566 + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
2567 +
2568 +
2569 +Name: akkordion-iqdacplus
2570 +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
2571 + OEM IQAudIO DAC+ or DAC Zero module).
2572 +Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
2573 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2574 + Digital volume control. Enable with
2575 + dtoverlay=akkordion-iqdacplus,24db_digital_gain
2576 + (The default behaviour is that the Digital
2577 + volume control is limited to a maximum of
2578 + 0dB. ie. it can attenuate but not provide
2579 + gain. For most users, this will be desired
2580 + as it will prevent clipping. By appending
2581 + the 24db_digital_gain parameter, the Digital
2582 + volume control will allow up to 24dB of
2583 + gain. If this parameter is enabled, it is the
2584 + responsibility of the user to ensure that
2585 + the Digital volume control is set to a value
2586 + that does not result in clipping/distortion!)
2587 +
2588 +
2589 +Name: allo-boss-dac-pcm512x-audio
2590 +Info: Configures the Allo Boss DAC audio cards.
2591 +Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
2592 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2593 + Digital volume control. Enable with
2594 + "dtoverlay=allo-boss-dac-pcm512x-audio,
2595 + 24db_digital_gain"
2596 + (The default behaviour is that the Digital
2597 + volume control is limited to a maximum of
2598 + 0dB. ie. it can attenuate but not provide
2599 + gain. For most users, this will be desired
2600 + as it will prevent clipping. By appending
2601 + the 24db_digital_gain parameter, the Digital
2602 + volume control will allow up to 24dB of
2603 + gain. If this parameter is enabled, it is the
2604 + responsibility of the user to ensure that
2605 + the Digital volume control is set to a value
2606 + that does not result in clipping/distortion!)
2607 + slave Force Boss DAC into slave mode, using Pi a
2608 + master for bit clock and frame clock. Enable
2609 + with "dtoverlay=allo-boss-dac-pcm512x-audio,
2610 + slave"
2611 +
2612 +
2613 +Name: allo-digione
2614 +Info: Configures the Allo Digione audio card
2615 +Load: dtoverlay=allo-digione
2616 +Params: <None>
2617 +
2618 +
2619 +Name: allo-katana-dac-audio
2620 +Info: Configures the Allo Katana DAC audio card
2621 +Load: dtoverlay=allo-katana-dac-audio
2622 +Params: <None>
2623 +
2624 +
2625 +Name: allo-piano-dac-pcm512x-audio
2626 +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
2627 + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
2628 + The subwoofer outputs on the Piano 2.1 are not currently supported!)
2629 +Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
2630 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2631 + Digital volume control.
2632 + (The default behaviour is that the Digital
2633 + volume control is limited to a maximum of
2634 + 0dB. ie. it can attenuate but not provide
2635 + gain. For most users, this will be desired
2636 + as it will prevent clipping. By appending
2637 + the 24db_digital_gain parameter, the Digital
2638 + volume control will allow up to 24dB of
2639 + gain. If this parameter is enabled, it is the
2640 + responsibility of the user to ensure that
2641 + the Digital volume control is set to a value
2642 + that does not result in clipping/distortion!)
2643 +
2644 +
2645 +Name: allo-piano-dac-plus-pcm512x-audio
2646 +Info: Configures the Allo Piano DAC (2.1) audio cards.
2647 +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
2648 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2649 + Digital volume control.
2650 + (The default behaviour is that the Digital
2651 + volume control is limited to a maximum of
2652 + 0dB. ie. it can attenuate but not provide
2653 + gain. For most users, this will be desired
2654 + as it will prevent clipping. By appending
2655 + the 24db_digital_gain parameter, the Digital
2656 + volume control will allow up to 24dB of
2657 + gain. If this parameter is enabled, it is the
2658 + responsibility of the user to ensure that
2659 + the Digital volume control is set to a value
2660 + that does not result in clipping/distortion!)
2661 + glb_mclk This option is only with Kali board. If enabled,
2662 + MCLK for Kali is used and PLL is disabled for
2663 + better voice quality. (default Off)
2664 +
2665 +
2666 +Name: applepi-dac
2667 +Info: Configures the Orchard Audio ApplePi-DAC audio card
2668 +Load: dtoverlay=applepi-dac
2669 +Params: <None>
2670 +
2671 +
2672 +Name: at86rf233
2673 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
2674 + connected to spi0.0
2675 +Load: dtoverlay=at86rf233,<param>=<val>
2676 +Params: interrupt GPIO used for INT (default 23)
2677 + reset GPIO used for Reset (default 24)
2678 + sleep GPIO used for Sleep (default 25)
2679 + speed SPI bus speed in Hz (default 3000000)
2680 + trim Fine tuning of the internal capacitance
2681 + arrays (0=+0pF, 15=+4.5pF, default 15)
2682 +
2683 +
2684 +Name: audioinjector-addons
2685 +Info: Configures the audioinjector.net audio add on soundcards
2686 +Load: dtoverlay=audioinjector-addons,<param>=<val>
2687 +Params: non-stop-clocks Keeps the clocks running even when the stream
2688 + is paused or stopped (default off)
2689 +
2690 +
2691 +Name: audioinjector-wm8731-audio
2692 +Info: Configures the audioinjector.net audio add on soundcard
2693 +Load: dtoverlay=audioinjector-wm8731-audio
2694 +Params: <None>
2695 +
2696 +
2697 +Name: audremap
2698 +Info: Switches PWM sound output to pins 12 (Right) & 13 (Left)
2699 +Load: dtoverlay=audremap,<param>=<val>
2700 +Params: swap_lr Reverse the channel allocation, which will also
2701 + swap the audio jack outputs (default off)
2702 + enable_jack Don't switch off the audio jack output
2703 + (default off)
2704 +
2705 +
2706 +Name: balena-fin
2707 +Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the
2708 + Balena Fin board.
2709 +Load: dtoverlay=balena-fin
2710 +Params: <None>
2711 +
2712 +
2713 +Name: bmp085_i2c-sensor
2714 +Info: This overlay is now deprecated - see i2c-sensor
2715 +Load: dtoverlay=bmp085_i2c-sensor
2716 +Params: <None>
2717 +
2718 +
2719 +Name: dht11
2720 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
2721 + Also sometimes found with the part number(s) AM230x.
2722 +Load: dtoverlay=dht11,<param>=<val>
2723 +Params: gpiopin GPIO connected to the sensor's DATA output.
2724 + (default 4)
2725 +
2726 +
2727 +Name: dionaudio-loco
2728 +Info: Configures the Dion Audio LOCO DAC-AMP
2729 +Load: dtoverlay=dionaudio-loco
2730 +Params: <None>
2731 +
2732 +
2733 +Name: dionaudio-loco-v2
2734 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP
2735 +Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
2736 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2737 + Digital volume control. Enable with
2738 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
2739 + (The default behaviour is that the Digital
2740 + volume control is limited to a maximum of
2741 + 0dB. ie. it can attenuate but not provide
2742 + gain. For most users, this will be desired
2743 + as it will prevent clipping. By appending
2744 + the 24dB_digital_gain parameter, the Digital
2745 + volume control will allow up to 24dB of
2746 + gain. If this parameter is enabled, it is the
2747 + responsibility of the user to ensure that
2748 + the Digital volume control is set to a value
2749 + that does not result in clipping/distortion!)
2750 +
2751 +
2752 +Name: dpi18
2753 +Info: Overlay for a generic 18-bit DPI display
2754 + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
2755 + 2-3 seconds after the kernel has started.
2756 +Load: dtoverlay=dpi18
2757 +Params: <None>
2758 +
2759 +
2760 +Name: dpi24
2761 +Info: Overlay for a generic 24-bit DPI display
2762 + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
2763 + 2-3 seconds after the kernel has started.
2764 +Load: dtoverlay=dpi24
2765 +Params: <None>
2766 +
2767 +
2768 +Name: dwc-otg
2769 +Info: Selects the dwc_otg USB controller driver which has fiq support. This
2770 + is the default on all except the Pi Zero which defaults to dwc2.
2771 +Load: dtoverlay=dwc-otg
2772 +Params: <None>
2773 +
2774 +
2775 +Name: dwc2
2776 +Info: Selects the dwc2 USB controller driver
2777 +Load: dtoverlay=dwc2,<param>=<val>
2778 +Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
2779 +
2780 + g-rx-fifo-size Size of rx fifo size in gadget mode
2781 +
2782 + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
2783 + mode
2784 +
2785 +
2786 +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
2787 +
2788 +
2789 +Name: enc28j60
2790 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
2791 +Load: dtoverlay=enc28j60,<param>=<val>
2792 +Params: int_pin GPIO used for INT (default 25)
2793 +
2794 + speed SPI bus speed (default 12000000)
2795 +
2796 +
2797 +Name: enc28j60-spi2
2798 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
2799 +Load: dtoverlay=enc28j60-spi2,<param>=<val>
2800 +Params: int_pin GPIO used for INT (default 39)
2801 +
2802 + speed SPI bus speed (default 12000000)
2803 +
2804 +
2805 +Name: exc3000
2806 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using
2807 + GPIO 4 (pin 7 on GPIO header) for interrupt.
2808 +Load: dtoverlay=exc3000,<param>=<val>
2809 +Params: interrupt GPIO used for interrupt (default 4)
2810 + sizex Touchscreen size x (default 4096)
2811 + sizey Touchscreen size y (default 4096)
2812 + invx Touchscreen inverted x axis
2813 + invy Touchscreen inverted y axis
2814 + swapxy Touchscreen swapped x y axis
2815 +
2816 +
2817 +Name: fe-pi-audio
2818 +Info: Configures the Fe-Pi Audio Sound Card
2819 +Load: dtoverlay=fe-pi-audio
2820 +Params: <None>
2821 +
2822 +
2823 +Name: goodix
2824 +Info: Enables I2C connected Goodix gt9271 multiple touch controller using
2825 + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
2826 +Load: dtoverlay=goodix,<param>=<val>
2827 +Params: interrupt GPIO used for interrupt (default 4)
2828 + reset GPIO used for reset (default 17)
2829 +
2830 +
2831 +Name: googlevoicehat-soundcard
2832 +Info: Configures the Google voiceHAT soundcard
2833 +Load: dtoverlay=googlevoicehat-soundcard
2834 +Params: <None>
2835 +
2836 +
2837 +Name: gpio-ir
2838 +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
2839 + based gpio_ir_recv driver maps received keys directly to a
2840 + /dev/input/event* device, all decoding is done by the kernel - LIRC is
2841 + not required! The key mapping and other decoding parameters can be
2842 + configured by "ir-keytable" tool.
2843 +Load: dtoverlay=gpio-ir,<param>=<val>
2844 +Params: gpio_pin Input pin number. Default is 18.
2845 +
2846 + gpio_pull Desired pull-up/down state (off, down, up)
2847 + Default is "down".
2848 +
2849 + rc-map-name Default rc keymap (can also be changed by
2850 + ir-keytable), defaults to "rc-rc6-mce"
2851 +
2852 +
2853 +Name: gpio-ir-tx
2854 +Info: Use GPIO pin as bit-banged infrared transmitter output.
2855 + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
2856 + a PWM so it can be used together with onboard analog audio.
2857 +Load: dtoverlay=gpio-ir-tx,<param>=<val>
2858 +Params: gpio_pin Output GPIO (default 18)
2859 +
2860 + invert "1" = invert the output (make it active-low).
2861 + Default is "0" (active-high).
2862 +
2863 +
2864 +Name: gpio-key
2865 +Info: This is a generic overlay for activating GPIO keypresses using
2866 + the gpio-keys library and this dtoverlay. Multiple keys can be
2867 + set up using multiple calls to the overlay for configuring
2868 + additional buttons or joysticks. You can see available keycodes
2869 + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
2870 + linux/input-event-codes.h#L64
2871 +Load: dtoverlay=gpio-key,<param>=<val>
2872 +Params: gpio GPIO pin to trigger on (default 3)
2873 + active_low When this is 1 (active low), a falling
2874 + edge generates a key down event and a
2875 + rising edge generates a key up event.
2876 + When this is 0 (active high), this is
2877 + reversed. The default is 1 (active low)
2878 + gpio_pull Desired pull-up/down state (off, down, up)
2879 + Default is "up". Note that the default pin
2880 + (GPIO3) has an external pullup
2881 + label Set a label for the key
2882 + keycode Set the key code for the button
2883 +
2884 +
2885 +Name: gpio-no-irq
2886 +Info: Use this overlay to disable all GPIO interrupts, which can be useful
2887 + for user-space GPIO edge detection systems.
2888 +Load: dtoverlay=gpio-no-irq
2889 +Params: <None>
2890 +
2891 +
2892 +Name: gpio-poweroff
2893 +Info: Drives a GPIO high or low on poweroff (including halt). Enabling this
2894 + overlay will prevent the ability to boot by driving GPIO3 low.
2895 +Load: dtoverlay=gpio-poweroff,<param>=<val>
2896 +Params: gpiopin GPIO for signalling (default 26)
2897 +
2898 + active_low Set if the power control device requires a
2899 + high->low transition to trigger a power-down.
2900 + Note that this will require the support of a
2901 + custom dt-blob.bin to prevent a power-down
2902 + during the boot process, and that a reboot
2903 + will also cause the pin to go low.
2904 + input Set if the gpio pin should be configured as
2905 + an input.
2906 + export Set to export the configured pin to sysfs
2907 +
2908 +
2909 +Name: gpio-shutdown
2910 +Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
2911 + is configured as an input key that generates KEY_POWER events.
2912 + This event is handled by systemd-logind by initiating a
2913 + shutdown. Systemd versions older than 225 need an udev rule
2914 + enable listening to the input device:
2915 +
2916 + ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
2917 + SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
2918 + ATTRS{keys}=="116", TAG+="power-switch"
2919 +
2920 + This overlay only handles shutdown. After shutdown, the system
2921 + can be powered up again by driving GPIO3 low. The default
2922 + configuration uses GPIO3 with a pullup, so if you connect a
2923 + button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
2924 + you get a shutdown and power-up button.
2925 +Load: dtoverlay=gpio-shutdown,<param>=<val>
2926 +Params: gpio_pin GPIO pin to trigger on (default 3)
2927 +
2928 + active_low When this is 1 (active low), a falling
2929 + edge generates a key down event and a
2930 + rising edge generates a key up event.
2931 + When this is 0 (active high), this is
2932 + reversed. The default is 1 (active low).
2933 +
2934 + gpio_pull Desired pull-up/down state (off, down, up)
2935 + Default is "up".
2936 +
2937 + Note that the default pin (GPIO3) has an
2938 + external pullup.
2939 +
2940 +
2941 +Name: hifiberry-amp
2942 +Info: Configures the HifiBerry Amp and Amp+ audio cards
2943 +Load: dtoverlay=hifiberry-amp
2944 +Params: <None>
2945 +
2946 +
2947 +Name: hifiberry-dac
2948 +Info: Configures the HifiBerry DAC audio card
2949 +Load: dtoverlay=hifiberry-dac
2950 +Params: <None>
2951 +
2952 +
2953 +Name: hifiberry-dacplus
2954 +Info: Configures the HifiBerry DAC+ audio card
2955 +Load: dtoverlay=hifiberry-dacplus,<param>=<val>
2956 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2957 + Digital volume control. Enable with
2958 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
2959 + (The default behaviour is that the Digital
2960 + volume control is limited to a maximum of
2961 + 0dB. ie. it can attenuate but not provide
2962 + gain. For most users, this will be desired
2963 + as it will prevent clipping. By appending
2964 + the 24dB_digital_gain parameter, the Digital
2965 + volume control will allow up to 24dB of
2966 + gain. If this parameter is enabled, it is the
2967 + responsibility of the user to ensure that
2968 + the Digital volume control is set to a value
2969 + that does not result in clipping/distortion!)
2970 + slave Force DAC+ Pro into slave mode, using Pi as
2971 + master for bit clock and frame clock.
2972 +
2973 +
2974 +Name: hifiberry-digi
2975 +Info: Configures the HifiBerry Digi and Digi+ audio card
2976 +Load: dtoverlay=hifiberry-digi
2977 +Params: <None>
2978 +
2979 +
2980 +Name: hifiberry-digi-pro
2981 +Info: Configures the HifiBerry Digi+ Pro audio card
2982 +Load: dtoverlay=hifiberry-digi-pro
2983 +Params: <None>
2984 +
2985 +
2986 +Name: hy28a
2987 +Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
2988 + Default values match Texy's display shield
2989 +Load: dtoverlay=hy28a,<param>=<val>
2990 +Params: speed Display SPI bus speed
2991 +
2992 + rotate Display rotation {0,90,180,270}
2993 +
2994 + fps Delay between frame updates
2995 +
2996 + debug Debug output level {0-7}
2997 +
2998 + xohms Touchpanel sensitivity (X-plate resistance)
2999 +
3000 + resetgpio GPIO used to reset controller
3001 +
3002 + ledgpio GPIO used to control backlight
3003 +
3004 +
3005 +Name: hy28b
3006 +Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
3007 + Default values match Texy's display shield
3008 +Load: dtoverlay=hy28b,<param>=<val>
3009 +Params: speed Display SPI bus speed
3010 +
3011 + rotate Display rotation {0,90,180,270}
3012 +
3013 + fps Delay between frame updates
3014 +
3015 + debug Debug output level {0-7}
3016 +
3017 + xohms Touchpanel sensitivity (X-plate resistance)
3018 +
3019 + resetgpio GPIO used to reset controller
3020 +
3021 + ledgpio GPIO used to control backlight
3022 +
3023 +
3024 +Name: i2c-bcm2708
3025 +Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
3026 +Load: dtoverlay=i2c-bcm2708
3027 +Params: <None>
3028 +
3029 +
3030 +Name: i2c-gpio
3031 +Info: Adds support for software i2c controller on gpio pins
3032 +Load: dtoverlay=i2c-gpio,<param>=<val>
3033 +Params: i2c_gpio_sda GPIO used for I2C data (default "23")
3034 +
3035 + i2c_gpio_scl GPIO used for I2C clock (default "24")
3036 +
3037 + i2c_gpio_delay_us Clock delay in microseconds
3038 + (default "2" = ~100kHz)
3039 +
3040 + bus Set to a unique, non-zero value if wanting
3041 + multiple i2c-gpio busses. If set, will be used
3042 + as the preferred bus number (/dev/i2c-<n>). If
3043 + not set, the default value is 0, but the bus
3044 + number will be dynamically assigned - probably
3045 + 3.
3046 +
3047 +
3048 +Name: i2c-mux
3049 +Info: Adds support for a number of I2C bus multiplexers on i2c_arm
3050 +Load: dtoverlay=i2c-mux,<param>=<val>
3051 +Params: pca9542 Select the NXP PCA9542 device
3052 +
3053 + pca9545 Select the NXP PCA9545 device
3054 +
3055 + pca9548 Select the NXP PCA9548 device
3056 +
3057 + addr Change I2C address of the device (default 0x70)
3058 +
3059 +
3060 +[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
3061 +
3062 +
3063 +Name: i2c-pwm-pca9685a
3064 +Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
3065 +Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
3066 +Params: addr I2C address of PCA9685A (default 0x40)
3067 +
3068 +
3069 +Name: i2c-rtc
3070 +Info: Adds support for a number of I2C Real Time Clock devices
3071 +Load: dtoverlay=i2c-rtc,<param>=<val>
3072 +Params: abx80x Select one of the ABx80x family:
3073 + AB0801, AB0803, AB0804, AB0805,
3074 + AB1801, AB1803, AB1804, AB1805
3075 +
3076 + ds1307 Select the DS1307 device
3077 +
3078 + ds1339 Select the DS1339 device
3079 +
3080 + ds3231 Select the DS3231 device
3081 +
3082 + m41t62 Select the M41T62 device
3083 +
3084 + mcp7940x Select the MCP7940x device
3085 +
3086 + mcp7941x Select the MCP7941x device
3087 +
3088 + pcf2127 Select the PCF2127 device
3089 +
3090 + pcf8523 Select the PCF8523 device
3091 +
3092 + pcf8563 Select the PCF8563 device
3093 +
3094 + trickle-diode-type Diode type for trickle charge - "standard" or
3095 + "schottky" (ABx80x only)
3096 +
3097 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
3098 + ABx80x)
3099 +
3100 + wakeup-source Specify that the RTC can be used as a wakeup
3101 + source
3102 +
3103 +
3104 +Name: i2c-rtc-gpio
3105 +Info: Adds support for a number of I2C Real Time Clock devices
3106 + using the software i2c controller
3107 +Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
3108 +Params: abx80x Select one of the ABx80x family:
3109 + AB0801, AB0803, AB0804, AB0805,
3110 + AB1801, AB1803, AB1804, AB1805
3111 +
3112 + ds1307 Select the DS1307 device
3113 +
3114 + ds1339 Select the DS1339 device
3115 +
3116 + ds3231 Select the DS3231 device
3117 +
3118 + mcp7940x Select the MCP7940x device
3119 +
3120 + mcp7941x Select the MCP7941x device
3121 +
3122 + pcf2127 Select the PCF2127 device
3123 +
3124 + pcf8523 Select the PCF8523 device
3125 +
3126 + pcf8563 Select the PCF8563 device
3127 +
3128 + trickle-diode-type Diode type for trickle charge - "standard" or
3129 + "schottky" (ABx80x only)
3130 +
3131 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
3132 + ABx80x)
3133 +
3134 + wakeup-source Specify that the RTC can be used as a wakeup
3135 + source
3136 +
3137 + i2c_gpio_sda GPIO used for I2C data (default "23")
3138 +
3139 + i2c_gpio_scl GPIO used for I2C clock (default "24")
3140 +
3141 + i2c_gpio_delay_us Clock delay in microseconds
3142 + (default "2" = ~100kHz)
3143 +
3144 +
3145 +Name: i2c-sensor
3146 +Info: Adds support for a number of I2C barometric pressure and temperature
3147 + sensors on i2c_arm
3148 +Load: dtoverlay=i2c-sensor,<param>=<val>
3149 +Params: addr Set the address for the BME280, BMP280, DS1621,
3150 + HDC100X, LM75, SHT3x or TMP102
3151 +
3152 + bme280 Select the Bosch Sensortronic BME280
3153 + Valid addresses 0x76-0x77, default 0x76
3154 +
3155 + bmp085 Select the Bosch Sensortronic BMP085
3156 +
3157 + bmp180 Select the Bosch Sensortronic BMP180
3158 +
3159 + bmp280 Select the Bosch Sensortronic BMP280
3160 + Valid addresses 0x76-0x77, default 0x76
3161 +
3162 + ds1621 Select the Dallas Semiconductors DS1621 temp
3163 + sensor. Valid addresses 0x48-0x4f, default 0x48
3164 +
3165 + hdc100x Select the Texas Instruments HDC100x temp sensor
3166 + Valid addresses 0x40-0x43, default 0x40
3167 +
3168 + htu21 Select the HTU21 temperature and humidity sensor
3169 +
3170 + lm75 Select the Maxim LM75 temperature sensor
3171 + Valid addresses 0x48-0x4f, default 0x4f
3172 +
3173 + lm75addr Deprecated - use addr parameter instead
3174 +
3175 + sht3x Select the Sensiron SHT3x temperature and
3176 + humidity sensor. Valid addresses 0x44-0x45,
3177 + default 0x44
3178 +
3179 + si7020 Select the Silicon Labs Si7013/20/21 humidity/
3180 + temperature sensor
3181 +
3182 + tmp102 Select the Texas Instruments TMP102 temp sensor
3183 + Valid addresses 0x48-0x4b, default 0x48
3184 +
3185 + tsl4531 Select the AMS TSL4531 digital ambient light
3186 + sensor
3187 +
3188 + veml6070 Select the Vishay VEML6070 ultraviolet light
3189 + sensor
3190 +
3191 +
3192 +Name: i2c0-bcm2708
3193 +Info: Change i2c0 pin usage. Not all pin combinations are usable on all
3194 + platforms - platforms other then Compute Modules can only use this
3195 + to disable transaction combining.
3196 +Load: dtoverlay=i2c0-bcm2708,<param>=<val>
3197 +Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*)
3198 + scl0_pin GPIO pin for SCL0 (deprecated - use pins_*)
3199 + pins_0_1 Use pins 0 and 1 (default)
3200 + pins_28_29 Use pins 28 and 29
3201 + pins_44_45 Use pins 44 and 45
3202 + pins_46_47 Use pins 46 and 47
3203 + combine Allow transactions to be combined (default
3204 + "yes")
3205 +
3206 +
3207 +Name: i2c1-bcm2708
3208 +Info: Change i2c1 pin usage. Not all pin combinations are usable on all
3209 + platforms - platforms other then Compute Modules can only use this
3210 + to disable transaction combining.
3211 +Info: Enable the i2c_bcm2708 driver for the i2c1 bus
3212 +Load: dtoverlay=i2c1-bcm2708,<param>=<val>
3213 +Params: sda1_pin GPIO pin for SDA1 (2 or 44 - default 2)
3214 + scl1_pin GPIO pin for SCL1 (3 or 45 - default 3)
3215 + pin_func Alternative pin function (4 (alt0), 6 (alt2) -
3216 + default 4)
3217 + combine Allow transactions to be combined (default
3218 + "yes")
3219 +
3220 +
3221 +Name: i2s-gpio28-31
3222 +Info: move I2S function block to GPIO 28 to 31
3223 +Load: dtoverlay=i2s-gpio28-31
3224 +Params: <None>
3225 +
3226 +
3227 +Name: iqaudio-dac
3228 +Info: Configures the IQaudio DAC audio card
3229 +Load: dtoverlay=iqaudio-dac,<param>
3230 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3231 + Digital volume control. Enable with
3232 + "dtoverlay=iqaudio-dac,24db_digital_gain"
3233 + (The default behaviour is that the Digital
3234 + volume control is limited to a maximum of
3235 + 0dB. ie. it can attenuate but not provide
3236 + gain. For most users, this will be desired
3237 + as it will prevent clipping. By appending
3238 + the 24db_digital_gain parameter, the Digital
3239 + volume control will allow up to 24dB of
3240 + gain. If this parameter is enabled, it is the
3241 + responsibility of the user to ensure that
3242 + the Digital volume control is set to a value
3243 + that does not result in clipping/distortion!)
3244 +
3245 +
3246 +Name: iqaudio-dacplus
3247 +Info: Configures the IQaudio DAC+ audio card
3248 +Load: dtoverlay=iqaudio-dacplus,<param>=<val>
3249 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3250 + Digital volume control. Enable with
3251 + "dtoverlay=iqaudio-dacplus,24db_digital_gain"
3252 + (The default behaviour is that the Digital
3253 + volume control is limited to a maximum of
3254 + 0dB. ie. it can attenuate but not provide
3255 + gain. For most users, this will be desired
3256 + as it will prevent clipping. By appending
3257 + the 24db_digital_gain parameter, the Digital
3258 + volume control will allow up to 24dB of
3259 + gain. If this parameter is enabled, it is the
3260 + responsibility of the user to ensure that
3261 + the Digital volume control is set to a value
3262 + that does not result in clipping/distortion!)
3263 + auto_mute_amp If specified, unmute/mute the IQaudIO amp when
3264 + starting/stopping audio playback.
3265 + unmute_amp If specified, unmute the IQaudIO amp once when
3266 + the DAC driver module loads.
3267 +
3268 +
3269 +Name: iqaudio-digi-wm8804-audio
3270 +Info: Configures the IQAudIO Digi WM8804 audio card
3271 +Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
3272 +Params: card_name Override the default, "IQAudIODigi", card name.
3273 + dai_name Override the default, "IQAudIO Digi", dai name.
3274 + dai_stream_name Override the default, "IQAudIO Digi HiFi",
3275 + dai stream name.
3276 +
3277 +
3278 +Name: jedec-spi-nor
3279 +Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
3280 + "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
3281 +Load: dtoverlay=jedec-spi-nor,<param>=<val>
3282 +Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
3283 + flash-fastr-spi<n>-<m> Enables flash device with fast read capability
3284 + on SPI<n>, CS#<m>.
3285 +
3286 +
3287 +Name: justboom-dac
3288 +Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
3289 + cards
3290 +Load: dtoverlay=justboom-dac,<param>=<val>
3291 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3292 + Digital volume control. Enable with
3293 + "dtoverlay=justboom-dac,24db_digital_gain"
3294 + (The default behaviour is that the Digital
3295 + volume control is limited to a maximum of
3296 + 0dB. ie. it can attenuate but not provide
3297 + gain. For most users, this will be desired
3298 + as it will prevent clipping. By appending
3299 + the 24dB_digital_gain parameter, the Digital
3300 + volume control will allow up to 24dB of
3301 + gain. If this parameter is enabled, it is the
3302 + responsibility of the user to ensure that
3303 + the Digital volume control is set to a value
3304 + that does not result in clipping/distortion!)
3305 +
3306 +
3307 +Name: justboom-digi
3308 +Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
3309 +Load: dtoverlay=justboom-digi
3310 +Params: <None>
3311 +
3312 +
3313 +Name: lirc-rpi
3314 +Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
3315 + Consult the module documentation for more details.
3316 +Load: dtoverlay=lirc-rpi,<param>=<val>
3317 +Params: gpio_out_pin GPIO for output (default "17")
3318 +
3319 + gpio_in_pin GPIO for input (default "18")
3320 +
3321 + gpio_in_pull Pull up/down/off on the input pin
3322 + (default "down")
3323 +
3324 + sense Override the IR receive auto-detection logic:
3325 + "0" = force active-high
3326 + "1" = force active-low
3327 + "-1" = use auto-detection
3328 + (default "-1")
3329 +
3330 + softcarrier Turn the software carrier "on" or "off"
3331 + (default "on")
3332 +
3333 + invert "on" = invert the output pin (default "off")
3334 +
3335 + debug "on" = enable additional debug messages
3336 + (default "off")
3337 +
3338 +
3339 +Name: ltc294x
3340 +Info: Adds support for the ltc294x family of battery gauges
3341 +Load: dtoverlay=ltc294x,<param>=<val>
3342 +Params: ltc2941 Select the ltc2941 device
3343 +
3344 + ltc2942 Select the ltc2942 device
3345 +
3346 + ltc2943 Select the ltc2943 device
3347 +
3348 + ltc2944 Select the ltc2944 device
3349 +
3350 + resistor-sense The sense resistor value in milli-ohms.
3351 + Can be a 32-bit negative value when the battery
3352 + has been connected to the wrong end of the
3353 + resistor.
3354 +
3355 + prescaler-exponent Range and accuracy of the gauge. The value is
3356 + programmed into the chip only if it differs
3357 + from the current setting.
3358 + For LTC2941 only:
3359 + - Default value is 128
3360 + - the exponent is in the range 0-7 (default 7)
3361 + See the datasheet for more information.
3362 +
3363 +
3364 +Name: mbed-dac
3365 +Info: Configures the mbed AudioCODEC (TLV320AIC23B)
3366 +Load: dtoverlay=mbed-dac
3367 +Params: <None>
3368 +
3369 +
3370 +Name: mcp23017
3371 +Info: Configures the MCP23017 I2C GPIO expander
3372 +Load: dtoverlay=mcp23017,<param>=<val>
3373 +Params: gpiopin Gpio pin connected to the INTA output of the
3374 + MCP23017 (default: 4)
3375 +
3376 + addr I2C address of the MCP23017 (default: 0x20)
3377 +
3378 +
3379 +Name: mcp23s17
3380 +Info: Configures the MCP23S08/17 SPI GPIO expanders.
3381 + If devices are present on SPI1 or SPI2, those interfaces must be enabled
3382 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3383 + If interrupts are enabled for a device on a given CS# on a SPI bus, that
3384 + device must be the only one present on that SPI bus/CS#.
3385 +Load: dtoverlay=mcp23s17,<param>=<val>
3386 +Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
3387 + devices present on SPI<n>, CS#<m>
3388 +
3389 + s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
3390 + devices present on SPI<n>, CS#<m>
3391 +
3392 + s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
3393 + MCP23S08 device on SPI<n>, CS#<m>, specifies
3394 + the GPIO pin to which INT output of MCP23S08
3395 + is connected.
3396 +
3397 + s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
3398 + single MCP23S17 device on SPI<n>, CS#<m>,
3399 + specifies the GPIO pin to which either INTA
3400 + or INTB output of MCP23S17 is connected.
3401 +
3402 +
3403 +Name: mcp2515-can0
3404 +Info: Configures the MCP2515 CAN controller on spi0.0
3405 +Load: dtoverlay=mcp2515-can0,<param>=<val>
3406 +Params: oscillator Clock frequency for the CAN controller (Hz)
3407 +
3408 + spimaxfrequency Maximum SPI frequence (Hz)
3409 +
3410 + interrupt GPIO for interrupt signal
3411 +
3412 +
3413 +Name: mcp2515-can1
3414 +Info: Configures the MCP2515 CAN controller on spi0.1
3415 +Load: dtoverlay=mcp2515-can1,<param>=<val>
3416 +Params: oscillator Clock frequency for the CAN controller (Hz)
3417 +
3418 + spimaxfrequency Maximum SPI frequence (Hz)
3419 +
3420 + interrupt GPIO for interrupt signal
3421 +
3422 +
3423 +Name: mcp3008
3424 +Info: Configures MCP3008 A/D converters
3425 + For devices on spi1 or spi2, the interfaces should be enabled
3426 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3427 +Load: dtoverlay=mcp3008,<param>[=<val>]
3428 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
3429 + spi<n>-<m>-speed integer, set the spi bus speed for this device
3430 +
3431 +
3432 +Name: mcp3202
3433 +Info: Configures MCP3202 A/D converters
3434 + For devices on spi1 or spi2, the interfaces should be enabled
3435 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3436 +Load: dtoverlay=mcp3202,<param>[=<val>]
3437 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
3438 + spi<n>-<m>-speed integer, set the spi bus speed for this device
3439 +
3440 +
3441 +Name: media-center
3442 +Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
3443 +Load: dtoverlay=media-center,<param>=<val>
3444 +Params: speed Display SPI bus speed
3445 + rotate Display rotation {0,90,180,270}
3446 + fps Delay between frame updates
3447 + xohms Touchpanel sensitivity (X-plate resistance)
3448 + swapxy Swap x and y axis
3449 + backlight Change backlight GPIO pin {e.g. 12, 18}
3450 + gpio_out_pin GPIO for output (default "17")
3451 + gpio_in_pin GPIO for input (default "18")
3452 + gpio_in_pull Pull up/down/off on the input pin
3453 + (default "down")
3454 + sense Override the IR receive auto-detection logic:
3455 + "0" = force active-high
3456 + "1" = force active-low
3457 + "-1" = use auto-detection
3458 + (default "-1")
3459 + softcarrier Turn the software carrier "on" or "off"
3460 + (default "on")
3461 + invert "on" = invert the output pin (default "off")
3462 + debug "on" = enable additional debug messages
3463 + (default "off")
3464 +
3465 +
3466 +Name: midi-uart0
3467 +Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
3468 + 31.25kbaud, the frequency required for MIDI
3469 +Load: dtoverlay=midi-uart0
3470 +Params: <None>
3471 +
3472 +
3473 +Name: midi-uart1
3474 +Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
3475 + 31.25kbaud, the frequency required for MIDI
3476 +Load: dtoverlay=midi-uart1
3477 +Params: <None>
3478 +
3479 +
3480 +Name: mmc
3481 +Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
3482 +Load: dtoverlay=mmc,<param>=<val>
3483 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3484 + requests 50MHz
3485 +
3486 +
3487 +Name: mpu6050
3488 +Info: Overlay for i2c connected mpu6050 imu
3489 +Load: dtoverlay=mpu6050,<param>=<val>
3490 +Params: interrupt GPIO pin for interrupt (default 4)
3491 +
3492 +
3493 +Name: mz61581
3494 +Info: MZ61581 display by Tontec
3495 +Load: dtoverlay=mz61581,<param>=<val>
3496 +Params: speed Display SPI bus speed
3497 +
3498 + rotate Display rotation {0,90,180,270}
3499 +
3500 + fps Delay between frame updates
3501 +
3502 + txbuflen Transmit buffer length (default 32768)
3503 +
3504 + debug Debug output level {0-7}
3505 +
3506 + xohms Touchpanel sensitivity (X-plate resistance)
3507 +
3508 +
3509 +Name: papirus
3510 +Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
3511 +Load: dtoverlay=papirus,<param>=<val>
3512 +Params: panel Display panel (required):
3513 + 1.44": e1144cs021
3514 + 2.0": e2200cs021
3515 + 2.7": e2271cs021
3516 +
3517 + speed Display SPI bus speed
3518 +
3519 +
3520 +[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
3521 +
3522 +
3523 +[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
3524 +
3525 +
3526 +[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
3527 +
3528 +
3529 +Name: pi3-act-led
3530 +Info: Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
3531 + from the VPU. There is a special driver for this with a separate DT
3532 + node, which has the unfortunate consequence of breaking the
3533 + act_led_gpio and act_led_activelow dtparams.
3534 + This overlay changes the GPIO controller back to the standard one and
3535 + restores the dtparams.
3536 +Load: dtoverlay=pi3-act-led,<param>=<val>
3537 +Params: activelow Set to "on" to invert the sense of the LED
3538 + (default "off")
3539 +
3540 + gpio Set which GPIO to use for the activity LED
3541 + (in case you want to connect it to an external
3542 + device)
3543 + REQUIRED
3544 +
3545 +
3546 +Name: pi3-disable-bt
3547 +Info: Disable Pi3 Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15
3548 + N.B. To disable the systemd service that initialises the modem so it
3549 + doesn't use the UART, use 'sudo systemctl disable hciuart'.
3550 +Load: dtoverlay=pi3-disable-bt
3551 +Params: <None>
3552 +
3553 +
3554 +Name: pi3-disable-wifi
3555 +Info: Disable Pi3 onboard WiFi
3556 +Load: dtoverlay=pi3-disable-wifi
3557 +Params: <None>
3558 +
3559 +
3560 +Name: pi3-miniuart-bt
3561 +Info: Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
3562 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
3563 + usable baudrate.
3564 + N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
3565 + and replace ttyAMA0 with ttyS0, unless you have a system with udev rules
3566 + that create /dev/serial0 and /dev/serial1, in which case use
3567 + /dev/serial1 instead because it will always be correct. Furthermore,
3568 + you must also set core_freq=250 in config.txt or the miniuart will not
3569 + work.
3570 +Load: dtoverlay=pi3-miniuart-bt
3571 +Params: <None>
3572 +
3573 +
3574 +Name: pibell
3575 +Info: Configures the pibell audio card.
3576 +Load: dtoverlay=pibell,<param>=<val>
3577 +Params: alsaname Set the name as it appears in ALSA (default
3578 + "PiBell")
3579 +
3580 +
3581 +Name: piscreen
3582 +Info: PiScreen display by OzzMaker.com
3583 +Load: dtoverlay=piscreen,<param>=<val>
3584 +Params: speed Display SPI bus speed
3585 +
3586 + rotate Display rotation {0,90,180,270}
3587 +
3588 + fps Delay between frame updates
3589 +
3590 + debug Debug output level {0-7}
3591 +
3592 + xohms Touchpanel sensitivity (X-plate resistance)
3593 +
3594 +
3595 +Name: piscreen2r
3596 +Info: PiScreen 2 with resistive TP display by OzzMaker.com
3597 +Load: dtoverlay=piscreen2r,<param>=<val>
3598 +Params: speed Display SPI bus speed
3599 +
3600 + rotate Display rotation {0,90,180,270}
3601 +
3602 + fps Delay between frame updates
3603 +
3604 + debug Debug output level {0-7}
3605 +
3606 + xohms Touchpanel sensitivity (X-plate resistance)
3607 +
3608 +
3609 +Name: pisound
3610 +Info: Configures the Blokas Labs pisound card
3611 +Load: dtoverlay=pisound
3612 +Params: <None>
3613 +
3614 +
3615 +Name: pitft22
3616 +Info: Adafruit PiTFT 2.2" screen
3617 +Load: dtoverlay=pitft22,<param>=<val>
3618 +Params: speed Display SPI bus speed
3619 +
3620 + rotate Display rotation {0,90,180,270}
3621 +
3622 + fps Delay between frame updates
3623 +
3624 + debug Debug output level {0-7}
3625 +
3626 +
3627 +Name: pitft28-capacitive
3628 +Info: Adafruit PiTFT 2.8" capacitive touch screen
3629 +Load: dtoverlay=pitft28-capacitive,<param>=<val>
3630 +Params: speed Display SPI bus speed
3631 +
3632 + rotate Display rotation {0,90,180,270}
3633 +
3634 + fps Delay between frame updates
3635 +
3636 + debug Debug output level {0-7}
3637 +
3638 + touch-sizex Touchscreen size x (default 240)
3639 +
3640 + touch-sizey Touchscreen size y (default 320)
3641 +
3642 + touch-invx Touchscreen inverted x axis
3643 +
3644 + touch-invy Touchscreen inverted y axis
3645 +
3646 + touch-swapxy Touchscreen swapped x y axis
3647 +
3648 +
3649 +Name: pitft28-resistive
3650 +Info: Adafruit PiTFT 2.8" resistive touch screen
3651 +Load: dtoverlay=pitft28-resistive,<param>=<val>
3652 +Params: speed Display SPI bus speed
3653 +
3654 + rotate Display rotation {0,90,180,270}
3655 +
3656 + fps Delay between frame updates
3657 +
3658 + debug Debug output level {0-7}
3659 +
3660 +
3661 +Name: pitft35-resistive
3662 +Info: Adafruit PiTFT 3.5" resistive touch screen
3663 +Load: dtoverlay=pitft35-resistive,<param>=<val>
3664 +Params: speed Display SPI bus speed
3665 +
3666 + rotate Display rotation {0,90,180,270}
3667 +
3668 + fps Delay between frame updates
3669 +
3670 + debug Debug output level {0-7}
3671 +
3672 +
3673 +Name: pps-gpio
3674 +Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
3675 +Load: dtoverlay=pps-gpio,<param>=<val>
3676 +Params: gpiopin Input GPIO (default "18")
3677 + assert_falling_edge When present, assert is indicated by a falling
3678 + edge, rather than by a rising edge (default
3679 + off)
3680 + capture_clear Generate clear events on the trailing edge
3681 + (default off)
3682 +
3683 +
3684 +Name: pwm
3685 +Info: Configures a single PWM channel
3686 + Legal pin,function combinations for each channel:
3687 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3688 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
3689 + N.B.:
3690 + 1) Pin 18 is the only one available on all platforms, and
3691 + it is the one used by the I2S audio interface.
3692 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
3693 + 2) The onboard analogue audio output uses both PWM channels.
3694 + 3) So be careful mixing audio and PWM.
3695 + 4) Currently the clock must have been enabled and configured
3696 + by other means.
3697 +Load: dtoverlay=pwm,<param>=<val>
3698 +Params: pin Output pin (default 18) - see table
3699 + func Pin function (default 2 = Alt5) - see above
3700 + clock PWM clock frequency (informational)
3701 +
3702 +
3703 +Name: pwm-2chan
3704 +Info: Configures both PWM channels
3705 + Legal pin,function combinations for each channel:
3706 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3707 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
3708 + N.B.:
3709 + 1) Pin 18 is the only one available on all platforms, and
3710 + it is the one used by the I2S audio interface.
3711 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
3712 + 2) The onboard analogue audio output uses both PWM channels.
3713 + 3) So be careful mixing audio and PWM.
3714 + 4) Currently the clock must have been enabled and configured
3715 + by other means.
3716 +Load: dtoverlay=pwm-2chan,<param>=<val>
3717 +Params: pin Output pin (default 18) - see table
3718 + pin2 Output pin for other channel (default 19)
3719 + func Pin function (default 2 = Alt5) - see above
3720 + func2 Function for pin2 (default 2 = Alt5)
3721 + clock PWM clock frequency (informational)
3722 +
3723 +
3724 +Name: pwm-ir-tx
3725 +Info: Use GPIO pin as pwm-assisted infrared transmitter output.
3726 + This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
3727 + of PWM0 to reduce the CPU load during transmission compared to
3728 + gpio-ir-tx which uses bit-banging.
3729 + Legal pin,function combinations are:
3730 + 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3731 +Load: dtoverlay=pwm-ir-tx,<param>=<val>
3732 +Params: gpio_pin Output GPIO (default 18)
3733 +
3734 + func Pin function (default 2 = Alt5)
3735 +
3736 +
3737 +Name: qca7000
3738 +Info: I2SE's Evaluation Board for PLC Stamp micro
3739 +Load: dtoverlay=qca7000,<param>=<val>
3740 +Params: int_pin GPIO pin for interrupt signal (default 23)
3741 +
3742 + speed SPI bus speed (default 12 MHz)
3743 +
3744 +
3745 +Name: rotary-encoder
3746 +Info: Overlay for GPIO connected rotary encoder.
3747 +Load: dtoverlay=rotary-encoder,<param>=<val>
3748 +Params: pin_a GPIO connected to rotary encoder channel A
3749 + (default 4).
3750 + pin_b GPIO connected to rotary encoder channel B
3751 + (default 17).
3752 + relative_axis register a relative axis rather than an
3753 + absolute one. Relative axis will only
3754 + generate +1/-1 events on the input device,
3755 + hence no steps need to be passed.
3756 + linux_axis the input subsystem axis to map to this
3757 + rotary encoder. Defaults to 0 (ABS_X / REL_X)
3758 + rollover Automatic rollover when the rotary value
3759 + becomes greater than the specified steps or
3760 + smaller than 0. For absolute axis only.
3761 + steps-per-period Number of steps (stable states) per period.
3762 + The values have the following meaning:
3763 + 1: Full-period mode (default)
3764 + 2: Half-period mode
3765 + 4: Quarter-period mode
3766 + steps Number of steps in a full turnaround of the
3767 + encoder. Only relevant for absolute axis.
3768 + Defaults to 24 which is a typical value for
3769 + such devices.
3770 + wakeup Boolean, rotary encoder can wake up the
3771 + system.
3772 + encoding String, the method used to encode steps.
3773 + Supported are "gray" (the default and more
3774 + common) and "binary".
3775 +
3776 +
3777 +Name: rpi-backlight
3778 +Info: Raspberry Pi official display backlight driver
3779 +Load: dtoverlay=rpi-backlight
3780 +Params: <None>
3781 +
3782 +
3783 +Name: rpi-cirrus-wm5102
3784 +Info: Configures the Cirrus Logic Audio Card
3785 +Load: dtoverlay=rpi-cirrus-wm5102
3786 +Params: <None>
3787 +
3788 +
3789 +Name: rpi-dac
3790 +Info: Configures the RPi DAC audio card
3791 +Load: dtoverlay=rpi-dac
3792 +Params: <None>
3793 +
3794 +
3795 +Name: rpi-display
3796 +Info: RPi-Display - 2.8" Touch Display by Watterott
3797 +Load: dtoverlay=rpi-display,<param>=<val>
3798 +Params: speed Display SPI bus speed
3799 + rotate Display rotation {0,90,180,270}
3800 + fps Delay between frame updates
3801 + debug Debug output level {0-7}
3802 + xohms Touchpanel sensitivity (X-plate resistance)
3803 + swapxy Swap x and y axis
3804 + backlight Change backlight GPIO pin {e.g. 12, 18}
3805 +
3806 +
3807 +Name: rpi-ft5406
3808 +Info: Official Raspberry Pi display touchscreen
3809 +Load: dtoverlay=rpi-ft5406,<param>=<val>
3810 +Params: touchscreen-size-x Touchscreen X resolution (default 800)
3811 + touchscreen-size-y Touchscreen Y resolution (default 600);
3812 + touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
3813 + touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
3814 + touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
3815 +
3816 +
3817 +Name: rpi-proto
3818 +Info: Configures the RPi Proto audio card
3819 +Load: dtoverlay=rpi-proto
3820 +Params: <None>
3821 +
3822 +
3823 +Name: rpi-sense
3824 +Info: Raspberry Pi Sense HAT
3825 +Load: dtoverlay=rpi-sense
3826 +Params: <None>
3827 +
3828 +
3829 +Name: rpi-tv
3830 +Info: Raspberry Pi TV HAT
3831 +Load: dtoverlay=rpi-tv
3832 +Params: <None>
3833 +
3834 +
3835 +Name: rra-digidac1-wm8741-audio
3836 +Info: Configures the Red Rocks Audio DigiDAC1 soundcard
3837 +Load: dtoverlay=rra-digidac1-wm8741-audio
3838 +Params: <None>
3839 +
3840 +
3841 +Name: sc16is750-i2c
3842 +Info: Overlay for the NXP SC16IS750 UART with I2C Interface
3843 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
3844 + select another address, please refer to table 10 in reference manual.
3845 +Load: dtoverlay=sc16is750-i2c,<param>=<val>
3846 +Params: int_pin GPIO used for IRQ (default 24)
3847 + addr Address (default 0x48)
3848 +
3849 +
3850 +Name: sc16is752-i2c
3851 +Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
3852 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
3853 + select another address, please refer to table 10 in reference manual.
3854 +Load: dtoverlay=sc16is752-i2c,<param>=<val>
3855 +Params: int_pin GPIO used for IRQ (default 24)
3856 + addr Address (default 0x48)
3857 + xtal On-board crystal frequency (default 14745600)
3858 +
3859 +
3860 +Name: sc16is752-spi1
3861 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
3862 + Enables the chip on SPI1.
3863 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3864 + A+, B+, Zero and PI2 B; as well as the Compute Module.
3865 +
3866 +Load: dtoverlay=sc16is752-spi1,<param>=<val>
3867 +Params: int_pin GPIO used for IRQ (default 24)
3868 +
3869 +
3870 +Name: sdhost
3871 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
3872 + N.B. This overlay is designed for situations where the mmc driver is
3873 + the default, so it disables the other (mmc) interface - this will kill
3874 + WiFi on a Pi3. If this isn't what you want, either use the sdtweak
3875 + overlay or the new sd_* dtparams of the base DTBs.
3876 +Load: dtoverlay=sdhost,<param>=<val>
3877 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3878 + requests 50MHz
3879 +
3880 + force_pio Disable DMA support (default off)
3881 +
3882 + pio_limit Number of blocks above which to use DMA
3883 + (default 1)
3884 +
3885 + debug Enable debug output (default off)
3886 +
3887 +
3888 +Name: sdio
3889 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
3890 + and enables SDIO via GPIOs 22-27.
3891 +Load: dtoverlay=sdio,<param>=<val>
3892 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
3893 + framework requests 50MHz
3894 +
3895 + poll_once Disable SDIO-device polling every second
3896 + (default on: polling once at boot-time)
3897 +
3898 + bus_width Set the SDIO host bus width (default 4 bits)
3899 +
3900 +
3901 +Name: sdio-1bit
3902 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
3903 + and enables 1-bit SDIO via GPIOs 22-25.
3904 +Load: dtoverlay=sdio-1bit,<param>=<val>
3905 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
3906 + framework requests 50MHz
3907 +
3908 + poll_once Disable SDIO-device polling every second
3909 + (default on: polling once at boot-time)
3910 +
3911 +
3912 +Name: sdtweak
3913 +Info: Tunes the bcm2835-sdhost SD/MMC driver
3914 + N.B. This functionality is now available via the sd_* dtparams in the
3915 + base DTB.
3916 +Load: dtoverlay=sdtweak,<param>=<val>
3917 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3918 + requests 50MHz
3919 +
3920 + force_pio Disable DMA support (default off)
3921 +
3922 + pio_limit Number of blocks above which to use DMA
3923 + (default 1)
3924 +
3925 + debug Enable debug output (default off)
3926 +
3927 + poll_once Looks for a card once after booting. Useful
3928 + for network booting scenarios to avoid the
3929 + overhead of continuous polling. N.B. Using
3930 + this option restricts the system to using a
3931 + single card per boot (or none at all).
3932 + (default off)
3933 +
3934 + enable Set to off to completely disable the interface
3935 + (default on)
3936 +
3937 +
3938 +Name: smi
3939 +Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
3940 +Load: dtoverlay=smi
3941 +Params: <None>
3942 +
3943 +
3944 +Name: smi-dev
3945 +Info: Enables the userspace interface for the SMI driver
3946 +Load: dtoverlay=smi-dev
3947 +Params: <None>
3948 +
3949 +
3950 +Name: smi-nand
3951 +Info: Enables access to NAND flash via the SMI interface
3952 +Load: dtoverlay=smi-nand
3953 +Params: <None>
3954 +
3955 +
3956 +Name: spi-gpio35-39
3957 +Info: Move SPI function block to GPIO 35 to 39
3958 +Load: dtoverlay=spi-gpio35-39
3959 +Params: <None>
3960 +
3961 +
3962 +Name: spi-rtc
3963 +Info: Adds support for a number of SPI Real Time Clock devices
3964 +Load: dtoverlay=spi-rtc,<param>=<val>
3965 +Params: pcf2123 Select the PCF2123 device
3966 +
3967 +
3968 +Name: spi0-cs
3969 +Info: Allows the (software) CS pins for SPI0 to be changed
3970 +Load: dtoverlay=spi0-cs,<param>=<val>
3971 +Params: cs0_pin GPIO pin for CS0 (default 8)
3972 + cs1_pin GPIO pin for CS1 (default 7)
3973 +
3974 +
3975 +Name: spi0-hw-cs
3976 +Info: Re-enables hardware CS/CE (chip selects) for SPI0
3977 +Load: dtoverlay=spi0-hw-cs
3978 +Params: <None>
3979 +
3980 +
3981 +Name: spi1-1cs
3982 +Info: Enables spi1 with a single chip select (CS) line and associated spidev
3983 + dev node. The gpio pin number for the CS line and spidev device node
3984 + creation are configurable.
3985 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3986 + A+, B+, Zero and PI2 B; as well as the Compute Module.
3987 +Load: dtoverlay=spi1-1cs,<param>=<val>
3988 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
3989 + cs0_spidev Set to 'disabled' to stop the creation of a
3990 + userspace device node /dev/spidev1.0 (default
3991 + is 'okay' or enabled).
3992 +
3993 +
3994 +Name: spi1-2cs
3995 +Info: Enables spi1 with two chip select (CS) lines and associated spidev
3996 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
3997 + creation are configurable.
3998 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3999 + A+, B+, Zero and PI2 B; as well as the Compute Module.
4000 +Load: dtoverlay=spi1-2cs,<param>=<val>
4001 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4002 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
4003 + cs0_spidev Set to 'disabled' to stop the creation of a
4004 + userspace device node /dev/spidev1.0 (default
4005 + is 'okay' or enabled).
4006 + cs1_spidev Set to 'disabled' to stop the creation of a
4007 + userspace device node /dev/spidev1.1 (default
4008 + is 'okay' or enabled).
4009 +
4010 +
4011 +Name: spi1-3cs
4012 +Info: Enables spi1 with three chip select (CS) lines and associated spidev
4013 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4014 + creation are configurable.
4015 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
4016 + A+, B+, Zero and PI2 B; as well as the Compute Module.
4017 +Load: dtoverlay=spi1-3cs,<param>=<val>
4018 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4019 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
4020 + cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
4021 + cs0_spidev Set to 'disabled' to stop the creation of a
4022 + userspace device node /dev/spidev1.0 (default
4023 + is 'okay' or enabled).
4024 + cs1_spidev Set to 'disabled' to stop the creation of a
4025 + userspace device node /dev/spidev1.1 (default
4026 + is 'okay' or enabled).
4027 + cs2_spidev Set to 'disabled' to stop the creation of a
4028 + userspace device node /dev/spidev1.2 (default
4029 + is 'okay' or enabled).
4030 +
4031 +
4032 +Name: spi2-1cs
4033 +Info: Enables spi2 with a single chip select (CS) line and associated spidev
4034 + dev node. The gpio pin number for the CS line and spidev device node
4035 + creation are configurable.
4036 + N.B.: spi2 is only accessible with the Compute Module.
4037 +Load: dtoverlay=spi2-1cs,<param>=<val>
4038 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4039 + cs0_spidev Set to 'disabled' to stop the creation of a
4040 + userspace device node /dev/spidev2.0 (default
4041 + is 'okay' or enabled).
4042 +
4043 +
4044 +Name: spi2-2cs
4045 +Info: Enables spi2 with two chip select (CS) lines and associated spidev
4046 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4047 + creation are configurable.
4048 + N.B.: spi2 is only accessible with the Compute Module.
4049 +Load: dtoverlay=spi2-2cs,<param>=<val>
4050 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4051 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
4052 + cs0_spidev Set to 'disabled' to stop the creation of a
4053 + userspace device node /dev/spidev2.0 (default
4054 + is 'okay' or enabled).
4055 + cs1_spidev Set to 'disabled' to stop the creation of a
4056 + userspace device node /dev/spidev2.1 (default
4057 + is 'okay' or enabled).
4058 +
4059 +
4060 +Name: spi2-3cs
4061 +Info: Enables spi2 with three chip select (CS) lines and associated spidev
4062 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4063 + creation are configurable.
4064 + N.B.: spi2 is only accessible with the Compute Module.
4065 +Load: dtoverlay=spi2-3cs,<param>=<val>
4066 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4067 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
4068 + cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
4069 + cs0_spidev Set to 'disabled' to stop the creation of a
4070 + userspace device node /dev/spidev2.0 (default
4071 + is 'okay' or enabled).
4072 + cs1_spidev Set to 'disabled' to stop the creation of a
4073 + userspace device node /dev/spidev2.1 (default
4074 + is 'okay' or enabled).
4075 + cs2_spidev Set to 'disabled' to stop the creation of a
4076 + userspace device node /dev/spidev2.2 (default
4077 + is 'okay' or enabled).
4078 +
4079 +
4080 +Name: superaudioboard
4081 +Info: Configures the SuperAudioBoard sound card
4082 +Load: dtoverlay=superaudioboard,<param>=<val>
4083 +Params: gpiopin GPIO pin for codec reset
4084 +
4085 +
4086 +Name: sx150x
4087 +Info: Configures the Semtech SX150X I2C GPIO expanders.
4088 +Load: dtoverlay=sx150x,<param>=<val>
4089 +Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
4090 + address <m>. <x> may be 1-9. <n> may be 0 or 1.
4091 + Permissible values of <m> (which is denoted in
4092 + hex) depend on the device variant. For SX1501,
4093 + SX1502, SX1504 and SX1505, <m> may be 20 or 21.
4094 + For SX1503 and SX1506, <m> may be 20. For
4095 + SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
4096 + For SX1508, <m> may be 20, 21, 22 or 23.
4097 +
4098 + sx150<x>-<n>-<m>-int-gpio
4099 + Integer, enables interrupts on SX150X device on
4100 + I2C#<n> with slave address <m>, specifies
4101 + the GPIO pin to which NINT output of SX150X is
4102 + connected.
4103 +
4104 +
4105 +Name: tinylcd35
4106 +Info: 3.5" Color TFT Display by www.tinylcd.com
4107 + Options: Touch, RTC, keypad
4108 +Load: dtoverlay=tinylcd35,<param>=<val>
4109 +Params: speed Display SPI bus speed
4110 +
4111 + rotate Display rotation {0,90,180,270}
4112 +
4113 + fps Delay between frame updates
4114 +
4115 + debug Debug output level {0-7}
4116 +
4117 + touch Enable touch panel
4118 +
4119 + touchgpio Touch controller IRQ GPIO
4120 +
4121 + xohms Touchpanel: Resistance of X-plate in ohms
4122 +
4123 + rtc-pcf PCF8563 Real Time Clock
4124 +
4125 + rtc-ds DS1307 Real Time Clock
4126 +
4127 + keypad Enable keypad
4128 +
4129 + Examples:
4130 + Display with touchpanel, PCF8563 RTC and keypad:
4131 + dtoverlay=tinylcd35,touch,rtc-pcf,keypad
4132 + Old touch display:
4133 + dtoverlay=tinylcd35,touch,touchgpio=3
4134 +
4135 +
4136 +Name: uart0
4137 +Info: Change the pin usage of uart0
4138 +Load: dtoverlay=uart0,<param>=<val>
4139 +Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
4140 +
4141 + rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
4142 +
4143 + pin_func Alternative pin function - 4(Alt0) for 14&15,
4144 + 7(Alt3) for 32&33, 6(Alt2) for 36&37
4145 +
4146 +
4147 +Name: uart1
4148 +Info: Change the pin usage of uart1
4149 +Load: dtoverlay=uart1,<param>=<val>
4150 +Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
4151 +
4152 + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
4153 +
4154 +
4155 +Name: upstream
4156 +Info: Allow usage of downstream .dtb with upstream kernel. Comprises
4157 + vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays.
4158 +Load: dtoverlay=upstream
4159 +Params: <None>
4160 +
4161 +
4162 +Name: upstream-aux-interrupt
4163 +Info: Allow usage of downstream .dtb with upstream kernel by binding AUX
4164 + devices directly to the shared AUX interrupt line. One of the parts
4165 + of the 'upstream' overlay
4166 +Load: dtoverlay=upstream-aux-interrupt
4167 +Params: <None>
4168 +
4169 +
4170 +Name: vc4-fkms-v3d
4171 +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
4172 + display stack.
4173 +Load: dtoverlay=vc4-fkms-v3d,<param>
4174 +Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
4175 + cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
4176 + cma-128 CMA is 128MB, 128MB-aligned
4177 + cma-96 CMA is 96MB, 128MB-aligned
4178 + cma-64 CMA is 64MB, 64MB-aligned
4179 +
4180 +
4181 +Name: vc4-kms-v3d
4182 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
4183 + booting to GUI while this overlay is in use will cause interesting
4184 + lockups.
4185 +Load: dtoverlay=vc4-kms-v3d,<param>
4186 +Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
4187 + cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
4188 + cma-128 CMA is 128MB, 128MB-aligned
4189 + cma-96 CMA is 96MB, 128MB-aligned
4190 + cma-64 CMA is 64MB, 64MB-aligned
4191 +
4192 +
4193 +Name: vga666
4194 +Info: Overlay for the Fen Logic VGA666 board
4195 + This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
4196 + after the kernel has started.
4197 +Load: dtoverlay=vga666
4198 +Params: <None>
4199 +
4200 +
4201 +Name: w1-gpio
4202 +Info: Configures the w1-gpio Onewire interface module.
4203 + Use this overlay if you *don't* need a GPIO to drive an external pullup.
4204 +Load: dtoverlay=w1-gpio,<param>=<val>
4205 +Params: gpiopin GPIO for I/O (default "4")
4206 +
4207 + pullup Non-zero, "on", or "y" to enable the parasitic
4208 + power (2-wire, power-on-data) feature
4209 +
4210 +
4211 +Name: w1-gpio-pullup
4212 +Info: Configures the w1-gpio Onewire interface module.
4213 + Use this overlay if you *do* need a GPIO to drive an external pullup.
4214 +Load: dtoverlay=w1-gpio-pullup,<param>=<val>
4215 +Params: gpiopin GPIO for I/O (default "4")
4216 +
4217 + pullup Non-zero, "on", or "y" to enable the parasitic
4218 + power (2-wire, power-on-data) feature
4219 +
4220 + extpullup GPIO for external pullup (default "5")
4221 +
4222 +
4223 +Name: wittypi
4224 +Info: Configures the wittypi RTC module.
4225 +Load: dtoverlay=wittypi,<param>=<val>
4226 +Params: led_gpio GPIO for LED (default "17")
4227 + led_trigger Choose which activity the LED tracks (default
4228 + "default-on")
4229 +
4230 +
4231 +Troubleshooting
4232 +===============
4233 +
4234 +If you are experiencing problems that you think are DT-related, enable DT
4235 +diagnostic output by adding this to /boot/config.txt:
4236 +
4237 + dtdebug=on
4238 +
4239 +and rebooting. Then run:
4240 +
4241 + sudo vcdbg log msg
4242 +
4243 +and look for relevant messages.
4244 +
4245 +Further reading
4246 +===============
4247 +
4248 +This is only meant to be a quick introduction to the subject of Device Tree on
4249 +Raspberry Pi. There is a more complete explanation here:
4250 +
4251 +http://www.raspberrypi.org/documentation/configuration/device-tree.md
4252 --- /dev/null
4253 +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
4254 @@ -0,0 +1,40 @@
4255 +// Definitions for ADAU1977 ADC
4256 +/dts-v1/;
4257 +/plugin/;
4258 +
4259 +/ {
4260 + compatible = "brcm,bcm2708";
4261 +
4262 + fragment@0 {
4263 + target = <&i2c>;
4264 +
4265 + __overlay__ {
4266 + #address-cells = <1>;
4267 + #size-cells = <0>;
4268 + status = "okay";
4269 +
4270 + adau1977: codec@11 {
4271 + compatible = "adi,adau1977";
4272 + reg = <0x11>;
4273 + reset-gpios = <&gpio 5 0>;
4274 + AVDD-supply = <&vdd_3v3_reg>;
4275 + };
4276 + };
4277 + };
4278 +
4279 + fragment@1 {
4280 + target = <&i2s>;
4281 + __overlay__ {
4282 + status = "okay";
4283 + };
4284 + };
4285 +
4286 + fragment@2 {
4287 + target = <&sound>;
4288 + __overlay__ {
4289 + compatible = "adi,adau1977-adc";
4290 + i2s-controller = <&i2s>;
4291 + status = "okay";
4292 + };
4293 + };
4294 +};
4295 --- /dev/null
4296 +++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
4297 @@ -0,0 +1,52 @@
4298 +/dts-v1/;
4299 +/plugin/;
4300 +
4301 +/ {
4302 + compatible = "brcm,bcm2708";
4303 +
4304 + fragment@0 {
4305 + target = <&i2s>;
4306 + __overlay__ {
4307 + status = "okay";
4308 + };
4309 + };
4310 +
4311 + fragment@1 {
4312 + target-path = "/";
4313 + __overlay__ {
4314 + adau7002_codec: adau7002-codec {
4315 + #sound-dai-cells = <0>;
4316 + compatible = "adi,adau7002";
4317 +/* IOVDD-supply = <&supply>;*/
4318 + status = "okay";
4319 + };
4320 + };
4321 + };
4322 +
4323 + fragment@2 {
4324 + target = <&sound>;
4325 + sound_overlay: __overlay__ {
4326 + compatible = "simple-audio-card";
4327 + simple-audio-card,format = "i2s";
4328 + simple-audio-card,name = "adau7002";
4329 + simple-audio-card,bitclock-slave = <&dailink0_slave>;
4330 + simple-audio-card,frame-slave = <&dailink0_slave>;
4331 + simple-audio-card,widgets =
4332 + "Microphone", "Microphone Jack";
4333 + simple-audio-card,routing =
4334 + "PDM_DAT", "Microphone Jack";
4335 + status = "okay";
4336 + simple-audio-card,cpu {
4337 + sound-dai = <&i2s>;
4338 + };
4339 + dailink0_slave: simple-audio-card,codec {
4340 + sound-dai = <&adau7002_codec>;
4341 + };
4342 + };
4343 + };
4344 +
4345 +
4346 + __overrides__ {
4347 + card-name = <&sound_overlay>,"simple-audio-card,name";
4348 + };
4349 +};
4350 --- /dev/null
4351 +++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
4352 @@ -0,0 +1,98 @@
4353 +/*
4354 + * 2016 - Erik Sejr
4355 + */
4356 +/dts-v1/;
4357 +/plugin/;
4358 +
4359 +/ {
4360 + compatible = "brcm,bcm2708";
4361 + /* ----------- ADS1015 ------------ */
4362 + fragment@0 {
4363 + target = <&i2c_arm>;
4364 + __overlay__ {
4365 + #address-cells = <1>;
4366 + #size-cells = <0>;
4367 + status = "okay";
4368 + ads1015: ads1015 {
4369 + compatible = "ti,ads1015";
4370 + status = "okay";
4371 + #address-cells = <1>;
4372 + #size-cells = <0>;
4373 + reg = <0x48>;
4374 + };
4375 + };
4376 + };
4377 +
4378 + fragment@1 {
4379 + target-path = "i2c_arm/ads1015";
4380 + __overlay__ {
4381 + #address-cells = <1>;
4382 + #size-cells = <0>;
4383 + channel_a: channel_a {
4384 + reg = <4>;
4385 + ti,gain = <2>;
4386 + ti,datarate = <4>;
4387 + };
4388 + };
4389 + };
4390 +
4391 + fragment@2 {
4392 + target-path = "i2c_arm/ads1015";
4393 + __dormant__ {
4394 + #address-cells = <1>;
4395 + #size-cells = <0>;
4396 + channel_b: channel_b {
4397 + reg = <5>;
4398 + ti,gain = <2>;
4399 + ti,datarate = <4>;
4400 + };
4401 + };
4402 + };
4403 +
4404 + fragment@3 {
4405 + target-path = "i2c_arm/ads1015";
4406 + __dormant__ {
4407 + #address-cells = <1>;
4408 + #size-cells = <0>;
4409 + channel_c: channel_c {
4410 + reg = <6>;
4411 + ti,gain = <2>;
4412 + ti,datarate = <4>;
4413 + };
4414 + };
4415 + };
4416 +
4417 + fragment@4 {
4418 + target-path = "i2c_arm/ads1015";
4419 + __dormant__ {
4420 + #address-cells = <1>;
4421 + #size-cells = <0>;
4422 + channel_d: channel_d {
4423 + reg = <7>;
4424 + ti,gain = <2>;
4425 + ti,datarate = <4>;
4426 + };
4427 + };
4428 + };
4429 +
4430 + __overrides__ {
4431 + addr = <&ads1015>,"reg:0";
4432 + cha_enable = <0>,"=1";
4433 + cha_cfg = <&channel_a>,"reg:0";
4434 + cha_gain = <&channel_a>,"ti,gain:0";
4435 + cha_datarate = <&channel_a>,"ti,datarate:0";
4436 + chb_enable = <0>,"=2";
4437 + chb_cfg = <&channel_b>,"reg:0";
4438 + chb_gain = <&channel_b>,"ti,gain:0";
4439 + chb_datarate = <&channel_b>,"ti,datarate:0";
4440 + chc_enable = <0>,"=3";
4441 + chc_cfg = <&channel_c>,"reg:0";
4442 + chc_gain = <&channel_c>,"ti,gain:0";
4443 + chc_datarate = <&channel_c>,"ti,datarate:0";
4444 + chd_enable = <0>,"=4";
4445 + chd_cfg = <&channel_d>,"reg:0";
4446 + chd_gain = <&channel_d>,"ti,gain:0";
4447 + chd_datarate = <&channel_d>,"ti,datarate:0";
4448 + };
4449 +
4450 +};
4451 --- /dev/null
4452 +++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
4453 @@ -0,0 +1,103 @@
4454 +/*
4455 + * TI ADS1115 multi-channel ADC overlay
4456 + */
4457 +
4458 +/dts-v1/;
4459 +/plugin/;
4460 +
4461 +/ {
4462 + compatible = "brcm,bcm2708";
4463 +
4464 + fragment@0 {
4465 + target = <&i2c_arm>;
4466 + __overlay__ {
4467 + #address-cells = <1>;
4468 + #size-cells = <0>;
4469 + status = "okay";
4470 +
4471 + ads1115: ads1115 {
4472 + compatible = "ti,ads1115";
4473 + status = "okay";
4474 + #address-cells = <1>;
4475 + #size-cells = <0>;
4476 + reg = <0x48>;
4477 + };
4478 + };
4479 + };
4480 +
4481 + fragment@1 {
4482 + target-path = "i2c_arm/ads1115";
4483 + __dormant__ {
4484 + #address-cells = <1>;
4485 + #size-cells = <0>;
4486 +
4487 + channel_a: channel_a {
4488 + reg = <4>;
4489 + ti,gain = <1>;
4490 + ti,datarate = <7>;
4491 + };
4492 + };
4493 + };
4494 +
4495 + fragment@2 {
4496 + target-path = "i2c_arm/ads1115";
4497 + __dormant__ {
4498 + #address-cells = <1>;
4499 + #size-cells = <0>;
4500 +
4501 + channel_b: channel_b {
4502 + reg = <5>;
4503 + ti,gain = <1>;
4504 + ti,datarate = <7>;
4505 + };
4506 + };
4507 + };
4508 +
4509 + fragment@3 {
4510 + target-path = "i2c_arm/ads1115";
4511 + __dormant__ {
4512 + #address-cells = <1>;
4513 + #size-cells = <0>;
4514 +
4515 + channel_c: channel_c {
4516 + reg = <6>;
4517 + ti,gain = <1>;
4518 + ti,datarate = <7>;
4519 + };
4520 + };
4521 + };
4522 +
4523 + fragment@4 {
4524 + target-path = "i2c_arm/ads1115";
4525 + __dormant__ {
4526 + #address-cells = <1>;
4527 + #size-cells = <0>;
4528 +
4529 + channel_d: channel_d {
4530 + reg = <7>;
4531 + ti,gain = <1>;
4532 + ti,datarate = <7>;
4533 + };
4534 + };
4535 + };
4536 +
4537 + __overrides__ {
4538 + addr = <&ads1115>,"reg:0";
4539 + cha_enable = <0>,"=1";
4540 + cha_cfg = <&channel_a>,"reg:0";
4541 + cha_gain = <&channel_a>,"ti,gain:0";
4542 + cha_datarate = <&channel_a>,"ti,datarate:0";
4543 + chb_enable = <0>,"=2";
4544 + chb_cfg = <&channel_b>,"reg:0";
4545 + chb_gain = <&channel_b>,"ti,gain:0";
4546 + chb_datarate = <&channel_b>,"ti,datarate:0";
4547 + chc_enable = <0>,"=3";
4548 + chc_cfg = <&channel_c>,"reg:0";
4549 + chc_gain = <&channel_c>,"ti,gain:0";
4550 + chc_datarate = <&channel_c>,"ti,datarate:0";
4551 + chd_enable = <0>,"=4";
4552 + chd_cfg = <&channel_d>,"reg:0";
4553 + chd_gain = <&channel_d>,"ti,gain:0";
4554 + chd_datarate = <&channel_d>,"ti,datarate:0";
4555 + };
4556 +};
4557 --- /dev/null
4558 +++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
4559 @@ -0,0 +1,89 @@
4560 +/*
4561 + * Generic Device Tree overlay for the ADS7846 touch controller
4562 + *
4563 + */
4564 +
4565 +/dts-v1/;
4566 +/plugin/;
4567 +
4568 +/ {
4569 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
4570 +
4571 + fragment@0 {
4572 + target = <&spi0>;
4573 + __overlay__ {
4574 + status = "okay";
4575 + };
4576 + };
4577 +
4578 + fragment@1 {
4579 + target = <&spidev0>;
4580 + __overlay__ {
4581 + status = "disabled";
4582 + };
4583 + };
4584 +
4585 + fragment@2 {
4586 + target = <&spidev1>;
4587 + __overlay__ {
4588 + status = "disabled";
4589 + };
4590 + };
4591 +
4592 + fragment@3 {
4593 + target = <&gpio>;
4594 + __overlay__ {
4595 + ads7846_pins: ads7846_pins {
4596 + brcm,pins = <255>; /* illegal default value */
4597 + brcm,function = <0>; /* in */
4598 + brcm,pull = <0>; /* none */
4599 + };
4600 + };
4601 + };
4602 +
4603 + fragment@4 {
4604 + target = <&spi0>;
4605 + __overlay__ {
4606 + /* needed to avoid dtc warning */
4607 + #address-cells = <1>;
4608 + #size-cells = <0>;
4609 +
4610 + ads7846: ads7846@1 {
4611 + compatible = "ti,ads7846";
4612 + reg = <1>;
4613 + pinctrl-names = "default";
4614 + pinctrl-0 = <&ads7846_pins>;
4615 +
4616 + spi-max-frequency = <2000000>;
4617 + interrupts = <255 2>; /* high-to-low edge triggered */
4618 + interrupt-parent = <&gpio>;
4619 + pendown-gpio = <&gpio 255 0>;
4620 +
4621 + /* driver defaults */
4622 + ti,x-min = /bits/ 16 <0>;
4623 + ti,y-min = /bits/ 16 <0>;
4624 + ti,x-max = /bits/ 16 <0x0FFF>;
4625 + ti,y-max = /bits/ 16 <0x0FFF>;
4626 + ti,pressure-min = /bits/ 16 <0>;
4627 + ti,pressure-max = /bits/ 16 <0xFFFF>;
4628 + ti,x-plate-ohms = /bits/ 16 <400>;
4629 + };
4630 + };
4631 + };
4632 + __overrides__ {
4633 + cs = <&ads7846>,"reg:0";
4634 + speed = <&ads7846>,"spi-max-frequency:0";
4635 + penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
4636 + <&ads7846>,"interrupts:0",
4637 + <&ads7846>,"pendown-gpio:4";
4638 + penirq_pull = <&ads7846_pins>,"brcm,pull:0";
4639 + swapxy = <&ads7846>,"ti,swap-xy?";
4640 + xmin = <&ads7846>,"ti,x-min;0";
4641 + ymin = <&ads7846>,"ti,y-min;0";
4642 + xmax = <&ads7846>,"ti,x-max;0";
4643 + ymax = <&ads7846>,"ti,y-max;0";
4644 + pmin = <&ads7846>,"ti,pressure-min;0";
4645 + pmax = <&ads7846>,"ti,pressure-max;0";
4646 + xohms = <&ads7846>,"ti,x-plate-ohms;0";
4647 + };
4648 +};
4649 --- /dev/null
4650 +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
4651 @@ -0,0 +1,49 @@
4652 +// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
4653 +/dts-v1/;
4654 +/plugin/;
4655 +
4656 +/ {
4657 + compatible = "brcm,bcm2708";
4658 +
4659 + fragment@0 {
4660 + target = <&i2s>;
4661 + __overlay__ {
4662 + status = "okay";
4663 + };
4664 + };
4665 +
4666 + fragment@1 {
4667 + target = <&i2c1>;
4668 + __overlay__ {
4669 + #address-cells = <1>;
4670 + #size-cells = <0>;
4671 + status = "okay";
4672 +
4673 + pcm5122@4c {
4674 + #sound-dai-cells = <0>;
4675 + compatible = "ti,pcm5122";
4676 + reg = <0x4c>;
4677 + AVDD-supply = <&vdd_3v3_reg>;
4678 + DVDD-supply = <&vdd_3v3_reg>;
4679 + CPVDD-supply = <&vdd_3v3_reg>;
4680 + status = "okay";
4681 + };
4682 + };
4683 + };
4684 +
4685 + fragment@2 {
4686 + target = <&sound>;
4687 + frag2: __overlay__ {
4688 + compatible = "iqaudio,iqaudio-dac";
4689 + card_name = "Akkordion";
4690 + dai_name = "IQaudIO DAC";
4691 + dai_stream_name = "IQaudIO DAC HiFi";
4692 + i2s-controller = <&i2s>;
4693 + status = "okay";
4694 + };
4695 + };
4696 +
4697 + __overrides__ {
4698 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
4699 + };
4700 +};
4701 --- /dev/null
4702 +++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
4703 @@ -0,0 +1,59 @@
4704 +/*
4705 + * Definitions for Allo Boss DAC board
4706 + */
4707 +
4708 +/dts-v1/;
4709 +/plugin/;
4710 +
4711 +/ {
4712 + compatible = "brcm,bcm2708";
4713 +
4714 + fragment@0 {
4715 + target-path = "/clocks";
4716 + __overlay__ {
4717 + boss_osc: boss_osc {
4718 + compatible = "allo,dac-clk";
4719 + #clock-cells = <0>;
4720 + };
4721 + };
4722 + };
4723 +
4724 + fragment@1 {
4725 + target = <&i2s>;
4726 + __overlay__ {
4727 + status = "okay";
4728 + };
4729 + };
4730 +
4731 + fragment@2 {
4732 + target = <&i2c1>;
4733 + __overlay__ {
4734 + #address-cells = <1>;
4735 + #size-cells = <0>;
4736 + status = "okay";
4737 +
4738 + pcm5122@4d {
4739 + #sound-dai-cells = <0>;
4740 + compatible = "ti,pcm5122";
4741 + clocks = <&boss_osc>;
4742 + reg = <0x4d>;
4743 + status = "okay";
4744 + };
4745 + };
4746 + };
4747 +
4748 + fragment@3 {
4749 + target = <&sound>;
4750 + boss_dac: __overlay__ {
4751 + compatible = "allo,boss-dac";
4752 + i2s-controller = <&i2s>;
4753 + mute-gpios = <&gpio 6 1>;
4754 + status = "okay";
4755 + };
4756 + };
4757 +
4758 + __overrides__ {
4759 + 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
4760 + slave = <&boss_dac>,"allo,slave?";
4761 + };
4762 +};
4763 --- /dev/null
4764 +++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
4765 @@ -0,0 +1,44 @@
4766 +// Definitions for Allo DigiOne
4767 +/dts-v1/;
4768 +/plugin/;
4769 +
4770 +/ {
4771 + compatible = "brcm,bcm2708";
4772 +
4773 + fragment@0 {
4774 + target = <&i2s>;
4775 + __overlay__ {
4776 + status = "okay";
4777 + };
4778 + };
4779 +
4780 + fragment@1 {
4781 + target = <&i2c1>;
4782 + __overlay__ {
4783 + #address-cells = <1>;
4784 + #size-cells = <0>;
4785 + status = "okay";
4786 +
4787 + wm8804@3b {
4788 + #sound-dai-cells = <0>;
4789 + compatible = "wlf,wm8804";
4790 + reg = <0x3b>;
4791 + PVDD-supply = <&vdd_3v3_reg>;
4792 + DVDD-supply = <&vdd_3v3_reg>;
4793 + status = "okay";
4794 + wlf,reset-gpio = <&gpio 17 0>;
4795 + };
4796 + };
4797 + };
4798 +
4799 + fragment@2 {
4800 + target = <&sound>;
4801 + __overlay__ {
4802 + compatible = "allo,allo-digione";
4803 + i2s-controller = <&i2s>;
4804 + status = "okay";
4805 + clock44-gpio = <&gpio 5 0>;
4806 + clock48-gpio = <&gpio 6 0>;
4807 + };
4808 + };
4809 +};
4810 --- /dev/null
4811 +++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
4812 @@ -0,0 +1,57 @@
4813 +/*
4814 + * Definitions for Allo Katana DAC boards
4815 + */
4816 +
4817 +/dts-v1/;
4818 +/plugin/;
4819 +
4820 +/ {
4821 + compatible = "brcm,bcm2708";
4822 +
4823 + fragment@0 {
4824 + target = <&i2s>;
4825 + __overlay__ {
4826 + #sound-dai-cells = <0>;
4827 + status = "okay";
4828 + cpu_port: port {
4829 + cpu_endpoint: endpoint {
4830 + remote-endpoint = <&codec_endpoint>;
4831 + bitclock-master = <&codec_endpoint>;
4832 + frame-master = <&codec_endpoint>;
4833 + dai-format = "i2s";
4834 + };
4835 + };
4836 + };
4837 + };
4838 +
4839 + fragment@1 {
4840 + target = <&i2c1>;
4841 + __overlay__ {
4842 + #address-cells = <1>;
4843 + #size-cells = <0>;
4844 + status = "okay";
4845 +
4846 + allo-katana-codec@30 {
4847 + #sound-dai-cells = <0>;
4848 + compatible = "allo,allo-katana-codec";
4849 + reg = <0x30>;
4850 + port {
4851 + codec_endpoint: endpoint {
4852 + remote-endpoint = <&cpu_endpoint>;
4853 + };
4854 + };
4855 + };
4856 + };
4857 + };
4858 +
4859 + fragment@2 {
4860 + target = <&sound>;
4861 + katana_dac: __overlay__ {
4862 + compatible = "audio-graph-card";
4863 + label = "Allo Katana";
4864 + dais = <&cpu_port>;
4865 + status = "okay";
4866 + };
4867 + };
4868 +};
4869 +
4870 --- /dev/null
4871 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
4872 @@ -0,0 +1,54 @@
4873 +/*
4874 + * Definitions for Allo Piano DAC (2.0/2.1) boards
4875 + *
4876 + * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
4877 + * (left/right) and the other provides a subwoofer output, using DSP on the
4878 + * chip for digital high/low pass crossover.
4879 + * The initial support for this hardware, that doesn't require any codec driver
4880 + * modifications, uses only one DAC chip for stereo (left/right) output, the
4881 + * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
4882 + */
4883 +
4884 +/dts-v1/;
4885 +/plugin/;
4886 +
4887 +/ {
4888 + compatible = "brcm,bcm2708";
4889 +
4890 + fragment@0 {
4891 + target = <&i2s>;
4892 + __overlay__ {
4893 + status = "okay";
4894 + };
4895 + };
4896 +
4897 + fragment@1 {
4898 + target = <&i2c1>;
4899 + __overlay__ {
4900 + #address-cells = <1>;
4901 + #size-cells = <0>;
4902 + status = "okay";
4903 +
4904 + pcm5142@4c {
4905 + #sound-dai-cells = <0>;
4906 + compatible = "ti,pcm5142";
4907 + reg = <0x4c>;
4908 + status = "okay";
4909 + };
4910 + };
4911 + };
4912 +
4913 + fragment@2 {
4914 + target = <&sound>;
4915 + piano_dac: __overlay__ {
4916 + compatible = "allo,piano-dac";
4917 + i2s-controller = <&i2s>;
4918 + status = "okay";
4919 + };
4920 + };
4921 +
4922 + __overrides__ {
4923 + 24db_digital_gain =
4924 + <&piano_dac>,"allo,24db_digital_gain?";
4925 + };
4926 +};
4927 --- /dev/null
4928 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
4929 @@ -0,0 +1,55 @@
4930 +// Definitions for Piano DAC
4931 +/dts-v1/;
4932 +/plugin/;
4933 +
4934 +/ {
4935 + compatible = "brcm,bcm2708";
4936 +
4937 + fragment@0 {
4938 + target = <&i2s>;
4939 + __overlay__ {
4940 + status = "okay";
4941 + };
4942 + };
4943 +
4944 + fragment@1 {
4945 + target = <&i2c1>;
4946 + __overlay__ {
4947 + #address-cells = <1>;
4948 + #size-cells = <0>;
4949 + status = "okay";
4950 +
4951 + allo_pcm5122_4c: pcm5122@4c {
4952 + #sound-dai-cells = <0>;
4953 + compatible = "ti,pcm5122";
4954 + reg = <0x4c>;
4955 + status = "okay";
4956 + };
4957 + allo_pcm5122_4d: pcm5122@4d {
4958 + #sound-dai-cells = <0>;
4959 + compatible = "ti,pcm5122";
4960 + reg = <0x4d>;
4961 + status = "okay";
4962 + };
4963 + };
4964 + };
4965 +
4966 + fragment@2 {
4967 + target = <&sound>;
4968 + piano_dac: __overlay__ {
4969 + compatible = "allo,piano-dac-plus";
4970 + audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
4971 + i2s-controller = <&i2s>;
4972 + mute1-gpios = <&gpio 6 1>;
4973 + mute2-gpios = <&gpio 25 1>;
4974 + status = "okay";
4975 + };
4976 + };
4977 +
4978 + __overrides__ {
4979 + 24db_digital_gain =
4980 + <&piano_dac>,"allo,24db_digital_gain?";
4981 + glb_mclk =
4982 + <&piano_dac>,"allo,glb_mclk?";
4983 + };
4984 +};
4985 --- /dev/null
4986 +++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
4987 @@ -0,0 +1,57 @@
4988 +/dts-v1/;
4989 +/plugin/;
4990 +
4991 +/ {
4992 + compatible = "brcm,bcm2708";
4993 +
4994 + fragment@0 {
4995 + target = <&sound>;
4996 + __overlay__ {
4997 + compatible = "simple-audio-card";
4998 + simple-audio-card,name = "ApplePi-DAC";
4999 +
5000 + status = "okay";
5001 +
5002 + playback_link: simple-audio-card,dai-link@1 {
5003 + format = "i2s";
5004 +
5005 + p_cpu_dai: cpu {
5006 + sound-dai = <&i2s>;
5007 + dai-tdm-slot-num = <2>;
5008 + dai-tdm-slot-width = <32>;
5009 + };
5010 +
5011 + p_codec_dai: codec {
5012 + sound-dai = <&codec_out>;
5013 + };
5014 + };
5015 + };
5016 + };
5017 +
5018 + fragment@1 {
5019 + target-path = "/";
5020 + __overlay__ {
5021 + codec_out: pcm1794a-codec {
5022 + #sound-dai-cells = <0>;
5023 + compatible = "ti,pcm1794a";
5024 + status = "okay";
5025 + };
5026 + };
5027 + };
5028 +
5029 + fragment@2 {
5030 + target = <&i2s>;
5031 + __overlay__ {
5032 + #sound-dai-cells = <0>;
5033 + status = "okay";
5034 + };
5035 + };
5036 +};
5037 +
5038 +/*
5039 + Written by: Leonid Ayzenshtat
5040 + Company: Orchard Audio (www.orchardaudio.com)
5041 +
5042 + compile with:
5043 + dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
5044 +*/
5045 --- /dev/null
5046 +++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
5047 @@ -0,0 +1,57 @@
5048 +/dts-v1/;
5049 +/plugin/;
5050 +
5051 +/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
5052 +
5053 +/ {
5054 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
5055 +
5056 + fragment@0 {
5057 + target = <&spi0>;
5058 + __overlay__ {
5059 + #address-cells = <1>;
5060 + #size-cells = <0>;
5061 +
5062 + status = "okay";
5063 +
5064 + lowpan0: at86rf233@0 {
5065 + compatible = "atmel,at86rf233";
5066 + reg = <0>;
5067 + interrupt-parent = <&gpio>;
5068 + interrupts = <23 4>; /* active high */
5069 + reset-gpio = <&gpio 24 1>;
5070 + sleep-gpio = <&gpio 25 1>;
5071 + spi-max-frequency = <3000000>;
5072 + xtal-trim = /bits/ 8 <0xf>;
5073 + };
5074 + };
5075 + };
5076 +
5077 + fragment@1 {
5078 + target = <&spidev0>;
5079 + __overlay__ {
5080 + status = "disabled";
5081 + };
5082 + };
5083 +
5084 + fragment@2 {
5085 + target = <&gpio>;
5086 + __overlay__ {
5087 + lowpan0_pins: lowpan0_pins {
5088 + brcm,pins = <23 24 25>;
5089 + brcm,function = <0 1 1>; /* in out out */
5090 + };
5091 + };
5092 + };
5093 +
5094 + __overrides__ {
5095 + interrupt = <&lowpan0>, "interrupts:0",
5096 + <&lowpan0_pins>, "brcm,pins:0";
5097 + reset = <&lowpan0>, "reset-gpio:4",
5098 + <&lowpan0_pins>, "brcm,pins:4";
5099 + sleep = <&lowpan0>, "sleep-gpio:4",
5100 + <&lowpan0_pins>, "brcm,pins:8";
5101 + speed = <&lowpan0>, "spi-max-frequency:0";
5102 + trim = <&lowpan0>, "xtal-trim.0";
5103 + };
5104 +};
5105 --- /dev/null
5106 +++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
5107 @@ -0,0 +1,59 @@
5108 +// Definitions for audioinjector.net audio add on soundcard
5109 +/dts-v1/;
5110 +/plugin/;
5111 +
5112 +/ {
5113 + compatible = "brcm,bcm2708";
5114 +
5115 + fragment@0 {
5116 + target = <&i2s>;
5117 + __overlay__ {
5118 + status = "okay";
5119 + };
5120 + };
5121 +
5122 + fragment@1 {
5123 + target = <&i2c1>;
5124 + __overlay__ {
5125 + #address-cells = <1>;
5126 + #size-cells = <0>;
5127 + status = "okay";
5128 +
5129 + cs42448: cs42448@48 {
5130 + #sound-dai-cells = <0>;
5131 + compatible = "cirrus,cs42448";
5132 + reg = <0x48>;
5133 + clocks = <&cs42448_mclk>;
5134 + clock-names = "mclk";
5135 + VA-supply = <&vdd_5v0_reg>;
5136 + VD-supply = <&vdd_3v3_reg>;
5137 + VLS-supply = <&vdd_3v3_reg>;
5138 + VLC-supply = <&vdd_3v3_reg>;
5139 + status = "okay";
5140 + };
5141 +
5142 + cs42448_mclk: codec-mclk {
5143 + compatible = "fixed-clock";
5144 + #clock-cells = <0>;
5145 + clock-frequency = <49152000>;
5146 + };
5147 + };
5148 + };
5149 +
5150 + fragment@2 {
5151 + target = <&sound>;
5152 + snd: __overlay__ {
5153 + compatible = "ai,audioinjector-octo-soundcard";
5154 + mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
5155 + <&gpio 24 0>;
5156 + reset-gpios = <&gpio 5 0>;
5157 + i2s-controller = <&i2s>;
5158 + codec = <&cs42448>;
5159 + status = "okay";
5160 + };
5161 + };
5162 +
5163 + __overrides__ {
5164 + non-stop-clocks = <&snd>, "non-stop-clocks?";
5165 + };
5166 +};
5167 --- /dev/null
5168 +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
5169 @@ -0,0 +1,39 @@
5170 +// Definitions for audioinjector.net audio add on soundcard
5171 +/dts-v1/;
5172 +/plugin/;
5173 +
5174 +/ {
5175 + compatible = "brcm,bcm2708";
5176 +
5177 + fragment@0 {
5178 + target = <&i2s>;
5179 + __overlay__ {
5180 + status = "okay";
5181 + };
5182 + };
5183 +
5184 + fragment@1 {
5185 + target = <&i2c1>;
5186 + __overlay__ {
5187 + #address-cells = <1>;
5188 + #size-cells = <0>;
5189 + status = "okay";
5190 +
5191 + wm8731@1a {
5192 + #sound-dai-cells = <0>;
5193 + compatible = "wlf,wm8731";
5194 + reg = <0x1a>;
5195 + status = "okay";
5196 + };
5197 + };
5198 + };
5199 +
5200 + fragment@2 {
5201 + target = <&sound>;
5202 + __overlay__ {
5203 + compatible = "ai,audioinjector-pi-soundcard";
5204 + i2s-controller = <&i2s>;
5205 + status = "okay";
5206 + };
5207 + };
5208 +};
5209 --- /dev/null
5210 +++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
5211 @@ -0,0 +1,19 @@
5212 +/dts-v1/;
5213 +/plugin/;
5214 +
5215 +/ {
5216 + compatible = "brcm,bcm2708";
5217 +
5218 + fragment@0 {
5219 + target = <&audio_pins>;
5220 + frag0: __overlay__ {
5221 + brcm,pins = < 12 13 >;
5222 + brcm,function = < 4 >; /* alt0 alt0 */
5223 + };
5224 + };
5225 +
5226 + __overrides__ {
5227 + swap_lr = <&frag0>, "swap_lr?";
5228 + enable_jack = <&frag0>, "enable_jack?";
5229 + };
5230 +};
5231 --- /dev/null
5232 +++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
5233 @@ -0,0 +1,79 @@
5234 +/dts-v1/;
5235 +/plugin/;
5236 +
5237 +/{
5238 + compatible = "brcm,bcm2708";
5239 +
5240 + fragment@0 {
5241 + target = <&mmc>;
5242 + sdio_wifi: __overlay__ {
5243 + pinctrl-names = "default";
5244 + pinctrl-0 = <&sdio_pins>;
5245 + bus-width = <4>;
5246 + brcm,overclock-50 = <35>;
5247 + status = "okay";
5248 + };
5249 + };
5250 +
5251 + fragment@1 {
5252 + target = <&gpio>;
5253 + __overlay__ {
5254 + sdio_pins: sdio_pins {
5255 + brcm,pins = <34 35 36 37 38 39>;
5256 + brcm,function = <7>; /* ALT3 = SD1 */
5257 + brcm,pull = <0 2 2 2 2 2>;
5258 + };
5259 +
5260 + power_ctrl_pins: power_ctrl_pins {
5261 + brcm,pins = <40>;
5262 + brcm,function = <1>; // out
5263 + };
5264 + };
5265 + };
5266 +
5267 + fragment@2 {
5268 + target-path = "/";
5269 + __overlay__ {
5270 + // We should investigate how to switch to mmc-pwrseq-sd8787
5271 + // Currently that module requires two GPIOs to function since it
5272 + // targets a slightly different chip
5273 + power_ctrl: power_ctrl {
5274 + compatible = "gpio-poweroff";
5275 + gpios = <&gpio 40 1>;
5276 + force;
5277 + };
5278 +
5279 + i2c_soft: i2c@0 {
5280 + compatible = "i2c-gpio";
5281 + gpios = <&gpio 43 0 /* sda */ &gpio 42 0 /* scl */>;
5282 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
5283 + #address-cells = <1>;
5284 + #size-cells = <0>;
5285 + };
5286 + };
5287 + };
5288 +
5289 + fragment@3 {
5290 + target = <&i2c_soft>;
5291 + __overlay__ {
5292 + #address-cells = <1>;
5293 + #size-cells = <0>;
5294 + status = "okay";
5295 +
5296 + gpio_expander: gpio_expander@20 {
5297 + compatible = "nxp,pca9554";
5298 + gpio-controller;
5299 + #gpio-cells = <2>;
5300 + reg = <0x20>;
5301 + status = "okay";
5302 + };
5303 +
5304 + // rtc clock
5305 + ds1307: ds1307@68 {
5306 + compatible = "maxim,ds1307";
5307 + reg = <0x68>;
5308 + status = "okay";
5309 + };
5310 + };
5311 + };
5312 +};
5313 --- /dev/null
5314 +++ b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
5315 @@ -0,0 +1,23 @@
5316 +// Definitions for BMP085/BMP180 digital barometric pressure and temperature sensors from Bosch Sensortec
5317 +/dts-v1/;
5318 +/plugin/;
5319 +
5320 +/ {
5321 + compatible = "brcm,bcm2708";
5322 +
5323 + fragment@0 {
5324 + target = <&i2c_arm>;
5325 + __overlay__ {
5326 + #address-cells = <1>;
5327 + #size-cells = <0>;
5328 + status = "okay";
5329 +
5330 + bmp085@77 {
5331 + compatible = "bosch,bmp085";
5332 + reg = <0x77>;
5333 + default-oversampling = <3>;
5334 + status = "okay";
5335 + };
5336 + };
5337 + };
5338 +};
5339 --- /dev/null
5340 +++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
5341 @@ -0,0 +1,39 @@
5342 +/*
5343 + * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
5344 + */
5345 +/dts-v1/;
5346 +/plugin/;
5347 +
5348 +/ {
5349 + compatible = "brcm,bcm2708";
5350 +
5351 + fragment@0 {
5352 + target-path = "/";
5353 + __overlay__ {
5354 +
5355 + dht11: dht11@0 {
5356 + compatible = "dht11";
5357 + pinctrl-names = "default";
5358 + pinctrl-0 = <&dht11_pins>;
5359 + gpios = <&gpio 4 0>;
5360 + status = "okay";
5361 + };
5362 + };
5363 + };
5364 +
5365 + fragment@1 {
5366 + target = <&gpio>;
5367 + __overlay__ {
5368 + dht11_pins: dht11_pins {
5369 + brcm,pins = <4>;
5370 + brcm,function = <0>; // in
5371 + brcm,pull = <0>; // off
5372 + };
5373 + };
5374 + };
5375 +
5376 + __overrides__ {
5377 + gpiopin = <&dht11_pins>,"brcm,pins:0",
5378 + <&dht11>,"gpios:4";
5379 + };
5380 +};
5381 --- /dev/null
5382 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
5383 @@ -0,0 +1,39 @@
5384 +// Definitions for Dion Audio LOCO DAC-AMP
5385 +
5386 +/*
5387 + * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
5388 + */
5389 +
5390 +/dts-v1/;
5391 +/plugin/;
5392 +
5393 +/ {
5394 + compatible = "brcm,bcm2708";
5395 +
5396 + fragment@0 {
5397 + target = <&i2s>;
5398 + __overlay__ {
5399 + status = "okay";
5400 + };
5401 + };
5402 +
5403 + fragment@1 {
5404 + target-path = "/";
5405 + __overlay__ {
5406 + pcm5102a-codec {
5407 + #sound-dai-cells = <0>;
5408 + compatible = "ti,pcm5102a";
5409 + status = "okay";
5410 + };
5411 + };
5412 + };
5413 +
5414 + fragment@2 {
5415 + target = <&sound>;
5416 + __overlay__ {
5417 + compatible = "dionaudio,loco-pcm5242-tpa3118";
5418 + i2s-controller = <&i2s>;
5419 + status = "okay";
5420 + };
5421 + };
5422 +};
5423 --- /dev/null
5424 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
5425 @@ -0,0 +1,49 @@
5426 +/*
5427 + * Definitions for Dion Audio LOCO-V2 DAC-AMP
5428 + * eg. dtoverlay=dionaudio-loco-v2
5429 + *
5430 + * PCM5242 DAC (in software mode) and TPA3255 AMP.
5431 + */
5432 +
5433 +/dts-v1/;
5434 +/plugin/;
5435 +
5436 +/ {
5437 + compatible = "brcm,bcm2708";
5438 +
5439 + fragment@0 {
5440 + target = <&sound>;
5441 + frag0: __overlay__ {
5442 + compatible = "dionaudio,dionaudio-loco-v2";
5443 + i2s-controller = <&i2s>;
5444 + status = "okay";
5445 + };
5446 + };
5447 +
5448 + fragment@1 {
5449 + target = <&i2s>;
5450 + __overlay__ {
5451 + status = "okay";
5452 + };
5453 + };
5454 +
5455 + fragment@2 {
5456 + target = <&i2c1>;
5457 + __overlay__ {
5458 + #address-cells = <1>;
5459 + #size-cells = <0>;
5460 + status = "okay";
5461 +
5462 + pcm5122@4c {
5463 + #sound-dai-cells = <0>;
5464 + compatible = "ti,pcm5122";
5465 + reg = <0x4d>;
5466 + status = "okay";
5467 + };
5468 + };
5469 + };
5470 +
5471 + __overrides__ {
5472 + 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
5473 + };
5474 +};
5475 --- /dev/null
5476 +++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
5477 @@ -0,0 +1,31 @@
5478 +/dts-v1/;
5479 +/plugin/;
5480 +
5481 +/{
5482 + compatible = "brcm,bcm2708";
5483 +
5484 + // There is no DPI driver module, but we need a platform device
5485 + // node (that doesn't already use pinctrl) to hang the pinctrl
5486 + // reference on - leds will do
5487 +
5488 + fragment@0 {
5489 + target = <&leds>;
5490 + __overlay__ {
5491 + pinctrl-names = "default";
5492 + pinctrl-0 = <&dpi18_pins>;
5493 + };
5494 + };
5495 +
5496 + fragment@1 {
5497 + target = <&gpio>;
5498 + __overlay__ {
5499 + dpi18_pins: dpi18_pins {
5500 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
5501 + 12 13 14 15 16 17 18 19 20
5502 + 21>;
5503 + brcm,function = <6>; /* alt2 */
5504 + brcm,pull = <0>; /* no pull */
5505 + };
5506 + };
5507 + };
5508 +};
5509 --- /dev/null
5510 +++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
5511 @@ -0,0 +1,31 @@
5512 +/dts-v1/;
5513 +/plugin/;
5514 +
5515 +/{
5516 + compatible = "brcm,bcm2708";
5517 +
5518 + // There is no DPI driver module, but we need a platform device
5519 + // node (that doesn't already use pinctrl) to hang the pinctrl
5520 + // reference on - leds will do
5521 +
5522 + fragment@0 {
5523 + target = <&leds>;
5524 + __overlay__ {
5525 + pinctrl-names = "default";
5526 + pinctrl-0 = <&dpi24_pins>;
5527 + };
5528 + };
5529 +
5530 + fragment@1 {
5531 + target = <&gpio>;
5532 + __overlay__ {
5533 + dpi24_pins: dpi24_pins {
5534 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
5535 + 12 13 14 15 16 17 18 19 20
5536 + 21 22 23 24 25 26 27>;
5537 + brcm,function = <6>; /* alt2 */
5538 + brcm,pull = <0>; /* no pull */
5539 + };
5540 + };
5541 + };
5542 +};
5543 --- /dev/null
5544 +++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
5545 @@ -0,0 +1,20 @@
5546 +/dts-v1/;
5547 +/plugin/;
5548 +
5549 +/{
5550 + compatible = "brcm,bcm2708";
5551 +
5552 + fragment@0 {
5553 + target = <&usb>;
5554 + #address-cells = <1>;
5555 + #size-cells = <1>;
5556 + __overlay__ {
5557 + compatible = "brcm,bcm2708-usb";
5558 + reg = <0x7e980000 0x10000>,
5559 + <0x7e006000 0x1000>;
5560 + interrupts = <2 0>,
5561 + <1 9>;
5562 + status = "okay";
5563 + };
5564 + };
5565 +};
5566 --- /dev/null
5567 +++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
5568 @@ -0,0 +1,28 @@
5569 +/dts-v1/;
5570 +/plugin/;
5571 +
5572 +/{
5573 + compatible = "brcm,bcm2708";
5574 +
5575 + fragment@0 {
5576 + target = <&usb>;
5577 + #address-cells = <1>;
5578 + #size-cells = <1>;
5579 + dwc2_usb: __overlay__ {
5580 + compatible = "brcm,bcm2835-usb";
5581 + reg = <0x7e980000 0x10000>;
5582 + interrupts = <1 9>;
5583 + dr_mode = "otg";
5584 + g-np-tx-fifo-size = <32>;
5585 + g-rx-fifo-size = <256>;
5586 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
5587 + status = "okay";
5588 + };
5589 + };
5590 +
5591 + __overrides__ {
5592 + dr_mode = <&dwc2_usb>, "dr_mode";
5593 + g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
5594 + g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
5595 + };
5596 +};
5597 --- /dev/null
5598 +++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
5599 @@ -0,0 +1,53 @@
5600 +// Overlay for the Microchip ENC28J60 Ethernet Controller
5601 +/dts-v1/;
5602 +/plugin/;
5603 +
5604 +/ {
5605 + compatible = "brcm,bcm2708";
5606 +
5607 + fragment@0 {
5608 + target = <&spi0>;
5609 + __overlay__ {
5610 + /* needed to avoid dtc warning */
5611 + #address-cells = <1>;
5612 + #size-cells = <0>;
5613 +
5614 + status = "okay";
5615 +
5616 + eth1: enc28j60@0{
5617 + compatible = "microchip,enc28j60";
5618 + reg = <0>; /* CE0 */
5619 + pinctrl-names = "default";
5620 + pinctrl-0 = <&eth1_pins>;
5621 + interrupt-parent = <&gpio>;
5622 + interrupts = <25 0x2>; /* falling edge */
5623 + spi-max-frequency = <12000000>;
5624 + status = "okay";
5625 + };
5626 + };
5627 + };
5628 +
5629 + fragment@1 {
5630 + target = <&spidev0>;
5631 + __overlay__ {
5632 + status = "disabled";
5633 + };
5634 + };
5635 +
5636 + fragment@2 {
5637 + target = <&gpio>;
5638 + __overlay__ {
5639 + eth1_pins: eth1_pins {
5640 + brcm,pins = <25>;
5641 + brcm,function = <0>; /* in */
5642 + brcm,pull = <0>; /* none */
5643 + };
5644 + };
5645 + };
5646 +
5647 + __overrides__ {
5648 + int_pin = <&eth1>, "interrupts:0",
5649 + <&eth1_pins>, "brcm,pins:0";
5650 + speed = <&eth1>, "spi-max-frequency:0";
5651 + };
5652 +};
5653 --- /dev/null
5654 +++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
5655 @@ -0,0 +1,47 @@
5656 +// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
5657 +// Interrupt pin: 39
5658 +/dts-v1/;
5659 +/plugin/;
5660 +
5661 +/ {
5662 + compatible = "brcm,bcm2708";
5663 +
5664 + fragment@0 {
5665 + target = <&spi2>;
5666 + __overlay__ {
5667 + /* needed to avoid dtc warning */
5668 + #address-cells = <1>;
5669 + #size-cells = <0>;
5670 +
5671 + status = "okay";
5672 +
5673 + eth1: enc28j60@0{
5674 + compatible = "microchip,enc28j60";
5675 + reg = <0>; /* CE0 */
5676 + pinctrl-names = "default";
5677 + pinctrl-0 = <&eth1_pins>;
5678 + interrupt-parent = <&gpio>;
5679 + interrupts = <39 0x2>; /* falling edge */
5680 + spi-max-frequency = <12000000>;
5681 + status = "okay";
5682 + };
5683 + };
5684 + };
5685 +
5686 + fragment@1 {
5687 + target = <&gpio>;
5688 + __overlay__ {
5689 + eth1_pins: eth1_pins {
5690 + brcm,pins = <39>;
5691 + brcm,function = <0>; /* in */
5692 + brcm,pull = <0>; /* none */
5693 + };
5694 + };
5695 + };
5696 +
5697 + __overrides__ {
5698 + int_pin = <&eth1>, "interrupts:0",
5699 + <&eth1_pins>, "brcm,pins:0";
5700 + speed = <&eth1>, "spi-max-frequency:0";
5701 + };
5702 +};
5703 --- /dev/null
5704 +++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
5705 @@ -0,0 +1,48 @@
5706 +// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
5707 +/dts-v1/;
5708 +/plugin/;
5709 +
5710 +/ {
5711 + compatible = "brcm,bcm2708";
5712 +
5713 + fragment@0 {
5714 + target = <&gpio>;
5715 + __overlay__ {
5716 + exc3000_pins: exc3000_pins {
5717 + brcm,pins = <4>; // interrupt
5718 + brcm,function = <0>; // in
5719 + brcm,pull = <2>; // pull-up
5720 + };
5721 + };
5722 + };
5723 +
5724 + fragment@1 {
5725 + target = <&i2c1>;
5726 + __overlay__ {
5727 + #address-cells = <1>;
5728 + #size-cells = <0>;
5729 + status = "okay";
5730 +
5731 + exc3000: exc3000@2a {
5732 + compatible = "eeti,exc3000";
5733 + reg = <0x2a>;
5734 + pinctrl-names = "default";
5735 + pinctrl-0 = <&exc3000_pins>;
5736 + interrupt-parent = <&gpio>;
5737 + interrupts = <4 8>; // active low level-sensitive
5738 + touchscreen-size-x = <4096>;
5739 + touchscreen-size-y = <4096>;
5740 + };
5741 + };
5742 + };
5743 +
5744 + __overrides__ {
5745 + interrupt = <&exc3000_pins>,"brcm,pins:0",
5746 + <&exc3000>,"interrupts:0";
5747 + sizex = <&exc3000>,"touchscreen-size-x:0";
5748 + sizey = <&exc3000>,"touchscreen-size-y:0";
5749 + invx = <&exc3000>,"touchscreen-inverted-x?";
5750 + invy = <&exc3000>,"touchscreen-inverted-y?";
5751 + swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
5752 + };
5753 +};
5754 --- /dev/null
5755 +++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
5756 @@ -0,0 +1,70 @@
5757 +// Definitions for Fe-Pi Audio
5758 +/dts-v1/;
5759 +/plugin/;
5760 +
5761 +/ {
5762 + compatible = "brcm,bcm2708";
5763 +
5764 + fragment@0 {
5765 + target = <&clocks>;
5766 + __overlay__ {
5767 + sgtl5000_mclk: sgtl5000_mclk {
5768 + compatible = "fixed-clock";
5769 + #clock-cells = <0>;
5770 + clock-frequency = <12288000>;
5771 + clock-output-names = "sgtl5000-mclk";
5772 + };
5773 + };
5774 + };
5775 +
5776 + fragment@1 {
5777 + target = <&soc>;
5778 + __overlay__ {
5779 + reg_1v8: reg_1v8@0 {
5780 + compatible = "regulator-fixed";
5781 + regulator-name = "1V8";
5782 + regulator-min-microvolt = <1800000>;
5783 + regulator-max-microvolt = <1800000>;
5784 + regulator-always-on;
5785 + };
5786 + };
5787 + };
5788 +
5789 + fragment@2 {
5790 + target = <&i2c1>;
5791 + __overlay__ {
5792 + #address-cells = <1>;
5793 + #size-cells = <0>;
5794 + status = "okay";
5795 +
5796 + sgtl5000@0a {
5797 + #sound-dai-cells = <0>;
5798 + compatible = "fepi,sgtl5000";
5799 + reg = <0x0a>;
5800 + clocks = <&sgtl5000_mclk>;
5801 + micbias-resistor-k-ohms = <2>;
5802 + micbias-voltage-m-volts = <3000>;
5803 + VDDA-supply = <&vdd_3v3_reg>;
5804 + VDDIO-supply = <&vdd_3v3_reg>;
5805 + VDDD-supply = <&reg_1v8>;
5806 + status = "okay";
5807 + };
5808 + };
5809 + };
5810 +
5811 + fragment@3 {
5812 + target = <&i2s>;
5813 + __overlay__ {
5814 + status = "okay";
5815 + };
5816 + };
5817 +
5818 + fragment@4 {
5819 + target = <&sound>;
5820 + __overlay__ {
5821 + compatible = "fe-pi,fe-pi-audio";
5822 + i2s-controller = <&i2s>;
5823 + status = "okay";
5824 + };
5825 + };
5826 +};
5827 --- /dev/null
5828 +++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
5829 @@ -0,0 +1,46 @@
5830 +// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
5831 +/dts-v1/;
5832 +/plugin/;
5833 +
5834 +/ {
5835 + compatible = "brcm,bcm2708";
5836 +
5837 + fragment@0 {
5838 + target = <&gpio>;
5839 + __overlay__ {
5840 + goodix_pins: goodix_pins {
5841 + brcm,pins = <4 17>; // interrupt and reset
5842 + brcm,function = <0 0>; // in
5843 + brcm,pull = <2 2>; // pull-up
5844 + };
5845 + };
5846 + };
5847 +
5848 + fragment@1 {
5849 + target = <&i2c1>;
5850 + __overlay__ {
5851 + #address-cells = <1>;
5852 + #size-cells = <0>;
5853 + status = "okay";
5854 +
5855 + gt9271: gt9271@14 {
5856 + compatible = "goodix,gt9271";
5857 + reg = <0x14>;
5858 + pinctrl-names = "default";
5859 + pinctrl-0 = <&goodix_pins>;
5860 + interrupt-parent = <&gpio>;
5861 + interrupts = <4 2>; // high-to-low edge triggered
5862 + irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
5863 + reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header
5864 + };
5865 + };
5866 + };
5867 +
5868 + __overrides__ {
5869 + interrupt = <&goodix_pins>,"brcm,pins:0",
5870 + <&gt9271>,"interrupts:0",
5871 + <&gt9271>,"irq-gpios:4";
5872 + reset = <&goodix_pins>,"brcm,pins:4",
5873 + <&gt9271>,"reset-gpios:4";
5874 + };
5875 +};
5876 --- /dev/null
5877 +++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
5878 @@ -0,0 +1,49 @@
5879 +// Definitions for Google voiceHAT v1 soundcard overlay
5880 +/dts-v1/;
5881 +/plugin/;
5882 +
5883 +/ {
5884 + compatible = "brcm,bcm2708";
5885 +
5886 + fragment@0 {
5887 + target = <&i2s>;
5888 + __overlay__ {
5889 + status = "okay";
5890 + };
5891 + };
5892 +
5893 + fragment@1 {
5894 + target = <&gpio>;
5895 + __overlay__ {
5896 + googlevoicehat_pins: googlevoicehat_pins {
5897 + brcm,pins = <16>;
5898 + brcm,function = <1>; /* out */
5899 + brcm,pull = <0>; /* up */
5900 + };
5901 + };
5902 + };
5903 +
5904 +
5905 + fragment@2 {
5906 + target-path = "/";
5907 + __overlay__ {
5908 + voicehat-codec {
5909 + #sound-dai-cells = <0>;
5910 + compatible = "google,voicehat";
5911 + pinctrl-names = "default";
5912 + pinctrl-0 = <&googlevoicehat_pins>;
5913 + sdmode-gpios= <&gpio 16 0>;
5914 + status = "okay";
5915 + };
5916 + };
5917 + };
5918 +
5919 + fragment@3 {
5920 + target = <&sound>;
5921 + __overlay__ {
5922 + compatible = "googlevoicehat,googlevoicehat-soundcard";
5923 + i2s-controller = <&i2s>;
5924 + status = "okay";
5925 + };
5926 + };
5927 +};
5928 --- /dev/null
5929 +++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
5930 @@ -0,0 +1,48 @@
5931 +// Definitions for ir-gpio module
5932 +/dts-v1/;
5933 +/plugin/;
5934 +
5935 +/ {
5936 + compatible = "brcm,bcm2708";
5937 +
5938 + fragment@0 {
5939 + target-path = "/";
5940 + __overlay__ {
5941 + gpio_ir: ir-receiver@12 {
5942 + compatible = "gpio-ir-receiver";
5943 + pinctrl-names = "default";
5944 + pinctrl-0 = <&gpio_ir_pins>;
5945 +
5946 + // pin number, high or low
5947 + gpios = <&gpio 18 1>;
5948 +
5949 + // parameter for keymap name
5950 + linux,rc-map-name = "rc-rc6-mce";
5951 +
5952 + status = "okay";
5953 + };
5954 + };
5955 + };
5956 +
5957 + fragment@1 {
5958 + target = <&gpio>;
5959 + __overlay__ {
5960 + gpio_ir_pins: gpio_ir_pins@12 {
5961 + brcm,pins = <18>; // pin 18
5962 + brcm,function = <0>; // in
5963 + brcm,pull = <1>; // down
5964 + };
5965 + };
5966 + };
5967 +
5968 + __overrides__ {
5969 + // parameters
5970 + gpio_pin = <&gpio_ir>,"gpios:4", // pin number
5971 + <&gpio_ir>,"reg:0",
5972 + <&gpio_ir_pins>,"brcm,pins:0",
5973 + <&gpio_ir_pins>,"reg:0";
5974 + gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
5975 +
5976 + rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
5977 + };
5978 +};
5979 --- /dev/null
5980 +++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
5981 @@ -0,0 +1,36 @@
5982 +/dts-v1/;
5983 +/plugin/;
5984 +
5985 +/ {
5986 + compatible = "brcm,bcm2708";
5987 +
5988 + fragment@0 {
5989 + target = <&gpio>;
5990 + __overlay__ {
5991 + gpio_ir_tx_pins: gpio_ir_tx_pins@12 {
5992 + brcm,pins = <18>;
5993 + brcm,function = <1>; // out
5994 + };
5995 + };
5996 + };
5997 +
5998 + fragment@1 {
5999 + target-path = "/";
6000 + __overlay__ {
6001 + gpio_ir_tx: gpio-ir-transmitter@12 {
6002 + compatible = "gpio-ir-tx";
6003 + pinctrl-names = "default";
6004 + pinctrl-0 = <&gpio_ir_tx_pins>;
6005 + gpios = <&gpio 18 0>;
6006 + };
6007 + };
6008 + };
6009 +
6010 + __overrides__ {
6011 + gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
6012 + <&gpio_ir_tx>, "reg:0",
6013 + <&gpio_ir_tx_pins>, "brcm,pins:0",
6014 + <&gpio_ir_tx_pins>, "reg:0";
6015 + invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
6016 + };
6017 +};
6018 --- /dev/null
6019 +++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
6020 @@ -0,0 +1,48 @@
6021 +// Definitions for gpio-key module
6022 +/dts-v1/;
6023 +/plugin/;
6024 +
6025 +/ {
6026 + compatible = "brcm,bcm2708";
6027 +
6028 + fragment@0 {
6029 + // Configure the gpio pin controller
6030 + target = <&gpio>;
6031 + __overlay__ {
6032 + pin_state: button_pins@0 {
6033 + brcm,pins = <3>; // gpio number
6034 + brcm,function = <0>; // 0 = input, 1 = output
6035 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
6036 + };
6037 + };
6038 + };
6039 + fragment@1 {
6040 + target-path = "/";
6041 + __overlay__ {
6042 + button: button@0 {
6043 + compatible = "gpio-keys";
6044 + pinctrl-names = "default";
6045 + pinctrl-0 = <&pin_state>;
6046 + status = "okay";
6047 +
6048 + key: key {
6049 + linux,code = <116>;
6050 + gpios = <&gpio 3 1>;
6051 + label = "KEY_POWER";
6052 + };
6053 + };
6054 + };
6055 + };
6056 +
6057 + __overrides__ {
6058 + gpio = <&key>,"gpios:4",
6059 + <&button>,"reg:0",
6060 + <&pin_state>,"brcm,pins:0",
6061 + <&pin_state>,"reg:0";
6062 + label = <&key>,"label";
6063 + keycode = <&key>,"linux,code:0";
6064 + gpio_pull = <&pin_state>,"brcm,pull:0";
6065 + active_low = <&key>,"gpios:8";
6066 + };
6067 +
6068 +};
6069 --- /dev/null
6070 +++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
6071 @@ -0,0 +1,14 @@
6072 +/dts-v1/;
6073 +/plugin/;
6074 +
6075 +/ {
6076 + compatible = "brcm,bcm2835";
6077 +
6078 + fragment@0 {
6079 + // Configure the gpio pin controller
6080 + target = <&gpio>;
6081 + __overlay__ {
6082 + interrupts;
6083 + };
6084 + };
6085 +};
6086 --- /dev/null
6087 +++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
6088 @@ -0,0 +1,36 @@
6089 +// Definitions for gpio-poweroff module
6090 +/dts-v1/;
6091 +/plugin/;
6092 +
6093 +/ {
6094 + compatible = "brcm,bcm2708";
6095 +
6096 + fragment@0 {
6097 + target-path = "/";
6098 + __overlay__ {
6099 + power_ctrl: power_ctrl {
6100 + compatible = "gpio-poweroff";
6101 + gpios = <&gpio 26 0>;
6102 + force;
6103 + };
6104 + };
6105 + };
6106 +
6107 + fragment@1 {
6108 + target = <&gpio>;
6109 + __overlay__ {
6110 + power_ctrl_pins: power_ctrl_pins {
6111 + brcm,pins = <26>;
6112 + brcm,function = <1>; // out
6113 + };
6114 + };
6115 + };
6116 +
6117 + __overrides__ {
6118 + gpiopin = <&power_ctrl>,"gpios:4",
6119 + <&power_ctrl_pins>,"brcm,pins:0";
6120 + active_low = <&power_ctrl>,"gpios:8";
6121 + input = <&power_ctrl>,"input?";
6122 + export = <&power_ctrl>,"export?";
6123 + };
6124 +};
6125 --- /dev/null
6126 +++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
6127 @@ -0,0 +1,80 @@
6128 +// Definitions for gpio-poweroff module
6129 +/dts-v1/;
6130 +/plugin/;
6131 +
6132 +// This overlay sets up an input device that generates KEY_POWER events
6133 +// when a given GPIO pin changes. It defaults to using GPIO3, which can
6134 +// also be used to wake up (start) the Rpi again after shutdown. Since
6135 +// wakeup is active-low, this defaults to active-low with a pullup
6136 +// enabled, but all of this can be changed using overlay parameters (but
6137 +// note that GPIO3 has an external pullup on at least some boards).
6138 +
6139 +/ {
6140 + compatible = "brcm,bcm2708";
6141 +
6142 + fragment@0 {
6143 + // Configure the gpio pin controller
6144 + target = <&gpio>;
6145 + __overlay__ {
6146 + // Define a pinctrl state, that sets up the gpio
6147 + // as an input with a pullup enabled. This does
6148 + // not take effect by itself, only when referenced
6149 + // by a "pinctrl client", as is done below. See:
6150 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
6151 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
6152 + pin_state: shutdown_button_pins {
6153 + brcm,pins = <3>; // gpio number
6154 + brcm,function = <0>; // 0 = input, 1 = output
6155 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
6156 + };
6157 + };
6158 + };
6159 + fragment@1 {
6160 + // Add a new device to the /soc devicetree node
6161 + target-path = "/soc";
6162 + __overlay__ {
6163 + shutdown_button {
6164 + // Let the gpio-keys driver handle this device. See:
6165 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
6166 + compatible = "gpio-keys";
6167 +
6168 + // Declare a single pinctrl state (referencing the one declared above) and name it
6169 + // default, so it is activated automatically.
6170 + pinctrl-names = "default";
6171 + pinctrl-0 = <&pin_state>;
6172 +
6173 + // Enable this device
6174 + status = "okay";
6175 +
6176 + // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
6177 + // (keycode 116, see
6178 + // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
6179 + button: shutdown {
6180 + label = "shutdown";
6181 + linux,code = <116>; // KEY_POWER
6182 + gpios = <&gpio 3 1>;
6183 + };
6184 + };
6185 + };
6186 + };
6187 +
6188 + // This defines parameters that can be specified when loading
6189 + // the overlay. Each foo = line specifies one parameter, named
6190 + // foo. The rest of the specification gives properties where the
6191 + // parameter value is inserted into (changing the values above
6192 + // or adding new ones).
6193 + __overrides__ {
6194 + // Allow overriding the GPIO number.
6195 + gpio_pin = <&button>,"gpios:4",
6196 + <&pin_state>,"brcm,pins:0";
6197 +
6198 + // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
6199 + // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
6200 + // on some boards).
6201 + gpio_pull = <&pin_state>,"brcm,pull:0";
6202 +
6203 + // Allow setting the active_low flag. 0 = active high, 1 = active low
6204 + active_low = <&button>,"gpios:8";
6205 + };
6206 +
6207 +};
6208 --- /dev/null
6209 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
6210 @@ -0,0 +1,39 @@
6211 +// Definitions for HiFiBerry Amp/Amp+
6212 +/dts-v1/;
6213 +/plugin/;
6214 +
6215 +/ {
6216 + compatible = "brcm,bcm2708";
6217 +
6218 + fragment@0 {
6219 + target = <&i2s>;
6220 + __overlay__ {
6221 + status = "okay";
6222 + };
6223 + };
6224 +
6225 + fragment@1 {
6226 + target = <&i2c1>;
6227 + __overlay__ {
6228 + #address-cells = <1>;
6229 + #size-cells = <0>;
6230 + status = "okay";
6231 +
6232 + tas5713@1b {
6233 + #sound-dai-cells = <0>;
6234 + compatible = "ti,tas5713";
6235 + reg = <0x1b>;
6236 + status = "okay";
6237 + };
6238 + };
6239 + };
6240 +
6241 + fragment@2 {
6242 + target = <&sound>;
6243 + __overlay__ {
6244 + compatible = "hifiberry,hifiberry-amp";
6245 + i2s-controller = <&i2s>;
6246 + status = "okay";
6247 + };
6248 + };
6249 +};
6250 --- /dev/null
6251 +++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
6252 @@ -0,0 +1,34 @@
6253 +// Definitions for HiFiBerry DAC
6254 +/dts-v1/;
6255 +/plugin/;
6256 +
6257 +/ {
6258 + compatible = "brcm,bcm2708";
6259 +
6260 + fragment@0 {
6261 + target = <&i2s>;
6262 + __overlay__ {
6263 + status = "okay";
6264 + };
6265 + };
6266 +
6267 + fragment@1 {
6268 + target-path = "/";
6269 + __overlay__ {
6270 + pcm5102a-codec {
6271 + #sound-dai-cells = <0>;
6272 + compatible = "ti,pcm5102a";
6273 + status = "okay";
6274 + };
6275 + };
6276 + };
6277 +
6278 + fragment@2 {
6279 + target = <&sound>;
6280 + __overlay__ {
6281 + compatible = "hifiberry,hifiberry-dac";
6282 + i2s-controller = <&i2s>;
6283 + status = "okay";
6284 + };
6285 + };
6286 +};
6287 --- /dev/null
6288 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
6289 @@ -0,0 +1,59 @@
6290 +// Definitions for HiFiBerry DAC+
6291 +/dts-v1/;
6292 +/plugin/;
6293 +
6294 +/ {
6295 + compatible = "brcm,bcm2708";
6296 +
6297 + fragment@0 {
6298 + target-path = "/clocks";
6299 + __overlay__ {
6300 + dacpro_osc: dacpro_osc {
6301 + compatible = "hifiberry,dacpro-clk";
6302 + #clock-cells = <0>;
6303 + };
6304 + };
6305 + };
6306 +
6307 + fragment@1 {
6308 + target = <&i2s>;
6309 + __overlay__ {
6310 + status = "okay";
6311 + };
6312 + };
6313 +
6314 + fragment@2 {
6315 + target = <&i2c1>;
6316 + __overlay__ {
6317 + #address-cells = <1>;
6318 + #size-cells = <0>;
6319 + status = "okay";
6320 +
6321 + pcm5122@4d {
6322 + #sound-dai-cells = <0>;
6323 + compatible = "ti,pcm5122";
6324 + reg = <0x4d>;
6325 + clocks = <&dacpro_osc>;
6326 + AVDD-supply = <&vdd_3v3_reg>;
6327 + DVDD-supply = <&vdd_3v3_reg>;
6328 + CPVDD-supply = <&vdd_3v3_reg>;
6329 + status = "okay";
6330 + };
6331 + };
6332 + };
6333 +
6334 + fragment@3 {
6335 + target = <&sound>;
6336 + hifiberry_dacplus: __overlay__ {
6337 + compatible = "hifiberry,hifiberry-dacplus";
6338 + i2s-controller = <&i2s>;
6339 + status = "okay";
6340 + };
6341 + };
6342 +
6343 + __overrides__ {
6344 + 24db_digital_gain =
6345 + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
6346 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
6347 + };
6348 +};
6349 --- /dev/null
6350 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
6351 @@ -0,0 +1,41 @@
6352 +// Definitions for HiFiBerry Digi
6353 +/dts-v1/;
6354 +/plugin/;
6355 +
6356 +/ {
6357 + compatible = "brcm,bcm2708";
6358 +
6359 + fragment@0 {
6360 + target = <&i2s>;
6361 + __overlay__ {
6362 + status = "okay";
6363 + };
6364 + };
6365 +
6366 + fragment@1 {
6367 + target = <&i2c1>;
6368 + __overlay__ {
6369 + #address-cells = <1>;
6370 + #size-cells = <0>;
6371 + status = "okay";
6372 +
6373 + wm8804@3b {
6374 + #sound-dai-cells = <0>;
6375 + compatible = "wlf,wm8804";
6376 + reg = <0x3b>;
6377 + PVDD-supply = <&vdd_3v3_reg>;
6378 + DVDD-supply = <&vdd_3v3_reg>;
6379 + status = "okay";
6380 + };
6381 + };
6382 + };
6383 +
6384 + fragment@2 {
6385 + target = <&sound>;
6386 + __overlay__ {
6387 + compatible = "hifiberry,hifiberry-digi";
6388 + i2s-controller = <&i2s>;
6389 + status = "okay";
6390 + };
6391 + };
6392 +};
6393 --- /dev/null
6394 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
6395 @@ -0,0 +1,43 @@
6396 +// Definitions for HiFiBerry Digi Pro
6397 +/dts-v1/;
6398 +/plugin/;
6399 +
6400 +/ {
6401 + compatible = "brcm,bcm2708";
6402 +
6403 + fragment@0 {
6404 + target = <&i2s>;
6405 + __overlay__ {
6406 + status = "okay";
6407 + };
6408 + };
6409 +
6410 + fragment@1 {
6411 + target = <&i2c1>;
6412 + __overlay__ {
6413 + #address-cells = <1>;
6414 + #size-cells = <0>;
6415 + status = "okay";
6416 +
6417 + wm8804@3b {
6418 + #sound-dai-cells = <0>;
6419 + compatible = "wlf,wm8804";
6420 + reg = <0x3b>;
6421 + PVDD-supply = <&vdd_3v3_reg>;
6422 + DVDD-supply = <&vdd_3v3_reg>;
6423 + status = "okay";
6424 + };
6425 + };
6426 + };
6427 +
6428 + fragment@2 {
6429 + target = <&sound>;
6430 + __overlay__ {
6431 + compatible = "hifiberry,hifiberry-digi";
6432 + i2s-controller = <&i2s>;
6433 + status = "okay";
6434 + clock44-gpio = <&gpio 5 0>;
6435 + clock48-gpio = <&gpio 6 0>;
6436 + };
6437 + };
6438 +};
6439 --- /dev/null
6440 +++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
6441 @@ -0,0 +1,93 @@
6442 +/*
6443 + * Device Tree overlay for HY28A display
6444 + *
6445 + */
6446 +
6447 +/dts-v1/;
6448 +/plugin/;
6449 +
6450 +/ {
6451 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
6452 +
6453 + fragment@0 {
6454 + target = <&spi0>;
6455 + __overlay__ {
6456 + status = "okay";
6457 + };
6458 + };
6459 +
6460 + fragment@1 {
6461 + target = <&spidev0>;
6462 + __overlay__ {
6463 + status = "disabled";
6464 + };
6465 + };
6466 +
6467 + fragment@2 {
6468 + target = <&spidev1>;
6469 + __overlay__ {
6470 + status = "disabled";
6471 + };
6472 + };
6473 +
6474 + fragment@3 {
6475 + target = <&gpio>;
6476 + __overlay__ {
6477 + hy28a_pins: hy28a_pins {
6478 + brcm,pins = <17 25 18>;
6479 + brcm,function = <0 1 1>; /* in out out */
6480 + };
6481 + };
6482 + };
6483 +
6484 + fragment@4 {
6485 + target = <&spi0>;
6486 + __overlay__ {
6487 + /* needed to avoid dtc warning */
6488 + #address-cells = <1>;
6489 + #size-cells = <0>;
6490 +
6491 + hy28a: hy28a@0{
6492 + compatible = "ilitek,ili9320";
6493 + reg = <0>;
6494 + pinctrl-names = "default";
6495 + pinctrl-0 = <&hy28a_pins>;
6496 +
6497 + spi-max-frequency = <32000000>;
6498 + spi-cpol;
6499 + spi-cpha;
6500 + rotate = <270>;
6501 + bgr;
6502 + fps = <50>;
6503 + buswidth = <8>;
6504 + startbyte = <0x70>;
6505 + reset-gpios = <&gpio 25 0>;
6506 + led-gpios = <&gpio 18 1>;
6507 + debug = <0>;
6508 + };
6509 +
6510 + hy28a_ts: hy28a-ts@1 {
6511 + compatible = "ti,ads7846";
6512 + reg = <1>;
6513 +
6514 + spi-max-frequency = <2000000>;
6515 + interrupts = <17 2>; /* high-to-low edge triggered */
6516 + interrupt-parent = <&gpio>;
6517 + pendown-gpio = <&gpio 17 0>;
6518 + ti,x-plate-ohms = /bits/ 16 <100>;
6519 + ti,pressure-max = /bits/ 16 <255>;
6520 + };
6521 + };
6522 + };
6523 + __overrides__ {
6524 + speed = <&hy28a>,"spi-max-frequency:0";
6525 + rotate = <&hy28a>,"rotate:0";
6526 + fps = <&hy28a>,"fps:0";
6527 + debug = <&hy28a>,"debug:0";
6528 + xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
6529 + resetgpio = <&hy28a>,"reset-gpios:4",
6530 + <&hy28a_pins>, "brcm,pins:4";
6531 + ledgpio = <&hy28a>,"led-gpios:4",
6532 + <&hy28a_pins>, "brcm,pins:8";
6533 + };
6534 +};
6535 --- /dev/null
6536 +++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
6537 @@ -0,0 +1,148 @@
6538 +/*
6539 + * Device Tree overlay for HY28b display shield by Texy
6540 + *
6541 + */
6542 +
6543 +/dts-v1/;
6544 +/plugin/;
6545 +
6546 +/ {
6547 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
6548 +
6549 + fragment@0 {
6550 + target = <&spi0>;
6551 + __overlay__ {
6552 + status = "okay";
6553 + };
6554 + };
6555 +
6556 + fragment@1 {
6557 + target = <&spidev0>;
6558 + __overlay__ {
6559 + status = "disabled";
6560 + };
6561 + };
6562 +
6563 + fragment@2 {
6564 + target = <&spidev1>;
6565 + __overlay__ {
6566 + status = "disabled";
6567 + };
6568 + };
6569 +
6570 + fragment@3 {
6571 + target = <&gpio>;
6572 + __overlay__ {
6573 + hy28b_pins: hy28b_pins {
6574 + brcm,pins = <17 25 18>;
6575 + brcm,function = <0 1 1>; /* in out out */
6576 + };
6577 + };
6578 + };
6579 +
6580 + fragment@4 {
6581 + target = <&spi0>;
6582 + __overlay__ {
6583 + /* needed to avoid dtc warning */
6584 + #address-cells = <1>;
6585 + #size-cells = <0>;
6586 +
6587 + hy28b: hy28b@0{
6588 + compatible = "ilitek,ili9325";
6589 + reg = <0>;
6590 + pinctrl-names = "default";
6591 + pinctrl-0 = <&hy28b_pins>;
6592 +
6593 + spi-max-frequency = <48000000>;
6594 + spi-cpol;
6595 + spi-cpha;
6596 + rotate = <270>;
6597 + bgr;
6598 + fps = <50>;
6599 + buswidth = <8>;
6600 + startbyte = <0x70>;
6601 + reset-gpios = <&gpio 25 0>;
6602 + led-gpios = <&gpio 18 1>;
6603 +
6604 + gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
6605 +
6606 + init = <0x10000e7 0x0010
6607 + 0x1000000 0x0001
6608 + 0x1000001 0x0100
6609 + 0x1000002 0x0700
6610 + 0x1000003 0x1030
6611 + 0x1000004 0x0000
6612 + 0x1000008 0x0207
6613 + 0x1000009 0x0000
6614 + 0x100000a 0x0000
6615 + 0x100000c 0x0001
6616 + 0x100000d 0x0000
6617 + 0x100000f 0x0000
6618 + 0x1000010 0x0000
6619 + 0x1000011 0x0007
6620 + 0x1000012 0x0000
6621 + 0x1000013 0x0000
6622 + 0x2000032
6623 + 0x1000010 0x1590
6624 + 0x1000011 0x0227
6625 + 0x2000032
6626 + 0x1000012 0x009c
6627 + 0x2000032
6628 + 0x1000013 0x1900
6629 + 0x1000029 0x0023
6630 + 0x100002b 0x000e
6631 + 0x2000032
6632 + 0x1000020 0x0000
6633 + 0x1000021 0x0000
6634 + 0x2000032
6635 + 0x1000050 0x0000
6636 + 0x1000051 0x00ef
6637 + 0x1000052 0x0000
6638 + 0x1000053 0x013f
6639 + 0x1000060 0xa700
6640 + 0x1000061 0x0001
6641 + 0x100006a 0x0000
6642 + 0x1000080 0x0000
6643 + 0x1000081 0x0000
6644 + 0x1000082 0x0000
6645 + 0x1000083 0x0000
6646 + 0x1000084 0x0000
6647 + 0x1000085 0x0000
6648 + 0x1000090 0x0010
6649 + 0x1000092 0x0000
6650 + 0x1000093 0x0003
6651 + 0x1000095 0x0110
6652 + 0x1000097 0x0000
6653 + 0x1000098 0x0000
6654 + 0x1000007 0x0133
6655 + 0x1000020 0x0000
6656 + 0x1000021 0x0000
6657 + 0x2000064>;
6658 + debug = <0>;
6659 + };
6660 +
6661 + hy28b_ts: hy28b-ts@1 {
6662 + compatible = "ti,ads7846";
6663 + reg = <1>;
6664 +
6665 + spi-max-frequency = <2000000>;
6666 + interrupts = <17 2>; /* high-to-low edge triggered */
6667 + interrupt-parent = <&gpio>;
6668 + pendown-gpio = <&gpio 17 0>;
6669 + ti,x-plate-ohms = /bits/ 16 <100>;
6670 + ti,pressure-max = /bits/ 16 <255>;
6671 + };
6672 + };
6673 + };
6674 + __overrides__ {
6675 + speed = <&hy28b>,"spi-max-frequency:0";
6676 + rotate = <&hy28b>,"rotate:0";
6677 + fps = <&hy28b>,"fps:0";
6678 + debug = <&hy28b>,"debug:0";
6679 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
6680 + resetgpio = <&hy28b>,"reset-gpios:4",
6681 + <&hy28b_pins>, "brcm,pins:4";
6682 + ledgpio = <&hy28b>,"led-gpios:4",
6683 + <&hy28b_pins>, "brcm,pins:8";
6684 + };
6685 +};
6686 --- /dev/null
6687 +++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
6688 @@ -0,0 +1,13 @@
6689 +/dts-v1/;
6690 +/plugin/;
6691 +
6692 +/{
6693 + compatible = "brcm,bcm2708";
6694 +
6695 + fragment@0 {
6696 + target = <&i2c_arm>;
6697 + __overlay__ {
6698 + compatible = "brcm,bcm2708-i2c";
6699 + };
6700 + };
6701 +};
6702 --- /dev/null
6703 +++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
6704 @@ -0,0 +1,43 @@
6705 +// Overlay for i2c_gpio bitbanging host bus.
6706 +/dts-v1/;
6707 +/plugin/;
6708 +
6709 +/ {
6710 + compatible = "brcm,bcm2708";
6711 +
6712 + fragment@0 {
6713 + target-path = "/";
6714 + __overlay__ {
6715 + i2c_gpio: i2c@0 {
6716 + compatible = "i2c-gpio";
6717 + gpios = <&gpio 23 0 /* sda */
6718 + &gpio 24 0 /* scl */
6719 + >;
6720 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
6721 + #address-cells = <1>;
6722 + #size-cells = <0>;
6723 + };
6724 + };
6725 + };
6726 +
6727 + fragment@1 {
6728 + target-path = "/aliases";
6729 + __overlay__ {
6730 + i2c_gpio = "/i2c@0";
6731 + };
6732 + };
6733 +
6734 + fragment@2 {
6735 + target-path = "/__symbols__";
6736 + __overlay__ {
6737 + i2c_gpio = "/i2c@0";
6738 + };
6739 + };
6740 +
6741 + __overrides__ {
6742 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
6743 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
6744 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
6745 + bus = <&i2c_gpio>, "reg:0";
6746 + };
6747 +};
6748 --- /dev/null
6749 +++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
6750 @@ -0,0 +1,139 @@
6751 +// Umbrella I2C Mux overlay
6752 +
6753 +/dts-v1/;
6754 +/plugin/;
6755 +
6756 +/{
6757 + compatible = "brcm,bcm2708";
6758 +
6759 + fragment@0 {
6760 + target = <&i2c_arm>;
6761 + __dormant__ {
6762 + #address-cells = <1>;
6763 + #size-cells = <0>;
6764 + status = "okay";
6765 +
6766 + pca9542: mux@70 {
6767 + compatible = "nxp,pca9542";
6768 + reg = <0x70>;
6769 + #address-cells = <1>;
6770 + #size-cells = <0>;
6771 +
6772 + i2c@0 {
6773 + #address-cells = <1>;
6774 + #size-cells = <0>;
6775 + reg = <0>;
6776 + };
6777 + i2c@1 {
6778 + #address-cells = <1>;
6779 + #size-cells = <0>;
6780 + reg = <1>;
6781 + };
6782 + };
6783 + };
6784 + };
6785 +
6786 + fragment@1 {
6787 + target = <&i2c_arm>;
6788 + __dormant__ {
6789 + #address-cells = <1>;
6790 + #size-cells = <0>;
6791 + status = "okay";
6792 +
6793 + pca9545: mux@70 {
6794 + compatible = "nxp,pca9545";
6795 + reg = <0x70>;
6796 + #address-cells = <1>;
6797 + #size-cells = <0>;
6798 +
6799 + i2c@0 {
6800 + #address-cells = <1>;
6801 + #size-cells = <0>;
6802 + reg = <0>;
6803 + };
6804 + i2c@1 {
6805 + #address-cells = <1>;
6806 + #size-cells = <0>;
6807 + reg = <1>;
6808 + };
6809 + i2c@2 {
6810 + #address-cells = <1>;
6811 + #size-cells = <0>;
6812 + reg = <2>;
6813 + };
6814 + i2c@3 {
6815 + #address-cells = <1>;
6816 + #size-cells = <0>;
6817 + reg = <3>;
6818 + };
6819 + };
6820 + };
6821 + };
6822 +
6823 + fragment@2 {
6824 + target = <&i2c_arm>;
6825 + __dormant__ {
6826 + #address-cells = <1>;
6827 + #size-cells = <0>;
6828 + status = "okay";
6829 +
6830 + pca9548: mux@70 {
6831 + compatible = "nxp,pca9548";
6832 + reg = <0x70>;
6833 + #address-cells = <1>;
6834 + #size-cells = <0>;
6835 +
6836 + i2c@0 {
6837 + #address-cells = <1>;
6838 + #size-cells = <0>;
6839 + reg = <0>;
6840 + };
6841 + i2c@1 {
6842 + #address-cells = <1>;
6843 + #size-cells = <0>;
6844 + reg = <1>;
6845 + };
6846 + i2c@2 {
6847 + #address-cells = <1>;
6848 + #size-cells = <0>;
6849 + reg = <2>;
6850 + };
6851 + i2c@3 {
6852 + #address-cells = <1>;
6853 + #size-cells = <0>;
6854 + reg = <3>;
6855 + };
6856 + i2c@4 {
6857 + #address-cells = <1>;
6858 + #size-cells = <0>;
6859 + reg = <4>;
6860 + };
6861 + i2c@5 {
6862 + #address-cells = <1>;
6863 + #size-cells = <0>;
6864 + reg = <5>;
6865 + };
6866 + i2c@6 {
6867 + #address-cells = <1>;
6868 + #size-cells = <0>;
6869 + reg = <6>;
6870 + };
6871 + i2c@7 {
6872 + #address-cells = <1>;
6873 + #size-cells = <0>;
6874 + reg = <7>;
6875 + };
6876 + };
6877 + };
6878 + };
6879 +
6880 + __overrides__ {
6881 + pca9542 = <0>, "+0";
6882 + pca9545 = <0>, "+1";
6883 + pca9548 = <0>, "+2";
6884 +
6885 + addr = <&pca9542>,"reg:0",
6886 + <&pca9545>,"reg:0",
6887 + <&pca9548>,"reg:0";
6888 + };
6889 +};
6890 --- /dev/null
6891 +++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
6892 @@ -0,0 +1,26 @@
6893 +// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
6894 +/dts-v1/;
6895 +/plugin/;
6896 +
6897 +/{
6898 + compatible = "brcm,bcm2708";
6899 +
6900 + fragment@0 {
6901 + target = <&i2c_arm>;
6902 + __overlay__ {
6903 + #address-cells = <1>;
6904 + #size-cells = <0>;
6905 + status = "okay";
6906 +
6907 + pca: pca@40 {
6908 + compatible = "nxp,pca9685";
6909 + #pwm-cells = <2>;
6910 + reg = <0x40>;
6911 + status = "okay";
6912 + };
6913 + };
6914 + };
6915 + __overrides__ {
6916 + addr = <&pca>,"reg:0";
6917 + };
6918 +};
6919 --- /dev/null
6920 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
6921 @@ -0,0 +1,183 @@
6922 +// Definitions for several I2C based Real Time Clocks
6923 +// Available through i2c-gpio
6924 +/dts-v1/;
6925 +/plugin/;
6926 +
6927 +/ {
6928 + compatible = "brcm,bcm2708";
6929 +
6930 + fragment@0 {
6931 + target-path = "/";
6932 + __overlay__ {
6933 + i2c_gpio: i2c-gpio-rtc@0 {
6934 + compatible = "i2c-gpio";
6935 + gpios = <&gpio 23 0 /* sda */
6936 + &gpio 24 0 /* scl */
6937 + >;
6938 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
6939 + #address-cells = <1>;
6940 + #size-cells = <0>;
6941 + };
6942 + };
6943 + };
6944 +
6945 + fragment@1 {
6946 + target = <&i2c_gpio>;
6947 + __dormant__ {
6948 + #address-cells = <1>;
6949 + #size-cells = <0>;
6950 + status = "okay";
6951 +
6952 + abx80x: abx80x@69 {
6953 + compatible = "abracon,abx80x";
6954 + reg = <0x69>;
6955 + abracon,tc-diode = "standard";
6956 + abracon,tc-resistor = <0>;
6957 + status = "okay";
6958 + };
6959 + };
6960 + };
6961 +
6962 + fragment@2 {
6963 + target = <&i2c_gpio>;
6964 + __dormant__ {
6965 + #address-cells = <1>;
6966 + #size-cells = <0>;
6967 + status = "okay";
6968 +
6969 + ds1307: ds1307@68 {
6970 + compatible = "maxim,ds1307";
6971 + reg = <0x68>;
6972 + status = "okay";
6973 + };
6974 + };
6975 + };
6976 +
6977 + fragment@3 {
6978 + target = <&i2c_gpio>;
6979 + __dormant__ {
6980 + #address-cells = <1>;
6981 + #size-cells = <0>;
6982 + status = "okay";
6983 +
6984 + ds1339: ds1339@68 {
6985 + compatible = "dallas,ds1339";
6986 + trickle-resistor-ohms = <0>;
6987 + reg = <0x68>;
6988 + status = "okay";
6989 + };
6990 + };
6991 + };
6992 +
6993 + fragment@4 {
6994 + target = <&i2c_gpio>;
6995 + __dormant__ {
6996 + #address-cells = <1>;
6997 + #size-cells = <0>;
6998 + status = "okay";
6999 +
7000 + ds3231: ds3231@68 {
7001 + compatible = "maxim,ds3231";
7002 + reg = <0x68>;
7003 + status = "okay";
7004 + };
7005 + };
7006 + };
7007 +
7008 + fragment@5 {
7009 + target = <&i2c_gpio>;
7010 + __dormant__ {
7011 + #address-cells = <1>;
7012 + #size-cells = <0>;
7013 + status = "okay";
7014 +
7015 + mcp7940x: mcp7940x@6f {
7016 + compatible = "microchip,mcp7940x";
7017 + reg = <0x6f>;
7018 + status = "okay";
7019 + };
7020 + };
7021 + };
7022 +
7023 + fragment@6 {
7024 + target = <&i2c_gpio>;
7025 + __dormant__ {
7026 + #address-cells = <1>;
7027 + #size-cells = <0>;
7028 + status = "okay";
7029 +
7030 + mcp7941x: mcp7941x@6f {
7031 + compatible = "microchip,mcp7941x";
7032 + reg = <0x6f>;
7033 + status = "okay";
7034 + };
7035 + };
7036 + };
7037 +
7038 + fragment@7 {
7039 + target = <&i2c_gpio>;
7040 + __dormant__ {
7041 + #address-cells = <1>;
7042 + #size-cells = <0>;
7043 + status = "okay";
7044 +
7045 + pcf2127: pcf2127@51 {
7046 + compatible = "nxp,pcf2127";
7047 + reg = <0x51>;
7048 + status = "okay";
7049 + };
7050 + };
7051 + };
7052 +
7053 + fragment@8 {
7054 + target = <&i2c_gpio>;
7055 + __dormant__ {
7056 + #address-cells = <1>;
7057 + #size-cells = <0>;
7058 + status = "okay";
7059 +
7060 + pcf8523: pcf8523@68 {
7061 + compatible = "nxp,pcf8523";
7062 + reg = <0x68>;
7063 + status = "okay";
7064 + };
7065 + };
7066 + };
7067 +
7068 + fragment@9 {
7069 + target = <&i2c_gpio>;
7070 + __dormant__ {
7071 + #address-cells = <1>;
7072 + #size-cells = <0>;
7073 + status = "okay";
7074 +
7075 + pcf8563: pcf8563@51 {
7076 + compatible = "nxp,pcf8563";
7077 + reg = <0x51>;
7078 + status = "okay";
7079 + };
7080 + };
7081 + };
7082 +
7083 + __overrides__ {
7084 + abx80x = <0>,"+1";
7085 + ds1307 = <0>,"+2";
7086 + ds1339 = <0>,"+3";
7087 + ds3231 = <0>,"+4";
7088 + mcp7940x = <0>,"+5";
7089 + mcp7941x = <0>,"+6";
7090 + pcf2127 = <0>,"+7";
7091 + pcf8523 = <0>,"+8";
7092 + pcf8563 = <0>,"+9";
7093 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
7094 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
7095 + <&abx80x>,"abracon,tc-resistor";
7096 + wakeup-source = <&ds1339>,"wakeup-source?",
7097 + <&ds3231>,"wakeup-source?",
7098 + <&mcp7940x>,"wakeup-source?",
7099 + <&mcp7941x>,"wakeup-source?";
7100 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
7101 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
7102 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
7103 + };
7104 +};
7105 --- /dev/null
7106 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
7107 @@ -0,0 +1,181 @@
7108 +// Definitions for several I2C based Real Time Clocks
7109 +/dts-v1/;
7110 +/plugin/;
7111 +
7112 +/ {
7113 + compatible = "brcm,bcm2708";
7114 +
7115 + fragment@0 {
7116 + target = <&i2c_arm>;
7117 + __dormant__ {
7118 + #address-cells = <1>;
7119 + #size-cells = <0>;
7120 + status = "okay";
7121 +
7122 + abx80x: abx80x@69 {
7123 + compatible = "abracon,abx80x";
7124 + reg = <0x69>;
7125 + abracon,tc-diode = "standard";
7126 + abracon,tc-resistor = <0>;
7127 + status = "okay";
7128 + };
7129 + };
7130 + };
7131 +
7132 + fragment@1 {
7133 + target = <&i2c_arm>;
7134 + __dormant__ {
7135 + #address-cells = <1>;
7136 + #size-cells = <0>;
7137 + status = "okay";
7138 +
7139 + ds1307: ds1307@68 {
7140 + compatible = "maxim,ds1307";
7141 + reg = <0x68>;
7142 + status = "okay";
7143 + };
7144 + };
7145 + };
7146 +
7147 + fragment@2 {
7148 + target = <&i2c_arm>;
7149 + __dormant__ {
7150 + #address-cells = <1>;
7151 + #size-cells = <0>;
7152 + status = "okay";
7153 +
7154 + ds1339: ds1339@68 {
7155 + compatible = "dallas,ds1339";
7156 + trickle-resistor-ohms = <0>;
7157 + reg = <0x68>;
7158 + status = "okay";
7159 + };
7160 + };
7161 + };
7162 +
7163 + fragment@3 {
7164 + target = <&i2c_arm>;
7165 + __dormant__ {
7166 + #address-cells = <1>;
7167 + #size-cells = <0>;
7168 + status = "okay";
7169 +
7170 + ds3231: ds3231@68 {
7171 + compatible = "maxim,ds3231";
7172 + reg = <0x68>;
7173 + status = "okay";
7174 + };
7175 + };
7176 + };
7177 +
7178 + fragment@4 {
7179 + target = <&i2c_arm>;
7180 + __dormant__ {
7181 + #address-cells = <1>;
7182 + #size-cells = <0>;
7183 + status = "okay";
7184 +
7185 + mcp7940x: mcp7940x@6f {
7186 + compatible = "microchip,mcp7940x";
7187 + reg = <0x6f>;
7188 + status = "okay";
7189 + };
7190 + };
7191 + };
7192 +
7193 + fragment@5 {
7194 + target = <&i2c_arm>;
7195 + __dormant__ {
7196 + #address-cells = <1>;
7197 + #size-cells = <0>;
7198 + status = "okay";
7199 +
7200 + mcp7941x: mcp7941x@6f {
7201 + compatible = "microchip,mcp7941x";
7202 + reg = <0x6f>;
7203 + status = "okay";
7204 + };
7205 + };
7206 + };
7207 +
7208 + fragment@6 {
7209 + target = <&i2c_arm>;
7210 + __dormant__ {
7211 + #address-cells = <1>;
7212 + #size-cells = <0>;
7213 + status = "okay";
7214 +
7215 + pcf2127: pcf2127@51 {
7216 + compatible = "nxp,pcf2127";
7217 + reg = <0x51>;
7218 + status = "okay";
7219 + };
7220 + };
7221 + };
7222 +
7223 + fragment@7 {
7224 + target = <&i2c_arm>;
7225 + __dormant__ {
7226 + #address-cells = <1>;
7227 + #size-cells = <0>;
7228 + status = "okay";
7229 +
7230 + pcf8523: pcf8523@68 {
7231 + compatible = "nxp,pcf8523";
7232 + reg = <0x68>;
7233 + status = "okay";
7234 + };
7235 + };
7236 + };
7237 +
7238 + fragment@8 {
7239 + target = <&i2c_arm>;
7240 + __dormant__ {
7241 + #address-cells = <1>;
7242 + #size-cells = <0>;
7243 + status = "okay";
7244 +
7245 + pcf8563: pcf8563@51 {
7246 + compatible = "nxp,pcf8563";
7247 + reg = <0x51>;
7248 + status = "okay";
7249 + };
7250 + };
7251 + };
7252 +
7253 + fragment@9 {
7254 + target = <&i2c_arm>;
7255 + __dormant__ {
7256 + #address-cells = <1>;
7257 + #size-cells = <0>;
7258 + status = "okay";
7259 +
7260 + m41t62: m41t62@68 {
7261 + compatible = "st,m41t62";
7262 + reg = <0x68>;
7263 + status = "okay";
7264 + };
7265 + };
7266 + };
7267 +
7268 + __overrides__ {
7269 + abx80x = <0>,"+0";
7270 + ds1307 = <0>,"+1";
7271 + ds1339 = <0>,"+2";
7272 + ds3231 = <0>,"+3";
7273 + mcp7940x = <0>,"+4";
7274 + mcp7941x = <0>,"+5";
7275 + pcf2127 = <0>,"+6";
7276 + pcf8523 = <0>,"+7";
7277 + pcf8563 = <0>,"+8";
7278 + m41t62 = <0>,"+9";
7279 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
7280 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
7281 + <&abx80x>,"abracon,tc-resistor";
7282 + wakeup-source = <&ds1339>,"wakeup-source?",
7283 + <&ds3231>,"wakeup-source?",
7284 + <&mcp7940x>,"wakeup-source?",
7285 + <&mcp7941x>,"wakeup-source?",
7286 + <&m41t62>,"wakeup-source?";
7287 + };
7288 +};
7289 --- /dev/null
7290 +++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
7291 @@ -0,0 +1,223 @@
7292 +// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
7293 +/dts-v1/;
7294 +/plugin/;
7295 +
7296 +/ {
7297 + compatible = "brcm,bcm2708";
7298 +
7299 + fragment@0 {
7300 + target = <&i2c_arm>;
7301 + __dormant__ {
7302 + #address-cells = <1>;
7303 + #size-cells = <0>;
7304 + status = "okay";
7305 +
7306 + bme280: bme280@76 {
7307 + compatible = "bosch,bme280";
7308 + reg = <0x76>;
7309 + status = "okay";
7310 + };
7311 + };
7312 + };
7313 +
7314 + fragment@1 {
7315 + target = <&i2c_arm>;
7316 + __dormant__ {
7317 + #address-cells = <1>;
7318 + #size-cells = <0>;
7319 + status = "okay";
7320 +
7321 + bmp085: bmp085@77 {
7322 + compatible = "bosch,bmp085";
7323 + reg = <0x77>;
7324 + default-oversampling = <3>;
7325 + status = "okay";
7326 + };
7327 + };
7328 + };
7329 +
7330 + fragment@2 {
7331 + target = <&i2c_arm>;
7332 + __dormant__ {
7333 + #address-cells = <1>;
7334 + #size-cells = <0>;
7335 + status = "okay";
7336 +
7337 + bmp180: bmp180@77 {
7338 + compatible = "bosch,bmp180";
7339 + reg = <0x77>;
7340 + status = "okay";
7341 + };
7342 + };
7343 + };
7344 +
7345 + fragment@3 {
7346 + target = <&i2c_arm>;
7347 + __dormant__ {
7348 + #address-cells = <1>;
7349 + #size-cells = <0>;
7350 + status = "okay";
7351 +
7352 + bmp280: bmp280@76 {
7353 + compatible = "bosch,bmp280";
7354 + reg = <0x76>;
7355 + status = "okay";
7356 + };
7357 + };
7358 + };
7359 +
7360 + fragment@4 {
7361 + target = <&i2c_arm>;
7362 + __dormant__ {
7363 + #address-cells = <1>;
7364 + #size-cells = <0>;
7365 + status = "okay";
7366 +
7367 + htu21: htu21@40 {
7368 + compatible = "htu21";
7369 + reg = <0x40>;
7370 + status = "okay";
7371 + };
7372 + };
7373 + };
7374 +
7375 + fragment@5 {
7376 + target = <&i2c_arm>;
7377 + __dormant__ {
7378 + #address-cells = <1>;
7379 + #size-cells = <0>;
7380 + status = "okay";
7381 +
7382 + lm75: lm75@4f {
7383 + compatible = "lm75";
7384 + reg = <0x4f>;
7385 + status = "okay";
7386 + };
7387 + };
7388 + };
7389 +
7390 + fragment@6 {
7391 + target = <&i2c_arm>;
7392 + __dormant__ {
7393 + #address-cells = <1>;
7394 + #size-cells = <0>;
7395 + status = "okay";
7396 +
7397 + si7020: si7020@40 {
7398 + compatible = "si7020";
7399 + reg = <0x40>;
7400 + status = "okay";
7401 + };
7402 + };
7403 + };
7404 +
7405 + fragment@7 {
7406 + target = <&i2c_arm>;
7407 + __dormant__ {
7408 + #address-cells = <1>;
7409 + #size-cells = <0>;
7410 + status = "okay";
7411 +
7412 + tmp102: tmp102@48 {
7413 + compatible = "ti,tmp102";
7414 + reg = <0x48>;
7415 + status = "okay";
7416 + };
7417 + };
7418 + };
7419 +
7420 + fragment@8 {
7421 + target = <&i2c_arm>;
7422 + __dormant__ {
7423 + #address-cells = <1>;
7424 + #size-cells = <0>;
7425 + status = "okay";
7426 +
7427 + hdc100x: hdc100x@40 {
7428 + compatible = "hdc100x";
7429 + reg = <0x40>;
7430 + status = "okay";
7431 + };
7432 + };
7433 + };
7434 +
7435 + fragment@9 {
7436 + target = <&i2c_arm>;
7437 + __dormant__ {
7438 + #address-cells = <1>;
7439 + #size-cells = <0>;
7440 + status = "okay";
7441 +
7442 + tsl4531: tsl4531@29 {
7443 + compatible = "tsl4531";
7444 + reg = <0x29>;
7445 + status = "okay";
7446 + };
7447 + };
7448 + };
7449 +
7450 + fragment@10 {
7451 + target = <&i2c_arm>;
7452 + __dormant__ {
7453 + #address-cells = <1>;
7454 + #size-cells = <0>;
7455 + status = "okay";
7456 +
7457 + veml6070: veml6070@38 {
7458 + compatible = "veml6070";
7459 + reg = <0x38>;
7460 + status = "okay";
7461 + };
7462 + };
7463 + };
7464 +
7465 + fragment@11 {
7466 + target = <&i2c_arm>;
7467 + __dormant__ {
7468 + #address-cells = <1>;
7469 + #size-cells = <0>;
7470 + status = "okay";
7471 +
7472 + sht3x: sht3x@44 {
7473 + compatible = "sht3x";
7474 + reg = <0x44>;
7475 + status = "okay";
7476 + };
7477 + };
7478 + };
7479 +
7480 + fragment@12 {
7481 + target = <&i2c_arm>;
7482 + __dormant__ {
7483 + #address-cells = <1>;
7484 + #size-cells = <0>;
7485 + status = "okay";
7486 +
7487 + ds1621: ds1621@48 {
7488 + compatible = "ds1621";
7489 + reg = <0x48>;
7490 + status = "okay";
7491 + };
7492 + };
7493 + };
7494 +
7495 + __overrides__ {
7496 + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
7497 + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
7498 + <&ds1621>,"reg:0";
7499 + bme280 = <0>,"+0";
7500 + bmp085 = <0>,"+1";
7501 + bmp180 = <0>,"+2";
7502 + bmp280 = <0>,"+3";
7503 + htu21 = <0>,"+4";
7504 + lm75 = <0>,"+5";
7505 + lm75addr = <&lm75>,"reg:0";
7506 + si7020 = <0>,"+6";
7507 + tmp102 = <0>,"+7";
7508 + hdc100x = <0>,"+8";
7509 + tsl4531 = <0>,"+9";
7510 + veml6070 = <0>,"+10";
7511 + sht3x = <0>,"+11";
7512 + ds1621 = <0>,"+12";
7513 + };
7514 +};
7515 --- /dev/null
7516 +++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
7517 @@ -0,0 +1,69 @@
7518 +/*
7519 + * Device tree overlay for i2c_bcm2708, i2c0 bus
7520 + *
7521 + * Compile:
7522 + * dtc -@ -I dts -O dtb -o i2c0-bcm2708-overlay.dtb i2c0-bcm2708-overlay.dts
7523 + */
7524 +
7525 +/dts-v1/;
7526 +/plugin/;
7527 +
7528 +/{
7529 + compatible = "brcm,bcm2708";
7530 +
7531 + fragment@0 {
7532 + target = <&i2c0>;
7533 + __overlay__ {
7534 + status = "okay";
7535 + };
7536 + };
7537 +
7538 + fragment@1 {
7539 + target = <&i2c0_pins>;
7540 + frag1: __overlay__ {
7541 + brcm,pins = <0 1>;
7542 + brcm,function = <4>; /* alt0 */
7543 + };
7544 + };
7545 +
7546 + fragment@2 {
7547 + target = <&i2c0_pins>;
7548 + __dormant__ {
7549 + brcm,pins = <28 29>;
7550 + brcm,function = <4>; /* alt0 */
7551 + };
7552 + };
7553 +
7554 + fragment@3 {
7555 + target = <&i2c0_pins>;
7556 + __dormant__ {
7557 + brcm,pins = <44 45>;
7558 + brcm,function = <5>; /* alt1 */
7559 + };
7560 + };
7561 +
7562 + fragment@4 {
7563 + target = <&i2c0_pins>;
7564 + __dormant__ {
7565 + brcm,pins = <46 47>;
7566 + brcm,function = <4>; /* alt0 */
7567 + };
7568 + };
7569 +
7570 + fragment@5 {
7571 + target = <&i2c0>;
7572 + __dormant__ {
7573 + compatible = "brcm,bcm2708-i2c";
7574 + };
7575 + };
7576 +
7577 + __overrides__ {
7578 + sda0_pin = <&frag1>,"brcm,pins:0";
7579 + scl0_pin = <&frag1>,"brcm,pins:4";
7580 + pins_0_1 = <0>,"+1-2-3-4";
7581 + pins_28_29 = <0>,"-1+2-3-4";
7582 + pins_44_45 = <0>,"-1-2+3-4";
7583 + pins_46_47 = <0>,"-1-2-3+4";
7584 + combine = <0>, "!5";
7585 + };
7586 +};
7587 --- /dev/null
7588 +++ b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
7589 @@ -0,0 +1,43 @@
7590 +/*
7591 + * Device tree overlay for i2c_bcm2708, i2c1 bus
7592 + *
7593 + * Compile:
7594 + * dtc -@ -I dts -O dtb -o i2c1-bcm2708-overlay.dtb i2c1-bcm2708-overlay.dts
7595 + */
7596 +
7597 +/dts-v1/;
7598 +/plugin/;
7599 +
7600 +/{
7601 + compatible = "brcm,bcm2708";
7602 +
7603 + fragment@0 {
7604 + target = <&i2c1>;
7605 + __overlay__ {
7606 + pinctrl-0 = <&i2c1_pins>;
7607 + status = "okay";
7608 + };
7609 + };
7610 +
7611 + fragment@1 {
7612 + target = <&i2c1_pins>;
7613 + pins: __overlay__ {
7614 + brcm,pins = <2 3>;
7615 + brcm,function = <4>; /* alt 0 */
7616 + };
7617 + };
7618 +
7619 + fragment@2 {
7620 + target = <&i2c1>;
7621 + __dormant__ {
7622 + compatible = "brcm,bcm2708-i2c";
7623 + };
7624 + };
7625 +
7626 + __overrides__ {
7627 + sda1_pin = <&pins>,"brcm,pins:0";
7628 + scl1_pin = <&pins>,"brcm,pins:4";
7629 + pin_func = <&pins>,"brcm,function:0";
7630 + combine = <0>, "!2";
7631 + };
7632 +};
7633 --- /dev/null
7634 +++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
7635 @@ -0,0 +1,18 @@
7636 +/*
7637 + * Device tree overlay to move i2s to gpio 28 to 31 on CM
7638 + */
7639 +
7640 +/dts-v1/;
7641 +/plugin/;
7642 +
7643 +/ {
7644 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
7645 +
7646 + fragment@0 {
7647 + target = <&i2s_pins>;
7648 + __overlay__ {
7649 + brcm,pins = <28 29 30 31>;
7650 + brcm,function = <6>; /* alt2 */
7651 + };
7652 + };
7653 +};
7654 --- /dev/null
7655 +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
7656 @@ -0,0 +1,46 @@
7657 +// Definitions for IQaudIO DAC
7658 +/dts-v1/;
7659 +/plugin/;
7660 +
7661 +/ {
7662 + compatible = "brcm,bcm2708";
7663 +
7664 + fragment@0 {
7665 + target = <&i2s>;
7666 + __overlay__ {
7667 + status = "okay";
7668 + };
7669 + };
7670 +
7671 + fragment@1 {
7672 + target = <&i2c1>;
7673 + __overlay__ {
7674 + #address-cells = <1>;
7675 + #size-cells = <0>;
7676 + status = "okay";
7677 +
7678 + pcm5122@4c {
7679 + #sound-dai-cells = <0>;
7680 + compatible = "ti,pcm5122";
7681 + reg = <0x4c>;
7682 + AVDD-supply = <&vdd_3v3_reg>;
7683 + DVDD-supply = <&vdd_3v3_reg>;
7684 + CPVDD-supply = <&vdd_3v3_reg>;
7685 + status = "okay";
7686 + };
7687 + };
7688 + };
7689 +
7690 + fragment@2 {
7691 + target = <&sound>;
7692 + frag2: __overlay__ {
7693 + compatible = "iqaudio,iqaudio-dac";
7694 + i2s-controller = <&i2s>;
7695 + status = "okay";
7696 + };
7697 + };
7698 +
7699 + __overrides__ {
7700 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
7701 + };
7702 +};
7703 --- /dev/null
7704 +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
7705 @@ -0,0 +1,49 @@
7706 +// Definitions for IQaudIO DAC+
7707 +/dts-v1/;
7708 +/plugin/;
7709 +
7710 +/ {
7711 + compatible = "brcm,bcm2708";
7712 +
7713 + fragment@0 {
7714 + target = <&i2s>;
7715 + __overlay__ {
7716 + status = "okay";
7717 + };
7718 + };
7719 +
7720 + fragment@1 {
7721 + target = <&i2c1>;
7722 + __overlay__ {
7723 + #address-cells = <1>;
7724 + #size-cells = <0>;
7725 + status = "okay";
7726 +
7727 + pcm5122@4c {
7728 + #sound-dai-cells = <0>;
7729 + compatible = "ti,pcm5122";
7730 + reg = <0x4c>;
7731 + AVDD-supply = <&vdd_3v3_reg>;
7732 + DVDD-supply = <&vdd_3v3_reg>;
7733 + CPVDD-supply = <&vdd_3v3_reg>;
7734 + status = "okay";
7735 + };
7736 + };
7737 + };
7738 +
7739 + fragment@2 {
7740 + target = <&sound>;
7741 + iqaudio_dac: __overlay__ {
7742 + compatible = "iqaudio,iqaudio-dac";
7743 + i2s-controller = <&i2s>;
7744 + mute-gpios = <&gpio 22 0>;
7745 + status = "okay";
7746 + };
7747 + };
7748 +
7749 + __overrides__ {
7750 + 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
7751 + auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
7752 + unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
7753 + };
7754 +};
7755 --- /dev/null
7756 +++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
7757 @@ -0,0 +1,47 @@
7758 +// Definitions for IQAudIO Digi WM8804 audio board
7759 +/dts-v1/;
7760 +/plugin/;
7761 +
7762 +/ {
7763 + compatible = "brcm,bcm2708";
7764 +
7765 + fragment@0 {
7766 + target = <&i2s>;
7767 + __overlay__ {
7768 + status = "okay";
7769 + };
7770 + };
7771 +
7772 + fragment@1 {
7773 + target = <&i2c1>;
7774 + __overlay__ {
7775 + #address-cells = <1>;
7776 + #size-cells = <0>;
7777 + status = "okay";
7778 +
7779 + wm8804@3b {
7780 + #sound-dai-cells = <0>;
7781 + compatible = "wlf,wm8804";
7782 + reg = <0x3b>;
7783 + status = "okay";
7784 + DVDD-supply = <&vdd_3v3_reg>;
7785 + PVDD-supply = <&vdd_3v3_reg>;
7786 + };
7787 + };
7788 + };
7789 +
7790 + fragment@2 {
7791 + target = <&sound>;
7792 + wm8804_digi: __overlay__ {
7793 + compatible = "iqaudio,wm8804-digi";
7794 + i2s-controller = <&i2s>;
7795 + status = "okay";
7796 + };
7797 + };
7798 +
7799 + __overrides__ {
7800 + card_name = <&wm8804_digi>,"wm8804-digi,card-name";
7801 + dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
7802 + dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
7803 + };
7804 +};
7805 --- /dev/null
7806 +++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
7807 @@ -0,0 +1,309 @@
7808 +// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
7809 +
7810 +// dtparams:
7811 +// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
7812 +// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
7813 +//
7814 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7815 +//
7816 +// Example: A single flash device with fast read capability on SPI0, CS#0:
7817 +// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
7818 +
7819 +/dts-v1/;
7820 +/plugin/;
7821 +
7822 +/ {
7823 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
7824 +
7825 + // disable spi-dev on spi0.0
7826 + fragment@0 {
7827 + target = <&spidev0>;
7828 + __dormant__ {
7829 + status = "disabled";
7830 + };
7831 + };
7832 +
7833 + // disable spi-dev on spi0.1
7834 + fragment@1 {
7835 + target = <&spidev1>;
7836 + __dormant__ {
7837 + status = "disabled";
7838 + };
7839 + };
7840 +
7841 + // disable spi-dev on spi1.0
7842 + fragment@2 {
7843 + target-path = "spi1/spidev@0";
7844 + __dormant__ {
7845 + status = "disabled";
7846 + };
7847 + };
7848 +
7849 + // disable spi-dev on spi1.1
7850 + fragment@3 {
7851 + target-path = "spi1/spidev@1";
7852 + __dormant__ {
7853 + status = "disabled";
7854 + };
7855 + };
7856 +
7857 + // disable spi-dev on spi1.2
7858 + fragment@4 {
7859 + target-path = "spi1/spidev@2";
7860 + __dormant__ {
7861 + status = "disabled";
7862 + };
7863 + };
7864 +
7865 + // disable spi-dev on spi2.0
7866 + fragment@5 {
7867 + target-path = "spi2/spidev@0";
7868 + __dormant__ {
7869 + status = "disabled";
7870 + };
7871 + };
7872 +
7873 + // disable spi-dev on spi2.1
7874 + fragment@6 {
7875 + target-path = "spi2/spidev@1";
7876 + __dormant__ {
7877 + status = "disabled";
7878 + };
7879 + };
7880 +
7881 + // disable spi-dev on spi2.2
7882 + fragment@7 {
7883 + target-path = "spi2/spidev@2";
7884 + __dormant__ {
7885 + status = "disabled";
7886 + };
7887 + };
7888 +
7889 + // enable flash on spi0.0
7890 + fragment@8 {
7891 + target = <&spi0>;
7892 + __dormant__ {
7893 + status = "okay";
7894 + #address-cells = <1>;
7895 + #size-cells = <0>;
7896 + spi_nor_00: spi_nor@0 {
7897 + #address-cells = <1>;
7898 + #size-cells = <1>;
7899 + compatible = "jedec,spi-nor";
7900 + reg = <0>;
7901 + spi-max-frequency = <500000>;
7902 + };
7903 + };
7904 + };
7905 +
7906 + // enable flash on spi0.1
7907 + fragment@9 {
7908 + target = <&spi0>;
7909 + __dormant__ {
7910 + status = "okay";
7911 + #address-cells = <1>;
7912 + #size-cells = <0>;
7913 + spi_nor_01: spi_nor@1 {
7914 + #address-cells = <1>;
7915 + #size-cells = <1>;
7916 + compatible = "jedec,spi-nor";
7917 + reg = <1>;
7918 + spi-max-frequency = <500000>;
7919 + };
7920 + };
7921 + };
7922 +
7923 + // enable flash on spi1.0
7924 + fragment@10 {
7925 + target = <&spi1>;
7926 + __dormant__ {
7927 + status = "okay";
7928 + #address-cells = <1>;
7929 + #size-cells = <0>;
7930 + spi_nor_10: spi_nor@0 {
7931 + #address-cells = <1>;
7932 + #size-cells = <1>;
7933 + compatible = "jedec,spi-nor";
7934 + reg = <0>;
7935 + spi-max-frequency = <500000>;
7936 + };
7937 + };
7938 + };
7939 +
7940 + // enable flash on spi1.1
7941 + fragment@11 {
7942 + target = <&spi1>;
7943 + __dormant__ {
7944 + status = "okay";
7945 + #address-cells = <1>;
7946 + #size-cells = <0>;
7947 + spi_nor_11: spi_nor@1 {
7948 + #address-cells = <1>;
7949 + #size-cells = <1>;
7950 + compatible = "jedec,spi-nor";
7951 + reg = <1>;
7952 + spi-max-frequency = <500000>;
7953 + };
7954 + };
7955 + };
7956 +
7957 + // enable flash on spi1.2
7958 + fragment@12 {
7959 + target = <&spi1>;
7960 + __dormant__ {
7961 + status = "okay";
7962 + #address-cells = <1>;
7963 + #size-cells = <0>;
7964 + spi_nor_12: spi_nor@2 {
7965 + #address-cells = <1>;
7966 + #size-cells = <1>;
7967 + compatible = "jedec,spi-nor";
7968 + reg = <2>;
7969 + spi-max-frequency = <500000>;
7970 + };
7971 + };
7972 + };
7973 +
7974 + // enable flash on spi2.0
7975 + fragment@13 {
7976 + target = <&spi2>;
7977 + __dormant__ {
7978 + status = "okay";
7979 + #address-cells = <1>;
7980 + #size-cells = <0>;
7981 + spi_nor_20: spi_nor@0 {
7982 + #address-cells = <1>;
7983 + #size-cells = <1>;
7984 + compatible = "jedec,spi-nor";
7985 + reg = <0>;
7986 + spi-max-frequency = <500000>;
7987 + };
7988 + };
7989 + };
7990 +
7991 + // enable flash on spi2.1
7992 + fragment@14 {
7993 + target = <&spi2>;
7994 + __dormant__ {
7995 + status = "okay";
7996 + #address-cells = <1>;
7997 + #size-cells = <0>;
7998 + spi_nor_21: spi_nor@1 {
7999 + #address-cells = <1>;
8000 + #size-cells = <1>;
8001 + compatible = "jedec,spi-nor";
8002 + reg = <1>;
8003 + spi-max-frequency = <500000>;
8004 + };
8005 + };
8006 + };
8007 +
8008 + // enable flash on spi2.2
8009 + fragment@15 {
8010 + target = <&spi2>;
8011 + __dormant__ {
8012 + status = "okay";
8013 + #address-cells = <1>;
8014 + #size-cells = <0>;
8015 + spi_nor_22: spi_nor@2 {
8016 + #address-cells = <1>;
8017 + #size-cells = <1>;
8018 + compatible = "jedec,spi-nor";
8019 + reg = <2>;
8020 + spi-max-frequency = <500000>;
8021 + };
8022 + };
8023 + };
8024 +
8025 + // Enable fast read for device on spi0.0.
8026 + // Use default active low interrupt signalling.
8027 + fragment@16 {
8028 + target = <&spi_nor_00>;
8029 + __dormant__ {
8030 + m25p,fast-read;
8031 + };
8032 + };
8033 +
8034 + // Enable fast read for device on spi0.1.
8035 + // Use default active low interrupt signalling.
8036 + fragment@17 {
8037 + target = <&spi_nor_01>;
8038 + __dormant__ {
8039 + m25p,fast-read;
8040 + };
8041 + };
8042 +
8043 + // Enable fast read for device on spi1.0.
8044 + // Use default active low interrupt signalling.
8045 + fragment@18 {
8046 + target = <&spi_nor_10>;
8047 + __dormant__ {
8048 + m25p,fast-read;
8049 + };
8050 + };
8051 +
8052 + // Enable fast read for device on spi1.1.
8053 + // Use default active low interrupt signalling.
8054 + fragment@19 {
8055 + target = <&spi_nor_11>;
8056 + __dormant__ {
8057 + m25p,fast-read;
8058 + };
8059 + };
8060 +
8061 + // Enable fast read for device on spi1.2.
8062 + // Use default active low interrupt signalling.
8063 + fragment@20 {
8064 + target = <&spi_nor_12>;
8065 + __dormant__ {
8066 + m25p,fast-read;
8067 + };
8068 + };
8069 +
8070 + // Enable fast read for device on spi2.0.
8071 + // Use default active low interrupt signalling.
8072 + fragment@21 {
8073 + target = <&spi_nor_20>;
8074 + __dormant__ {
8075 + m25p,fast-read;
8076 + };
8077 + };
8078 +
8079 + // Enable fast read for device on spi2.1.
8080 + // Use default active low interrupt signalling.
8081 + fragment@22 {
8082 + target = <&spi_nor_21>;
8083 + __dormant__ {
8084 + m25p,fast-read;
8085 + };
8086 + };
8087 +
8088 + // Enable fast read for device on spi2.2.
8089 + // Use default active low interrupt signalling.
8090 + fragment@23 {
8091 + target = <&spi_nor_22>;
8092 + __dormant__ {
8093 + m25p,fast-read;
8094 + };
8095 + };
8096 +
8097 + __overrides__ {
8098 + flash-spi0-0 = <0>,"+0+8";
8099 + flash-spi0-1 = <0>,"+1+9";
8100 + flash-spi1-0 = <0>,"+2+10";
8101 + flash-spi1-1 = <0>,"+3+11";
8102 + flash-spi1-2 = <0>,"+4+12";
8103 + flash-spi2-0 = <0>,"+5+13";
8104 + flash-spi2-1 = <0>,"+6+14";
8105 + flash-spi2-2 = <0>,"+7+15";
8106 + flash-fastr-spi0-0 = <0>,"+0+8+16";
8107 + flash-fastr-spi0-1 = <0>,"+1+9+17";
8108 + flash-fastr-spi1-0 = <0>,"+2+10+18";
8109 + flash-fastr-spi1-1 = <0>,"+3+11+19";
8110 + flash-fastr-spi1-2 = <0>,"+4+12+20";
8111 + flash-fastr-spi2-0 = <0>,"+5+13+21";
8112 + flash-fastr-spi2-1 = <0>,"+6+14+22";
8113 + flash-fastr-spi2-2 = <0>,"+7+15+23";
8114 + };
8115 +};
8116 +
8117 --- /dev/null
8118 +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
8119 @@ -0,0 +1,46 @@
8120 +// Definitions for JustBoom DAC
8121 +/dts-v1/;
8122 +/plugin/;
8123 +
8124 +/ {
8125 + compatible = "brcm,bcm2708";
8126 +
8127 + fragment@0 {
8128 + target = <&i2s>;
8129 + __overlay__ {
8130 + status = "okay";
8131 + };
8132 + };
8133 +
8134 + fragment@1 {
8135 + target = <&i2c1>;
8136 + __overlay__ {
8137 + #address-cells = <1>;
8138 + #size-cells = <0>;
8139 + status = "okay";
8140 +
8141 + pcm5122@4d {
8142 + #sound-dai-cells = <0>;
8143 + compatible = "ti,pcm5122";
8144 + reg = <0x4d>;
8145 + AVDD-supply = <&vdd_3v3_reg>;
8146 + DVDD-supply = <&vdd_3v3_reg>;
8147 + CPVDD-supply = <&vdd_3v3_reg>;
8148 + status = "okay";
8149 + };
8150 + };
8151 + };
8152 +
8153 + fragment@2 {
8154 + target = <&sound>;
8155 + frag2: __overlay__ {
8156 + compatible = "justboom,justboom-dac";
8157 + i2s-controller = <&i2s>;
8158 + status = "okay";
8159 + };
8160 + };
8161 +
8162 + __overrides__ {
8163 + 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
8164 + };
8165 +};
8166 --- /dev/null
8167 +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
8168 @@ -0,0 +1,41 @@
8169 +// Definitions for JustBoom Digi
8170 +/dts-v1/;
8171 +/plugin/;
8172 +
8173 +/ {
8174 + compatible = "brcm,bcm2708";
8175 +
8176 + fragment@0 {
8177 + target = <&i2s>;
8178 + __overlay__ {
8179 + status = "okay";
8180 + };
8181 + };
8182 +
8183 + fragment@1 {
8184 + target = <&i2c1>;
8185 + __overlay__ {
8186 + #address-cells = <1>;
8187 + #size-cells = <0>;
8188 + status = "okay";
8189 +
8190 + wm8804@3b {
8191 + #sound-dai-cells = <0>;
8192 + compatible = "wlf,wm8804";
8193 + reg = <0x3b>;
8194 + PVDD-supply = <&vdd_3v3_reg>;
8195 + DVDD-supply = <&vdd_3v3_reg>;
8196 + status = "okay";
8197 + };
8198 + };
8199 + };
8200 +
8201 + fragment@2 {
8202 + target = <&sound>;
8203 + __overlay__ {
8204 + compatible = "justboom,justboom-digi";
8205 + i2s-controller = <&i2s>;
8206 + status = "okay";
8207 + };
8208 + };
8209 +};
8210 --- /dev/null
8211 +++ b/arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts
8212 @@ -0,0 +1,57 @@
8213 +// Definitions for lirc-rpi module
8214 +/dts-v1/;
8215 +/plugin/;
8216 +
8217 +/ {
8218 + compatible = "brcm,bcm2708";
8219 +
8220 + fragment@0 {
8221 + target-path = "/";
8222 + __overlay__ {
8223 + lirc_rpi: lirc_rpi {
8224 + compatible = "rpi,lirc-rpi";
8225 + pinctrl-names = "default";
8226 + pinctrl-0 = <&lirc_pins>;
8227 + status = "okay";
8228 +
8229 + // Override autodetection of IR receiver circuit
8230 + // (0 = active high, 1 = active low, -1 = no override )
8231 + rpi,sense = <0xffffffff>;
8232 +
8233 + // Software carrier
8234 + // (0 = off, 1 = on)
8235 + rpi,softcarrier = <1>;
8236 +
8237 + // Invert output
8238 + // (0 = off, 1 = on)
8239 + rpi,invert = <0>;
8240 +
8241 + // Enable debugging messages
8242 + // (0 = off, 1 = on)
8243 + rpi,debug = <0>;
8244 + };
8245 + };
8246 + };
8247 +
8248 + fragment@1 {
8249 + target = <&gpio>;
8250 + __overlay__ {
8251 + lirc_pins: lirc_pins {
8252 + brcm,pins = <17 18>;
8253 + brcm,function = <1 0>; // out in
8254 + brcm,pull = <0 1>; // off down
8255 + };
8256 + };
8257 + };
8258 +
8259 + __overrides__ {
8260 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
8261 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
8262 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
8263 +
8264 + sense = <&lirc_rpi>,"rpi,sense:0";
8265 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
8266 + invert = <&lirc_rpi>,"rpi,invert:0";
8267 + debug = <&lirc_rpi>,"rpi,debug:0";
8268 + };
8269 +};
8270 --- /dev/null
8271 +++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
8272 @@ -0,0 +1,86 @@
8273 +/dts-v1/;
8274 +/plugin/;
8275 +
8276 +
8277 +/ {
8278 + compatible = "brcm,bcm2835";
8279 +
8280 + fragment@0 {
8281 + target = <&i2c_arm>;
8282 + __dormant__ {
8283 + #address-cells = <1>;
8284 + #size-cells = <0>;
8285 + status = "okay";
8286 +
8287 + ltc2941: ltc2941@64 {
8288 + compatible = "lltc,ltc2941";
8289 + reg = <0x64>;
8290 + lltc,resistor-sense = <50>;
8291 + lltc,prescaler-exponent = <7>;
8292 + };
8293 + };
8294 + };
8295 +
8296 + fragment@1 {
8297 + target = <&i2c_arm>;
8298 + __dormant__ {
8299 + #address-cells = <1>;
8300 + #size-cells = <0>;
8301 + status = "okay";
8302 +
8303 + ltc2942: ltc2942@64 {
8304 + compatible = "lltc,ltc2942";
8305 + reg = <0x64>;
8306 + lltc,resistor-sense = <50>;
8307 + lltc,prescaler-exponent = <7>;
8308 + };
8309 + };
8310 + };
8311 +
8312 + fragment@2 {
8313 + target = <&i2c_arm>;
8314 + __dormant__ {
8315 + #address-cells = <1>;
8316 + #size-cells = <0>;
8317 + status = "okay";
8318 +
8319 + ltc2943: ltc2943@64 {
8320 + compatible = "lltc,ltc2943";
8321 + reg = <0x64>;
8322 + lltc,resistor-sense = <50>;
8323 + lltc,prescaler-exponent = <7>;
8324 + };
8325 + };
8326 + };
8327 +
8328 + fragment@3 {
8329 + target = <&i2c_arm>;
8330 + __dormant__ {
8331 + #address-cells = <1>;
8332 + #size-cells = <0>;
8333 + status = "okay";
8334 +
8335 + ltc2944: ltc2944@64 {
8336 + compatible = "lltc,ltc2944";
8337 + reg = <0x64>;
8338 + lltc,resistor-sense = <50>;
8339 + lltc,prescaler-exponent = <7>;
8340 + };
8341 + };
8342 + };
8343 +
8344 + __overrides__ {
8345 + ltc2941 = <0>,"+0";
8346 + ltc2942 = <0>,"+1";
8347 + ltc2943 = <0>,"+2";
8348 + ltc2944 = <0>,"+3";
8349 + resistor-sense = <&ltc2941>, "lltc,resistor-sense:0",
8350 + <&ltc2942>, "lltc,resistor-sense:0",
8351 + <&ltc2943>, "lltc,resistor-sense:0",
8352 + <&ltc2944>, "lltc,resistor-sense:0";
8353 + prescaler-exponent = <&ltc2941>, "lltc,prescaler-exponent:0",
8354 + <&ltc2942>, "lltc,prescaler-exponent:0",
8355 + <&ltc2943>, "lltc,prescaler-exponent:0",
8356 + <&ltc2944>, "lltc,prescaler-exponent:0";
8357 + };
8358 +};
8359 --- /dev/null
8360 +++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
8361 @@ -0,0 +1,64 @@
8362 +// Definitions for mbed DAC
8363 +/dts-v1/;
8364 +/plugin/;
8365 +
8366 +/ {
8367 + compatible = "brcm,bcm2708";
8368 +
8369 + fragment@0 {
8370 + target = <&i2s>;
8371 + __overlay__ {
8372 + status = "okay";
8373 + };
8374 + };
8375 +
8376 + fragment@1 {
8377 + target = <&i2c1>;
8378 + __overlay__ {
8379 + #address-cells = <1>;
8380 + #size-cells = <0>;
8381 + status = "okay";
8382 +
8383 + tlv320aic23: codec@1a {
8384 + #sound-dai-cells = <0>;
8385 + reg = <0x1a>;
8386 + compatible = "ti,tlv320aic23";
8387 + status = "okay";
8388 + };
8389 + };
8390 + };
8391 +
8392 + fragment@2 {
8393 + target = <&sound>;
8394 + __overlay__ {
8395 + compatible = "simple-audio-card";
8396 + i2s-controller = <&i2s>;
8397 + status = "okay";
8398 +
8399 + simple-audio-card,name = "mbed-DAC";
8400 +
8401 + simple-audio-card,widgets =
8402 + "Microphone", "Mic Jack",
8403 + "Line", "Line In",
8404 + "Headphone", "Headphone Jack";
8405 +
8406 + simple-audio-card,routing =
8407 + "Headphone Jack", "LHPOUT",
8408 + "Headphone Jack", "RHPOUT",
8409 + "LLINEIN", "Line In",
8410 + "RLINEIN", "Line In",
8411 + "MICIN", "Mic Jack";
8412 +
8413 + simple-audio-card,format = "i2s";
8414 +
8415 + simple-audio-card,cpu {
8416 + sound-dai = <&i2s>;
8417 + };
8418 +
8419 + sound_master: simple-audio-card,codec {
8420 + sound-dai = <&tlv320aic23>;
8421 + system-clock-frequency = <12288000>;
8422 + };
8423 + };
8424 + };
8425 +};
8426 --- /dev/null
8427 +++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
8428 @@ -0,0 +1,54 @@
8429 +// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
8430 +
8431 +/dts-v1/;
8432 +/plugin/;
8433 +
8434 +/ {
8435 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
8436 +
8437 + fragment@0 {
8438 + target = <&i2c1>;
8439 + __overlay__ {
8440 + status = "okay";
8441 + };
8442 + };
8443 +
8444 + fragment@1 {
8445 + target = <&gpio>;
8446 + __overlay__ {
8447 + mcp23017_pins: mcp23017_pins {
8448 + brcm,pins = <4>;
8449 + brcm,function = <0>;
8450 + };
8451 + };
8452 + };
8453 +
8454 + fragment@2 {
8455 + target = <&i2c1>;
8456 + __overlay__ {
8457 + #address-cells = <1>;
8458 + #size-cells = <0>;
8459 +
8460 + mcp23017: mcp@20 {
8461 + compatible = "microchip,mcp23017";
8462 + reg = <0x20>;
8463 + gpio-controller;
8464 + #gpio-cells = <2>;
8465 + #interrupt-cells=<2>;
8466 + interrupt-parent = <&gpio>;
8467 + interrupts = <4 2>;
8468 + interrupt-controller;
8469 + microchip,irq-mirror;
8470 +
8471 + status = "okay";
8472 + };
8473 + };
8474 + };
8475 +
8476 + __overrides__ {
8477 + gpiopin = <&mcp23017_pins>,"brcm,pins:0",
8478 + <&mcp23017>,"interrupts:0";
8479 + addr = <&mcp23017>,"reg:0";
8480 + };
8481 +};
8482 +
8483 --- /dev/null
8484 +++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
8485 @@ -0,0 +1,732 @@
8486 +// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
8487 +
8488 +// dtparams:
8489 +// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
8490 +// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
8491 +// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
8492 +// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
8493 +//
8494 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
8495 +// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
8496 +//
8497 +// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
8498 +// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
8499 +//
8500 +// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
8501 +// dtoverlay=spi1-2cs
8502 +// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
8503 +
8504 +/dts-v1/;
8505 +/plugin/;
8506 +
8507 +/ {
8508 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
8509 +
8510 + // disable spi-dev on spi0.0
8511 + fragment@0 {
8512 + target = <&spidev0>;
8513 + __dormant__ {
8514 + status = "disabled";
8515 + };
8516 + };
8517 +
8518 + // disable spi-dev on spi0.1
8519 + fragment@1 {
8520 + target = <&spidev1>;
8521 + __dormant__ {
8522 + status = "disabled";
8523 + };
8524 + };
8525 +
8526 + // disable spi-dev on spi1.0
8527 + fragment@2 {
8528 + target-path = "spi1/spidev@0";
8529 + __dormant__ {
8530 + status = "disabled";
8531 + };
8532 + };
8533 +
8534 + // disable spi-dev on spi1.1
8535 + fragment@3 {
8536 + target-path = "spi1/spidev@1";
8537 + __dormant__ {
8538 + status = "disabled";
8539 + };
8540 + };
8541 +
8542 + // disable spi-dev on spi1.2
8543 + fragment@4 {
8544 + target-path = "spi1/spidev@2";
8545 + __dormant__ {
8546 + status = "disabled";
8547 + };
8548 + };
8549 +
8550 + // disable spi-dev on spi2.0
8551 + fragment@5 {
8552 + target-path = "spi2/spidev@0";
8553 + __dormant__ {
8554 + status = "disabled";
8555 + };
8556 + };
8557 +
8558 + // disable spi-dev on spi2.1
8559 + fragment@6 {
8560 + target-path = "spi2/spidev@1";
8561 + __dormant__ {
8562 + status = "disabled";
8563 + };
8564 + };
8565 +
8566 + // disable spi-dev on spi2.2
8567 + fragment@7 {
8568 + target-path = "spi2/spidev@2";
8569 + __dormant__ {
8570 + status = "disabled";
8571 + };
8572 + };
8573 +
8574 + // enable one or more mcp23s08s on spi0.0
8575 + fragment@8 {
8576 + target = <&spi0>;
8577 + __dormant__ {
8578 + status = "okay";
8579 + #address-cells = <1>;
8580 + #size-cells = <0>;
8581 + mcp23s08_00: mcp23s08@0 {
8582 + compatible = "microchip,mcp23s08";
8583 + gpio-controller;
8584 + #gpio-cells = <2>;
8585 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
8586 + reg = <0>;
8587 + spi-max-frequency = <500000>;
8588 + status = "okay";
8589 + #interrupt-cells=<2>;
8590 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
8591 + };
8592 + };
8593 + };
8594 +
8595 + // enable one or more mcp23s08s on spi0.1
8596 + fragment@9 {
8597 + target = <&spi0>;
8598 + __dormant__ {
8599 + status = "okay";
8600 + #address-cells = <1>;
8601 + #size-cells = <0>;
8602 + mcp23s08_01: mcp23s08@1 {
8603 + compatible = "microchip,mcp23s08";
8604 + gpio-controller;
8605 + #gpio-cells = <2>;
8606 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
8607 + reg = <1>;
8608 + spi-max-frequency = <500000>;
8609 + status = "okay";
8610 + #interrupt-cells=<2>;
8611 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
8612 + };
8613 + };
8614 + };
8615 +
8616 + // enable one or more mcp23s08s on spi1.0
8617 + fragment@10 {
8618 + target = <&spi1>;
8619 + __dormant__ {
8620 + status = "okay";
8621 + #address-cells = <1>;
8622 + #size-cells = <0>;
8623 + mcp23s08_10: mcp23s08@0 {
8624 + compatible = "microchip,mcp23s08";
8625 + gpio-controller;
8626 + #gpio-cells = <2>;
8627 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
8628 + reg = <0>;
8629 + spi-max-frequency = <500000>;
8630 + status = "okay";
8631 + #interrupt-cells=<2>;
8632 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
8633 + };
8634 + };
8635 + };
8636 +
8637 + // enable one or more mcp23s08s on spi1.1
8638 + fragment@11 {
8639 + target = <&spi1>;
8640 + __dormant__ {
8641 + status = "okay";
8642 + #address-cells = <1>;
8643 + #size-cells = <0>;
8644 + mcp23s08_11: mcp23s08@1 {
8645 + compatible = "microchip,mcp23s08";
8646 + gpio-controller;
8647 + #gpio-cells = <2>;
8648 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
8649 + reg = <1>;
8650 + spi-max-frequency = <500000>;
8651 + status = "okay";
8652 + #interrupt-cells=<2>;
8653 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
8654 + };
8655 + };
8656 + };
8657 +
8658 + // enable one or more mcp23s08s on spi1.2
8659 + fragment@12 {
8660 + target = <&spi1>;
8661 + __dormant__ {
8662 + status = "okay";
8663 + #address-cells = <1>;
8664 + #size-cells = <0>;
8665 + mcp23s08_12: mcp23s08@2 {
8666 + compatible = "microchip,mcp23s08";
8667 + gpio-controller;
8668 + #gpio-cells = <2>;
8669 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
8670 + reg = <2>;
8671 + spi-max-frequency = <500000>;
8672 + status = "okay";
8673 + #interrupt-cells=<2>;
8674 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
8675 + };
8676 + };
8677 + };
8678 +
8679 + // enable one or more mcp23s08s on spi2.0
8680 + fragment@13 {
8681 + target = <&spi2>;
8682 + __dormant__ {
8683 + status = "okay";
8684 + #address-cells = <1>;
8685 + #size-cells = <0>;
8686 + mcp23s08_20: mcp23s08@0 {
8687 + compatible = "microchip,mcp23s08";
8688 + gpio-controller;
8689 + #gpio-cells = <2>;
8690 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
8691 + reg = <0>;
8692 + spi-max-frequency = <500000>;
8693 + status = "okay";
8694 + #interrupt-cells=<2>;
8695 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
8696 + };
8697 + };
8698 + };
8699 +
8700 + // enable one or more mcp23s08s on spi2.1
8701 + fragment@14 {
8702 + target = <&spi2>;
8703 + __dormant__ {
8704 + status = "okay";
8705 + #address-cells = <1>;
8706 + #size-cells = <0>;
8707 + mcp23s08_21: mcp23s08@1 {
8708 + compatible = "microchip,mcp23s08";
8709 + gpio-controller;
8710 + #gpio-cells = <2>;
8711 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
8712 + reg = <1>;
8713 + spi-max-frequency = <500000>;
8714 + status = "okay";
8715 + #interrupt-cells=<2>;
8716 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
8717 + };
8718 + };
8719 + };
8720 +
8721 + // enable one or more mcp23s08s on spi2.2
8722 + fragment@15 {
8723 + target = <&spi2>;
8724 + __dormant__ {
8725 + status = "okay";
8726 + #address-cells = <1>;
8727 + #size-cells = <0>;
8728 + mcp23s08_22: mcp23s08@2 {
8729 + compatible = "microchip,mcp23s08";
8730 + gpio-controller;
8731 + #gpio-cells = <2>;
8732 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
8733 + reg = <2>;
8734 + spi-max-frequency = <500000>;
8735 + status = "okay";
8736 + #interrupt-cells=<2>;
8737 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
8738 + };
8739 + };
8740 + };
8741 +
8742 + // enable one or more mcp23s17s on spi0.0
8743 + fragment@16 {
8744 + target = <&spi0>;
8745 + __dormant__ {
8746 + status = "okay";
8747 + #address-cells = <1>;
8748 + #size-cells = <0>;
8749 + mcp23s17_00: mcp23s17@0 {
8750 + compatible = "microchip,mcp23s17";
8751 + gpio-controller;
8752 + #gpio-cells = <2>;
8753 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
8754 + reg = <0>;
8755 + spi-max-frequency = <500000>;
8756 + status = "okay";
8757 + #interrupt-cells=<2>;
8758 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
8759 + };
8760 + };
8761 + };
8762 +
8763 + // enable one or more mcp23s17s on spi0.1
8764 + fragment@17 {
8765 + target = <&spi0>;
8766 + __dormant__ {
8767 + status = "okay";
8768 + #address-cells = <1>;
8769 + #size-cells = <0>;
8770 + mcp23s17_01: mcp23s17@1 {
8771 + compatible = "microchip,mcp23s17";
8772 + gpio-controller;
8773 + #gpio-cells = <2>;
8774 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
8775 + reg = <1>;
8776 + spi-max-frequency = <500000>;
8777 + status = "okay";
8778 + #interrupt-cells=<2>;
8779 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
8780 + };
8781 + };
8782 + };
8783 +
8784 + // enable one or more mcp23s17s on spi1.0
8785 + fragment@18 {
8786 + target = <&spi1>;
8787 + __dormant__ {
8788 + status = "okay";
8789 + #address-cells = <1>;
8790 + #size-cells = <0>;
8791 + mcp23s17_10: mcp23s17@0 {
8792 + compatible = "microchip,mcp23s17";
8793 + gpio-controller;
8794 + #gpio-cells = <2>;
8795 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
8796 + reg = <0>;
8797 + spi-max-frequency = <500000>;
8798 + status = "okay";
8799 + #interrupt-cells=<2>;
8800 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
8801 + };
8802 + };
8803 + };
8804 +
8805 + // enable one or more mcp23s17s on spi1.1
8806 + fragment@19 {
8807 + target = <&spi1>;
8808 + __dormant__ {
8809 + status = "okay";
8810 + #address-cells = <1>;
8811 + #size-cells = <0>;
8812 + mcp23s17_11: mcp23s17@1 {
8813 + compatible = "microchip,mcp23s17";
8814 + gpio-controller;
8815 + #gpio-cells = <2>;
8816 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
8817 + reg = <1>;
8818 + spi-max-frequency = <500000>;
8819 + status = "okay";
8820 + #interrupt-cells=<2>;
8821 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
8822 + };
8823 + };
8824 + };
8825 +
8826 + // enable one or more mcp23s17s on spi1.2
8827 + fragment@20 {
8828 + target = <&spi1>;
8829 + __dormant__ {
8830 + status = "okay";
8831 + #address-cells = <1>;
8832 + #size-cells = <0>;
8833 + mcp23s17_12: mcp23s17@2 {
8834 + compatible = "microchip,mcp23s17";
8835 + gpio-controller;
8836 + #gpio-cells = <2>;
8837 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
8838 + reg = <2>;
8839 + spi-max-frequency = <500000>;
8840 + status = "okay";
8841 + #interrupt-cells=<2>;
8842 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
8843 + };
8844 + };
8845 + };
8846 +
8847 + // enable one or more mcp23s17s on spi2.0
8848 + fragment@21 {
8849 + target = <&spi2>;
8850 + __dormant__ {
8851 + status = "okay";
8852 + #address-cells = <1>;
8853 + #size-cells = <0>;
8854 + mcp23s17_20: mcp23s17@0 {
8855 + compatible = "microchip,mcp23s17";
8856 + gpio-controller;
8857 + #gpio-cells = <2>;
8858 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
8859 + reg = <0>;
8860 + spi-max-frequency = <500000>;
8861 + status = "okay";
8862 + #interrupt-cells=<2>;
8863 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
8864 + };
8865 + };
8866 + };
8867 +
8868 + // enable one or more mcp23s17s on spi2.1
8869 + fragment@22 {
8870 + target = <&spi2>;
8871 + __dormant__ {
8872 + status = "okay";
8873 + #address-cells = <1>;
8874 + #size-cells = <0>;
8875 + mcp23s17_21: mcp23s17@1 {
8876 + compatible = "microchip,mcp23s17";
8877 + gpio-controller;
8878 + #gpio-cells = <2>;
8879 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
8880 + reg = <1>;
8881 + spi-max-frequency = <500000>;
8882 + status = "okay";
8883 + #interrupt-cells=<2>;
8884 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
8885 + };
8886 + };
8887 + };
8888 +
8889 + // enable one or more mcp23s17s on spi2.2
8890 + fragment@23 {
8891 + target = <&spi2>;
8892 + __dormant__ {
8893 + status = "okay";
8894 + #address-cells = <1>;
8895 + #size-cells = <0>;
8896 + mcp23s17_22: mcp23s17@2 {
8897 + compatible = "microchip,mcp23s17";
8898 + gpio-controller;
8899 + #gpio-cells = <2>;
8900 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
8901 + reg = <2>;
8902 + spi-max-frequency = <500000>;
8903 + status = "okay";
8904 + #interrupt-cells=<2>;
8905 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
8906 + };
8907 + };
8908 + };
8909 +
8910 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
8911 + fragment@24 {
8912 + target = <&gpio>;
8913 + __dormant__ {
8914 + spi0_0_int_pins: spi0_0_int_pins {
8915 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
8916 + brcm,function = <0>;
8917 + brcm,pull = <0>;
8918 + };
8919 + };
8920 + };
8921 +
8922 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
8923 + fragment@25 {
8924 + target = <&gpio>;
8925 + __dormant__ {
8926 + spi0_1_int_pins: spi0_1_int_pins {
8927 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
8928 + brcm,function = <0>;
8929 + brcm,pull = <0>;
8930 + };
8931 + };
8932 + };
8933 +
8934 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
8935 + fragment@26 {
8936 + target = <&gpio>;
8937 + __dormant__ {
8938 + spi1_0_int_pins: spi1_0_int_pins {
8939 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
8940 + brcm,function = <0>;
8941 + brcm,pull = <0>;
8942 + };
8943 + };
8944 + };
8945 +
8946 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
8947 + fragment@27 {
8948 + target = <&gpio>;
8949 + __dormant__ {
8950 + spi1_1_int_pins: spi1_1_int_pins {
8951 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
8952 + brcm,function = <0>;
8953 + brcm,pull = <0>;
8954 + };
8955 + };
8956 + };
8957 +
8958 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
8959 + fragment@28 {
8960 + target = <&gpio>;
8961 + __dormant__ {
8962 + spi1_2_int_pins: spi1_2_int_pins {
8963 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
8964 + brcm,function = <0>;
8965 + brcm,pull = <0>;
8966 + };
8967 + };
8968 + };
8969 +
8970 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
8971 + fragment@29 {
8972 + target = <&gpio>;
8973 + __dormant__ {
8974 + spi2_0_int_pins: spi2_0_int_pins {
8975 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
8976 + brcm,function = <0>;
8977 + brcm,pull = <0>;
8978 + };
8979 + };
8980 + };
8981 +
8982 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
8983 + fragment@30 {
8984 + target = <&gpio>;
8985 + __dormant__ {
8986 + spi2_1_int_pins: spi2_1_int_pins {
8987 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
8988 + brcm,function = <0>;
8989 + brcm,pull = <0>;
8990 + };
8991 + };
8992 + };
8993 +
8994 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
8995 + fragment@31 {
8996 + target = <&gpio>;
8997 + __dormant__ {
8998 + spi2_2_int_pins: spi2_2_int_pins {
8999 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
9000 + brcm,function = <0>;
9001 + brcm,pull = <0>;
9002 + };
9003 + };
9004 + };
9005 +
9006 + // Enable interrupts for a mcp23s08 on spi0.0.
9007 + // Use default active low interrupt signalling.
9008 + fragment@32 {
9009 + target = <&mcp23s08_00>;
9010 + __dormant__ {
9011 + interrupt-parent = <&gpio>;
9012 + interrupt-controller;
9013 + };
9014 + };
9015 +
9016 + // Enable interrupts for a mcp23s08 on spi0.1.
9017 + // Use default active low interrupt signalling.
9018 + fragment@33 {
9019 + target = <&mcp23s08_01>;
9020 + __dormant__ {
9021 + interrupt-parent = <&gpio>;
9022 + interrupt-controller;
9023 + };
9024 + };
9025 +
9026 + // Enable interrupts for a mcp23s08 on spi1.0.
9027 + // Use default active low interrupt signalling.
9028 + fragment@34 {
9029 + target = <&mcp23s08_10>;
9030 + __dormant__ {
9031 + interrupt-parent = <&gpio>;
9032 + interrupt-controller;
9033 + };
9034 + };
9035 +
9036 + // Enable interrupts for a mcp23s08 on spi1.1.
9037 + // Use default active low interrupt signalling.
9038 + fragment@35 {
9039 + target = <&mcp23s08_11>;
9040 + __dormant__ {
9041 + interrupt-parent = <&gpio>;
9042 + interrupt-controller;
9043 + };
9044 + };
9045 +
9046 + // Enable interrupts for a mcp23s08 on spi1.2.
9047 + // Use default active low interrupt signalling.
9048 + fragment@36 {
9049 + target = <&mcp23s08_12>;
9050 + __dormant__ {
9051 + interrupt-parent = <&gpio>;
9052 + interrupt-controller;
9053 + };
9054 + };
9055 +
9056 + // Enable interrupts for a mcp23s08 on spi2.0.
9057 + // Use default active low interrupt signalling.
9058 + fragment@37 {
9059 + target = <&mcp23s08_20>;
9060 + __dormant__ {
9061 + interrupt-parent = <&gpio>;
9062 + interrupt-controller;
9063 + };
9064 + };
9065 +
9066 + // Enable interrupts for a mcp23s08 on spi2.1.
9067 + // Use default active low interrupt signalling.
9068 + fragment@38 {
9069 + target = <&mcp23s08_21>;
9070 + __dormant__ {
9071 + interrupt-parent = <&gpio>;
9072 + interrupt-controller;
9073 + };
9074 + };
9075 +
9076 + // Enable interrupts for a mcp23s08 on spi2.2.
9077 + // Use default active low interrupt signalling.
9078 + fragment@39 {
9079 + target = <&mcp23s08_22>;
9080 + __dormant__ {
9081 + interrupt-parent = <&gpio>;
9082 + interrupt-controller;
9083 + };
9084 + };
9085 +
9086 + // Enable interrupts for a mcp23s17 on spi0.0.
9087 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9088 + // Use default active low interrupt signalling.
9089 + fragment@40 {
9090 + target = <&mcp23s17_00>;
9091 + __dormant__ {
9092 + interrupt-parent = <&gpio>;
9093 + interrupt-controller;
9094 + microchip,irq-mirror;
9095 + };
9096 + };
9097 +
9098 + // Enable interrupts for a mcp23s17 on spi0.1.
9099 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9100 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9101 + fragment@41 {
9102 + target = <&mcp23s17_01>;
9103 + __dormant__ {
9104 + interrupt-parent = <&gpio>;
9105 + interrupt-controller;
9106 + microchip,irq-mirror;
9107 + };
9108 + };
9109 +
9110 + // Enable interrupts for a mcp23s17 on spi1.0.
9111 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9112 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9113 + fragment@42 {
9114 + target = <&mcp23s17_10>;
9115 + __dormant__ {
9116 + interrupt-parent = <&gpio>;
9117 + interrupt-controller;
9118 + microchip,irq-mirror;
9119 + };
9120 + };
9121 +
9122 + // Enable interrupts for a mcp23s17 on spi1.1.
9123 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9124 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9125 + fragment@43 {
9126 + target = <&mcp23s17_11>;
9127 + __dormant__ {
9128 + interrupt-parent = <&gpio>;
9129 + interrupt-controller;
9130 + microchip,irq-mirror;
9131 + };
9132 + };
9133 +
9134 + // Enable interrupts for a mcp23s17 on spi1.2.
9135 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9136 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9137 + fragment@44 {
9138 + target = <&mcp23s17_12>;
9139 + __dormant__ {
9140 + interrupt-parent = <&gpio>;
9141 + interrupt-controller;
9142 + microchip,irq-mirror;
9143 + };
9144 + };
9145 +
9146 + // Enable interrupts for a mcp23s17 on spi2.0.
9147 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9148 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9149 + fragment@45 {
9150 + target = <&mcp23s17_20>;
9151 + __dormant__ {
9152 + interrupt-parent = <&gpio>;
9153 + interrupt-controller;
9154 + microchip,irq-mirror;
9155 + };
9156 + };
9157 +
9158 + // Enable interrupts for a mcp23s17 on spi2.1.
9159 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9160 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9161 + fragment@46 {
9162 + target = <&mcp23s17_21>;
9163 + __dormant__ {
9164 + interrupt-parent = <&gpio>;
9165 + interrupt-controller;
9166 + microchip,irq-mirror;
9167 + };
9168 + };
9169 +
9170 + // Enable interrupts for a mcp23s17 on spi2.2.
9171 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9172 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9173 + fragment@47 {
9174 + target = <&mcp23s17_22>;
9175 + __dormant__ {
9176 + interrupt-parent = <&gpio>;
9177 + interrupt-controller;
9178 + microchip,irq-mirror;
9179 + };
9180 + };
9181 +
9182 + __overrides__ {
9183 + s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
9184 + s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
9185 + s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
9186 + s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
9187 + s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
9188 + s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
9189 + s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
9190 + s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
9191 + s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
9192 + s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
9193 + s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
9194 + s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
9195 + s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
9196 + s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
9197 + s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
9198 + s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
9199 + s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
9200 + s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
9201 + s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
9202 + s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
9203 + s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
9204 + s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
9205 + s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
9206 + s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
9207 + s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
9208 + s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
9209 + s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
9210 + s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
9211 + s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
9212 + s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
9213 + s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
9214 + s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
9215 + };
9216 +};
9217 +
9218 --- /dev/null
9219 +++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
9220 @@ -0,0 +1,73 @@
9221 +/*
9222 + * Device tree overlay for mcp251x/can0 on spi0.0
9223 + */
9224 +
9225 +/dts-v1/;
9226 +/plugin/;
9227 +
9228 +/ {
9229 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
9230 + /* disable spi-dev for spi0.0 */
9231 + fragment@0 {
9232 + target = <&spi0>;
9233 + __overlay__ {
9234 + status = "okay";
9235 + };
9236 + };
9237 +
9238 + fragment@1 {
9239 + target = <&spidev0>;
9240 + __overlay__ {
9241 + status = "disabled";
9242 + };
9243 + };
9244 +
9245 + /* the interrupt pin of the can-controller */
9246 + fragment@2 {
9247 + target = <&gpio>;
9248 + __overlay__ {
9249 + can0_pins: can0_pins {
9250 + brcm,pins = <25>;
9251 + brcm,function = <0>; /* input */
9252 + };
9253 + };
9254 + };
9255 +
9256 + /* the clock/oscillator of the can-controller */
9257 + fragment@3 {
9258 + target-path = "/clocks";
9259 + __overlay__ {
9260 + /* external oscillator of mcp2515 on SPI0.0 */
9261 + can0_osc: can0_osc {
9262 + compatible = "fixed-clock";
9263 + #clock-cells = <0>;
9264 + clock-frequency = <16000000>;
9265 + };
9266 + };
9267 + };
9268 +
9269 + /* the spi config of the can-controller itself binding everything together */
9270 + fragment@4 {
9271 + target = <&spi0>;
9272 + __overlay__ {
9273 + /* needed to avoid dtc warning */
9274 + #address-cells = <1>;
9275 + #size-cells = <0>;
9276 + can0: mcp2515@0 {
9277 + reg = <0>;
9278 + compatible = "microchip,mcp2515";
9279 + pinctrl-names = "default";
9280 + pinctrl-0 = <&can0_pins>;
9281 + spi-max-frequency = <10000000>;
9282 + interrupt-parent = <&gpio>;
9283 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
9284 + clocks = <&can0_osc>;
9285 + };
9286 + };
9287 + };
9288 + __overrides__ {
9289 + oscillator = <&can0_osc>,"clock-frequency:0";
9290 + spimaxfrequency = <&can0>,"spi-max-frequency:0";
9291 + interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
9292 + };
9293 +};
9294 --- /dev/null
9295 +++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
9296 @@ -0,0 +1,73 @@
9297 +/*
9298 + * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
9299 + */
9300 +
9301 +/dts-v1/;
9302 +/plugin/;
9303 +
9304 +/ {
9305 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
9306 + /* disable spi-dev for spi0.1 */
9307 + fragment@0 {
9308 + target = <&spi0>;
9309 + __overlay__ {
9310 + status = "okay";
9311 + };
9312 + };
9313 +
9314 + fragment@1 {
9315 + target = <&spidev1>;
9316 + __overlay__ {
9317 + status = "disabled";
9318 + };
9319 + };
9320 +
9321 + /* the interrupt pin of the can-controller */
9322 + fragment@2 {
9323 + target = <&gpio>;
9324 + __overlay__ {
9325 + can1_pins: can1_pins {
9326 + brcm,pins = <25>;
9327 + brcm,function = <0>; /* input */
9328 + };
9329 + };
9330 + };
9331 +
9332 + /* the clock/oscillator of the can-controller */
9333 + fragment@3 {
9334 + target-path = "/clocks";
9335 + __overlay__ {
9336 + /* external oscillator of mcp2515 on spi0.1 */
9337 + can1_osc: can1_osc {
9338 + compatible = "fixed-clock";
9339 + #clock-cells = <0>;
9340 + clock-frequency = <16000000>;
9341 + };
9342 + };
9343 + };
9344 +
9345 + /* the spi config of the can-controller itself binding everything together */
9346 + fragment@4 {
9347 + target = <&spi0>;
9348 + __overlay__ {
9349 + /* needed to avoid dtc warning */
9350 + #address-cells = <1>;
9351 + #size-cells = <0>;
9352 + can1: mcp2515@1 {
9353 + reg = <1>;
9354 + compatible = "microchip,mcp2515";
9355 + pinctrl-names = "default";
9356 + pinctrl-0 = <&can1_pins>;
9357 + spi-max-frequency = <10000000>;
9358 + interrupt-parent = <&gpio>;
9359 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
9360 + clocks = <&can1_osc>;
9361 + };
9362 + };
9363 + };
9364 + __overrides__ {
9365 + oscillator = <&can1_osc>,"clock-frequency:0";
9366 + spimaxfrequency = <&can1>,"spi-max-frequency:0";
9367 + interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
9368 + };
9369 +};
9370 --- /dev/null
9371 +++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
9372 @@ -0,0 +1,205 @@
9373 +/*
9374 + * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
9375 + */
9376 +
9377 +/dts-v1/;
9378 +/plugin/;
9379 +
9380 +/ {
9381 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9382 +
9383 + fragment@0 {
9384 + target = <&spidev0>;
9385 + __dormant__ {
9386 + status = "disabled";
9387 + };
9388 + };
9389 +
9390 + fragment@1 {
9391 + target = <&spidev1>;
9392 + __dormant__ {
9393 + status = "disabled";
9394 + };
9395 + };
9396 +
9397 + fragment@2 {
9398 + target-path = "spi1/spidev@0";
9399 + __dormant__ {
9400 + status = "disabled";
9401 + };
9402 + };
9403 +
9404 + fragment@3 {
9405 + target-path = "spi1/spidev@1";
9406 + __dormant__ {
9407 + status = "disabled";
9408 + };
9409 + };
9410 +
9411 + fragment@4 {
9412 + target-path = "spi1/spidev@2";
9413 + __dormant__ {
9414 + status = "disabled";
9415 + };
9416 + };
9417 +
9418 + fragment@5 {
9419 + target-path = "spi2/spidev@0";
9420 + __dormant__ {
9421 + status = "disabled";
9422 + };
9423 + };
9424 +
9425 + fragment@6 {
9426 + target-path = "spi2/spidev@1";
9427 + __dormant__ {
9428 + status = "disabled";
9429 + };
9430 + };
9431 +
9432 + fragment@7 {
9433 + target-path = "spi2/spidev@2";
9434 + __dormant__ {
9435 + status = "disabled";
9436 + };
9437 + };
9438 +
9439 + fragment@8 {
9440 + target = <&spi0>;
9441 + __dormant__ {
9442 + status = "okay";
9443 + #address-cells = <1>;
9444 + #size-cells = <0>;
9445 +
9446 + mcp3008_00: mcp3008@0 {
9447 + compatible = "mcp3008";
9448 + reg = <0>;
9449 + spi-max-frequency = <1600000>;
9450 + };
9451 + };
9452 + };
9453 +
9454 + fragment@9 {
9455 + target = <&spi0>;
9456 + __dormant__ {
9457 + status = "okay";
9458 + #address-cells = <1>;
9459 + #size-cells = <0>;
9460 +
9461 + mcp3008_01: mcp3008@1 {
9462 + compatible = "mcp3008";
9463 + reg = <1>;
9464 + spi-max-frequency = <1600000>;
9465 + };
9466 + };
9467 + };
9468 +
9469 + fragment@10 {
9470 + target = <&spi1>;
9471 + __dormant__ {
9472 + status = "okay";
9473 + #address-cells = <1>;
9474 + #size-cells = <0>;
9475 +
9476 + mcp3008_10: mcp3008@0 {
9477 + compatible = "mcp3008";
9478 + reg = <0>;
9479 + spi-max-frequency = <1600000>;
9480 + };
9481 + };
9482 + };
9483 +
9484 + fragment@11 {
9485 + target = <&spi1>;
9486 + __dormant__ {
9487 + status = "okay";
9488 + #address-cells = <1>;
9489 + #size-cells = <0>;
9490 +
9491 + mcp3008_11: mcp3008@1 {
9492 + compatible = "mcp3008";
9493 + reg = <1>;
9494 + spi-max-frequency = <1600000>;
9495 + };
9496 + };
9497 + };
9498 +
9499 + fragment@12 {
9500 + target = <&spi1>;
9501 + __dormant__ {
9502 + status = "okay";
9503 + #address-cells = <1>;
9504 + #size-cells = <0>;
9505 +
9506 + mcp3008_12: mcp3008@2 {
9507 + compatible = "mcp3008";
9508 + reg = <2>;
9509 + spi-max-frequency = <1600000>;
9510 + };
9511 + };
9512 + };
9513 +
9514 + fragment@13 {
9515 + target = <&spi2>;
9516 + __dormant__ {
9517 + status = "okay";
9518 + #address-cells = <1>;
9519 + #size-cells = <0>;
9520 +
9521 + mcp3008_20: mcp3008@0 {
9522 + compatible = "mcp3008";
9523 + reg = <0>;
9524 + spi-max-frequency = <1600000>;
9525 + };
9526 + };
9527 + };
9528 +
9529 + fragment@14 {
9530 + target = <&spi2>;
9531 + __dormant__ {
9532 + status = "okay";
9533 + #address-cells = <1>;
9534 + #size-cells = <0>;
9535 +
9536 + mcp3008_21: mcp3008@1 {
9537 + compatible = "mcp3008";
9538 + reg = <1>;
9539 + spi-max-frequency = <1600000>;
9540 + };
9541 + };
9542 + };
9543 +
9544 + fragment@15 {
9545 + target = <&spi2>;
9546 + __dormant__ {
9547 + status = "okay";
9548 + #address-cells = <1>;
9549 + #size-cells = <0>;
9550 +
9551 + mcp3008_22: mcp3008@2 {
9552 + compatible = "mcp3008";
9553 + reg = <2>;
9554 + spi-max-frequency = <1600000>;
9555 + };
9556 + };
9557 + };
9558 +
9559 + __overrides__ {
9560 + spi0-0-present = <0>, "+0+8";
9561 + spi0-1-present = <0>, "+1+9";
9562 + spi1-0-present = <0>, "+2+10";
9563 + spi1-1-present = <0>, "+3+11";
9564 + spi1-2-present = <0>, "+4+12";
9565 + spi2-0-present = <0>, "+5+13";
9566 + spi2-1-present = <0>, "+6+14";
9567 + spi2-2-present = <0>, "+7+15";
9568 + spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
9569 + spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
9570 + spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
9571 + spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
9572 + spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
9573 + spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
9574 + spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
9575 + spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
9576 + };
9577 +};
9578 --- /dev/null
9579 +++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
9580 @@ -0,0 +1,205 @@
9581 +/*
9582 + * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
9583 + */
9584 +
9585 +/dts-v1/;
9586 +/plugin/;
9587 +
9588 +/ {
9589 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9590 +
9591 + fragment@0 {
9592 + target = <&spidev0>;
9593 + __dormant__ {
9594 + status = "disabled";
9595 + };
9596 + };
9597 +
9598 + fragment@1 {
9599 + target = <&spidev1>;
9600 + __dormant__ {
9601 + status = "disabled";
9602 + };
9603 + };
9604 +
9605 + fragment@2 {
9606 + target-path = "spi1/spidev@0";
9607 + __dormant__ {
9608 + status = "disabled";
9609 + };
9610 + };
9611 +
9612 + fragment@3 {
9613 + target-path = "spi1/spidev@1";
9614 + __dormant__ {
9615 + status = "disabled";
9616 + };
9617 + };
9618 +
9619 + fragment@4 {
9620 + target-path = "spi1/spidev@2";
9621 + __dormant__ {
9622 + status = "disabled";
9623 + };
9624 + };
9625 +
9626 + fragment@5 {
9627 + target-path = "spi2/spidev@0";
9628 + __dormant__ {
9629 + status = "disabled";
9630 + };
9631 + };
9632 +
9633 + fragment@6 {
9634 + target-path = "spi2/spidev@1";
9635 + __dormant__ {
9636 + status = "disabled";
9637 + };
9638 + };
9639 +
9640 + fragment@7 {
9641 + target-path = "spi2/spidev@2";
9642 + __dormant__ {
9643 + status = "disabled";
9644 + };
9645 + };
9646 +
9647 + fragment@8 {
9648 + target = <&spi0>;
9649 + __dormant__ {
9650 + status = "okay";
9651 + #address-cells = <1>;
9652 + #size-cells = <0>;
9653 +
9654 + mcp3202_00: mcp3202@0 {
9655 + compatible = "mcp3202";
9656 + reg = <0>;
9657 + spi-max-frequency = <1600000>;
9658 + };
9659 + };
9660 + };
9661 +
9662 + fragment@9 {
9663 + target = <&spi0>;
9664 + __dormant__ {
9665 + status = "okay";
9666 + #address-cells = <1>;
9667 + #size-cells = <0>;
9668 +
9669 + mcp3202_01: mcp3202@1 {
9670 + compatible = "mcp3202";
9671 + reg = <1>;
9672 + spi-max-frequency = <1600000>;
9673 + };
9674 + };
9675 + };
9676 +
9677 + fragment@10 {
9678 + target = <&spi1>;
9679 + __dormant__ {
9680 + status = "okay";
9681 + #address-cells = <1>;
9682 + #size-cells = <0>;
9683 +
9684 + mcp3202_10: mcp3202@0 {
9685 + compatible = "mcp3202";
9686 + reg = <0>;
9687 + spi-max-frequency = <1600000>;
9688 + };
9689 + };
9690 + };
9691 +
9692 + fragment@11 {
9693 + target = <&spi1>;
9694 + __dormant__ {
9695 + status = "okay";
9696 + #address-cells = <1>;
9697 + #size-cells = <0>;
9698 +
9699 + mcp3202_11: mcp3202@1 {
9700 + compatible = "mcp3202";
9701 + reg = <1>;
9702 + spi-max-frequency = <1600000>;
9703 + };
9704 + };
9705 + };
9706 +
9707 + fragment@12 {
9708 + target = <&spi1>;
9709 + __dormant__ {
9710 + status = "okay";
9711 + #address-cells = <1>;
9712 + #size-cells = <0>;
9713 +
9714 + mcp3202_12: mcp3202@2 {
9715 + compatible = "mcp3202";
9716 + reg = <2>;
9717 + spi-max-frequency = <1600000>;
9718 + };
9719 + };
9720 + };
9721 +
9722 + fragment@13 {
9723 + target = <&spi2>;
9724 + __dormant__ {
9725 + status = "okay";
9726 + #address-cells = <1>;
9727 + #size-cells = <0>;
9728 +
9729 + mcp3202_20: mcp3202@0 {
9730 + compatible = "mcp3202";
9731 + reg = <0>;
9732 + spi-max-frequency = <1600000>;
9733 + };
9734 + };
9735 + };
9736 +
9737 + fragment@14 {
9738 + target = <&spi2>;
9739 + __dormant__ {
9740 + status = "okay";
9741 + #address-cells = <1>;
9742 + #size-cells = <0>;
9743 +
9744 + mcp3202_21: mcp3202@1 {
9745 + compatible = "mcp3202";
9746 + reg = <1>;
9747 + spi-max-frequency = <1600000>;
9748 + };
9749 + };
9750 + };
9751 +
9752 + fragment@15 {
9753 + target = <&spi2>;
9754 + __dormant__ {
9755 + status = "okay";
9756 + #address-cells = <1>;
9757 + #size-cells = <0>;
9758 +
9759 + mcp3202_22: mcp3202@2 {
9760 + compatible = "mcp3202";
9761 + reg = <2>;
9762 + spi-max-frequency = <1600000>;
9763 + };
9764 + };
9765 + };
9766 +
9767 + __overrides__ {
9768 + spi0-0-present = <0>, "+0+8";
9769 + spi0-1-present = <0>, "+1+9";
9770 + spi1-0-present = <0>, "+2+10";
9771 + spi1-1-present = <0>, "+3+11";
9772 + spi1-2-present = <0>, "+4+12";
9773 + spi2-0-present = <0>, "+5+13";
9774 + spi2-1-present = <0>, "+6+14";
9775 + spi2-2-present = <0>, "+7+15";
9776 + spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
9777 + spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
9778 + spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
9779 + spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
9780 + spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
9781 + spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
9782 + spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
9783 + spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
9784 + };
9785 +};
9786 --- /dev/null
9787 +++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
9788 @@ -0,0 +1,134 @@
9789 +/*
9790 + * Device Tree overlay for Media Center HAT by Pi Supply
9791 + *
9792 + */
9793 +
9794 +/dts-v1/;
9795 +/plugin/;
9796 +
9797 +/ {
9798 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9799 +
9800 + fragment@0 {
9801 + target = <&spi0>;
9802 + __overlay__ {
9803 + status = "okay";
9804 +
9805 + spidev@0{
9806 + status = "disabled";
9807 + };
9808 +
9809 + spidev@1{
9810 + status = "disabled";
9811 + };
9812 + };
9813 + };
9814 +
9815 + fragment@1 {
9816 + target = <&gpio>;
9817 + __overlay__ {
9818 + rpi_display_pins: rpi_display_pins {
9819 + brcm,pins = <12 23 24 25>;
9820 + brcm,function = <1 1 1 0>; /* out out out in */
9821 + brcm,pull = <0 0 0 2>; /* - - - up */
9822 + };
9823 + };
9824 + };
9825 +
9826 + fragment@2 {
9827 + target = <&spi0>;
9828 + __overlay__ {
9829 + /* needed to avoid dtc warning */
9830 + #address-cells = <1>;
9831 + #size-cells = <0>;
9832 +
9833 + rpidisplay: rpi-display@0{
9834 + compatible = "ilitek,ili9341";
9835 + reg = <0>;
9836 + pinctrl-names = "default";
9837 + pinctrl-0 = <&rpi_display_pins>;
9838 +
9839 + spi-max-frequency = <32000000>;
9840 + rotate = <90>;
9841 + bgr;
9842 + fps = <30>;
9843 + buswidth = <8>;
9844 + reset-gpios = <&gpio 23 0>;
9845 + dc-gpios = <&gpio 24 0>;
9846 + led-gpios = <&gpio 12 1>;
9847 + debug = <0>;
9848 + };
9849 +
9850 + rpidisplay_ts: rpi-display-ts@1 {
9851 + compatible = "ti,ads7846";
9852 + reg = <1>;
9853 +
9854 + spi-max-frequency = <2000000>;
9855 + interrupts = <25 2>; /* high-to-low edge triggered */
9856 + interrupt-parent = <&gpio>;
9857 + pendown-gpio = <&gpio 25 0>;
9858 + ti,x-plate-ohms = /bits/ 16 <60>;
9859 + ti,pressure-max = /bits/ 16 <255>;
9860 + };
9861 + };
9862 + };
9863 +
9864 + fragment@3 {
9865 + target-path = "/";
9866 + __overlay__ {
9867 + lirc_rpi: lirc_rpi {
9868 + compatible = "rpi,lirc-rpi";
9869 + pinctrl-names = "default";
9870 + pinctrl-0 = <&lirc_pins>;
9871 + status = "okay";
9872 +
9873 + // Override autodetection of IR receiver circuit
9874 + // (0 = active high, 1 = active low, -1 = no override )
9875 + rpi,sense = <0xffffffff>;
9876 +
9877 + // Software carrier
9878 + // (0 = off, 1 = on)
9879 + rpi,softcarrier = <1>;
9880 +
9881 + // Invert output
9882 + // (0 = off, 1 = on)
9883 + rpi,invert = <0>;
9884 +
9885 + // Enable debugging messages
9886 + // (0 = off, 1 = on)
9887 + rpi,debug = <0>;
9888 + };
9889 + };
9890 + };
9891 +
9892 + fragment@4 {
9893 + target = <&gpio>;
9894 + __overlay__ {
9895 + lirc_pins: lirc_pins {
9896 + brcm,pins = <6 5>;
9897 + brcm,function = <1 0>; // out in
9898 + brcm,pull = <0 1>; // off down
9899 + };
9900 + };
9901 + };
9902 +
9903 + __overrides__ {
9904 + speed = <&rpidisplay>,"spi-max-frequency:0";
9905 + rotate = <&rpidisplay>,"rotate:0";
9906 + fps = <&rpidisplay>,"fps:0";
9907 + debug = <&rpidisplay>,"debug:0",
9908 + <&lirc_rpi>,"rpi,debug:0";
9909 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
9910 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
9911 + backlight = <&rpidisplay>,"led-gpios:4",
9912 + <&rpi_display_pins>,"brcm,pins:0";
9913 +
9914 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
9915 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
9916 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
9917 +
9918 + sense = <&lirc_rpi>,"rpi,sense:0";
9919 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
9920 + invert = <&lirc_rpi>,"rpi,invert:0";
9921 + };
9922 +};
9923 --- /dev/null
9924 +++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
9925 @@ -0,0 +1,36 @@
9926 +/dts-v1/;
9927 +/plugin/;
9928 +
9929 +#include <dt-bindings/clock/bcm2835.h>
9930 +
9931 +/*
9932 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
9933 + * baudrate. The real clock is 48MHz, which we scale so that requesting
9934 + * 38.4kHz results in an actual 31.25kHz.
9935 + *
9936 + * 48000000*38400/31250 = 58982400
9937 + */
9938 +
9939 +/{
9940 + compatible = "brcm,bcm2835";
9941 +
9942 + fragment@0 {
9943 + target-path = "/clocks";
9944 + __overlay__ {
9945 + midi_clk: midi_clk {
9946 + compatible = "fixed-clock";
9947 + #clock-cells = <0>;
9948 + clock-output-names = "uart0_pclk";
9949 + clock-frequency = <58982400>;
9950 + };
9951 + };
9952 + };
9953 +
9954 + fragment@1 {
9955 + target = <&uart0>;
9956 + __overlay__ {
9957 + clocks = <&midi_clk>,
9958 + <&clocks BCM2835_CLOCK_VPU>;
9959 + };
9960 + };
9961 +};
9962 --- /dev/null
9963 +++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
9964 @@ -0,0 +1,43 @@
9965 +/dts-v1/;
9966 +/plugin/;
9967 +
9968 +#include <dt-bindings/clock/bcm2835-aux.h>
9969 +
9970 +/*
9971 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
9972 + * baudrate. The real clock is 48MHz, which we scale so that requesting
9973 + * 38.4kHz results in an actual 31.25kHz.
9974 + *
9975 + * 48000000*38400/31250 = 58982400
9976 + */
9977 +
9978 +/{
9979 + compatible = "brcm,bcm2835";
9980 +
9981 + fragment@0 {
9982 + target-path = "/clocks";
9983 + __overlay__ {
9984 + midi_clk: clock@5 {
9985 + compatible = "fixed-factor-clock";
9986 + #clock-cells = <0>;
9987 + clocks = <&aux BCM2835_AUX_CLOCK_UART>;
9988 + clock-mult = <38400>;
9989 + clock-div = <31250>;
9990 + };
9991 + };
9992 + };
9993 +
9994 + fragment@1 {
9995 + target = <&uart1>;
9996 + __overlay__ {
9997 + clocks = <&midi_clk>;
9998 + };
9999 + };
10000 +
10001 + fragment@2 {
10002 + target = <&aux>;
10003 + __overlay__ {
10004 + clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
10005 + };
10006 + };
10007 +};
10008 --- /dev/null
10009 +++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
10010 @@ -0,0 +1,39 @@
10011 +/dts-v1/;
10012 +/plugin/;
10013 +
10014 +/{
10015 + compatible = "brcm,bcm2708";
10016 +
10017 + fragment@0 {
10018 + target = <&mmc>;
10019 + frag0: __overlay__ {
10020 + pinctrl-names = "default";
10021 + pinctrl-0 = <&mmc_pins>;
10022 + bus-width = <4>;
10023 + brcm,overclock-50 = <0>;
10024 + status = "okay";
10025 + };
10026 + };
10027 +
10028 + fragment@1 {
10029 + target = <&gpio>;
10030 + __overlay__ {
10031 + mmc_pins: mmc_pins {
10032 + brcm,pins = <48 49 50 51 52 53>;
10033 + brcm,function = <7>; /* alt3 */
10034 + brcm,pull = <0 2 2 2 2 2>;
10035 + };
10036 + };
10037 + };
10038 +
10039 + fragment@2 {
10040 + target = <&sdhost>;
10041 + __overlay__ {
10042 + status = "disabled";
10043 + };
10044 + };
10045 +
10046 + __overrides__ {
10047 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
10048 + };
10049 +};
10050 --- /dev/null
10051 +++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
10052 @@ -0,0 +1,28 @@
10053 +// Definitions for MPU6050
10054 +/dts-v1/;
10055 +/plugin/;
10056 +
10057 +/ {
10058 + compatible = "brcm,bcm2708";
10059 +
10060 + fragment@0 {
10061 + target = <&i2c1>;
10062 + __overlay__ {
10063 + #address-cells = <1>;
10064 + #size-cells = <0>;
10065 + status = "okay";
10066 + clock-frequency = <400000>;
10067 +
10068 + mpu6050: mpu6050@68 {
10069 + compatible = "invensense,mpu6050";
10070 + reg = <0x68>;
10071 + interrupt-parent = <&gpio>;
10072 + interrupts = <4 1>;
10073 + };
10074 + };
10075 + };
10076 +
10077 + __overrides__ {
10078 + interrupt = <&mpu6050>,"interrupts:0";
10079 + };
10080 +};
10081 --- /dev/null
10082 +++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
10083 @@ -0,0 +1,117 @@
10084 +/*
10085 + * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
10086 + *
10087 + */
10088 +
10089 +/dts-v1/;
10090 +/plugin/;
10091 +
10092 +/ {
10093 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10094 +
10095 + fragment@0 {
10096 + target = <&spi0>;
10097 + __overlay__ {
10098 + status = "okay";
10099 + };
10100 + };
10101 +
10102 + fragment@1 {
10103 + target = <&spidev0>;
10104 + __overlay__ {
10105 + status = "disabled";
10106 + };
10107 + };
10108 +
10109 + fragment@2 {
10110 + target = <&spidev1>;
10111 + __overlay__ {
10112 + status = "disabled";
10113 + };
10114 + };
10115 +
10116 + fragment@3 {
10117 + target = <&gpio>;
10118 + __overlay__ {
10119 + mz61581_pins: mz61581_pins {
10120 + brcm,pins = <4 15 18 25>;
10121 + brcm,function = <0 1 1 1>; /* in out out out */
10122 + };
10123 + };
10124 + };
10125 +
10126 + fragment@4 {
10127 + target = <&spi0>;
10128 + __overlay__ {
10129 + /* needed to avoid dtc warning */
10130 + #address-cells = <1>;
10131 + #size-cells = <0>;
10132 +
10133 + mz61581: mz61581@0{
10134 + compatible = "samsung,s6d02a1";
10135 + reg = <0>;
10136 + pinctrl-names = "default";
10137 + pinctrl-0 = <&mz61581_pins>;
10138 +
10139 + spi-max-frequency = <128000000>;
10140 + spi-cpol;
10141 + spi-cpha;
10142 +
10143 + width = <320>;
10144 + height = <480>;
10145 + rotate = <270>;
10146 + bgr;
10147 + fps = <30>;
10148 + buswidth = <8>;
10149 + txbuflen = <32768>;
10150 +
10151 + reset-gpios = <&gpio 15 0>;
10152 + dc-gpios = <&gpio 25 0>;
10153 + led-gpios = <&gpio 18 0>;
10154 +
10155 + init = <0x10000b0 00
10156 + 0x1000011
10157 + 0x20000ff
10158 + 0x10000b3 0x02 0x00 0x00 0x00
10159 + 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
10160 + 0x10000c1 0x08 0x16 0x08 0x08
10161 + 0x10000c4 0x11 0x07 0x03 0x03
10162 + 0x10000c6 0x00
10163 + 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
10164 + 0x1000035 0x00
10165 + 0x1000036 0xa0
10166 + 0x100003a 0x55
10167 + 0x1000044 0x00 0x01
10168 + 0x10000d0 0x07 0x07 0x1d 0x03
10169 + 0x10000d1 0x03 0x30 0x10
10170 + 0x10000d2 0x03 0x14 0x04
10171 + 0x1000029
10172 + 0x100002c>;
10173 +
10174 + /* This is a workaround to make sure the init sequence slows down and doesn't fail */
10175 + debug = <3>;
10176 + };
10177 +
10178 + mz61581_ts: mz61581_ts@1 {
10179 + compatible = "ti,ads7846";
10180 + reg = <1>;
10181 +
10182 + spi-max-frequency = <2000000>;
10183 + interrupts = <4 2>; /* high-to-low edge triggered */
10184 + interrupt-parent = <&gpio>;
10185 + pendown-gpio = <&gpio 4 0>;
10186 +
10187 + ti,x-plate-ohms = /bits/ 16 <60>;
10188 + ti,pressure-max = /bits/ 16 <255>;
10189 + };
10190 + };
10191 + };
10192 + __overrides__ {
10193 + speed = <&mz61581>, "spi-max-frequency:0";
10194 + rotate = <&mz61581>, "rotate:0";
10195 + fps = <&mz61581>, "fps:0";
10196 + txbuflen = <&mz61581>, "txbuflen:0";
10197 + debug = <&mz61581>, "debug:0";
10198 + xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
10199 + };
10200 +};
10201 --- /dev/null
10202 +++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
10203 @@ -0,0 +1,89 @@
10204 +/* PaPiRus ePaper Screen by Pi Supply */
10205 +
10206 +/dts-v1/;
10207 +/plugin/;
10208 +
10209 +/ {
10210 + compatible = "brcm,bcm2708";
10211 +
10212 + fragment@0 {
10213 + target = <&i2c_arm>;
10214 + __overlay__ {
10215 + #address-cells = <1>;
10216 + #size-cells = <0>;
10217 + status = "okay";
10218 +
10219 + display_temp: lm75@48 {
10220 + compatible = "lm75b";
10221 + reg = <0x48>;
10222 + status = "okay";
10223 + #thermal-sensor-cells = <0>;
10224 + };
10225 + };
10226 + };
10227 +
10228 + fragment@1 {
10229 + target-path = "/";
10230 + __overlay__ {
10231 + thermal-zones {
10232 + display {
10233 + polling-delay-passive = <0>;
10234 + polling-delay = <0>;
10235 + thermal-sensors = <&display_temp>;
10236 + };
10237 + };
10238 + };
10239 + };
10240 +
10241 + fragment@2 {
10242 + target = <&spi0>;
10243 + __overlay__ {
10244 + status = "okay";
10245 +
10246 + spidev@0{
10247 + status = "disabled";
10248 + };
10249 + };
10250 + };
10251 +
10252 + fragment@3 {
10253 + target = <&gpio>;
10254 + __overlay__ {
10255 + repaper_pins: repaper_pins {
10256 + brcm,pins = <14 15 23 24 25>;
10257 + brcm,function = <1 1 1 1 0>; /* out out out out in */
10258 + };
10259 + };
10260 + };
10261 +
10262 + fragment@4 {
10263 + target = <&spi0>;
10264 + __overlay__ {
10265 + /* needed to avoid dtc warning */
10266 + #address-cells = <1>;
10267 + #size-cells = <0>;
10268 +
10269 + repaper: repaper@0{
10270 + compatible = "not_set";
10271 + reg = <0>;
10272 + pinctrl-names = "default";
10273 + pinctrl-0 = <&repaper_pins>;
10274 +
10275 + spi-max-frequency = <8000000>;
10276 +
10277 + panel-on-gpios = <&gpio 23 0>;
10278 + border-gpios = <&gpio 14 0>;
10279 + discharge-gpios = <&gpio 15 0>;
10280 + reset-gpios = <&gpio 24 0>;
10281 + busy-gpios = <&gpio 25 0>;
10282 +
10283 + repaper-thermal-zone = "display";
10284 + };
10285 + };
10286 + };
10287 +
10288 + __overrides__ {
10289 + panel = <&repaper>, "compatible";
10290 + speed = <&repaper>, "spi-max-frequency:0";
10291 + };
10292 +};
10293 --- /dev/null
10294 +++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
10295 @@ -0,0 +1,27 @@
10296 +/dts-v1/;
10297 +/plugin/;
10298 +
10299 +/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
10300 + from the VPU. There is a special driver for this with a separate DT node,
10301 + which has the unfortunate consequence of breaking the act_led_gpio and
10302 + act_led_activelow dtparams.
10303 +
10304 + This overlay changes the GPIO controller back to the standard one and
10305 + restores the dtparams.
10306 +*/
10307 +
10308 +/{
10309 + compatible = "brcm,bcm2708";
10310 +
10311 + fragment@0 {
10312 + target = <&act_led>;
10313 + frag0: __overlay__ {
10314 + gpios = <&gpio 0 0>;
10315 + };
10316 + };
10317 +
10318 + __overrides__ {
10319 + gpio = <&frag0>,"gpios:4";
10320 + activelow = <&frag0>,"gpios:8";
10321 + };
10322 +};
10323 --- /dev/null
10324 +++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
10325 @@ -0,0 +1,46 @@
10326 +/dts-v1/;
10327 +/plugin/;
10328 +
10329 +/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
10330 + To disable the systemd service that initialises the modem so it doesn't use
10331 + the UART:
10332 +
10333 + sudo systemctl disable hciuart
10334 +*/
10335 +
10336 +/{
10337 + compatible = "brcm,bcm2708";
10338 +
10339 + fragment@0 {
10340 + target = <&uart1>;
10341 + __overlay__ {
10342 + status = "disabled";
10343 + };
10344 + };
10345 +
10346 + fragment@1 {
10347 + target = <&uart0>;
10348 + __overlay__ {
10349 + pinctrl-names = "default";
10350 + pinctrl-0 = <&uart0_pins>;
10351 + status = "okay";
10352 + };
10353 + };
10354 +
10355 + fragment@2 {
10356 + target = <&uart0_pins>;
10357 + __overlay__ {
10358 + brcm,pins;
10359 + brcm,function;
10360 + brcm,pull;
10361 + };
10362 + };
10363 +
10364 + fragment@3 {
10365 + target-path = "/aliases";
10366 + __overlay__ {
10367 + serial0 = "/soc/serial@7e201000";
10368 + serial1 = "/soc/serial@7e215040";
10369 + };
10370 + };
10371 +};
10372 --- /dev/null
10373 +++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
10374 @@ -0,0 +1,13 @@
10375 +/dts-v1/;
10376 +/plugin/;
10377 +
10378 +/{
10379 + compatible = "brcm,bcm2708";
10380 +
10381 + fragment@0 {
10382 + target = <&mmc>;
10383 + __overlay__ {
10384 + status = "disabled";
10385 + };
10386 + };
10387 +};
10388 --- /dev/null
10389 +++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
10390 @@ -0,0 +1,74 @@
10391 +/dts-v1/;
10392 +/plugin/;
10393 +
10394 +/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
10395 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
10396 + usable baudrate.
10397 +
10398 + It is also necessary to edit /lib/systemd/system/hciuart.service and
10399 + replace ttyAMA0 with ttyS0, unless you have a system with udev rules
10400 + that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
10401 + instead because it will always be correct.
10402 +
10403 + If cmdline.txt uses the alias serial0 to refer to the user-accessable port
10404 + then the firmware will replace with the appropriate port whether or not
10405 + this overlay is used.
10406 +*/
10407 +
10408 +/{
10409 + compatible = "brcm,bcm2708";
10410 +
10411 + fragment@0 {
10412 + target = <&uart0>;
10413 + __overlay__ {
10414 + pinctrl-names = "default";
10415 + pinctrl-0 = <&uart0_pins>;
10416 + status = "okay";
10417 + };
10418 + };
10419 +
10420 + fragment@1 {
10421 + target = <&uart1>;
10422 + __overlay__ {
10423 + pinctrl-names = "default";
10424 + pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
10425 + status = "okay";
10426 + };
10427 + };
10428 +
10429 + fragment@2 {
10430 + target = <&uart0_pins>;
10431 + __overlay__ {
10432 + brcm,pins;
10433 + brcm,function;
10434 + brcm,pull;
10435 + };
10436 + };
10437 +
10438 + fragment@3 {
10439 + target = <&uart1_pins>;
10440 + __overlay__ {
10441 + brcm,pins = <32 33>;
10442 + brcm,function = <2>; /* alt5=UART1 */
10443 + brcm,pull = <0 2>;
10444 + };
10445 + };
10446 +
10447 + fragment@4 {
10448 + target = <&gpio>;
10449 + __overlay__ {
10450 + fake_bt_cts: fake_bt_cts {
10451 + brcm,pins = <31>;
10452 + brcm,function = <1>; /* output */
10453 + };
10454 + };
10455 + };
10456 +
10457 + fragment@5 {
10458 + target-path = "/aliases";
10459 + __overlay__ {
10460 + serial0 = "/soc/serial@7e201000";
10461 + serial1 = "/soc/serial@7e215040";
10462 + };
10463 + };
10464 +};
10465 --- /dev/null
10466 +++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
10467 @@ -0,0 +1,81 @@
10468 +/dts-v1/;
10469 +/plugin/;
10470 +
10471 +/ {
10472 + compatible = "brcm,bcm2708";
10473 +
10474 + fragment@0 {
10475 + target-path = "/";
10476 + __overlay__ {
10477 + codec_out: spdif-transmitter {
10478 + #address-cells = <0>;
10479 + #size-cells = <0>;
10480 + #sound-dai-cells = <0>;
10481 + compatible = "linux,spdif-dit";
10482 + status = "okay";
10483 + };
10484 +
10485 + codec_in: card-codec {
10486 + #sound-dai-cells = <0>;
10487 + compatible = "invensense,ics43432";
10488 + status = "okay";
10489 + };
10490 + };
10491 + };
10492 +
10493 + fragment@1 {
10494 + target = <&i2s>;
10495 + __overlay__ {
10496 + #sound-dai-cells = <0>;
10497 + status = "okay";
10498 + };
10499 + };
10500 +
10501 + fragment@2 {
10502 + target = <&sound>;
10503 + snd: __overlay__ {
10504 + compatible = "simple-audio-card";
10505 + simple-audio-card,name = "PiBell";
10506 +
10507 + status="okay";
10508 +
10509 + capture_link: simple-audio-card,dai-link@0 {
10510 + format = "i2s";
10511 +
10512 + r_cpu_dai: cpu {
10513 + sound-dai = <&i2s>;
10514 +
10515 +/* example TDM slot configuration
10516 + dai-tdm-slot-num = <2>;
10517 + dai-tdm-slot-width = <32>;
10518 +*/
10519 + };
10520 +
10521 + r_codec_dai: codec {
10522 + sound-dai = <&codec_in>;
10523 + };
10524 + };
10525 +
10526 + playback_link: simple-audio-card,dai-link@1 {
10527 + format = "i2s";
10528 +
10529 + p_cpu_dai: cpu {
10530 + sound-dai = <&i2s>;
10531 +
10532 +/* example TDM slot configuration
10533 + dai-tdm-slot-num = <2>;
10534 + dai-tdm-slot-width = <32>;
10535 +*/
10536 + };
10537 +
10538 + p_codec_dai: codec {
10539 + sound-dai = <&codec_out>;
10540 + };
10541 + };
10542 + };
10543 + };
10544 +
10545 + __overrides__ {
10546 + alsaname = <&snd>, "simple-audio-card,name";
10547 + };
10548 +};
10549 --- /dev/null
10550 +++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
10551 @@ -0,0 +1,102 @@
10552 +/*
10553 + * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
10554 + *
10555 + */
10556 +
10557 +/dts-v1/;
10558 +/plugin/;
10559 +
10560 +/ {
10561 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10562 +
10563 + fragment@0 {
10564 + target = <&spi0>;
10565 + __overlay__ {
10566 + status = "okay";
10567 + };
10568 + };
10569 +
10570 + fragment@1 {
10571 + target = <&spidev0>;
10572 + __overlay__ {
10573 + status = "disabled";
10574 + };
10575 + };
10576 +
10577 + fragment@2 {
10578 + target = <&spidev1>;
10579 + __overlay__ {
10580 + status = "disabled";
10581 + };
10582 + };
10583 +
10584 + fragment@3 {
10585 + target = <&gpio>;
10586 + __overlay__ {
10587 + piscreen_pins: piscreen_pins {
10588 + brcm,pins = <17 25 24 22>;
10589 + brcm,function = <0 1 1 1>; /* in out out out */
10590 + };
10591 + };
10592 + };
10593 +
10594 + fragment@4 {
10595 + target = <&spi0>;
10596 + __overlay__ {
10597 + /* needed to avoid dtc warning */
10598 + #address-cells = <1>;
10599 + #size-cells = <0>;
10600 +
10601 + piscreen: piscreen@0{
10602 + compatible = "ilitek,ili9486";
10603 + reg = <0>;
10604 + pinctrl-names = "default";
10605 + pinctrl-0 = <&piscreen_pins>;
10606 +
10607 + spi-max-frequency = <24000000>;
10608 + rotate = <270>;
10609 + bgr;
10610 + fps = <30>;
10611 + buswidth = <8>;
10612 + regwidth = <16>;
10613 + reset-gpios = <&gpio 25 0>;
10614 + dc-gpios = <&gpio 24 0>;
10615 + led-gpios = <&gpio 22 1>;
10616 + debug = <0>;
10617 +
10618 + init = <0x10000b0 0x00
10619 + 0x1000011
10620 + 0x20000ff
10621 + 0x100003a 0x55
10622 + 0x1000036 0x28
10623 + 0x10000c2 0x44
10624 + 0x10000c5 0x00 0x00 0x00 0x00
10625 + 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
10626 + 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
10627 + 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
10628 + 0x1000011
10629 + 0x1000029>;
10630 + };
10631 +
10632 + piscreen_ts: piscreen-ts@1 {
10633 + compatible = "ti,ads7846";
10634 + reg = <1>;
10635 +
10636 + spi-max-frequency = <2000000>;
10637 + interrupts = <17 2>; /* high-to-low edge triggered */
10638 + interrupt-parent = <&gpio>;
10639 + pendown-gpio = <&gpio 17 0>;
10640 + ti,swap-xy;
10641 + ti,x-plate-ohms = /bits/ 16 <100>;
10642 + ti,pressure-max = /bits/ 16 <255>;
10643 + };
10644 + };
10645 + };
10646 + __overrides__ {
10647 + speed = <&piscreen>,"spi-max-frequency:0";
10648 + rotate = <&piscreen>,"rotate:0";
10649 + fps = <&piscreen>,"fps:0";
10650 + debug = <&piscreen>,"debug:0";
10651 + xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
10652 + };
10653 +};
10654 --- /dev/null
10655 +++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
10656 @@ -0,0 +1,106 @@
10657 + /*
10658 + * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
10659 + *
10660 + */
10661 +
10662 +/dts-v1/;
10663 +/plugin/;
10664 +
10665 +/ {
10666 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10667 +
10668 + fragment@0 {
10669 + target = <&spi0>;
10670 + __overlay__ {
10671 + status = "okay";
10672 + };
10673 + };
10674 +
10675 + fragment@1 {
10676 + target = <&spidev0>;
10677 + __overlay__ {
10678 + status = "disabled";
10679 + };
10680 + };
10681 +
10682 + fragment@2 {
10683 + target = <&spidev1>;
10684 + __overlay__ {
10685 + status = "disabled";
10686 + };
10687 + };
10688 +
10689 + fragment@3 {
10690 + target = <&gpio>;
10691 + __overlay__ {
10692 + piscreen2_pins: piscreen2_pins {
10693 + brcm,pins = <17 25 24 22>;
10694 + brcm,function = <0 1 1 1>; /* in out out out */
10695 + };
10696 + };
10697 + };
10698 +
10699 + fragment@4 {
10700 + target = <&spi0>;
10701 + __overlay__ {
10702 + /* needed to avoid dtc warning */
10703 + #address-cells = <1>;
10704 + #size-cells = <0>;
10705 +
10706 + piscreen2: piscreen2@0{
10707 + compatible = "ilitek,ili9486";
10708 + reg = <0>;
10709 + pinctrl-names = "default";
10710 + pinctrl-0 = <&piscreen2_pins>;
10711 + bgr;
10712 + spi-max-frequency = <64000000>;
10713 + rotate = <90>;
10714 + fps = <30>;
10715 + buswidth = <8>;
10716 + regwidth = <16>;
10717 + txbuflen = <32768>;
10718 + reset-gpios = <&gpio 25 0>;
10719 + dc-gpios = <&gpio 24 0>;
10720 + led-gpios = <&gpio 22 1>;
10721 + debug = <0>;
10722 +
10723 + init = <0x10000b0 0x00
10724 + 0x1000011
10725 + 0x20000ff
10726 + 0x100003a 0x55
10727 + 0x1000036 0x28
10728 + 0x10000c0 0x11 0x09
10729 + 0x10000c1 0x41
10730 + 0x10000c5 0x00 0x00 0x00 0x00
10731 + 0x10000b6 0x00 0x02
10732 + 0x10000f7 0xa9 0x51 0x2c 0x2
10733 + 0x10000be 0x00 0x04
10734 + 0x10000e9 0x00
10735 + 0x1000011
10736 + 0x1000029>;
10737 +
10738 + };
10739 +
10740 + piscreen2_ts: piscreen2-ts@1 {
10741 + compatible = "ti,ads7846";
10742 + reg = <1>;
10743 +
10744 + spi-max-frequency = <2000000>;
10745 + interrupts = <17 2>; /* high-to-low edge triggered */
10746 + interrupt-parent = <&gpio>;
10747 + pendown-gpio = <&gpio 17 0>;
10748 + ti,swap-xy;
10749 + ti,x-plate-ohms = /bits/ 16 <100>;
10750 + ti,pressure-max = /bits/ 16 <255>;
10751 + };
10752 + };
10753 + };
10754 + __overrides__ {
10755 + speed = <&piscreen2>,"spi-max-frequency:0";
10756 + rotate = <&piscreen2>,"rotate:0";
10757 + fps = <&piscreen2>,"fps:0";
10758 + debug = <&piscreen2>,"debug:0";
10759 + xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
10760 + };
10761 +};
10762 +
10763 --- /dev/null
10764 +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
10765 @@ -0,0 +1,120 @@
10766 +/*
10767 + * Pisound Linux kernel module.
10768 + * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
10769 + *
10770 + * This program is free software; you can redistribute it and/or
10771 + * modify it under the terms of the GNU General Public License
10772 + * as published by the Free Software Foundation; version 2 of the
10773 + * License.
10774 + *
10775 + * This program is distributed in the hope that it will be useful,
10776 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
10777 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10778 + * GNU General Public License for more details.
10779 + *
10780 + * You should have received a copy of the GNU General Public License
10781 + * along with this program; if not, write to the Free Software
10782 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
10783 + */
10784 +
10785 +/dts-v1/;
10786 +/plugin/;
10787 +
10788 +#include <dt-bindings/gpio/gpio.h>
10789 +
10790 +/ {
10791 + compatible = "brcm,bcm2708";
10792 +
10793 + fragment@0 {
10794 + target = <&spi0>;
10795 + __overlay__ {
10796 + status = "okay";
10797 + };
10798 + };
10799 +
10800 + fragment@1 {
10801 + target = <&spidev0>;
10802 + __overlay__ {
10803 + status = "disabled";
10804 + };
10805 + };
10806 +
10807 + fragment@2 {
10808 + target = <&spidev1>;
10809 + __overlay__ {
10810 + status = "okay";
10811 + };
10812 + };
10813 +
10814 + fragment@3 {
10815 + target = <&spi0>;
10816 + __overlay__ {
10817 + #address-cells = <1>;
10818 + #size-cells = <0>;
10819 +
10820 + pisound_spi: pisound_spi@0{
10821 + compatible = "blokaslabs,pisound-spi";
10822 + reg = <0>;
10823 + pinctrl-names = "default";
10824 + pinctrl-0 = <&spi0_pins>;
10825 + spi-max-frequency = <1000000>;
10826 + };
10827 + };
10828 + };
10829 +
10830 + fragment@4 {
10831 + target-path = "/";
10832 + __overlay__ {
10833 + pcm5102a-codec {
10834 + #sound-dai-cells = <0>;
10835 + compatible = "ti,pcm5102a";
10836 + status = "okay";
10837 + };
10838 + };
10839 + };
10840 +
10841 + fragment@5 {
10842 + target = <&sound>;
10843 + __overlay__ {
10844 + compatible = "blokaslabs,pisound";
10845 + i2s-controller = <&i2s>;
10846 + status = "okay";
10847 +
10848 + pinctrl-0 = <&pisound_button_pins>;
10849 +
10850 + osr-gpios =
10851 + <&gpio 13 GPIO_ACTIVE_HIGH>,
10852 + <&gpio 26 GPIO_ACTIVE_HIGH>,
10853 + <&gpio 16 GPIO_ACTIVE_HIGH>;
10854 +
10855 + reset-gpios =
10856 + <&gpio 12 GPIO_ACTIVE_HIGH>,
10857 + <&gpio 24 GPIO_ACTIVE_HIGH>;
10858 +
10859 + data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
10860 +
10861 + button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
10862 + };
10863 + };
10864 +
10865 + fragment@6 {
10866 + target = <&gpio>;
10867 + __overlay__ {
10868 + pinctrl-names = "default";
10869 + pinctrl-0 = <&pisound_button_pins>;
10870 +
10871 + pisound_button_pins: pisound_button_pins {
10872 + brcm,pins = <17>;
10873 + brcm,function = <0>; // Input
10874 + brcm,pull = <2>; // Pull-Up
10875 + };
10876 + };
10877 + };
10878 +
10879 + fragment@7 {
10880 + target = <&i2s>;
10881 + __overlay__ {
10882 + status = "okay";
10883 + };
10884 + };
10885 +};
10886 --- /dev/null
10887 +++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
10888 @@ -0,0 +1,69 @@
10889 +/*
10890 + * Device Tree overlay for pitft by Adafruit
10891 + *
10892 + */
10893 +
10894 +/dts-v1/;
10895 +/plugin/;
10896 +
10897 +/ {
10898 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10899 +
10900 + fragment@0 {
10901 + target = <&spi0>;
10902 + __overlay__ {
10903 + status = "okay";
10904 +
10905 + spidev@0{
10906 + status = "disabled";
10907 + };
10908 +
10909 + spidev@1{
10910 + status = "disabled";
10911 + };
10912 + };
10913 + };
10914 +
10915 + fragment@1 {
10916 + target = <&gpio>;
10917 + __overlay__ {
10918 + pitft_pins: pitft_pins {
10919 + brcm,pins = <25>;
10920 + brcm,function = <1>; /* out */
10921 + brcm,pull = <0>; /* none */
10922 + };
10923 + };
10924 + };
10925 +
10926 + fragment@2 {
10927 + target = <&spi0>;
10928 + __overlay__ {
10929 + /* needed to avoid dtc warning */
10930 + #address-cells = <1>;
10931 + #size-cells = <0>;
10932 +
10933 + pitft: pitft@0{
10934 + compatible = "ilitek,ili9340";
10935 + reg = <0>;
10936 + pinctrl-names = "default";
10937 + pinctrl-0 = <&pitft_pins>;
10938 +
10939 + spi-max-frequency = <32000000>;
10940 + rotate = <90>;
10941 + fps = <25>;
10942 + bgr;
10943 + buswidth = <8>;
10944 + dc-gpios = <&gpio 25 0>;
10945 + debug = <0>;
10946 + };
10947 +
10948 + };
10949 + };
10950 +
10951 + __overrides__ {
10952 + speed = <&pitft>,"spi-max-frequency:0";
10953 + rotate = <&pitft>,"rotate:0";
10954 + fps = <&pitft>,"fps:0";
10955 + debug = <&pitft>,"debug:0";
10956 + };
10957 +};
10958 --- /dev/null
10959 +++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
10960 @@ -0,0 +1,91 @@
10961 +/*
10962 + * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
10963 + *
10964 + */
10965 +
10966 +/dts-v1/;
10967 +/plugin/;
10968 +
10969 +/ {
10970 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10971 +
10972 + fragment@0 {
10973 + target = <&spi0>;
10974 + __overlay__ {
10975 + status = "okay";
10976 + };
10977 + };
10978 +
10979 + fragment@1 {
10980 + target = <&spidev0>;
10981 + __overlay__ {
10982 + status = "disabled";
10983 + };
10984 + };
10985 +
10986 + fragment@2 {
10987 + target = <&gpio>;
10988 + __overlay__ {
10989 + pitft_pins: pitft_pins {
10990 + brcm,pins = <24 25>;
10991 + brcm,function = <0 1>; /* in out */
10992 + brcm,pull = <2 0>; /* pullup none */
10993 + };
10994 + };
10995 + };
10996 +
10997 + fragment@3 {
10998 + target = <&spi0>;
10999 + __overlay__ {
11000 + /* needed to avoid dtc warning */
11001 + #address-cells = <1>;
11002 + #size-cells = <0>;
11003 +
11004 + pitft: pitft@0{
11005 + compatible = "ilitek,ili9340";
11006 + reg = <0>;
11007 + pinctrl-names = "default";
11008 + pinctrl-0 = <&pitft_pins>;
11009 +
11010 + spi-max-frequency = <32000000>;
11011 + rotate = <90>;
11012 + fps = <25>;
11013 + bgr;
11014 + buswidth = <8>;
11015 + dc-gpios = <&gpio 25 0>;
11016 + debug = <0>;
11017 + };
11018 + };
11019 + };
11020 +
11021 + fragment@4 {
11022 + target = <&i2c1>;
11023 + __overlay__ {
11024 + /* needed to avoid dtc warning */
11025 + #address-cells = <1>;
11026 + #size-cells = <0>;
11027 +
11028 + ft6236: ft6236@38 {
11029 + compatible = "focaltech,ft6236";
11030 + reg = <0x38>;
11031 +
11032 + interrupt-parent = <&gpio>;
11033 + interrupts = <24 2>;
11034 + touchscreen-size-x = <240>;
11035 + touchscreen-size-y = <320>;
11036 + };
11037 + };
11038 + };
11039 +
11040 + __overrides__ {
11041 + speed = <&pitft>,"spi-max-frequency:0";
11042 + rotate = <&pitft>,"rotate:0";
11043 + fps = <&pitft>,"fps:0";
11044 + debug = <&pitft>,"debug:0";
11045 + touch-sizex = <&ft6236>,"touchscreen-size-x?";
11046 + touch-sizey = <&ft6236>,"touchscreen-size-y?";
11047 + touch-invx = <&ft6236>,"touchscreen-inverted-x?";
11048 + touch-invy = <&ft6236>,"touchscreen-inverted-y?";
11049 + touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
11050 + };
11051 +};
11052 --- /dev/null
11053 +++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
11054 @@ -0,0 +1,121 @@
11055 +/*
11056 + * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
11057 + *
11058 + */
11059 +
11060 +/dts-v1/;
11061 +/plugin/;
11062 +
11063 +/ {
11064 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11065 +
11066 + fragment@0 {
11067 + target = <&spi0>;
11068 + __overlay__ {
11069 + status = "okay";
11070 + };
11071 + };
11072 +
11073 + fragment@1 {
11074 + target = <&spidev0>;
11075 + __overlay__ {
11076 + status = "disabled";
11077 + };
11078 + };
11079 +
11080 + fragment@2 {
11081 + target = <&spidev1>;
11082 + __overlay__ {
11083 + status = "disabled";
11084 + };
11085 + };
11086 +
11087 + fragment@3 {
11088 + target = <&gpio>;
11089 + __overlay__ {
11090 + pitft_pins: pitft_pins {
11091 + brcm,pins = <24 25>;
11092 + brcm,function = <0 1>; /* in out */
11093 + brcm,pull = <2 0>; /* pullup none */
11094 + };
11095 + };
11096 + };
11097 +
11098 + fragment@4 {
11099 + target = <&spi0>;
11100 + __overlay__ {
11101 + /* needed to avoid dtc warning */
11102 + #address-cells = <1>;
11103 + #size-cells = <0>;
11104 +
11105 + pitft: pitft@0{
11106 + compatible = "ilitek,ili9340";
11107 + reg = <0>;
11108 + pinctrl-names = "default";
11109 + pinctrl-0 = <&pitft_pins>;
11110 +
11111 + spi-max-frequency = <32000000>;
11112 + rotate = <90>;
11113 + fps = <25>;
11114 + bgr;
11115 + buswidth = <8>;
11116 + dc-gpios = <&gpio 25 0>;
11117 + debug = <0>;
11118 + };
11119 +
11120 + pitft_ts@1 {
11121 + #address-cells = <1>;
11122 + #size-cells = <0>;
11123 + compatible = "st,stmpe610";
11124 + reg = <1>;
11125 +
11126 + spi-max-frequency = <500000>;
11127 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
11128 + interrupts = <24 2>; /* high-to-low edge triggered */
11129 + interrupt-parent = <&gpio>;
11130 + interrupt-controller;
11131 +
11132 + stmpe_touchscreen {
11133 + compatible = "st,stmpe-ts";
11134 + st,sample-time = <4>;
11135 + st,mod-12b = <1>;
11136 + st,ref-sel = <0>;
11137 + st,adc-freq = <2>;
11138 + st,ave-ctrl = <3>;
11139 + st,touch-det-delay = <4>;
11140 + st,settling = <2>;
11141 + st,fraction-z = <7>;
11142 + st,i-drive = <0>;
11143 + };
11144 +
11145 + stmpe_gpio: stmpe_gpio {
11146 + #gpio-cells = <2>;
11147 + compatible = "st,stmpe-gpio";
11148 + /*
11149 + * only GPIO2 is wired/available
11150 + * and it is wired to the backlight
11151 + */
11152 + st,norequest-mask = <0x7b>;
11153 + };
11154 + };
11155 + };
11156 + };
11157 +
11158 + fragment@5 {
11159 + target-path = "/soc";
11160 + __overlay__ {
11161 + backlight {
11162 + compatible = "gpio-backlight";
11163 + gpios = <&stmpe_gpio 2 0>;
11164 + default-on;
11165 + };
11166 + };
11167 + };
11168 +
11169 + __overrides__ {
11170 + speed = <&pitft>,"spi-max-frequency:0";
11171 + rotate = <&pitft>,"rotate:0";
11172 + fps = <&pitft>,"fps:0";
11173 + debug = <&pitft>,"debug:0";
11174 + };
11175 +};
11176 --- /dev/null
11177 +++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
11178 @@ -0,0 +1,121 @@
11179 +/*
11180 + * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
11181 + *
11182 + */
11183 +
11184 +/dts-v1/;
11185 +/plugin/;
11186 +
11187 +/ {
11188 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11189 +
11190 + fragment@0 {
11191 + target = <&spi0>;
11192 + __overlay__ {
11193 + status = "okay";
11194 + };
11195 + };
11196 +
11197 + fragment@1 {
11198 + target = <&spidev0>;
11199 + __overlay__ {
11200 + status = "disabled";
11201 + };
11202 + };
11203 +
11204 + fragment@2 {
11205 + target = <&spidev1>;
11206 + __overlay__ {
11207 + status = "disabled";
11208 + };
11209 + };
11210 +
11211 + fragment@3 {
11212 + target = <&gpio>;
11213 + __overlay__ {
11214 + pitft_pins: pitft_pins {
11215 + brcm,pins = <24 25>;
11216 + brcm,function = <0 1>; /* in out */
11217 + brcm,pull = <2 0>; /* pullup none */
11218 + };
11219 + };
11220 + };
11221 +
11222 + fragment@4 {
11223 + target = <&spi0>;
11224 + __overlay__ {
11225 + /* needed to avoid dtc warning */
11226 + #address-cells = <1>;
11227 + #size-cells = <0>;
11228 +
11229 + pitft: pitft@0{
11230 + compatible = "himax,hx8357d";
11231 + reg = <0>;
11232 + pinctrl-names = "default";
11233 + pinctrl-0 = <&pitft_pins>;
11234 +
11235 + spi-max-frequency = <32000000>;
11236 + rotate = <90>;
11237 + fps = <25>;
11238 + bgr;
11239 + buswidth = <8>;
11240 + dc-gpios = <&gpio 25 0>;
11241 + debug = <0>;
11242 + };
11243 +
11244 + pitft_ts@1 {
11245 + #address-cells = <1>;
11246 + #size-cells = <0>;
11247 + compatible = "st,stmpe610";
11248 + reg = <1>;
11249 +
11250 + spi-max-frequency = <500000>;
11251 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
11252 + interrupts = <24 2>; /* high-to-low edge triggered */
11253 + interrupt-parent = <&gpio>;
11254 + interrupt-controller;
11255 +
11256 + stmpe_touchscreen {
11257 + compatible = "st,stmpe-ts";
11258 + st,sample-time = <4>;
11259 + st,mod-12b = <1>;
11260 + st,ref-sel = <0>;
11261 + st,adc-freq = <2>;
11262 + st,ave-ctrl = <3>;
11263 + st,touch-det-delay = <4>;
11264 + st,settling = <2>;
11265 + st,fraction-z = <7>;
11266 + st,i-drive = <0>;
11267 + };
11268 +
11269 + stmpe_gpio: stmpe_gpio {
11270 + #gpio-cells = <2>;
11271 + compatible = "st,stmpe-gpio";
11272 + /*
11273 + * only GPIO2 is wired/available
11274 + * and it is wired to the backlight
11275 + */
11276 + st,norequest-mask = <0x7b>;
11277 + };
11278 + };
11279 + };
11280 + };
11281 +
11282 + fragment@5 {
11283 + target-path = "/soc";
11284 + __overlay__ {
11285 + backlight {
11286 + compatible = "gpio-backlight";
11287 + gpios = <&stmpe_gpio 2 0>;
11288 + default-on;
11289 + };
11290 + };
11291 + };
11292 +
11293 + __overrides__ {
11294 + speed = <&pitft>,"spi-max-frequency:0";
11295 + rotate = <&pitft>,"rotate:0";
11296 + fps = <&pitft>,"fps:0";
11297 + debug = <&pitft>,"debug:0";
11298 + };
11299 +};
11300 --- /dev/null
11301 +++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
11302 @@ -0,0 +1,38 @@
11303 +/dts-v1/;
11304 +/plugin/;
11305 +
11306 +/ {
11307 + compatible = "brcm,bcm2708";
11308 + fragment@0 {
11309 + target-path = "/";
11310 + __overlay__ {
11311 + pps: pps@12 {
11312 + compatible = "pps-gpio";
11313 + pinctrl-names = "default";
11314 + pinctrl-0 = <&pps_pins>;
11315 + gpios = <&gpio 18 0>;
11316 + status = "okay";
11317 + };
11318 + };
11319 + };
11320 +
11321 + fragment@1 {
11322 + target = <&gpio>;
11323 + __overlay__ {
11324 + pps_pins: pps_pins@12 {
11325 + brcm,pins = <18>;
11326 + brcm,function = <0>; // in
11327 + brcm,pull = <0>; // off
11328 + };
11329 + };
11330 + };
11331 +
11332 + __overrides__ {
11333 + gpiopin = <&pps>,"gpios:4",
11334 + <&pps>,"reg:0",
11335 + <&pps_pins>,"brcm,pins:0",
11336 + <&pps_pins>,"reg:0";
11337 + assert_falling_edge = <&pps>,"assert-falling-edge?";
11338 + capture_clear = <&pps>,"capture-clear?";
11339 + };
11340 +};
11341 --- /dev/null
11342 +++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
11343 @@ -0,0 +1,47 @@
11344 +/dts-v1/;
11345 +/plugin/;
11346 +
11347 +/*
11348 +This is the 2-channel overlay - only use it if you need both channels.
11349 +
11350 +Legal pin,function combinations for each channel:
11351 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
11352 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
11353 +
11354 +N.B.:
11355 + 1) Pin 18 is the only one available on all platforms, and
11356 + it is the one used by the I2S audio interface.
11357 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
11358 + 2) The onboard analogue audio output uses both PWM channels.
11359 + 3) So be careful mixing audio and PWM.
11360 +*/
11361 +
11362 +/ {
11363 + fragment@0 {
11364 + target = <&gpio>;
11365 + __overlay__ {
11366 + pwm_pins: pwm_pins {
11367 + brcm,pins = <18 19>;
11368 + brcm,function = <2 2>; /* Alt5 */
11369 + };
11370 + };
11371 + };
11372 +
11373 + fragment@1 {
11374 + target = <&pwm>;
11375 + frag1: __overlay__ {
11376 + pinctrl-names = "default";
11377 + pinctrl-0 = <&pwm_pins>;
11378 + assigned-clock-rates = <100000000>;
11379 + status = "okay";
11380 + };
11381 + };
11382 +
11383 + __overrides__ {
11384 + pin = <&pwm_pins>,"brcm,pins:0";
11385 + pin2 = <&pwm_pins>,"brcm,pins:4";
11386 + func = <&pwm_pins>,"brcm,function:0";
11387 + func2 = <&pwm_pins>,"brcm,function:4";
11388 + clock = <&frag1>,"assigned-clock-rates:0";
11389 + };
11390 +};
11391 --- /dev/null
11392 +++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
11393 @@ -0,0 +1,40 @@
11394 +/dts-v1/;
11395 +/plugin/;
11396 +
11397 +/ {
11398 + compatible = "brcm,bcm2708";
11399 +
11400 + fragment@0 {
11401 + target = <&gpio>;
11402 + __overlay__ {
11403 + pwm0_pins: pwm0_pins {
11404 + brcm,pins = <18>;
11405 + brcm,function = <2>; /* Alt5 */
11406 + };
11407 + };
11408 + };
11409 +
11410 + fragment@1 {
11411 + target = <&pwm>;
11412 + __overlay__ {
11413 + pinctrl-names = "default";
11414 + pinctrl-0 = <&pwm0_pins>;
11415 + status = "okay";
11416 + };
11417 + };
11418 +
11419 + fragment@2 {
11420 + target-path = "/";
11421 + __overlay__ {
11422 + pwm-ir-transmitter {
11423 + compatible = "pwm-ir-tx";
11424 + pwms = <&pwm 0 100>;
11425 + };
11426 + };
11427 + };
11428 +
11429 + __overrides__ {
11430 + gpio_pin = <&pwm0_pins>, "brcm,pins:0";
11431 + func = <&pwm0_pins>,"brcm,function:0";
11432 + };
11433 +};
11434 --- /dev/null
11435 +++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
11436 @@ -0,0 +1,43 @@
11437 +/dts-v1/;
11438 +/plugin/;
11439 +
11440 +/*
11441 +Legal pin,function combinations for each channel:
11442 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
11443 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
11444 +
11445 +N.B.:
11446 + 1) Pin 18 is the only one available on all platforms, and
11447 + it is the one used by the I2S audio interface.
11448 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
11449 + 2) The onboard analogue audio output uses both PWM channels.
11450 + 3) So be careful mixing audio and PWM.
11451 +*/
11452 +
11453 +/ {
11454 + fragment@0 {
11455 + target = <&gpio>;
11456 + __overlay__ {
11457 + pwm_pins: pwm_pins {
11458 + brcm,pins = <18>;
11459 + brcm,function = <2>; /* Alt5 */
11460 + };
11461 + };
11462 + };
11463 +
11464 + fragment@1 {
11465 + target = <&pwm>;
11466 + frag1: __overlay__ {
11467 + pinctrl-names = "default";
11468 + pinctrl-0 = <&pwm_pins>;
11469 + assigned-clock-rates = <100000000>;
11470 + status = "okay";
11471 + };
11472 + };
11473 +
11474 + __overrides__ {
11475 + pin = <&pwm_pins>,"brcm,pins:0";
11476 + func = <&pwm_pins>,"brcm,function:0";
11477 + clock = <&frag1>,"assigned-clock-rates:0";
11478 + };
11479 +};
11480 --- /dev/null
11481 +++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
11482 @@ -0,0 +1,52 @@
11483 +// Overlay for the Qualcomm Atheros QCA7000 on I2SE's PLC Stamp micro EVK
11484 +// Visit: https://www.i2se.com/product/plc-stamp-micro-evk for details
11485 +
11486 +/dts-v1/;
11487 +/plugin/;
11488 +
11489 +/ {
11490 + compatible = "brcm,bcm2708";
11491 +
11492 + fragment@0 {
11493 + target = <&spi0>;
11494 + __overlay__ {
11495 + /* needed to avoid dtc warning */
11496 + #address-cells = <1>;
11497 + #size-cells = <0>;
11498 +
11499 + status = "okay";
11500 +
11501 + spidev@0 {
11502 + status = "disabled";
11503 + };
11504 +
11505 + eth1: qca7000@0 {
11506 + compatible = "qca,qca7000";
11507 + reg = <0>; /* CE0 */
11508 + pinctrl-names = "default";
11509 + pinctrl-0 = <&eth1_pins>;
11510 + interrupt-parent = <&gpio>;
11511 + interrupts = <23 0x1>; /* rising edge */
11512 + spi-max-frequency = <12000000>;
11513 + status = "okay";
11514 + };
11515 + };
11516 + };
11517 +
11518 + fragment@1 {
11519 + target = <&gpio>;
11520 + __overlay__ {
11521 + eth1_pins: eth1_pins {
11522 + brcm,pins = <23>;
11523 + brcm,function = <0>; /* in */
11524 + brcm,pull = <0>; /* none */
11525 + };
11526 + };
11527 + };
11528 +
11529 + __overrides__ {
11530 + int_pin = <&eth1>, "interrupts:0",
11531 + <&eth1_pins>, "brcm,pins:0";
11532 + speed = <&eth1>, "spi-max-frequency:0";
11533 + };
11534 +};
11535 --- /dev/null
11536 +++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
11537 @@ -0,0 +1,59 @@
11538 +// Device tree overlay for GPIO connected rotary encoder.
11539 +/dts-v1/;
11540 +/plugin/;
11541 +
11542 +/ {
11543 + compatible = "brcm,bcm2708";
11544 +
11545 + fragment@0 {
11546 + target = <&gpio>;
11547 + __overlay__ {
11548 + rotary_pins: rotary_pins@4 {
11549 + brcm,pins = <4 17>; /* gpio 4 17 */
11550 + brcm,function = <0 0>; /* input */
11551 + brcm,pull = <2 2>; /* pull-up */
11552 + };
11553 +
11554 + };
11555 + };
11556 +
11557 + fragment@1 {
11558 + target-path = "/";
11559 + __overlay__ {
11560 + rotary: rotary@4 {
11561 + compatible = "rotary-encoder";
11562 + status = "okay";
11563 + pinctrl-names = "default";
11564 + pinctrl-0 = <&rotary_pins>;
11565 + gpios = <&gpio 4 0>, <&gpio 17 0>;
11566 + linux,axis = <0>; /* REL_X */
11567 + rotary-encoder,encoding = "gray";
11568 + rotary-encoder,steps = <24>; /* 24 default */
11569 + rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
11570 + };
11571 + };
11572 +
11573 + };
11574 +
11575 + __overrides__ {
11576 + pin_a = <&rotary>,"gpios:4",
11577 + <&rotary_pins>,"brcm,pins:0",
11578 + /* modify reg values to allow multiple instantiation */
11579 + <&rotary>,"reg:0",
11580 + <&rotary_pins>,"reg:0";
11581 + pin_b = <&rotary>,"gpios:16",
11582 + <&rotary_pins>,"brcm,pins:4";
11583 + relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
11584 + linux_axis = <&rotary>,"linux,axis:0";
11585 + rollover = <&rotary>,"rotary-encoder,rollover?";
11586 + steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
11587 + steps = <&rotary>,"rotary-encoder,steps:0";
11588 + wakeup = <&rotary>,"wakeup-source?";
11589 + encoding = <&rotary>,"rotary-encoder,encoding";
11590 + /* legacy parameters*/
11591 + rotary0_pin_a = <&rotary>,"gpios:4",
11592 + <&rotary_pins>,"brcm,pins:0";
11593 + rotary0_pin_b = <&rotary>,"gpios:16",
11594 + <&rotary_pins>,"brcm,pins:4";
11595 + };
11596 +};
11597 --- /dev/null
11598 +++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
11599 @@ -0,0 +1,21 @@
11600 +/*
11601 + * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
11602 + * backlight controller
11603 + */
11604 +/dts-v1/;
11605 +/plugin/;
11606 +
11607 +/ {
11608 + compatible = "brcm,bcm2708";
11609 +
11610 + fragment@0 {
11611 + target-path = "/";
11612 + __overlay__ {
11613 + rpi_backlight: rpi_backlight {
11614 + compatible = "raspberrypi,rpi-backlight";
11615 + firmware = <&firmware>;
11616 + status = "okay";
11617 + };
11618 + };
11619 + };
11620 +};
11621 --- /dev/null
11622 +++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
11623 @@ -0,0 +1,146 @@
11624 +// Definitions for the Cirrus Logic Audio Card
11625 +/dts-v1/;
11626 +/plugin/;
11627 +#include <dt-bindings/pinctrl/bcm2835.h>
11628 +#include <dt-bindings/gpio/gpio.h>
11629 +#include <dt-bindings/mfd/arizona.h>
11630 +
11631 +/ {
11632 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11633 +
11634 + fragment@0 {
11635 + target = <&i2s>;
11636 + __overlay__ {
11637 + status = "okay";
11638 + };
11639 + };
11640 +
11641 + fragment@1 {
11642 + target = <&gpio>;
11643 + __overlay__ {
11644 + wlf_pins: wlf_pins {
11645 + brcm,pins = <17 22 27 8>;
11646 + brcm,function = <
11647 + BCM2835_FSEL_GPIO_OUT
11648 + BCM2835_FSEL_GPIO_OUT
11649 + BCM2835_FSEL_GPIO_IN
11650 + BCM2835_FSEL_GPIO_OUT
11651 + >;
11652 + };
11653 + };
11654 + };
11655 +
11656 + fragment@2 {
11657 + target-path = "/";
11658 + __overlay__ {
11659 + rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
11660 + compatible = "regulator-fixed";
11661 + regulator-name = "RPi-Cirrus 1v8";
11662 + regulator-min-microvolt = <1800000>;
11663 + regulator-max-microvolt = <1800000>;
11664 + regulator-always-on;
11665 + };
11666 + };
11667 + };
11668 +
11669 + fragment@3 {
11670 + target = <&spi0>;
11671 + __overlay__ {
11672 + #address-cells = <1>;
11673 + #size-cells = <0>;
11674 + status = "okay";
11675 +
11676 + spidev@0{
11677 + status = "disabled";
11678 + };
11679 +
11680 + spidev@1{
11681 + status = "disabled";
11682 + };
11683 +
11684 + wm5102@1{
11685 + compatible = "wlf,wm5102";
11686 + reg = <1>;
11687 +
11688 + spi-max-frequency = <500000>;
11689 +
11690 + interrupt-parent = <&gpio>;
11691 + interrupts = <27 8>;
11692 + interrupt-controller;
11693 + #interrupt-cells = <2>;
11694 +
11695 + gpio-controller;
11696 + #gpio-cells = <2>;
11697 +
11698 + LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
11699 + AVDD-supply = <&rpi_cirrus_reg_1v8>;
11700 + DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
11701 + DBVDD2-supply = <&vdd_3v3_reg>;
11702 + DBVDD3-supply = <&vdd_3v3_reg>;
11703 + CPVDD-supply = <&rpi_cirrus_reg_1v8>;
11704 + SPKVDDL-supply = <&vdd_5v0_reg>;
11705 + SPKVDDR-supply = <&vdd_5v0_reg>;
11706 + DCVDD-supply = <&arizona_ldo1>;
11707 +
11708 + wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>;
11709 + wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
11710 + wlf,gpio-defaults = <
11711 + ARIZONA_GP_DEFAULT
11712 + ARIZONA_GP_DEFAULT
11713 + ARIZONA_GP_DEFAULT
11714 + ARIZONA_GP_DEFAULT
11715 + ARIZONA_GP_DEFAULT
11716 + >;
11717 + wlf,micd-configs = <0 1 0>;
11718 + wlf,dmic-ref = <
11719 + ARIZONA_DMIC_MICVDD
11720 + ARIZONA_DMIC_MICBIAS2
11721 + ARIZONA_DMIC_MICVDD
11722 + ARIZONA_DMIC_MICVDD
11723 + >;
11724 + wlf,inmode = <
11725 + ARIZONA_INMODE_DIFF
11726 + ARIZONA_INMODE_DMIC
11727 + ARIZONA_INMODE_SE
11728 + ARIZONA_INMODE_DIFF
11729 + >;
11730 + status = "okay";
11731 +
11732 + arizona_ldo1: ldo1 {
11733 + regulator-name = "LDO1";
11734 + // default constraints as in
11735 + // arizona-ldo1.c
11736 + regulator-min-microvolt = <1200000>;
11737 + regulator-max-microvolt = <1800000>;
11738 + };
11739 + };
11740 + };
11741 + };
11742 +
11743 + fragment@4 {
11744 + target = <&i2c1>;
11745 + __overlay__ {
11746 + status = "okay";
11747 + #address-cells = <1>;
11748 + #size-cells = <0>;
11749 +
11750 + wm8804@3b {
11751 + compatible = "wlf,wm8804";
11752 + reg = <0x3b>;
11753 + status = "okay";
11754 + PVDD-supply = <&vdd_3v3_reg>;
11755 + DVDD-supply = <&vdd_3v3_reg>;
11756 + wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
11757 + };
11758 + };
11759 + };
11760 +
11761 + fragment@5 {
11762 + target = <&sound>;
11763 + __overlay__ {
11764 + compatible = "wlf,rpi-cirrus";
11765 + i2s-controller = <&i2s>;
11766 + status = "okay";
11767 + };
11768 + };
11769 +};
11770 --- /dev/null
11771 +++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
11772 @@ -0,0 +1,34 @@
11773 +// Definitions for RPi DAC
11774 +/dts-v1/;
11775 +/plugin/;
11776 +
11777 +/ {
11778 + compatible = "brcm,bcm2708";
11779 +
11780 + fragment@0 {
11781 + target = <&i2s>;
11782 + __overlay__ {
11783 + status = "okay";
11784 + };
11785 + };
11786 +
11787 + fragment@1 {
11788 + target-path = "/";
11789 + __overlay__ {
11790 + pcm1794a-codec {
11791 + #sound-dai-cells = <0>;
11792 + compatible = "ti,pcm1794a";
11793 + status = "okay";
11794 + };
11795 + };
11796 + };
11797 +
11798 + fragment@2 {
11799 + target = <&sound>;
11800 + __overlay__ {
11801 + compatible = "rpi,rpi-dac";
11802 + i2s-controller = <&i2s>;
11803 + status = "okay";
11804 + };
11805 + };
11806 +};
11807 --- /dev/null
11808 +++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
11809 @@ -0,0 +1,91 @@
11810 +/*
11811 + * Device Tree overlay for rpi-display by Watterott
11812 + *
11813 + */
11814 +
11815 +/dts-v1/;
11816 +/plugin/;
11817 +
11818 +/ {
11819 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11820 +
11821 + fragment@0 {
11822 + target = <&spi0>;
11823 + __overlay__ {
11824 + status = "okay";
11825 + };
11826 + };
11827 +
11828 + fragment@1 {
11829 + target = <&spidev0>;
11830 + __overlay__ {
11831 + status = "disabled";
11832 + };
11833 + };
11834 +
11835 + fragment@2 {
11836 + target = <&spidev1>;
11837 + __overlay__ {
11838 + status = "disabled";
11839 + };
11840 + };
11841 +
11842 + fragment@3 {
11843 + target = <&gpio>;
11844 + __overlay__ {
11845 + rpi_display_pins: rpi_display_pins {
11846 + brcm,pins = <18 23 24 25>;
11847 + brcm,function = <1 1 1 0>; /* out out out in */
11848 + brcm,pull = <0 0 0 2>; /* - - - up */
11849 + };
11850 + };
11851 + };
11852 +
11853 + fragment@4 {
11854 + target = <&spi0>;
11855 + __overlay__ {
11856 + /* needed to avoid dtc warning */
11857 + #address-cells = <1>;
11858 + #size-cells = <0>;
11859 +
11860 + rpidisplay: rpi-display@0{
11861 + compatible = "ilitek,ili9341";
11862 + reg = <0>;
11863 + pinctrl-names = "default";
11864 + pinctrl-0 = <&rpi_display_pins>;
11865 +
11866 + spi-max-frequency = <32000000>;
11867 + rotate = <270>;
11868 + bgr;
11869 + fps = <30>;
11870 + buswidth = <8>;
11871 + reset-gpios = <&gpio 23 0>;
11872 + dc-gpios = <&gpio 24 0>;
11873 + led-gpios = <&gpio 18 1>;
11874 + debug = <0>;
11875 + };
11876 +
11877 + rpidisplay_ts: rpi-display-ts@1 {
11878 + compatible = "ti,ads7846";
11879 + reg = <1>;
11880 +
11881 + spi-max-frequency = <2000000>;
11882 + interrupts = <25 2>; /* high-to-low edge triggered */
11883 + interrupt-parent = <&gpio>;
11884 + pendown-gpio = <&gpio 25 0>;
11885 + ti,x-plate-ohms = /bits/ 16 <60>;
11886 + ti,pressure-max = /bits/ 16 <255>;
11887 + };
11888 + };
11889 + };
11890 + __overrides__ {
11891 + speed = <&rpidisplay>,"spi-max-frequency:0";
11892 + rotate = <&rpidisplay>,"rotate:0";
11893 + fps = <&rpidisplay>,"fps:0";
11894 + debug = <&rpidisplay>,"debug:0";
11895 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
11896 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
11897 + backlight = <&rpidisplay>,"led-gpios:4",
11898 + <&rpi_display_pins>,"brcm,pins:0";
11899 + };
11900 +};
11901 --- /dev/null
11902 +++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
11903 @@ -0,0 +1,30 @@
11904 +/dts-v1/;
11905 +/plugin/;
11906 +
11907 +/ {
11908 + compatible = "brcm,bcm2708";
11909 +
11910 + fragment@0 {
11911 + target-path = "/";
11912 + __overlay__ {
11913 + rpi_ft5406: rpi_ft5406 {
11914 + compatible = "rpi,rpi-ft5406";
11915 + firmware = <&firmware>;
11916 + status = "okay";
11917 + touchscreen-size-x = <800>;
11918 + touchscreen-size-y = <480>;
11919 + touchscreen-inverted-x = <0>;
11920 + touchscreen-inverted-y = <0>;
11921 + touchscreen-swapped-x-y = <0>;
11922 + };
11923 + };
11924 + };
11925 +
11926 + __overrides__ {
11927 + touchscreen-size-x = <&rpi_ft5406>,"touchscreen-size-x:0";
11928 + touchscreen-size-y = <&rpi_ft5406>,"touchscreen-size-y:0";
11929 + touchscreen-inverted-x = <&rpi_ft5406>,"touchscreen-inverted-x:0";
11930 + touchscreen-inverted-y = <&rpi_ft5406>,"touchscreen-inverted-y:0";
11931 + touchscreen-swapped-x-y = <&rpi_ft5406>,"touchscreen-swapped-x-y:0";
11932 + };
11933 +};
11934 --- /dev/null
11935 +++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
11936 @@ -0,0 +1,39 @@
11937 +// Definitions for Rpi-Proto
11938 +/dts-v1/;
11939 +/plugin/;
11940 +
11941 +/ {
11942 + compatible = "brcm,bcm2708";
11943 +
11944 + fragment@0 {
11945 + target = <&i2s>;
11946 + __overlay__ {
11947 + status = "okay";
11948 + };
11949 + };
11950 +
11951 + fragment@1 {
11952 + target = <&i2c1>;
11953 + __overlay__ {
11954 + #address-cells = <1>;
11955 + #size-cells = <0>;
11956 + status = "okay";
11957 +
11958 + wm8731@1a {
11959 + #sound-dai-cells = <0>;
11960 + compatible = "wlf,wm8731";
11961 + reg = <0x1a>;
11962 + status = "okay";
11963 + };
11964 + };
11965 + };
11966 +
11967 + fragment@2 {
11968 + target = <&sound>;
11969 + __overlay__ {
11970 + compatible = "rpi,rpi-proto";
11971 + i2s-controller = <&i2s>;
11972 + status = "okay";
11973 + };
11974 + };
11975 +};
11976 --- /dev/null
11977 +++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
11978 @@ -0,0 +1,47 @@
11979 +// rpi-sense HAT
11980 +/dts-v1/;
11981 +/plugin/;
11982 +
11983 +/ {
11984 + compatible = "brcm,bcm2708", "brcm,bcm2709";
11985 +
11986 + fragment@0 {
11987 + target = <&i2c1>;
11988 + __overlay__ {
11989 + #address-cells = <1>;
11990 + #size-cells = <0>;
11991 + status = "okay";
11992 +
11993 + rpi-sense@46 {
11994 + compatible = "rpi,rpi-sense";
11995 + reg = <0x46>;
11996 + keys-int-gpios = <&gpio 23 1>;
11997 + status = "okay";
11998 + };
11999 +
12000 + lsm9ds1-magn@1c {
12001 + compatible = "st,lsm9ds1-magn";
12002 + reg = <0x1c>;
12003 + status = "okay";
12004 + };
12005 +
12006 + lsm9ds1-accel6a {
12007 + compatible = "st,lsm9ds1-accel";
12008 + reg = <0x6a>;
12009 + status = "okay";
12010 + };
12011 +
12012 + lps25h-press@5c {
12013 + compatible = "st,lps25h-press";
12014 + reg = <0x5c>;
12015 + status = "okay";
12016 + };
12017 +
12018 + hts221-humid@5f {
12019 + compatible = "st,hts221-humid";
12020 + reg = <0x5f>;
12021 + status = "okay";
12022 + };
12023 + };
12024 + };
12025 +};
12026 --- /dev/null
12027 +++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
12028 @@ -0,0 +1,31 @@
12029 +// rpi-tv HAT
12030 +
12031 +/dts-v1/;
12032 +/plugin/;
12033 +
12034 +/ {
12035 + compatible = "brcm,bcm2708", "brcm,bcm2709";
12036 +
12037 + fragment@0 {
12038 + target = <&spi0>;
12039 + __overlay__ {
12040 + /* needed to avoid dtc warning */
12041 + #address-cells = <1>;
12042 + #size-cells = <0>;
12043 +
12044 + status = "okay";
12045 +
12046 + spidev@0 {
12047 + status = "disabled";
12048 + };
12049 +
12050 + cxd2880@0 {
12051 + compatible = "sony,cxd2880";
12052 + reg = <0>; /* CE0 */
12053 + spi-max-frequency = <50000000>;
12054 + status = "okay";
12055 + };
12056 + };
12057 + };
12058 +
12059 +};
12060 --- /dev/null
12061 +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
12062 @@ -0,0 +1,49 @@
12063 +// Definitions for RRA DigiDAC1 Audio card
12064 +/dts-v1/;
12065 +/plugin/;
12066 +
12067 +/ {
12068 + compatible = "brcm,bcm2708";
12069 +
12070 + fragment@0 {
12071 + target = <&i2s>;
12072 + __overlay__ {
12073 + status = "okay";
12074 + };
12075 + };
12076 +
12077 + fragment@1 {
12078 + target = <&i2c1>;
12079 + __overlay__ {
12080 + #address-cells = <1>;
12081 + #size-cells = <0>;
12082 + status = "okay";
12083 +
12084 + wm8804@3b {
12085 + #sound-dai-cells = <0>;
12086 + compatible = "wlf,wm8804";
12087 + reg = <0x3b>;
12088 + status = "okay";
12089 + PVDD-supply = <&vdd_3v3_reg>;
12090 + DVDD-supply = <&vdd_3v3_reg>;
12091 + };
12092 +
12093 + wm8742: wm8741@1a {
12094 + compatible = "wlf,wm8741";
12095 + reg = <0x1a>;
12096 + status = "okay";
12097 + AVDD-supply = <&vdd_5v0_reg>;
12098 + DVDD-supply = <&vdd_3v3_reg>;
12099 + };
12100 + };
12101 + };
12102 +
12103 + fragment@2 {
12104 + target = <&sound>;
12105 + __overlay__ {
12106 + compatible = "rra,digidac1-soundcard";
12107 + i2s-controller = <&i2s>;
12108 + status = "okay";
12109 + };
12110 + };
12111 +};
12112 --- /dev/null
12113 +++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
12114 @@ -0,0 +1,37 @@
12115 +/dts-v1/;
12116 +/plugin/;
12117 +
12118 +/ {
12119 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12120 +
12121 + fragment@0 {
12122 + target = <&i2c_arm>;
12123 + __overlay__ {
12124 + #address-cells = <1>;
12125 + #size-cells = <0>;
12126 + status = "okay";
12127 +
12128 + sc16is750: sc16is750@48 {
12129 + compatible = "nxp,sc16is750";
12130 + reg = <0x48>; /* address */
12131 + clocks = <&sc16is750_clk>;
12132 + interrupt-parent = <&gpio>;
12133 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
12134 + #gpio-cells = <2>;
12135 +
12136 + sc16is750_clk: sc16is750_clk {
12137 + compatible = "fixed-clock";
12138 + #clock-cells = <0>;
12139 + clock-frequency = <14745600>;
12140 + };
12141 + };
12142 + };
12143 + };
12144 +
12145 +
12146 + __overrides__ {
12147 + int_pin = <&sc16is750>,"interrupts:0";
12148 + addr = <&sc16is750>,"reg:0";
12149 + };
12150 +
12151 +};
12152 --- /dev/null
12153 +++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
12154 @@ -0,0 +1,40 @@
12155 +/dts-v1/;
12156 +/plugin/;
12157 +
12158 +/ {
12159 + compatible = "brcm,bcm2835";
12160 +
12161 + fragment@0 {
12162 + target = <&i2c1>;
12163 +
12164 + frag1: __overlay__ {
12165 + #address-cells = <1>;
12166 + #size-cells = <0>;
12167 + status = "okay";
12168 +
12169 + sc16is752: sc16is752@48 {
12170 + compatible = "nxp,sc16is752";
12171 + reg = <0x48>; // i2c address
12172 + clocks = <&sc16is752_clk>;
12173 + interrupt-parent = <&gpio>;
12174 + interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */
12175 + gpio-controller;
12176 + #gpio-cells = <0>;
12177 + i2c-max-frequency = <400000>;
12178 + status = "okay";
12179 +
12180 + sc16is752_clk: sc16is752_clk {
12181 + compatible = "fixed-clock";
12182 + #clock-cells = <0>;
12183 + clock-frequency = <14745600>;
12184 + };
12185 + };
12186 + };
12187 + };
12188 +
12189 + __overrides__ {
12190 + int_pin = <&sc16is752>,"interrupts:0";
12191 + addr = <&sc16is752>,"reg:0";
12192 + xtal = <&sc16is752>,"clock-frequency:0";
12193 + };
12194 +};
12195 --- /dev/null
12196 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
12197 @@ -0,0 +1,61 @@
12198 +/dts-v1/;
12199 +/plugin/;
12200 +
12201 +/ {
12202 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12203 +
12204 + fragment@0 {
12205 + target = <&gpio>;
12206 + __overlay__ {
12207 + spi1_pins: spi1_pins {
12208 + brcm,pins = <19 20 21>;
12209 + brcm,function = <3>; /* alt4 */
12210 + };
12211 +
12212 + spi1_cs_pins: spi1_cs_pins {
12213 + brcm,pins = <18>;
12214 + brcm,function = <1>; /* output */
12215 + };
12216 + };
12217 + };
12218 +
12219 + fragment@1 {
12220 + target = <&spi1>;
12221 + frag1: __overlay__ {
12222 + #address-cells = <1>;
12223 + #size-cells = <0>;
12224 + pinctrl-names = "default";
12225 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12226 + cs-gpios = <&gpio 18 1>;
12227 + status = "okay";
12228 +
12229 + sc16is752: sc16is752@0 {
12230 + compatible = "nxp,sc16is752";
12231 + reg = <0>; /* CE0 */
12232 + clocks = <&sc16is752_clk>;
12233 + interrupt-parent = <&gpio>;
12234 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
12235 + #gpio-controller;
12236 + #gpio-cells = <2>;
12237 + spi-max-frequency = <4000000>;
12238 +
12239 + sc16is752_clk: sc16is752_clk {
12240 + compatible = "fixed-clock";
12241 + #clock-cells = <0>;
12242 + clock-frequency = <14745600>;
12243 + };
12244 + };
12245 + };
12246 + };
12247 +
12248 + fragment@2 {
12249 + target = <&aux>;
12250 + __overlay__ {
12251 + status = "okay";
12252 + };
12253 + };
12254 +
12255 + __overrides__ {
12256 + int_pin = <&sc16is752>,"interrupts:0";
12257 + };
12258 +};
12259 --- /dev/null
12260 +++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
12261 @@ -0,0 +1,31 @@
12262 +/dts-v1/;
12263 +/plugin/;
12264 +
12265 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
12266 +
12267 +/{
12268 + compatible = "brcm,bcm2708";
12269 +
12270 + fragment@0 {
12271 + target = <&sdhost>;
12272 + frag0: __overlay__ {
12273 + brcm,overclock-50 = <0>;
12274 + brcm,pio-limit = <1>;
12275 + status = "okay";
12276 + };
12277 + };
12278 +
12279 + fragment@1 {
12280 + target = <&mmc>;
12281 + __overlay__ {
12282 + status = "disabled";
12283 + };
12284 + };
12285 +
12286 + __overrides__ {
12287 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
12288 + force_pio = <&frag0>,"brcm,force-pio?";
12289 + pio_limit = <&frag0>,"brcm,pio-limit:0";
12290 + debug = <&frag0>,"brcm,debug?";
12291 + };
12292 +};
12293 --- /dev/null
12294 +++ b/arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts
12295 @@ -0,0 +1,63 @@
12296 +/dts-v1/;
12297 +/plugin/;
12298 +
12299 +/* Enable 1-bit SDIO from MMC interface via GPIOs 22-25. Includes sdhost overlay. */
12300 +
12301 +/{
12302 + compatible = "brcm,bcm2708";
12303 +
12304 + fragment@0 {
12305 + target = <&mmc>;
12306 + __overlay__ {
12307 + status = "disabled";
12308 + };
12309 + };
12310 +
12311 + fragment@1 {
12312 + target = <&soc>;
12313 + __overlay__ {
12314 + #address-cells = <1>;
12315 + #size-cells = <1>;
12316 +
12317 + sdio_1bit: sdio@7e300000 {
12318 + compatible = "brcm,bcm2835-mmc",
12319 + "brcm,bcm2835-sdhci";
12320 + reg = <0x7e300000 0x100>;
12321 + interrupts = <2 30>;
12322 + clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
12323 + dmas = <&dma 11>;
12324 + dma-names = "rx-tx";
12325 + brcm,overclock-50 = <0>;
12326 + status = "okay";
12327 + pinctrl-names = "default";
12328 + pinctrl-0 = <&sdio_1bit_pins>;
12329 + non-removable;
12330 + bus-width = <1>;
12331 + };
12332 + };
12333 + };
12334 +
12335 + fragment@2 {
12336 + target = <&gpio>;
12337 + __overlay__ {
12338 + sdio_1bit_pins: sdio_1bit_pins {
12339 + brcm,pins = <22 23 24 25>;
12340 + brcm,function = <7>; /* ALT3 = SD1 */
12341 + brcm,pull = <0 2 2 2>;
12342 + };
12343 + };
12344 + };
12345 +
12346 + fragment@3 {
12347 + target-path = "/aliases";
12348 + __overlay__ {
12349 + mmc1 = "/soc/sdio@7e300000";
12350 + };
12351 + };
12352 +
12353 +
12354 + __overrides__ {
12355 + poll_once = <&sdio_1bit>,"non-removable?";
12356 + sdio_overclock = <&sdio_1bit>,"brcm,overclock-50:0";
12357 + };
12358 +};
12359 --- /dev/null
12360 +++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
12361 @@ -0,0 +1,63 @@
12362 +/dts-v1/;
12363 +/plugin/;
12364 +
12365 +/* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */
12366 +
12367 +/{
12368 + compatible = "brcm,bcm2708";
12369 +
12370 + fragment@0 {
12371 + target = <&mmc>;
12372 + __overlay__ {
12373 + status = "disabled";
12374 + };
12375 + };
12376 +
12377 + fragment@1 {
12378 + target = <&soc>;
12379 + __overlay__ {
12380 + #address-cells = <1>;
12381 + #size-cells = <1>;
12382 +
12383 + sdio_ovl: sdio@7e300000 {
12384 + compatible = "brcm,bcm2835-mmc",
12385 + "brcm,bcm2835-sdhci";
12386 + reg = <0x7e300000 0x100>;
12387 + interrupts = <2 30>;
12388 + clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
12389 + dmas = <&dma 11>;
12390 + dma-names = "rx-tx";
12391 + brcm,overclock-50 = <0>;
12392 + status = "okay";
12393 + pinctrl-names = "default";
12394 + pinctrl-0 = <&sdio_ovl_pins>;
12395 + non-removable;
12396 + bus-width = <1>;
12397 + };
12398 + };
12399 + };
12400 +
12401 + fragment@2 {
12402 + target = <&gpio>;
12403 + __overlay__ {
12404 + sdio_ovl_pins: sdio_ovl_pins {
12405 + brcm,pins = <22 23 24 25 26 27>;
12406 + brcm,function = <7>; /* ALT3 = SD1 */
12407 + brcm,pull = <0 2 2 2 2 2>;
12408 + };
12409 + };
12410 + };
12411 +
12412 + fragment@3 {
12413 + target-path = "/aliases";
12414 + __overlay__ {
12415 + mmc1 = "/soc/sdio@7e300000";
12416 + };
12417 + };
12418 +
12419 + __overrides__ {
12420 + poll_once = <&sdio_ovl>,"non-removable?";
12421 + bus_width = <&sdio_ovl>,"bus-width:0";
12422 + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
12423 + };
12424 +};
12425 --- /dev/null
12426 +++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
12427 @@ -0,0 +1,25 @@
12428 +/dts-v1/;
12429 +/plugin/;
12430 +
12431 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
12432 +
12433 +/{
12434 + compatible = "brcm,bcm2708";
12435 +
12436 + fragment@0 {
12437 + target = <&sdhost>;
12438 + frag0: __overlay__ {
12439 + brcm,overclock-50 = <0>;
12440 + brcm,pio-limit = <1>;
12441 + };
12442 + };
12443 +
12444 + __overrides__ {
12445 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
12446 + force_pio = <&frag0>,"brcm,force-pio?";
12447 + pio_limit = <&frag0>,"brcm,pio-limit:0";
12448 + debug = <&frag0>,"brcm,debug?";
12449 + enable = <&frag0>,"status";
12450 + poll_once = <&frag0>,"non-removable?";
12451 + };
12452 +};
12453 --- /dev/null
12454 +++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
12455 @@ -0,0 +1,18 @@
12456 +// Description: Overlay to enable character device interface for SMI.
12457 +// Author: Luke Wren <luke@raspberrypi.org>
12458 +
12459 +/dts-v1/;
12460 +/plugin/;
12461 +
12462 +/{
12463 + fragment@0 {
12464 + target = <&soc>;
12465 + __overlay__ {
12466 + smi_dev {
12467 + compatible = "brcm,bcm2835-smi-dev";
12468 + smi_handle = <&smi>;
12469 + status = "okay";
12470 + };
12471 + };
12472 + };
12473 +};
12474 --- /dev/null
12475 +++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
12476 @@ -0,0 +1,69 @@
12477 +// Description: Overlay to enable NAND flash through
12478 +// the secondary memory interface
12479 +// Author: Luke Wren
12480 +
12481 +/dts-v1/;
12482 +/plugin/;
12483 +
12484 +/{
12485 + compatible = "brcm,bcm2708";
12486 +
12487 + fragment@0 {
12488 + target = <&smi>;
12489 + __overlay__ {
12490 + pinctrl-names = "default";
12491 + pinctrl-0 = <&smi_pins>;
12492 + status = "okay";
12493 + };
12494 + };
12495 +
12496 + fragment@1 {
12497 + target = <&soc>;
12498 + __overlay__ {
12499 + #address-cells = <1>;
12500 + #size-cells = <1>;
12501 +
12502 + nand: flash@0 {
12503 + compatible = "brcm,bcm2835-smi-nand";
12504 + smi_handle = <&smi>;
12505 + #address-cells = <1>;
12506 + #size-cells = <1>;
12507 + status = "okay";
12508 +
12509 + partition@0 {
12510 + label = "stage2";
12511 + // 128k
12512 + reg = <0 0x20000>;
12513 + read-only;
12514 + };
12515 + partition@1 {
12516 + label = "firmware";
12517 + // 16M
12518 + reg = <0x20000 0x1000000>;
12519 + read-only;
12520 + };
12521 + partition@2 {
12522 + label = "root";
12523 + // 2G (will need to use 64 bit for >=4G)
12524 + reg = <0x1020000 0x80000000>;
12525 + };
12526 + };
12527 + };
12528 + };
12529 +
12530 + fragment@2 {
12531 + target = <&gpio>;
12532 + __overlay__ {
12533 + smi_pins: smi_pins {
12534 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
12535 + 12 13 14 15>;
12536 + /* Alt 1: SMI */
12537 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5
12538 + 5 5 5 5 5>;
12539 + /* /CS, /WE and /OE are pulled high, as they are
12540 + generally active low signals */
12541 + brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
12542 + };
12543 + };
12544 + };
12545 +};
12546 --- /dev/null
12547 +++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
12548 @@ -0,0 +1,37 @@
12549 +// Description: Overlay to enable the secondary memory interface peripheral
12550 +// Author: Luke Wren
12551 +
12552 +/dts-v1/;
12553 +/plugin/;
12554 +
12555 +/{
12556 + compatible = "brcm,bcm2708";
12557 +
12558 + fragment@0 {
12559 + target = <&smi>;
12560 + __overlay__ {
12561 + pinctrl-names = "default";
12562 + pinctrl-0 = <&smi_pins>;
12563 + status = "okay";
12564 + };
12565 + };
12566 +
12567 + fragment@1 {
12568 + target = <&gpio>;
12569 + __overlay__ {
12570 + smi_pins: smi_pins {
12571 + /* Don't configure the top two address bits, as
12572 + these are already used as ID_SD and ID_SC */
12573 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
12574 + 16 17 18 19 20 21 22 23 24 25>;
12575 + /* Alt 0: SMI */
12576 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
12577 + 5 5 5 5 5 5 5 5 5>;
12578 + /* /CS, /WE and /OE are pulled high, as they are
12579 + generally active low signals */
12580 + brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
12581 + 0 0 0 0 0 0 0>;
12582 + };
12583 + };
12584 + };
12585 +};
12586 --- /dev/null
12587 +++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
12588 @@ -0,0 +1,31 @@
12589 +/*
12590 + * Device tree overlay to move spi0 to gpio 35 to 39 on CM
12591 + */
12592 +
12593 +/dts-v1/;
12594 +/plugin/;
12595 +
12596 +/ {
12597 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
12598 +
12599 + fragment@0 {
12600 + target = <&spi0>;
12601 + __overlay__ {
12602 + cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
12603 + };
12604 + };
12605 +
12606 + fragment@1 {
12607 + target = <&spi0_cs_pins>;
12608 + __overlay__ {
12609 + brcm,pins = <36 35>;
12610 + };
12611 + };
12612 +
12613 + fragment@2 {
12614 + target = <&spi0_pins>;
12615 + __overlay__ {
12616 + brcm,pins = <37 38 39>;
12617 + };
12618 + };
12619 +};
12620 --- /dev/null
12621 +++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
12622 @@ -0,0 +1,33 @@
12623 +/dts-v1/;
12624 +/plugin/;
12625 +
12626 +/ {
12627 + compatible = "brcm,bcm2708";
12628 +
12629 + fragment@0 {
12630 + target = <&spidev0>;
12631 + __dormant__ {
12632 + status = "disabled";
12633 + };
12634 + };
12635 +
12636 + fragment@1 {
12637 + target = <&spi0>;
12638 + __dormant__ {
12639 + #address-cells = <1>;
12640 + #size-cells = <0>;
12641 + status = "okay";
12642 +
12643 + rtc-pcf2123@0 {
12644 + compatible = "nxp,rtc-pcf2123";
12645 + spi-max-frequency = <5000000>;
12646 + spi-cs-high = <1>;
12647 + reg = <0>;
12648 + };
12649 + };
12650 + };
12651 +
12652 + __overrides__ {
12653 + pcf2123 = <0>, "=0=1";
12654 + };
12655 +};
12656 --- /dev/null
12657 +++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
12658 @@ -0,0 +1,29 @@
12659 +/dts-v1/;
12660 +/plugin/;
12661 +
12662 +
12663 +/ {
12664 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12665 +
12666 + fragment@0 {
12667 + target = <&spi0_cs_pins>;
12668 + frag0: __overlay__ {
12669 + brcm,pins = <8 7>;
12670 + };
12671 + };
12672 +
12673 + fragment@1 {
12674 + target = <&spi0>;
12675 + frag1: __overlay__ {
12676 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
12677 + status = "okay";
12678 + };
12679 + };
12680 +
12681 + __overrides__ {
12682 + cs0_pin = <&frag0>,"brcm,pins:0",
12683 + <&frag1>,"cs-gpios:4";
12684 + cs1_pin = <&frag0>,"brcm,pins:4",
12685 + <&frag1>,"cs-gpios:16";
12686 + };
12687 +};
12688 --- /dev/null
12689 +++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
12690 @@ -0,0 +1,26 @@
12691 +/*
12692 + * Device tree overlay to re-enable hardware CS for SPI0
12693 + */
12694 +
12695 +/dts-v1/;
12696 +/plugin/;
12697 +
12698 +/ {
12699 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
12700 +
12701 + fragment@0 {
12702 + target = <&spi0>;
12703 + __overlay__ {
12704 + cs-gpios = <0>, <0>;
12705 + status = "okay";
12706 + };
12707 + };
12708 +
12709 + fragment@1 {
12710 + target = <&spi0_cs_pins>;
12711 + __overlay__ {
12712 + brcm,pins = <8 7>;
12713 + brcm,function = <4>; /* alt0 */
12714 + };
12715 + };
12716 +};
12717 --- /dev/null
12718 +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
12719 @@ -0,0 +1,57 @@
12720 +/dts-v1/;
12721 +/plugin/;
12722 +
12723 +
12724 +/ {
12725 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12726 +
12727 + fragment@0 {
12728 + target = <&gpio>;
12729 + __overlay__ {
12730 + spi1_pins: spi1_pins {
12731 + brcm,pins = <19 20 21>;
12732 + brcm,function = <3>; /* alt4 */
12733 + };
12734 +
12735 + spi1_cs_pins: spi1_cs_pins {
12736 + brcm,pins = <18>;
12737 + brcm,function = <1>; /* output */
12738 + };
12739 + };
12740 + };
12741 +
12742 + fragment@1 {
12743 + target = <&spi1>;
12744 + frag1: __overlay__ {
12745 + /* needed to avoid dtc warning */
12746 + #address-cells = <1>;
12747 + #size-cells = <0>;
12748 + pinctrl-names = "default";
12749 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12750 + cs-gpios = <&gpio 18 1>;
12751 + status = "okay";
12752 +
12753 + spidev1_0: spidev@0 {
12754 + compatible = "spidev";
12755 + reg = <0>; /* CE0 */
12756 + #address-cells = <1>;
12757 + #size-cells = <0>;
12758 + spi-max-frequency = <125000000>;
12759 + status = "okay";
12760 + };
12761 + };
12762 + };
12763 +
12764 + fragment@2 {
12765 + target = <&aux>;
12766 + __overlay__ {
12767 + status = "okay";
12768 + };
12769 + };
12770 +
12771 + __overrides__ {
12772 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12773 + <&frag1>,"cs-gpios:4";
12774 + cs0_spidev = <&spidev1_0>,"status";
12775 + };
12776 +};
12777 --- /dev/null
12778 +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
12779 @@ -0,0 +1,69 @@
12780 +/dts-v1/;
12781 +/plugin/;
12782 +
12783 +
12784 +/ {
12785 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12786 +
12787 + fragment@0 {
12788 + target = <&gpio>;
12789 + __overlay__ {
12790 + spi1_pins: spi1_pins {
12791 + brcm,pins = <19 20 21>;
12792 + brcm,function = <3>; /* alt4 */
12793 + };
12794 +
12795 + spi1_cs_pins: spi1_cs_pins {
12796 + brcm,pins = <18 17>;
12797 + brcm,function = <1>; /* output */
12798 + };
12799 + };
12800 + };
12801 +
12802 + fragment@1 {
12803 + target = <&spi1>;
12804 + frag1: __overlay__ {
12805 + /* needed to avoid dtc warning */
12806 + #address-cells = <1>;
12807 + #size-cells = <0>;
12808 + pinctrl-names = "default";
12809 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12810 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
12811 + status = "okay";
12812 +
12813 + spidev1_0: spidev@0 {
12814 + compatible = "spidev";
12815 + reg = <0>; /* CE0 */
12816 + #address-cells = <1>;
12817 + #size-cells = <0>;
12818 + spi-max-frequency = <125000000>;
12819 + status = "okay";
12820 + };
12821 +
12822 + spidev1_1: spidev@1 {
12823 + compatible = "spidev";
12824 + reg = <1>; /* CE1 */
12825 + #address-cells = <1>;
12826 + #size-cells = <0>;
12827 + spi-max-frequency = <125000000>;
12828 + status = "okay";
12829 + };
12830 + };
12831 + };
12832 +
12833 + fragment@2 {
12834 + target = <&aux>;
12835 + __overlay__ {
12836 + status = "okay";
12837 + };
12838 + };
12839 +
12840 + __overrides__ {
12841 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12842 + <&frag1>,"cs-gpios:4";
12843 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
12844 + <&frag1>,"cs-gpios:16";
12845 + cs0_spidev = <&spidev1_0>,"status";
12846 + cs1_spidev = <&spidev1_1>,"status";
12847 + };
12848 +};
12849 --- /dev/null
12850 +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
12851 @@ -0,0 +1,81 @@
12852 +/dts-v1/;
12853 +/plugin/;
12854 +
12855 +
12856 +/ {
12857 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12858 +
12859 + fragment@0 {
12860 + target = <&gpio>;
12861 + __overlay__ {
12862 + spi1_pins: spi1_pins {
12863 + brcm,pins = <19 20 21>;
12864 + brcm,function = <3>; /* alt4 */
12865 + };
12866 +
12867 + spi1_cs_pins: spi1_cs_pins {
12868 + brcm,pins = <18 17 16>;
12869 + brcm,function = <1>; /* output */
12870 + };
12871 + };
12872 + };
12873 +
12874 + fragment@1 {
12875 + target = <&spi1>;
12876 + frag1: __overlay__ {
12877 + /* needed to avoid dtc warning */
12878 + #address-cells = <1>;
12879 + #size-cells = <0>;
12880 + pinctrl-names = "default";
12881 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12882 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
12883 + status = "okay";
12884 +
12885 + spidev1_0: spidev@0 {
12886 + compatible = "spidev";
12887 + reg = <0>; /* CE0 */
12888 + #address-cells = <1>;
12889 + #size-cells = <0>;
12890 + spi-max-frequency = <125000000>;
12891 + status = "okay";
12892 + };
12893 +
12894 + spidev1_1: spidev@1 {
12895 + compatible = "spidev";
12896 + reg = <1>; /* CE1 */
12897 + #address-cells = <1>;
12898 + #size-cells = <0>;
12899 + spi-max-frequency = <125000000>;
12900 + status = "okay";
12901 + };
12902 +
12903 + spidev1_2: spidev@2 {
12904 + compatible = "spidev";
12905 + reg = <2>; /* CE2 */
12906 + #address-cells = <1>;
12907 + #size-cells = <0>;
12908 + spi-max-frequency = <125000000>;
12909 + status = "okay";
12910 + };
12911 + };
12912 + };
12913 +
12914 + fragment@2 {
12915 + target = <&aux>;
12916 + __overlay__ {
12917 + status = "okay";
12918 + };
12919 + };
12920 +
12921 + __overrides__ {
12922 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12923 + <&frag1>,"cs-gpios:4";
12924 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
12925 + <&frag1>,"cs-gpios:16";
12926 + cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
12927 + <&frag1>,"cs-gpios:28";
12928 + cs0_spidev = <&spidev1_0>,"status";
12929 + cs1_spidev = <&spidev1_1>,"status";
12930 + cs2_spidev = <&spidev1_2>,"status";
12931 + };
12932 +};
12933 --- /dev/null
12934 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
12935 @@ -0,0 +1,57 @@
12936 +/dts-v1/;
12937 +/plugin/;
12938 +
12939 +
12940 +/ {
12941 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12942 +
12943 + fragment@0 {
12944 + target = <&gpio>;
12945 + __overlay__ {
12946 + spi2_pins: spi2_pins {
12947 + brcm,pins = <40 41 42>;
12948 + brcm,function = <3>; /* alt4 */
12949 + };
12950 +
12951 + spi2_cs_pins: spi2_cs_pins {
12952 + brcm,pins = <43>;
12953 + brcm,function = <1>; /* output */
12954 + };
12955 + };
12956 + };
12957 +
12958 + fragment@1 {
12959 + target = <&spi2>;
12960 + frag1: __overlay__ {
12961 + /* needed to avoid dtc warning */
12962 + #address-cells = <1>;
12963 + #size-cells = <0>;
12964 + pinctrl-names = "default";
12965 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
12966 + cs-gpios = <&gpio 43 1>;
12967 + status = "okay";
12968 +
12969 + spidev2_0: spidev@0 {
12970 + compatible = "spidev";
12971 + reg = <0>; /* CE0 */
12972 + #address-cells = <1>;
12973 + #size-cells = <0>;
12974 + spi-max-frequency = <125000000>;
12975 + status = "okay";
12976 + };
12977 + };
12978 + };
12979 +
12980 + fragment@2 {
12981 + target = <&aux>;
12982 + __overlay__ {
12983 + status = "okay";
12984 + };
12985 + };
12986 +
12987 + __overrides__ {
12988 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
12989 + <&frag1>,"cs-gpios:4";
12990 + cs0_spidev = <&spidev2_0>,"status";
12991 + };
12992 +};
12993 --- /dev/null
12994 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
12995 @@ -0,0 +1,69 @@
12996 +/dts-v1/;
12997 +/plugin/;
12998 +
12999 +
13000 +/ {
13001 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13002 +
13003 + fragment@0 {
13004 + target = <&gpio>;
13005 + __overlay__ {
13006 + spi2_pins: spi2_pins {
13007 + brcm,pins = <40 41 42>;
13008 + brcm,function = <3>; /* alt4 */
13009 + };
13010 +
13011 + spi2_cs_pins: spi2_cs_pins {
13012 + brcm,pins = <43 44>;
13013 + brcm,function = <1>; /* output */
13014 + };
13015 + };
13016 + };
13017 +
13018 + fragment@1 {
13019 + target = <&spi2>;
13020 + frag1: __overlay__ {
13021 + /* needed to avoid dtc warning */
13022 + #address-cells = <1>;
13023 + #size-cells = <0>;
13024 + pinctrl-names = "default";
13025 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
13026 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
13027 + status = "okay";
13028 +
13029 + spidev2_0: spidev@0 {
13030 + compatible = "spidev";
13031 + reg = <0>; /* CE0 */
13032 + #address-cells = <1>;
13033 + #size-cells = <0>;
13034 + spi-max-frequency = <125000000>;
13035 + status = "okay";
13036 + };
13037 +
13038 + spidev2_1: spidev@1 {
13039 + compatible = "spidev";
13040 + reg = <1>; /* CE1 */
13041 + #address-cells = <1>;
13042 + #size-cells = <0>;
13043 + spi-max-frequency = <125000000>;
13044 + status = "okay";
13045 + };
13046 + };
13047 + };
13048 +
13049 + fragment@2 {
13050 + target = <&aux>;
13051 + __overlay__ {
13052 + status = "okay";
13053 + };
13054 + };
13055 +
13056 + __overrides__ {
13057 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13058 + <&frag1>,"cs-gpios:4";
13059 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
13060 + <&frag1>,"cs-gpios:16";
13061 + cs0_spidev = <&spidev2_0>,"status";
13062 + cs1_spidev = <&spidev2_1>,"status";
13063 + };
13064 +};
13065 --- /dev/null
13066 +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
13067 @@ -0,0 +1,81 @@
13068 +/dts-v1/;
13069 +/plugin/;
13070 +
13071 +
13072 +/ {
13073 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13074 +
13075 + fragment@0 {
13076 + target = <&gpio>;
13077 + __overlay__ {
13078 + spi2_pins: spi2_pins {
13079 + brcm,pins = <40 41 42>;
13080 + brcm,function = <3>; /* alt4 */
13081 + };
13082 +
13083 + spi2_cs_pins: spi2_cs_pins {
13084 + brcm,pins = <43 44 45>;
13085 + brcm,function = <1>; /* output */
13086 + };
13087 + };
13088 + };
13089 +
13090 + fragment@1 {
13091 + target = <&spi2>;
13092 + frag1: __overlay__ {
13093 + /* needed to avoid dtc warning */
13094 + #address-cells = <1>;
13095 + #size-cells = <0>;
13096 + pinctrl-names = "default";
13097 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
13098 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
13099 + status = "okay";
13100 +
13101 + spidev2_0: spidev@0 {
13102 + compatible = "spidev";
13103 + reg = <0>; /* CE0 */
13104 + #address-cells = <1>;
13105 + #size-cells = <0>;
13106 + spi-max-frequency = <125000000>;
13107 + status = "okay";
13108 + };
13109 +
13110 + spidev2_1: spidev@1 {
13111 + compatible = "spidev";
13112 + reg = <1>; /* CE1 */
13113 + #address-cells = <1>;
13114 + #size-cells = <0>;
13115 + spi-max-frequency = <125000000>;
13116 + status = "okay";
13117 + };
13118 +
13119 + spidev2_2: spidev@2 {
13120 + compatible = "spidev";
13121 + reg = <2>; /* CE2 */
13122 + #address-cells = <1>;
13123 + #size-cells = <0>;
13124 + spi-max-frequency = <125000000>;
13125 + status = "okay";
13126 + };
13127 + };
13128 + };
13129 +
13130 + fragment@2 {
13131 + target = <&aux>;
13132 + __overlay__ {
13133 + status = "okay";
13134 + };
13135 + };
13136 +
13137 + __overrides__ {
13138 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13139 + <&frag1>,"cs-gpios:4";
13140 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
13141 + <&frag1>,"cs-gpios:16";
13142 + cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
13143 + <&frag1>,"cs-gpios:28";
13144 + cs0_spidev = <&spidev2_0>,"status";
13145 + cs1_spidev = <&spidev2_1>,"status";
13146 + cs2_spidev = <&spidev2_2>,"status";
13147 + };
13148 +};
13149 --- /dev/null
13150 +++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
13151 @@ -0,0 +1,73 @@
13152 +// Definitions for SuperAudioBoard
13153 +/dts-v1/;
13154 +/plugin/;
13155 +
13156 +/ {
13157 + compatible = "brcm,bcm2708";
13158 +
13159 + fragment@0 {
13160 + target = <&sound>;
13161 + __overlay__ {
13162 + compatible = "simple-audio-card";
13163 + i2s-controller = <&i2s>;
13164 + status = "okay";
13165 +
13166 + simple-audio-card,name = "SuperAudioBoard";
13167 +
13168 + simple-audio-card,widgets =
13169 + "Line", "Line In",
13170 + "Line", "Line Out";
13171 +
13172 + simple-audio-card,routing =
13173 + "Line Out","AOUTA+",
13174 + "Line Out","AOUTA-",
13175 + "Line Out","AOUTB+",
13176 + "Line Out","AOUTB-",
13177 + "AINA","Line In",
13178 + "AINB","Line In";
13179 +
13180 + simple-audio-card,format = "i2s";
13181 +
13182 + simple-audio-card,bitclock-master = <&sound_master>;
13183 + simple-audio-card,frame-master = <&sound_master>;
13184 +
13185 + simple-audio-card,cpu {
13186 + sound-dai = <&i2s>;
13187 + dai-tdm-slot-num = <2>;
13188 + dai-tdm-slot-width = <32>;
13189 + };
13190 +
13191 + sound_master: simple-audio-card,codec {
13192 + sound-dai = <&cs4271>;
13193 + system-clock-frequency = <24576000>;
13194 + };
13195 + };
13196 + };
13197 +
13198 + fragment@1 {
13199 + target = <&i2s>;
13200 + __overlay__ {
13201 + status = "okay";
13202 + };
13203 + };
13204 +
13205 + fragment@2 {
13206 + target = <&i2c1>;
13207 + __overlay__ {
13208 + #address-cells = <1>;
13209 + #size-cells = <0>;
13210 + status = "okay";
13211 +
13212 + cs4271: cs4271@10 {
13213 + #sound-dai-cells = <0>;
13214 + compatible = "cirrus,cs4271";
13215 + reg = <0x10>;
13216 + status = "okay";
13217 + reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
13218 + };
13219 + };
13220 + };
13221 + __overrides__ {
13222 + gpiopin = <&cs4271>,"reset-gpio:4";
13223 + };
13224 +};
13225 --- /dev/null
13226 +++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
13227 @@ -0,0 +1,1706 @@
13228 +// Definitions for SX150x I2C GPIO Expanders from Semtech
13229 +
13230 +// dtparams:
13231 +// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
13232 +// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
13233 +// depend on the device variant.
13234 +// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
13235 +// For SX1503 and SX1506, <m> may be 20.
13236 +// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
13237 +// For SX1508, <m> may be 20, 21, 22 or 23.
13238 +// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
13239 +// specifies the GPIO pin to which NINT output of SX150X is connected.
13240 +//
13241 +//
13242 +// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
13243 +// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
13244 +//
13245 +// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
13246 +// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
13247 +
13248 +/dts-v1/;
13249 +/plugin/;
13250 +
13251 +/ {
13252 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13253 +
13254 + // Enable I2C#0 interface
13255 + fragment@0 {
13256 + target = <&i2c0>;
13257 + __dormant__ {
13258 + status = "okay";
13259 + };
13260 + };
13261 +
13262 + // Enable I2C#1 interface
13263 + fragment@1 {
13264 + target = <&i2c1>;
13265 + __dormant__ {
13266 + status = "okay";
13267 + };
13268 + };
13269 +
13270 + // Enable a SX1501 on I2C#0 at slave addr 0x20
13271 + fragment@2 {
13272 + target = <&i2c0>;
13273 + __dormant__ {
13274 + #address-cells = <1>;
13275 + #size-cells = <0>;
13276 +
13277 + sx1501_0_20: sx150x@20 {
13278 + compatible = "semtech,sx1501q";
13279 + reg = <0x20>;
13280 + gpio-controller;
13281 + #gpio-cells = <2>;
13282 + #interrupt-cells = <2>;
13283 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
13284 + 2nd word is 2 for falling-edge triggered */
13285 + status = "okay";
13286 + };
13287 + };
13288 + };
13289 +
13290 + // Enable a SX1501 on I2C#1 at slave addr 0x20
13291 + fragment@3 {
13292 + target = <&i2c1>;
13293 + __dormant__ {
13294 + #address-cells = <1>;
13295 + #size-cells = <0>;
13296 +
13297 + sx1501_1_20: sx150x@20 {
13298 + compatible = "semtech,sx1501q";
13299 + reg = <0x20>;
13300 + gpio-controller;
13301 + #gpio-cells = <2>;
13302 + #interrupt-cells = <2>;
13303 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
13304 + 2nd word is 2 for falling-edge triggered */
13305 + status = "okay";
13306 + };
13307 + };
13308 + };
13309 +
13310 + // Enable a SX1501 on I2C#0 at slave addr 0x21
13311 + fragment@4 {
13312 + target = <&i2c0>;
13313 + __dormant__ {
13314 + #address-cells = <1>;
13315 + #size-cells = <0>;
13316 +
13317 + sx1501_0_21: sx150x@21 {
13318 + compatible = "semtech,sx1501q";
13319 + reg = <0x21>;
13320 + gpio-controller;
13321 + #gpio-cells = <2>;
13322 + #interrupt-cells = <2>;
13323 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
13324 + 2nd word is 2 for falling-edge triggered */
13325 + status = "okay";
13326 + };
13327 + };
13328 + };
13329 +
13330 + // Enable a SX1501 on I2C#1 at slave addr 0x21
13331 + fragment@5 {
13332 + target = <&i2c1>;
13333 + __dormant__ {
13334 + #address-cells = <1>;
13335 + #size-cells = <0>;
13336 +
13337 + sx1501_1_21: sx150x@21 {
13338 + compatible = "semtech,sx1501q";
13339 + reg = <0x21>;
13340 + gpio-controller;
13341 + #gpio-cells = <2>;
13342 + #interrupt-cells = <2>;
13343 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
13344 + 2nd word is 2 for falling-edge triggered */
13345 + status = "okay";
13346 + };
13347 + };
13348 + };
13349 +
13350 + // Enable a SX1502 on I2C#0 at slave addr 0x20
13351 + fragment@6 {
13352 + target = <&i2c0>;
13353 + __dormant__ {
13354 + #address-cells = <1>;
13355 + #size-cells = <0>;
13356 +
13357 + sx1502_0_20: sx150x@20 {
13358 + compatible = "semtech,sx1502q";
13359 + reg = <0x20>;
13360 + gpio-controller;
13361 + #gpio-cells = <2>;
13362 + #interrupt-cells = <2>;
13363 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
13364 + 2nd word is 2 for falling-edge triggered */
13365 + status = "okay";
13366 + };
13367 + };
13368 + };
13369 +
13370 + // Enable a SX1502 on I2C#1 at slave addr 0x20
13371 + fragment@7 {
13372 + target = <&i2c1>;
13373 + __dormant__ {
13374 + #address-cells = <1>;
13375 + #size-cells = <0>;
13376 +
13377 + sx1502_1_20: sx150x@20 {
13378 + compatible = "semtech,sx1502q";
13379 + reg = <0x20>;
13380 + gpio-controller;
13381 + #gpio-cells = <2>;
13382 + #interrupt-cells = <2>;
13383 + interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
13384 + 2nd word is 2 for falling-edge triggered */
13385 + status = "okay";
13386 + };
13387 + };
13388 + };
13389 +
13390 + // Enable a SX1502 on I2C#0 at slave addr 0x21
13391 + fragment@8 {
13392 + target = <&i2c0>;
13393 + __dormant__ {
13394 + #address-cells = <1>;
13395 + #size-cells = <0>;
13396 +
13397 + sx1502_0_21: sx150x@21 {
13398 + compatible = "semtech,sx1502q";
13399 + reg = <0x21>;
13400 + gpio-controller;
13401 + #gpio-cells = <2>;
13402 + #interrupt-cells = <2>;
13403 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
13404 + 2nd word is 2 for falling-edge triggered */
13405 + status = "okay";
13406 + };
13407 + };
13408 + };
13409 +
13410 + // Enable a SX1502 on I2C#1 at slave addr 0x21
13411 + fragment@9 {
13412 + target = <&i2c1>;
13413 + __dormant__ {
13414 + #address-cells = <1>;
13415 + #size-cells = <0>;
13416 +
13417 + sx1502_1_21: sx150x@21 {
13418 + compatible = "semtech,sx1502q";
13419 + reg = <0x21>;
13420 + gpio-controller;
13421 + #gpio-cells = <2>;
13422 + #interrupt-cells = <2>;
13423 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
13424 + 2nd word is 2 for falling-edge triggered */
13425 + status = "okay";
13426 + };
13427 + };
13428 + };
13429 +
13430 + // Enable a SX1503 on I2C#0 at slave addr 0x20
13431 + fragment@10 {
13432 + target = <&i2c0>;
13433 + __dormant__ {
13434 + #address-cells = <1>;
13435 + #size-cells = <0>;
13436 +
13437 + sx1503_0_20: sx150x@20 {
13438 + compatible = "semtech,sx1503q";
13439 + reg = <0x20>;
13440 + gpio-controller;
13441 + #gpio-cells = <2>;
13442 + #interrupt-cells = <2>;
13443 + interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
13444 + 2nd word is 2 for falling-edge triggered */
13445 + status = "okay";
13446 + };
13447 + };
13448 + };
13449 +
13450 + // Enable a SX1503 on I2C#1 at slave addr 0x20
13451 + fragment@11 {
13452 + target = <&i2c1>;
13453 + __dormant__ {
13454 + #address-cells = <1>;
13455 + #size-cells = <0>;
13456 +
13457 + sx1503_1_20: sx150x@20 {
13458 + compatible = "semtech,sx1503q";
13459 + reg = <0x20>;
13460 + gpio-controller;
13461 + #gpio-cells = <2>;
13462 + #interrupt-cells = <2>;
13463 + interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
13464 + 2nd word is 2 for falling-edge triggered */
13465 + status = "okay";
13466 + };
13467 + };
13468 + };
13469 +
13470 + // Enable a SX1504 on I2C#0 at slave addr 0x20
13471 + fragment@12 {
13472 + target = <&i2c0>;
13473 + __dormant__ {
13474 + #address-cells = <1>;
13475 + #size-cells = <0>;
13476 +
13477 + sx1504_0_20: sx150x@20 {
13478 + compatible = "semtech,sx1504q";
13479 + reg = <0x20>;
13480 + gpio-controller;
13481 + #gpio-cells = <2>;
13482 + #interrupt-cells = <2>;
13483 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
13484 + 2nd word is 2 for falling-edge triggered */
13485 + status = "okay";
13486 + };
13487 + };
13488 + };
13489 +
13490 + // Enable a SX1504 on I2C#1 at slave addr 0x20
13491 + fragment@13 {
13492 + target = <&i2c1>;
13493 + __dormant__ {
13494 + #address-cells = <1>;
13495 + #size-cells = <0>;
13496 +
13497 + sx1504_1_20: sx150x@20 {
13498 + compatible = "semtech,sx1504q";
13499 + reg = <0x20>;
13500 + gpio-controller;
13501 + #gpio-cells = <2>;
13502 + #interrupt-cells = <2>;
13503 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
13504 + 2nd word is 2 for falling-edge triggered */
13505 + status = "okay";
13506 + };
13507 + };
13508 + };
13509 +
13510 + // Enable a SX1504 on I2C#0 at slave addr 0x21
13511 + fragment@14 {
13512 + target = <&i2c0>;
13513 + __dormant__ {
13514 + #address-cells = <1>;
13515 + #size-cells = <0>;
13516 +
13517 + sx1504_0_21: sx150x@21 {
13518 + compatible = "semtech,sx1504q";
13519 + reg = <0x21>;
13520 + gpio-controller;
13521 + #gpio-cells = <2>;
13522 + #interrupt-cells = <2>;
13523 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
13524 + 2nd word is 2 for falling-edge triggered */
13525 + status = "okay";
13526 + };
13527 + };
13528 + };
13529 +
13530 + // Enable a SX1504 on I2C#1 at slave addr 0x21
13531 + fragment@15 {
13532 + target = <&i2c1>;
13533 + __dormant__ {
13534 + #address-cells = <1>;
13535 + #size-cells = <0>;
13536 +
13537 + sx1504_1_21: sx150x@21 {
13538 + compatible = "semtech,sx1504q";
13539 + reg = <0x21>;
13540 + gpio-controller;
13541 + #gpio-cells = <2>;
13542 + #interrupt-cells = <2>;
13543 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
13544 + 2nd word is 2 for falling-edge triggered */
13545 + status = "okay";
13546 + };
13547 + };
13548 + };
13549 +
13550 + // Enable a SX1505 on I2C#0 at slave addr 0x20
13551 + fragment@16 {
13552 + target = <&i2c0>;
13553 + __dormant__ {
13554 + #address-cells = <1>;
13555 + #size-cells = <0>;
13556 +
13557 + sx1505_0_20: sx150x@20 {
13558 + compatible = "semtech,sx1505q";
13559 + reg = <0x20>;
13560 + gpio-controller;
13561 + #gpio-cells = <2>;
13562 + #interrupt-cells = <2>;
13563 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
13564 + 2nd word is 2 for falling-edge triggered */
13565 + status = "okay";
13566 + };
13567 + };
13568 + };
13569 +
13570 + // Enable a SX1505 on I2C#1 at slave addr 0x20
13571 + fragment@17 {
13572 + target = <&i2c1>;
13573 + __dormant__ {
13574 + #address-cells = <1>;
13575 + #size-cells = <0>;
13576 +
13577 + sx1505_1_20: sx150x@20 {
13578 + compatible = "semtech,sx1505q";
13579 + reg = <0x20>;
13580 + gpio-controller;
13581 + #gpio-cells = <2>;
13582 + #interrupt-cells = <2>;
13583 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
13584 + 2nd word is 2 for falling-edge triggered */
13585 + status = "okay";
13586 + };
13587 + };
13588 + };
13589 +
13590 + // Enable a SX1505 on I2C#0 at slave addr 0x21
13591 + fragment@18 {
13592 + target = <&i2c0>;
13593 + __dormant__ {
13594 + #address-cells = <1>;
13595 + #size-cells = <0>;
13596 +
13597 + sx1505_0_21: sx150x@21 {
13598 + compatible = "semtech,sx1505q";
13599 + reg = <0x21>;
13600 + gpio-controller;
13601 + #gpio-cells = <2>;
13602 + #interrupt-cells = <2>;
13603 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
13604 + 2nd word is 2 for falling-edge triggered */
13605 + status = "okay";
13606 + };
13607 + };
13608 + };
13609 +
13610 + // Enable a SX1505 on I2C#1 at slave addr 0x21
13611 + fragment@19 {
13612 + target = <&i2c1>;
13613 + __dormant__ {
13614 + #address-cells = <1>;
13615 + #size-cells = <0>;
13616 +
13617 + sx1505_1_21: sx150x@21 {
13618 + compatible = "semtech,sx1505q";
13619 + reg = <0x21>;
13620 + gpio-controller;
13621 + #gpio-cells = <2>;
13622 + #interrupt-cells = <2>;
13623 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
13624 + 2nd word is 2 for falling-edge triggered */
13625 + status = "okay";
13626 + };
13627 + };
13628 + };
13629 +
13630 + // Enable a SX1506 on I2C#0 at slave addr 0x20
13631 + fragment@20 {
13632 + target = <&i2c0>;
13633 + __dormant__ {
13634 + #address-cells = <1>;
13635 + #size-cells = <0>;
13636 +
13637 + sx1506_0_20: sx150x@20 {
13638 + compatible = "semtech,sx1506q";
13639 + reg = <0x20>;
13640 + gpio-controller;
13641 + #gpio-cells = <2>;
13642 + #interrupt-cells = <2>;
13643 + interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
13644 + 2nd word is 2 for falling-edge triggered */
13645 + status = "okay";
13646 + };
13647 + };
13648 + };
13649 +
13650 + // Enable a SX1506 on I2C#1 at slave addr 0x20
13651 + fragment@21 {
13652 + target = <&i2c1>;
13653 + __dormant__ {
13654 + #address-cells = <1>;
13655 + #size-cells = <0>;
13656 +
13657 + sx1506_1_20: sx150x@20 {
13658 + compatible = "semtech,sx1506q";
13659 + reg = <0x20>;
13660 + gpio-controller;
13661 + #gpio-cells = <2>;
13662 + #interrupt-cells = <2>;
13663 + interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
13664 + 2nd word is 2 for falling-edge triggered */
13665 + status = "okay";
13666 + };
13667 + };
13668 + };
13669 +
13670 + // Enable a SX1507 on I2C#0 at slave addr 0x3E
13671 + fragment@22 {
13672 + target = <&i2c0>;
13673 + __dormant__ {
13674 + #address-cells = <1>;
13675 + #size-cells = <0>;
13676 +
13677 + sx1507_0_3E: sx150x@3E {
13678 + compatible = "semtech,sx1507q";
13679 + reg = <0x3E>;
13680 + gpio-controller;
13681 + #gpio-cells = <2>;
13682 + #interrupt-cells = <2>;
13683 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
13684 + 2nd word is 2 for falling-edge triggered */
13685 + status = "okay";
13686 + };
13687 + };
13688 + };
13689 +
13690 + // Enable a SX1507 on I2C#1 at slave addr 0x3E
13691 + fragment@23 {
13692 + target = <&i2c1>;
13693 + __dormant__ {
13694 + #address-cells = <1>;
13695 + #size-cells = <0>;
13696 +
13697 + sx1507_1_3E: sx150x@3E {
13698 + compatible = "semtech,sx1507q";
13699 + reg = <0x3E>;
13700 + gpio-controller;
13701 + #gpio-cells = <2>;
13702 + #interrupt-cells = <2>;
13703 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
13704 + 2nd word is 2 for falling-edge triggered */
13705 + status = "okay";
13706 + };
13707 + };
13708 + };
13709 +
13710 + // Enable a SX1507 on I2C#0 at slave addr 0x3F
13711 + fragment@24 {
13712 + target = <&i2c0>;
13713 + __dormant__ {
13714 + #address-cells = <1>;
13715 + #size-cells = <0>;
13716 +
13717 + sx1507_0_3F: sx150x@3F {
13718 + compatible = "semtech,sx1507q";
13719 + reg = <0x3F>;
13720 + gpio-controller;
13721 + #gpio-cells = <2>;
13722 + #interrupt-cells = <2>;
13723 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
13724 + 2nd word is 2 for falling-edge triggered */
13725 + status = "okay";
13726 + };
13727 + };
13728 + };
13729 +
13730 + // Enable a SX1507 on I2C#1 at slave addr 0x3F
13731 + fragment@25 {
13732 + target = <&i2c1>;
13733 + __dormant__ {
13734 + #address-cells = <1>;
13735 + #size-cells = <0>;
13736 +
13737 + sx1507_1_3F: sx150x@3F {
13738 + compatible = "semtech,sx1507q";
13739 + reg = <0x3F>;
13740 + gpio-controller;
13741 + #gpio-cells = <2>;
13742 + #interrupt-cells = <2>;
13743 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
13744 + 2nd word is 2 for falling-edge triggered */
13745 + status = "okay";
13746 + };
13747 + };
13748 + };
13749 +
13750 + // Enable a SX1507 on I2C#0 at slave addr 0x70
13751 + fragment@26 {
13752 + target = <&i2c0>;
13753 + __dormant__ {
13754 + #address-cells = <1>;
13755 + #size-cells = <0>;
13756 +
13757 + sx1507_0_70: sx150x@70 {
13758 + compatible = "semtech,sx1507q";
13759 + reg = <0x70>;
13760 + gpio-controller;
13761 + #gpio-cells = <2>;
13762 + #interrupt-cells = <2>;
13763 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
13764 + 2nd word is 2 for falling-edge triggered */
13765 + status = "okay";
13766 + };
13767 + };
13768 + };
13769 +
13770 + // Enable a SX1507 on I2C#1 at slave addr 0x70
13771 + fragment@27 {
13772 + target = <&i2c1>;
13773 + __dormant__ {
13774 + #address-cells = <1>;
13775 + #size-cells = <0>;
13776 +
13777 + sx1507_1_70: sx150x@70 {
13778 + compatible = "semtech,sx1507q";
13779 + reg = <0x70>;
13780 + gpio-controller;
13781 + #gpio-cells = <2>;
13782 + #interrupt-cells = <2>;
13783 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
13784 + 2nd word is 2 for falling-edge triggered */
13785 + status = "okay";
13786 + };
13787 + };
13788 + };
13789 +
13790 + // Enable a SX1507 on I2C#0 at slave addr 0x71
13791 + fragment@28 {
13792 + target = <&i2c0>;
13793 + __dormant__ {
13794 + #address-cells = <1>;
13795 + #size-cells = <0>;
13796 +
13797 + sx1507_0_71: sx150x@71 {
13798 + compatible = "semtech,sx1507q";
13799 + reg = <0x71>;
13800 + gpio-controller;
13801 + #gpio-cells = <2>;
13802 + #interrupt-cells = <2>;
13803 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
13804 + 2nd word is 2 for falling-edge triggered */
13805 + status = "okay";
13806 + };
13807 + };
13808 + };
13809 +
13810 + // Enable a SX1507 on I2C#1 at slave addr 0x71
13811 + fragment@29 {
13812 + target = <&i2c1>;
13813 + __dormant__ {
13814 + #address-cells = <1>;
13815 + #size-cells = <0>;
13816 +
13817 + sx1507_1_71: sx150x@71 {
13818 + compatible = "semtech,sx1507q";
13819 + reg = <0x71>;
13820 + gpio-controller;
13821 + #gpio-cells = <2>;
13822 + #interrupt-cells = <2>;
13823 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
13824 + 2nd word is 2 for falling-edge triggered */
13825 + status = "okay";
13826 + };
13827 + };
13828 + };
13829 +
13830 + // Enable a SX1508 on I2C#0 at slave addr 0x20
13831 + fragment@30 {
13832 + target = <&i2c0>;
13833 + __dormant__ {
13834 + #address-cells = <1>;
13835 + #size-cells = <0>;
13836 +
13837 + sx1508_0_20: sx150x@20 {
13838 + compatible = "semtech,sx1508q";
13839 + reg = <0x20>;
13840 + gpio-controller;
13841 + #gpio-cells = <2>;
13842 + #interrupt-cells = <2>;
13843 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
13844 + 2nd word is 2 for falling-edge triggered */
13845 + status = "okay";
13846 + };
13847 + };
13848 + };
13849 +
13850 + // Enable a SX1508 on I2C#1 at slave addr 0x20
13851 + fragment@31 {
13852 + target = <&i2c1>;
13853 + __dormant__ {
13854 + #address-cells = <1>;
13855 + #size-cells = <0>;
13856 +
13857 + sx1508_1_20: sx150x@20 {
13858 + compatible = "semtech,sx1508q";
13859 + reg = <0x20>;
13860 + gpio-controller;
13861 + #gpio-cells = <2>;
13862 + #interrupt-cells = <2>;
13863 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
13864 + 2nd word is 2 for falling-edge triggered */
13865 + status = "okay";
13866 + };
13867 + };
13868 + };
13869 +
13870 + // Enable a SX1508 on I2C#0 at slave addr 0x21
13871 + fragment@32 {
13872 + target = <&i2c0>;
13873 + __dormant__ {
13874 + #address-cells = <1>;
13875 + #size-cells = <0>;
13876 +
13877 + sx1508_0_21: sx150x@21 {
13878 + compatible = "semtech,sx1508q";
13879 + reg = <0x21>;
13880 + gpio-controller;
13881 + #gpio-cells = <2>;
13882 + #interrupt-cells = <2>;
13883 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
13884 + 2nd word is 2 for falling-edge triggered */
13885 + status = "okay";
13886 + };
13887 + };
13888 + };
13889 +
13890 + // Enable a SX1508 on I2C#1 at slave addr 0x21
13891 + fragment@33 {
13892 + target = <&i2c1>;
13893 + __dormant__ {
13894 + #address-cells = <1>;
13895 + #size-cells = <0>;
13896 +
13897 + sx1508_1_21: sx150x@21 {
13898 + compatible = "semtech,sx1508q";
13899 + reg = <0x21>;
13900 + gpio-controller;
13901 + #gpio-cells = <2>;
13902 + #interrupt-cells = <2>;
13903 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
13904 + 2nd word is 2 for falling-edge triggered */
13905 + status = "okay";
13906 + };
13907 + };
13908 + };
13909 +
13910 + // Enable a SX1508 on I2C#0 at slave addr 0x22
13911 + fragment@34 {
13912 + target = <&i2c0>;
13913 + __dormant__ {
13914 + #address-cells = <1>;
13915 + #size-cells = <0>;
13916 +
13917 + sx1508_0_22: sx150x@22 {
13918 + compatible = "semtech,sx1508q";
13919 + reg = <0x22>;
13920 + gpio-controller;
13921 + #gpio-cells = <2>;
13922 + #interrupt-cells = <2>;
13923 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
13924 + 2nd word is 2 for falling-edge triggered */
13925 + status = "okay";
13926 + };
13927 + };
13928 + };
13929 +
13930 + // Enable a SX1508 on I2C#1 at slave addr 0x22
13931 + fragment@35 {
13932 + target = <&i2c1>;
13933 + __dormant__ {
13934 + #address-cells = <1>;
13935 + #size-cells = <0>;
13936 +
13937 + sx1508_1_22: sx150x@22 {
13938 + compatible = "semtech,sx1508q";
13939 + reg = <0x22>;
13940 + gpio-controller;
13941 + #gpio-cells = <2>;
13942 + #interrupt-cells = <2>;
13943 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
13944 + 2nd word is 2 for falling-edge triggered */
13945 + status = "okay";
13946 + };
13947 + };
13948 + };
13949 +
13950 + // Enable a SX1508 on I2C#0 at slave addr 0x23
13951 + fragment@36 {
13952 + target = <&i2c0>;
13953 + __dormant__ {
13954 + #address-cells = <1>;
13955 + #size-cells = <0>;
13956 +
13957 + sx1508_0_23: sx150x@23 {
13958 + compatible = "semtech,sx1508q";
13959 + reg = <0x23>;
13960 + gpio-controller;
13961 + #gpio-cells = <2>;
13962 + #interrupt-cells = <2>;
13963 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
13964 + 2nd word is 2 for falling-edge triggered */
13965 + status = "okay";
13966 + };
13967 + };
13968 + };
13969 +
13970 + // Enable a SX1508 on I2C#1 at slave addr 0x23
13971 + fragment@37 {
13972 + target = <&i2c1>;
13973 + __dormant__ {
13974 + #address-cells = <1>;
13975 + #size-cells = <0>;
13976 +
13977 + sx1508_1_23: sx150x@23 {
13978 + compatible = "semtech,sx1508q";
13979 + reg = <0x23>;
13980 + gpio-controller;
13981 + #gpio-cells = <2>;
13982 + #interrupt-cells = <2>;
13983 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
13984 + 2nd word is 2 for falling-edge triggered */
13985 + status = "okay";
13986 + };
13987 + };
13988 + };
13989 +
13990 + // Enable a SX1509 on I2C#0 at slave addr 0x3E
13991 + fragment@38 {
13992 + target = <&i2c0>;
13993 + __dormant__ {
13994 + #address-cells = <1>;
13995 + #size-cells = <0>;
13996 +
13997 + sx1509_0_3E: sx150x@3E {
13998 + compatible = "semtech,sx1509q";
13999 + reg = <0x3E>;
14000 + gpio-controller;
14001 + #gpio-cells = <2>;
14002 + #interrupt-cells = <2>;
14003 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
14004 + 2nd word is 2 for falling-edge triggered */
14005 + status = "okay";
14006 + };
14007 + };
14008 + };
14009 +
14010 + // Enable a SX1509 on I2C#1 at slave addr 0x3E
14011 + fragment@39 {
14012 + target = <&i2c1>;
14013 + __dormant__ {
14014 + #address-cells = <1>;
14015 + #size-cells = <0>;
14016 +
14017 + sx1509_1_3E: sx150x@3E {
14018 + compatible = "semtech,sx1509q";
14019 + reg = <0x3E>;
14020 + gpio-controller;
14021 + #gpio-cells = <2>;
14022 + #interrupt-cells = <2>;
14023 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
14024 + 2nd word is 2 for falling-edge triggered */
14025 + status = "okay";
14026 + };
14027 + };
14028 + };
14029 +
14030 + // Enable a SX1509 on I2C#0 at slave addr 0x3F
14031 + fragment@40 {
14032 + target = <&i2c0>;
14033 + __dormant__ {
14034 + #address-cells = <1>;
14035 + #size-cells = <0>;
14036 +
14037 + sx1509_0_3F: sx150x@3F {
14038 + compatible = "semtech,sx1509q";
14039 + reg = <0x3F>;
14040 + gpio-controller;
14041 + #gpio-cells = <2>;
14042 + #interrupt-cells = <2>;
14043 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
14044 + 2nd word is 2 for falling-edge triggered */
14045 + status = "okay";
14046 + };
14047 + };
14048 + };
14049 +
14050 + // Enable a SX1509 on I2C#1 at slave addr 0x3F
14051 + fragment@41 {
14052 + target = <&i2c1>;
14053 + __dormant__ {
14054 + #address-cells = <1>;
14055 + #size-cells = <0>;
14056 +
14057 + sx1509_1_3F: sx150x@3F {
14058 + compatible = "semtech,sx1509q";
14059 + reg = <0x3F>;
14060 + gpio-controller;
14061 + #gpio-cells = <2>;
14062 + #interrupt-cells = <2>;
14063 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
14064 + 2nd word is 2 for falling-edge triggered */
14065 + status = "okay";
14066 + };
14067 + };
14068 + };
14069 +
14070 + // Enable a SX1509 on I2C#0 at slave addr 0x70
14071 + fragment@42 {
14072 + target = <&i2c0>;
14073 + __dormant__ {
14074 + #address-cells = <1>;
14075 + #size-cells = <0>;
14076 +
14077 + sx1509_0_70: sx150x@70 {
14078 + compatible = "semtech,sx1509q";
14079 + reg = <0x70>;
14080 + gpio-controller;
14081 + #gpio-cells = <2>;
14082 + #interrupt-cells = <2>;
14083 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
14084 + 2nd word is 2 for falling-edge triggered */
14085 + status = "okay";
14086 + };
14087 + };
14088 + };
14089 +
14090 + // Enable a SX1509 on I2C#1 at slave addr 0x70
14091 + fragment@43 {
14092 + target = <&i2c1>;
14093 + __dormant__ {
14094 + #address-cells = <1>;
14095 + #size-cells = <0>;
14096 +
14097 + sx1509_1_70: sx150x@70 {
14098 + compatible = "semtech,sx1509q";
14099 + reg = <0x70>;
14100 + gpio-controller;
14101 + #gpio-cells = <2>;
14102 + #interrupt-cells = <2>;
14103 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
14104 + 2nd word is 2 for falling-edge triggered */
14105 + status = "okay";
14106 + };
14107 + };
14108 + };
14109 +
14110 + // Enable a SX1509 on I2C#0 at slave addr 0x71
14111 + fragment@44 {
14112 + target = <&i2c0>;
14113 + __dormant__ {
14114 + #address-cells = <1>;
14115 + #size-cells = <0>;
14116 +
14117 + sx1509_0_71: sx150x@71 {
14118 + compatible = "semtech,sx1509q";
14119 + reg = <0x71>;
14120 + gpio-controller;
14121 + #gpio-cells = <2>;
14122 + #interrupt-cells = <2>;
14123 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
14124 + 2nd word is 2 for falling-edge triggered */
14125 + status = "okay";
14126 + };
14127 + };
14128 + };
14129 +
14130 + // Enable a SX1509 on I2C#1 at slave addr 0x71
14131 + fragment@45 {
14132 + target = <&i2c1>;
14133 + __dormant__ {
14134 + #address-cells = <1>;
14135 + #size-cells = <0>;
14136 +
14137 + sx1509_1_71: sx150x@71 {
14138 + compatible = "semtech,sx1509q";
14139 + reg = <0x71>;
14140 + gpio-controller;
14141 + #gpio-cells = <2>;
14142 + #interrupt-cells = <2>;
14143 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
14144 + 2nd word is 2 for falling-edge triggered */
14145 + status = "okay";
14146 + };
14147 + };
14148 + };
14149 +
14150 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
14151 + fragment@46 {
14152 + target = <&sx1501_0_20>;
14153 + __dormant__ {
14154 + interrupt-parent = <&gpio>;
14155 + interrupt-controller;
14156 + pinctrl-names = "default";
14157 + pinctrl-0 = <&sx150x_0_20_pins>;
14158 + };
14159 + };
14160 +
14161 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
14162 + fragment@47 {
14163 + target = <&sx1501_1_20>;
14164 + __dormant__ {
14165 + interrupt-parent = <&gpio>;
14166 + interrupt-controller;
14167 + pinctrl-names = "default";
14168 + pinctrl-0 = <&sx150x_1_20_pins>;
14169 + };
14170 + };
14171 +
14172 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
14173 + fragment@48 {
14174 + target = <&sx1501_0_21>;
14175 + __dormant__ {
14176 + interrupt-parent = <&gpio>;
14177 + interrupt-controller;
14178 + pinctrl-names = "default";
14179 + pinctrl-0 = <&sx150x_0_21_pins>;
14180 + };
14181 + };
14182 +
14183 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
14184 + fragment@49 {
14185 + target = <&sx1501_1_21>;
14186 + __dormant__ {
14187 + interrupt-parent = <&gpio>;
14188 + interrupt-controller;
14189 + pinctrl-names = "default";
14190 + pinctrl-0 = <&sx150x_1_21_pins>;
14191 + };
14192 + };
14193 +
14194 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
14195 + fragment@50 {
14196 + target = <&sx1502_0_20>;
14197 + __dormant__ {
14198 + interrupt-parent = <&gpio>;
14199 + interrupt-controller;
14200 + pinctrl-names = "default";
14201 + pinctrl-0 = <&sx150x_0_20_pins>;
14202 + };
14203 + };
14204 +
14205 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
14206 + fragment@51 {
14207 + target = <&sx1502_1_20>;
14208 + __dormant__ {
14209 + interrupt-parent = <&gpio>;
14210 + interrupt-controller;
14211 + pinctrl-names = "default";
14212 + pinctrl-0 = <&sx150x_1_20_pins>;
14213 + };
14214 + };
14215 +
14216 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
14217 + fragment@52 {
14218 + target = <&sx1502_0_21>;
14219 + __dormant__ {
14220 + interrupt-parent = <&gpio>;
14221 + interrupt-controller;
14222 + pinctrl-names = "default";
14223 + pinctrl-0 = <&sx150x_0_21_pins>;
14224 + };
14225 + };
14226 +
14227 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
14228 + fragment@53 {
14229 + target = <&sx1502_1_21>;
14230 + __dormant__ {
14231 + interrupt-parent = <&gpio>;
14232 + interrupt-controller;
14233 + pinctrl-names = "default";
14234 + pinctrl-0 = <&sx150x_1_21_pins>;
14235 + };
14236 + };
14237 +
14238 + // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
14239 + fragment@54 {
14240 + target = <&sx1503_0_20>;
14241 + __dormant__ {
14242 + interrupt-parent = <&gpio>;
14243 + interrupt-controller;
14244 + pinctrl-names = "default";
14245 + pinctrl-0 = <&sx150x_0_20_pins>;
14246 + };
14247 + };
14248 +
14249 + // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
14250 + fragment@55 {
14251 + target = <&sx1503_1_20>;
14252 + __dormant__ {
14253 + interrupt-parent = <&gpio>;
14254 + interrupt-controller;
14255 + pinctrl-names = "default";
14256 + pinctrl-0 = <&sx150x_1_20_pins>;
14257 + };
14258 + };
14259 +
14260 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
14261 + fragment@56 {
14262 + target = <&sx1504_0_20>;
14263 + __dormant__ {
14264 + interrupt-parent = <&gpio>;
14265 + interrupt-controller;
14266 + pinctrl-names = "default";
14267 + pinctrl-0 = <&sx150x_0_20_pins>;
14268 + };
14269 + };
14270 +
14271 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
14272 + fragment@57 {
14273 + target = <&sx1504_1_20>;
14274 + __dormant__ {
14275 + interrupt-parent = <&gpio>;
14276 + interrupt-controller;
14277 + pinctrl-names = "default";
14278 + pinctrl-0 = <&sx150x_1_20_pins>;
14279 + };
14280 + };
14281 +
14282 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
14283 + fragment@58 {
14284 + target = <&sx1504_0_21>;
14285 + __dormant__ {
14286 + interrupt-parent = <&gpio>;
14287 + interrupt-controller;
14288 + pinctrl-names = "default";
14289 + pinctrl-0 = <&sx150x_0_21_pins>;
14290 + };
14291 + };
14292 +
14293 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
14294 + fragment@59 {
14295 + target = <&sx1504_1_21>;
14296 + __dormant__ {
14297 + interrupt-parent = <&gpio>;
14298 + interrupt-controller;
14299 + pinctrl-names = "default";
14300 + pinctrl-0 = <&sx150x_1_21_pins>;
14301 + };
14302 + };
14303 +
14304 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
14305 + fragment@60 {
14306 + target = <&sx1505_0_20>;
14307 + __dormant__ {
14308 + interrupt-parent = <&gpio>;
14309 + interrupt-controller;
14310 + pinctrl-names = "default";
14311 + pinctrl-0 = <&sx150x_0_20_pins>;
14312 + };
14313 + };
14314 +
14315 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
14316 + fragment@61 {
14317 + target = <&sx1505_1_20>;
14318 + __dormant__ {
14319 + interrupt-parent = <&gpio>;
14320 + interrupt-controller;
14321 + pinctrl-names = "default";
14322 + pinctrl-0 = <&sx150x_1_20_pins>;
14323 + };
14324 + };
14325 +
14326 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
14327 + fragment@62 {
14328 + target = <&sx1505_0_21>;
14329 + __dormant__ {
14330 + interrupt-parent = <&gpio>;
14331 + interrupt-controller;
14332 + pinctrl-names = "default";
14333 + pinctrl-0 = <&sx150x_0_21_pins>;
14334 + };
14335 + };
14336 +
14337 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
14338 + fragment@63 {
14339 + target = <&sx1505_1_21>;
14340 + __dormant__ {
14341 + interrupt-parent = <&gpio>;
14342 + interrupt-controller;
14343 + pinctrl-names = "default";
14344 + pinctrl-0 = <&sx150x_1_21_pins>;
14345 + };
14346 + };
14347 +
14348 + // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
14349 + fragment@64 {
14350 + target = <&sx1506_0_20>;
14351 + __dormant__ {
14352 + interrupt-parent = <&gpio>;
14353 + interrupt-controller;
14354 + pinctrl-names = "default";
14355 + pinctrl-0 = <&sx150x_0_20_pins>;
14356 + };
14357 + };
14358 +
14359 + // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
14360 + fragment@65 {
14361 + target = <&sx1506_1_20>;
14362 + __dormant__ {
14363 + interrupt-parent = <&gpio>;
14364 + interrupt-controller;
14365 + pinctrl-names = "default";
14366 + pinctrl-0 = <&sx150x_1_20_pins>;
14367 + };
14368 + };
14369 +
14370 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
14371 + fragment@66 {
14372 + target = <&sx1507_0_3E>;
14373 + __dormant__ {
14374 + interrupt-parent = <&gpio>;
14375 + interrupt-controller;
14376 + pinctrl-names = "default";
14377 + pinctrl-0 = <&sx150x_0_3E_pins>;
14378 + };
14379 + };
14380 +
14381 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
14382 + fragment@67 {
14383 + target = <&sx1507_1_3E>;
14384 + __dormant__ {
14385 + interrupt-parent = <&gpio>;
14386 + interrupt-controller;
14387 + pinctrl-names = "default";
14388 + pinctrl-0 = <&sx150x_1_3E_pins>;
14389 + };
14390 + };
14391 +
14392 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
14393 + fragment@68 {
14394 + target = <&sx1507_0_3F>;
14395 + __dormant__ {
14396 + interrupt-parent = <&gpio>;
14397 + interrupt-controller;
14398 + pinctrl-names = "default";
14399 + pinctrl-0 = <&sx150x_0_3F_pins>;
14400 + };
14401 + };
14402 +
14403 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
14404 + fragment@69 {
14405 + target = <&sx1507_1_3F>;
14406 + __dormant__ {
14407 + interrupt-parent = <&gpio>;
14408 + interrupt-controller;
14409 + pinctrl-names = "default";
14410 + pinctrl-0 = <&sx150x_1_3F_pins>;
14411 + };
14412 + };
14413 +
14414 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
14415 + fragment@70 {
14416 + target = <&sx1507_0_70>;
14417 + __dormant__ {
14418 + interrupt-parent = <&gpio>;
14419 + interrupt-controller;
14420 + pinctrl-names = "default";
14421 + pinctrl-0 = <&sx150x_1_70_pins>;
14422 + };
14423 + };
14424 +
14425 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
14426 + fragment@71 {
14427 + target = <&sx1507_1_70>;
14428 + __dormant__ {
14429 + interrupt-parent = <&gpio>;
14430 + interrupt-controller;
14431 + pinctrl-names = "default";
14432 + pinctrl-0 = <&sx150x_1_70_pins>;
14433 + };
14434 + };
14435 +
14436 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
14437 + fragment@72 {
14438 + target = <&sx1507_0_71>;
14439 + __dormant__ {
14440 + interrupt-parent = <&gpio>;
14441 + interrupt-controller;
14442 + pinctrl-names = "default";
14443 + pinctrl-0 = <&sx150x_0_71_pins>;
14444 + };
14445 + };
14446 +
14447 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
14448 + fragment@73 {
14449 + target = <&sx1507_1_71>;
14450 + __dormant__ {
14451 + interrupt-parent = <&gpio>;
14452 + interrupt-controller;
14453 + pinctrl-names = "default";
14454 + pinctrl-0 = <&sx150x_1_71_pins>;
14455 + };
14456 + };
14457 +
14458 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
14459 + fragment@74 {
14460 + target = <&sx1508_0_20>;
14461 + __dormant__ {
14462 + interrupt-parent = <&gpio>;
14463 + interrupt-controller;
14464 + pinctrl-names = "default";
14465 + pinctrl-0 = <&sx150x_0_20_pins>;
14466 + };
14467 + };
14468 +
14469 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
14470 + fragment@75 {
14471 + target = <&sx1508_1_20>;
14472 + __dormant__ {
14473 + interrupt-parent = <&gpio>;
14474 + interrupt-controller;
14475 + pinctrl-names = "default";
14476 + pinctrl-0 = <&sx150x_1_20_pins>;
14477 + };
14478 + };
14479 +
14480 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
14481 + fragment@76 {
14482 + target = <&sx1508_0_21>;
14483 + __dormant__ {
14484 + interrupt-parent = <&gpio>;
14485 + interrupt-controller;
14486 + pinctrl-names = "default";
14487 + pinctrl-0 = <&sx150x_0_21_pins>;
14488 + };
14489 + };
14490 +
14491 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
14492 + fragment@77 {
14493 + target = <&sx1508_1_21>;
14494 + __dormant__ {
14495 + interrupt-parent = <&gpio>;
14496 + interrupt-controller;
14497 + pinctrl-names = "default";
14498 + pinctrl-0 = <&sx150x_1_21_pins>;
14499 + };
14500 + };
14501 +
14502 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
14503 + fragment@78 {
14504 + target = <&sx1508_0_22>;
14505 + __dormant__ {
14506 + interrupt-parent = <&gpio>;
14507 + interrupt-controller;
14508 + pinctrl-names = "default";
14509 + pinctrl-0 = <&sx150x_0_22_pins>;
14510 + };
14511 + };
14512 +
14513 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
14514 + fragment@79 {
14515 + target = <&sx1508_1_22>;
14516 + __dormant__ {
14517 + interrupt-parent = <&gpio>;
14518 + interrupt-controller;
14519 + pinctrl-names = "default";
14520 + pinctrl-0 = <&sx150x_1_22_pins>;
14521 + };
14522 + };
14523 +
14524 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
14525 + fragment@80 {
14526 + target = <&sx1508_0_23>;
14527 + __dormant__ {
14528 + interrupt-parent = <&gpio>;
14529 + interrupt-controller;
14530 + pinctrl-names = "default";
14531 + pinctrl-0 = <&sx150x_0_23_pins>;
14532 + };
14533 + };
14534 +
14535 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
14536 + fragment@81 {
14537 + target = <&sx1508_1_23>;
14538 + __dormant__ {
14539 + interrupt-parent = <&gpio>;
14540 + interrupt-controller;
14541 + pinctrl-names = "default";
14542 + pinctrl-0 = <&sx150x_1_23_pins>;
14543 + };
14544 + };
14545 +
14546 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
14547 + fragment@82 {
14548 + target = <&sx1509_0_3E>;
14549 + __dormant__ {
14550 + interrupt-parent = <&gpio>;
14551 + interrupt-controller;
14552 + pinctrl-names = "default";
14553 + pinctrl-0 = <&sx150x_0_3E_pins>;
14554 + };
14555 + };
14556 +
14557 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
14558 + fragment@83 {
14559 + target = <&sx1509_1_3E>;
14560 + __dormant__ {
14561 + interrupt-parent = <&gpio>;
14562 + interrupt-controller;
14563 + pinctrl-names = "default";
14564 + pinctrl-0 = <&sx150x_1_3E_pins>;
14565 + };
14566 + };
14567 +
14568 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
14569 + fragment@84 {
14570 + target = <&sx1509_0_3F>;
14571 + __dormant__ {
14572 + interrupt-parent = <&gpio>;
14573 + interrupt-controller;
14574 + pinctrl-names = "default";
14575 + pinctrl-0 = <&sx150x_0_3F_pins>;
14576 + };
14577 + };
14578 +
14579 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
14580 + fragment@85 {
14581 + target = <&sx1509_1_3F>;
14582 + __dormant__ {
14583 + interrupt-parent = <&gpio>;
14584 + interrupt-controller;
14585 + pinctrl-names = "default";
14586 + pinctrl-0 = <&sx150x_1_3F_pins>;
14587 + };
14588 + };
14589 +
14590 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
14591 + fragment@86 {
14592 + target = <&sx1509_0_70>;
14593 + __dormant__ {
14594 + interrupt-parent = <&gpio>;
14595 + interrupt-controller;
14596 + pinctrl-names = "default";
14597 + pinctrl-0 = <&sx150x_0_70_pins>;
14598 + };
14599 + };
14600 +
14601 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
14602 + fragment@87 {
14603 + target = <&sx1509_1_70>;
14604 + __dormant__ {
14605 + interrupt-parent = <&gpio>;
14606 + interrupt-controller;
14607 + pinctrl-names = "default";
14608 + pinctrl-0 = <&sx150x_1_70_pins>;
14609 + };
14610 + };
14611 +
14612 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
14613 + fragment@88 {
14614 + target = <&sx1509_0_71>;
14615 + __dormant__ {
14616 + interrupt-parent = <&gpio>;
14617 + interrupt-controller;
14618 + pinctrl-names = "default";
14619 + pinctrl-0 = <&sx150x_0_71_pins>;
14620 + };
14621 + };
14622 +
14623 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
14624 + fragment@89 {
14625 + target = <&sx1509_1_71>;
14626 + __dormant__ {
14627 + interrupt-parent = <&gpio>;
14628 + interrupt-controller;
14629 + pinctrl-names = "default";
14630 + pinctrl-0 = <&sx150x_1_71_pins>;
14631 + };
14632 + };
14633 +
14634 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
14635 + // Configure as a input with no pull-up/down
14636 + fragment@90 {
14637 + target = <&gpio>;
14638 + __dormant__ {
14639 + sx150x_0_20_pins: sx150x_0_20_pins {
14640 + brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
14641 + brcm,function = <0>;
14642 + brcm,pull = <0>;
14643 + };
14644 + };
14645 + };
14646 +
14647 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
14648 + // Configure as a input with no pull-up/down
14649 + fragment@91 {
14650 + target = <&gpio>;
14651 + __dormant__ {
14652 + sx150x_1_20_pins: sx150x_1_20_pins {
14653 + brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
14654 + brcm,function = <0>;
14655 + brcm,pull = <0>;
14656 + };
14657 + };
14658 + };
14659 +
14660 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
14661 + // Configure as a input with no pull-up/down
14662 + fragment@92 {
14663 + target = <&gpio>;
14664 + __dormant__ {
14665 + sx150x_0_21_pins: sx150x_0_21_pins {
14666 + brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
14667 + brcm,function = <0>;
14668 + brcm,pull = <0>;
14669 + };
14670 + };
14671 + };
14672 +
14673 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
14674 + // Configure as a input with no pull-up/down
14675 + fragment@93 {
14676 + target = <&gpio>;
14677 + __dormant__ {
14678 + sx150x_1_21_pins: sx150x_1_21_pins {
14679 + brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
14680 + brcm,function = <0>;
14681 + brcm,pull = <0>;
14682 + };
14683 + };
14684 + };
14685 +
14686 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
14687 + // Configure as a input with no pull-up/down
14688 + fragment@94 {
14689 + target = <&gpio>;
14690 + __dormant__ {
14691 + sx150x_0_22_pins: sx150x_0_22_pins {
14692 + brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
14693 + brcm,function = <0>;
14694 + brcm,pull = <0>;
14695 + };
14696 + };
14697 + };
14698 +
14699 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
14700 + // Configure as a input with no pull-up/down
14701 + fragment@95 {
14702 + target = <&gpio>;
14703 + __dormant__ {
14704 + sx150x_1_22_pins: sx150x_1_22_pins {
14705 + brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
14706 + brcm,function = <0>;
14707 + brcm,pull = <0>;
14708 + };
14709 + };
14710 + };
14711 +
14712 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
14713 + // Configure as a input with no pull-up/down
14714 + fragment@96 {
14715 + target = <&gpio>;
14716 + __dormant__ {
14717 + sx150x_0_23_pins: sx150x_0_23_pins {
14718 + brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
14719 + brcm,function = <0>;
14720 + brcm,pull = <0>;
14721 + };
14722 + };
14723 + };
14724 +
14725 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
14726 + // Configure as a input with no pull-up/down
14727 + fragment@97 {
14728 + target = <&gpio>;
14729 + __dormant__ {
14730 + sx150x_1_23_pins: sx150x_1_23_pins {
14731 + brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
14732 + brcm,function = <0>;
14733 + brcm,pull = <0>;
14734 + };
14735 + };
14736 + };
14737 +
14738 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
14739 + // Configure as a input with no pull-up/down
14740 + fragment@98 {
14741 + target = <&gpio>;
14742 + __dormant__ {
14743 + sx150x_0_3E_pins: sx150x_0_3E_pins {
14744 + brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
14745 + brcm,function = <0>;
14746 + brcm,pull = <0>;
14747 + };
14748 + };
14749 + };
14750 +
14751 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
14752 + // Configure as a input with no pull-up/down
14753 + fragment@99 {
14754 + target = <&gpio>;
14755 + __dormant__ {
14756 + sx150x_1_3E_pins: sx150x_1_3E_pins {
14757 + brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
14758 + brcm,function = <0>;
14759 + brcm,pull = <0>;
14760 + };
14761 + };
14762 + };
14763 +
14764 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
14765 + // Configure as a input with no pull-up/down
14766 + fragment@100 {
14767 + target = <&gpio>;
14768 + __dormant__ {
14769 + sx150x_0_3F_pins: sx150x_0_3F_pins {
14770 + brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
14771 + brcm,function = <0>;
14772 + brcm,pull = <0>;
14773 + };
14774 + };
14775 + };
14776 +
14777 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
14778 + // Configure as a input with no pull-up/down
14779 + fragment@101 {
14780 + target = <&gpio>;
14781 + __dormant__ {
14782 + sx150x_1_3F_pins: sx150x_1_3F_pins {
14783 + brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
14784 + brcm,function = <0>;
14785 + brcm,pull = <0>;
14786 + };
14787 + };
14788 + };
14789 +
14790 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
14791 + // Configure as a input with no pull-up/down
14792 + fragment@102 {
14793 + target = <&gpio>;
14794 + __dormant__ {
14795 + sx150x_0_70_pins: sx150x_0_70_pins {
14796 + brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
14797 + brcm,function = <0>;
14798 + brcm,pull = <0>;
14799 + };
14800 + };
14801 + };
14802 +
14803 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
14804 + // Configure as a input with no pull-up/down
14805 + fragment@103 {
14806 + target = <&gpio>;
14807 + __dormant__ {
14808 + sx150x_1_70_pins: sx150x_1_70_pins {
14809 + brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
14810 + brcm,function = <0>;
14811 + brcm,pull = <0>;
14812 + };
14813 + };
14814 + };
14815 +
14816 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
14817 + // Configure as a input with no pull-up/down
14818 + fragment@104 {
14819 + target = <&gpio>;
14820 + __dormant__ {
14821 + sx150x_0_71_pins: sx150x_0_71_pins {
14822 + brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
14823 + brcm,function = <0>;
14824 + brcm,pull = <0>;
14825 + };
14826 + };
14827 + };
14828 +
14829 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
14830 + // Configure as a input with no pull-up/down
14831 + fragment@105 {
14832 + target = <&gpio>;
14833 + __dormant__ {
14834 + sx150x_1_71_pins: sx150x_1_71_pins {
14835 + brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
14836 + brcm,function = <0>;
14837 + brcm,pull = <0>;
14838 + };
14839 + };
14840 + };
14841 +
14842 + __overrides__ {
14843 + sx1501-0-20 = <0>,"+0+2";
14844 + sx1501-1-20 = <0>,"+1+3";
14845 + sx1501-0-21 = <0>,"+0+4";
14846 + sx1501-1-21 = <0>,"+1+5";
14847 + sx1502-0-20 = <0>,"+0+6";
14848 + sx1502-1-20 = <0>,"+1+7";
14849 + sx1502-0-21 = <0>,"+0+8";
14850 + sx1502-1-21 = <0>,"+1+9";
14851 + sx1503-0-20 = <0>,"+0+10";
14852 + sx1503-1-20 = <0>,"+1+11";
14853 + sx1504-0-20 = <0>,"+0+12";
14854 + sx1504-1-20 = <0>,"+1+13";
14855 + sx1504-0-21 = <0>,"+0+14";
14856 + sx1504-1-21 = <0>,"+1+15";
14857 + sx1505-0-20 = <0>,"+0+16";
14858 + sx1505-1-20 = <0>,"+1+17";
14859 + sx1505-0-21 = <0>,"+0+18";
14860 + sx1505-1-21 = <0>,"+1+19";
14861 + sx1506-0-20 = <0>,"+0+20";
14862 + sx1506-1-20 = <0>,"+1+21";
14863 + sx1507-0-3E = <0>,"+0+22";
14864 + sx1507-1-3E = <0>,"+1+23";
14865 + sx1507-0-3F = <0>,"+0+24";
14866 + sx1507-1-3F = <0>,"+1+25";
14867 + sx1507-0-70 = <0>,"+0+26";
14868 + sx1507-1-70 = <0>,"+1+27";
14869 + sx1507-0-71 = <0>,"+0+28";
14870 + sx1507-1-71 = <0>,"+1+29";
14871 + sx1508-0-20 = <0>,"+0+30";
14872 + sx1508-1-20 = <0>,"+1+31";
14873 + sx1508-0-21 = <0>,"+0+32";
14874 + sx1508-1-21 = <0>,"+1+33";
14875 + sx1508-0-22 = <0>,"+0+34";
14876 + sx1508-1-22 = <0>,"+1+35";
14877 + sx1508-0-23 = <0>,"+0+36";
14878 + sx1508-1-23 = <0>,"+1+37";
14879 + sx1509-0-3E = <0>,"+0+38";
14880 + sx1509-1-3E = <0>,"+1+39";
14881 + sx1509-0-3F = <0>,"+0+40";
14882 + sx1509-1-3F = <0>,"+1+41";
14883 + sx1509-0-70 = <0>,"+0+42";
14884 + sx1509-1-70 = <0>,"+1+43";
14885 + sx1509-0-71 = <0>,"+0+44";
14886 + sx1509-1-71 = <0>,"+1+45";
14887 + sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
14888 + sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
14889 + sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
14890 + sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
14891 + sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
14892 + sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
14893 + sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
14894 + sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
14895 + sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
14896 + sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
14897 + sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
14898 + sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
14899 + sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
14900 + sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
14901 + sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
14902 + sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
14903 + sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
14904 + sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
14905 + sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
14906 + sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
14907 + sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
14908 + sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
14909 + sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
14910 + sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
14911 + sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
14912 + sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
14913 + sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
14914 + sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
14915 + sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
14916 + sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
14917 + sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
14918 + sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
14919 + sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
14920 + sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
14921 + sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
14922 + sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
14923 + sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
14924 + sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
14925 + sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
14926 + sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
14927 + sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
14928 + sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
14929 + sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
14930 + sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
14931 + };
14932 +};
14933 +
14934 --- /dev/null
14935 +++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
14936 @@ -0,0 +1,224 @@
14937 +/*
14938 + * tinylcd35-overlay.dts
14939 + *
14940 + * -------------------------------------------------
14941 + * www.tinlylcd.com
14942 + * -------------------------------------------------
14943 + * Device---Driver-----BUS GPIO's
14944 + * display tinylcd35 spi0.0 25 24 18
14945 + * touch ads7846 spi0.1 5
14946 + * rtc ds1307 i2c1-0068
14947 + * rtc pcf8563 i2c1-0051
14948 + * keypad gpio-keys --------- 17 22 27 23 28
14949 + *
14950 + *
14951 + * TinyLCD.com 3.5 inch TFT
14952 + *
14953 + * Version 001
14954 + * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
14955 + * 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
14956 + *
14957 + */
14958 +
14959 +/dts-v1/;
14960 +/plugin/;
14961 +
14962 +/ {
14963 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
14964 +
14965 + fragment@0 {
14966 + target = <&spi0>;
14967 + __overlay__ {
14968 + status = "okay";
14969 + };
14970 + };
14971 +
14972 + fragment@1 {
14973 + target = <&spidev0>;
14974 + __overlay__ {
14975 + status = "disabled";
14976 + };
14977 + };
14978 +
14979 + fragment@2 {
14980 + target = <&spidev1>;
14981 + __overlay__ {
14982 + status = "disabled";
14983 + };
14984 + };
14985 +
14986 + fragment@3 {
14987 + target = <&gpio>;
14988 + __overlay__ {
14989 + tinylcd35_pins: tinylcd35_pins {
14990 + brcm,pins = <25 24 18>;
14991 + brcm,function = <1>; /* out */
14992 + };
14993 + tinylcd35_ts_pins: tinylcd35_ts_pins {
14994 + brcm,pins = <5>;
14995 + brcm,function = <0>; /* in */
14996 + };
14997 + keypad_pins: keypad_pins {
14998 + brcm,pins = <4 17 22 23 27>;
14999 + brcm,function = <0>; /* in */
15000 + brcm,pull = <1>; /* down */
15001 + };
15002 + };
15003 + };
15004 +
15005 + fragment@4 {
15006 + target = <&spi0>;
15007 + __overlay__ {
15008 + /* needed to avoid dtc warning */
15009 + #address-cells = <1>;
15010 + #size-cells = <0>;
15011 +
15012 + tinylcd35: tinylcd35@0{
15013 + compatible = "neosec,tinylcd";
15014 + reg = <0>;
15015 + pinctrl-names = "default";
15016 + pinctrl-0 = <&tinylcd35_pins>,
15017 + <&tinylcd35_ts_pins>;
15018 +
15019 + spi-max-frequency = <48000000>;
15020 + rotate = <270>;
15021 + fps = <20>;
15022 + bgr;
15023 + buswidth = <8>;
15024 + reset-gpios = <&gpio 25 0>;
15025 + dc-gpios = <&gpio 24 0>;
15026 + led-gpios = <&gpio 18 1>;
15027 + debug = <0>;
15028 +
15029 + init = <0x10000B0 0x80
15030 + 0x10000C0 0x0A 0x0A
15031 + 0x10000C1 0x01 0x01
15032 + 0x10000C2 0x33
15033 + 0x10000C5 0x00 0x42 0x80
15034 + 0x10000B1 0xD0 0x11
15035 + 0x10000B4 0x02
15036 + 0x10000B6 0x00 0x22 0x3B
15037 + 0x10000B7 0x07
15038 + 0x1000036 0x58
15039 + 0x10000F0 0x36 0xA5 0xD3
15040 + 0x10000E5 0x80
15041 + 0x10000E5 0x01
15042 + 0x10000B3 0x00
15043 + 0x10000E5 0x00
15044 + 0x10000F0 0x36 0xA5 0x53
15045 + 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
15046 + 0x100003A 0x55
15047 + 0x1000011
15048 + 0x2000001
15049 + 0x1000029>;
15050 + };
15051 +
15052 + tinylcd35_ts: tinylcd35_ts@1 {
15053 + compatible = "ti,ads7846";
15054 + reg = <1>;
15055 + status = "disabled";
15056 +
15057 + spi-max-frequency = <2000000>;
15058 + interrupts = <5 2>; /* high-to-low edge triggered */
15059 + interrupt-parent = <&gpio>;
15060 + pendown-gpio = <&gpio 5 0>;
15061 + ti,x-plate-ohms = /bits/ 16 <100>;
15062 + ti,pressure-max = /bits/ 16 <255>;
15063 + };
15064 + };
15065 + };
15066 +
15067 + /* RTC */
15068 +
15069 + fragment@5 {
15070 + target = <&i2c1>;
15071 + __dormant__ {
15072 + #address-cells = <1>;
15073 + #size-cells = <0>;
15074 +
15075 + status = "okay";
15076 +
15077 + pcf8563: pcf8563@51 {
15078 + compatible = "nxp,pcf8563";
15079 + reg = <0x51>;
15080 + status = "okay";
15081 + };
15082 + };
15083 + };
15084 +
15085 + fragment@6 {
15086 + target = <&i2c1>;
15087 + __dormant__ {
15088 + #address-cells = <1>;
15089 + #size-cells = <0>;
15090 +
15091 + status = "okay";
15092 +
15093 + ds1307: ds1307@68 {
15094 + compatible = "maxim,ds1307";
15095 + reg = <0x68>;
15096 + status = "okay";
15097 + };
15098 + };
15099 + };
15100 +
15101 + /*
15102 + * Values for input event code is found under the
15103 + * 'Keys and buttons' heading in include/uapi/linux/input.h
15104 + */
15105 + fragment@7 {
15106 + target-path = "/soc";
15107 + __overlay__ {
15108 + keypad: keypad {
15109 + compatible = "gpio-keys";
15110 + #address-cells = <1>;
15111 + #size-cells = <0>;
15112 + pinctrl-names = "default";
15113 + pinctrl-0 = <&keypad_pins>;
15114 + status = "disabled";
15115 + autorepeat;
15116 +
15117 + button@17 {
15118 + label = "GPIO KEY_UP";
15119 + linux,code = <103>;
15120 + gpios = <&gpio 17 0>;
15121 + };
15122 + button@22 {
15123 + label = "GPIO KEY_DOWN";
15124 + linux,code = <108>;
15125 + gpios = <&gpio 22 0>;
15126 + };
15127 + button@27 {
15128 + label = "GPIO KEY_LEFT";
15129 + linux,code = <105>;
15130 + gpios = <&gpio 27 0>;
15131 + };
15132 + button@23 {
15133 + label = "GPIO KEY_RIGHT";
15134 + linux,code = <106>;
15135 + gpios = <&gpio 23 0>;
15136 + };
15137 + button@4 {
15138 + label = "GPIO KEY_ENTER";
15139 + linux,code = <28>;
15140 + gpios = <&gpio 4 0>;
15141 + };
15142 + };
15143 + };
15144 + };
15145 +
15146 + __overrides__ {
15147 + speed = <&tinylcd35>,"spi-max-frequency:0";
15148 + rotate = <&tinylcd35>,"rotate:0";
15149 + fps = <&tinylcd35>,"fps:0";
15150 + debug = <&tinylcd35>,"debug:0";
15151 + touch = <&tinylcd35_ts>,"status";
15152 + touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
15153 + <&tinylcd35_ts>,"interrupts:0",
15154 + <&tinylcd35_ts>,"pendown-gpio:4";
15155 + xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
15156 + rtc-pcf = <0>,"=5";
15157 + rtc-ds = <0>,"=6";
15158 + keypad = <&keypad>,"status";
15159 + };
15160 +};
15161 --- /dev/null
15162 +++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
15163 @@ -0,0 +1,32 @@
15164 +/dts-v1/;
15165 +/plugin/;
15166 +
15167 +/{
15168 + compatible = "brcm,bcm2708";
15169 +
15170 + fragment@0 {
15171 + target = <&uart0>;
15172 + __overlay__ {
15173 + pinctrl-names = "default";
15174 + pinctrl-0 = <&uart0_pins>;
15175 + status = "okay";
15176 + };
15177 + };
15178 +
15179 + fragment@1 {
15180 + target = <&gpio>;
15181 + __overlay__ {
15182 + uart0_pins: uart0_pins {
15183 + brcm,pins = <14 15>;
15184 + brcm,function = <4>; /* alt0 */
15185 + brcm,pull = <0 2>;
15186 + };
15187 + };
15188 + };
15189 +
15190 + __overrides__ {
15191 + txd0_pin = <&uart0_pins>,"brcm,pins:0";
15192 + rxd0_pin = <&uart0_pins>,"brcm,pins:4";
15193 + pin_func = <&uart0_pins>,"brcm,function:0";
15194 + };
15195 +};
15196 --- /dev/null
15197 +++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
15198 @@ -0,0 +1,38 @@
15199 +/dts-v1/;
15200 +/plugin/;
15201 +
15202 +/{
15203 + compatible = "brcm,bcm2708";
15204 +
15205 + fragment@0 {
15206 + target = <&uart1>;
15207 + __overlay__ {
15208 + pinctrl-names = "default";
15209 + pinctrl-0 = <&uart1_pins>;
15210 + status = "okay";
15211 + };
15212 + };
15213 +
15214 + fragment@1 {
15215 + target = <&gpio>;
15216 + __overlay__ {
15217 + uart1_pins: uart1_pins {
15218 + brcm,pins = <14 15>;
15219 + brcm,function = <2>; /* alt5 */
15220 + brcm,pull = <0 2>;
15221 + };
15222 + };
15223 + };
15224 +
15225 + fragment@2 {
15226 + target-path = "/chosen";
15227 + __overlay__ {
15228 + bootargs = "8250.nr_uarts=1";
15229 + };
15230 + };
15231 +
15232 + __overrides__ {
15233 + txd1_pin = <&uart1_pins>,"brcm,pins:0";
15234 + rxd1_pin = <&uart1_pins>,"brcm,pins:4";
15235 + };
15236 +};
15237 --- /dev/null
15238 +++ b/arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts
15239 @@ -0,0 +1,33 @@
15240 +// Overlay for missing AUX interrupt controller
15241 +// Instead we bind all AUX devices to the generic AUX interrupt line
15242 +/dts-v1/;
15243 +/plugin/;
15244 +
15245 +/ {
15246 + compatible = "brcm,bcm2708";
15247 +
15248 + fragment@0 {
15249 + target = <&uart1>;
15250 + __overlay__ {
15251 + interrupt-parent = <&intc>;
15252 + interrupts = <0x1 0x1d>;
15253 + };
15254 + };
15255 +
15256 + fragment@1 {
15257 + target = <&spi1>;
15258 + __overlay__ {
15259 + interrupt-parent = <&intc>;
15260 + interrupts = <0x1 0x1d>;
15261 + };
15262 + };
15263 +
15264 + fragment@2 {
15265 + target = <&spi2>;
15266 + __overlay__ {
15267 + interrupt-parent = <&intc>;
15268 + interrupts = <0x1 0x1d>;
15269 + };
15270 + };
15271 +};
15272 +
15273 --- /dev/null
15274 +++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
15275 @@ -0,0 +1,154 @@
15276 +// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg upstream-aux-interrupt-overlay.dts,
15277 +
15278 +/dts-v1/;
15279 +/plugin/;
15280 +
15281 +#include <dt-bindings/clock/bcm2835.h>
15282 +
15283 +/ {
15284 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15285 + fragment@0 {
15286 + target-path = "/chosen";
15287 + __dormant__ {
15288 + bootargs = "cma=256M";
15289 + };
15290 + };
15291 + fragment@1 {
15292 + target-path = "/chosen";
15293 + __dormant__ {
15294 + bootargs = "cma=192M";
15295 + };
15296 + };
15297 + fragment@2 {
15298 + target-path = "/chosen";
15299 + __dormant__ {
15300 + bootargs = "cma=128M";
15301 + };
15302 + };
15303 + fragment@3 {
15304 + target-path = "/chosen";
15305 + __overlay__ {
15306 + bootargs = "cma=96M";
15307 + };
15308 + };
15309 + fragment@4 {
15310 + target-path = "/chosen";
15311 + __dormant__ {
15312 + bootargs = "cma=64M";
15313 + };
15314 + };
15315 + fragment@5 {
15316 + target = <&i2c2>;
15317 + __overlay__ {
15318 + status = "okay";
15319 + };
15320 + };
15321 + fragment@6 {
15322 + target = <&fb>;
15323 + __overlay__ {
15324 + status = "disabled";
15325 + };
15326 + };
15327 + fragment@7 {
15328 + target = <&pixelvalve0>;
15329 + __overlay__ {
15330 + interrupts = <2 13>;
15331 + status = "okay";
15332 + };
15333 + };
15334 + fragment@8 {
15335 + target = <&pixelvalve1>;
15336 + __overlay__ {
15337 + interrupts = <2 14>;
15338 + status = "okay";
15339 + };
15340 + };
15341 + fragment@9 {
15342 + target = <&pixelvalve2>;
15343 + __overlay__ {
15344 + interrupts = <2 10>;
15345 + status = "okay";
15346 + };
15347 + };
15348 + fragment@10 {
15349 + target = <&hvs>;
15350 + __overlay__ {
15351 + interrupts = <2 1>;
15352 + status = "okay";
15353 + };
15354 + };
15355 + fragment@11 {
15356 + target = <&hdmi>;
15357 + __overlay__ {
15358 + interrupts = <2 8>, <2 9>;
15359 + status = "okay";
15360 + };
15361 + };
15362 + fragment@12 {
15363 + target = <&v3d>;
15364 + __overlay__ {
15365 + interrupts = <1 10>;
15366 + status = "okay";
15367 + };
15368 + };
15369 + fragment@13 {
15370 + target = <&vc4>;
15371 + __overlay__ {
15372 + status = "okay";
15373 + };
15374 + };
15375 + fragment@14 {
15376 + target-path = "/soc/dma";
15377 + __overlay__ {
15378 + brcm,dma-channel-mask = <0x7f35>;
15379 + };
15380 + };
15381 + fragment@15 {
15382 + target = <&clocks>;
15383 + __overlay__ {
15384 + claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
15385 + };
15386 + };
15387 + fragment@16 {
15388 + target = <&vec>;
15389 + __overlay__ {
15390 + status = "okay";
15391 + };
15392 + };
15393 + fragment@17 {
15394 + target = <&usb>;
15395 + #address-cells = <1>;
15396 + #size-cells = <1>;
15397 + dwc2_usb: __overlay__ {
15398 + compatible = "brcm,bcm2835-usb";
15399 + reg = <0x7e980000 0x10000>;
15400 + interrupts = <1 9>;
15401 + dr_mode = "otg";
15402 + g-np-tx-fifo-size = <32>;
15403 + g-rx-fifo-size = <256>;
15404 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
15405 + status = "okay";
15406 + };
15407 + };
15408 + fragment@18 {
15409 + target = <&uart1>;
15410 + __overlay__ {
15411 + interrupt-parent = <&intc>;
15412 + interrupts = <0x1 0x1d>;
15413 + };
15414 + };
15415 + fragment@19 {
15416 + target = <&spi1>;
15417 + __overlay__ {
15418 + interrupt-parent = <&intc>;
15419 + interrupts = <0x1 0x1d>;
15420 + };
15421 + };
15422 + fragment@20 {
15423 + target = <&spi2>;
15424 + __overlay__ {
15425 + interrupt-parent = <&intc>;
15426 + interrupts = <0x1 0x1d>;
15427 + };
15428 + };
15429 +};
15430 --- /dev/null
15431 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
15432 @@ -0,0 +1,89 @@
15433 +/*
15434 + * vc4-fkms-v3d-overlay.dts
15435 + */
15436 +
15437 +/dts-v1/;
15438 +/plugin/;
15439 +
15440 +/ {
15441 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15442 +
15443 + fragment@0 {
15444 + target-path = "/chosen";
15445 + __overlay__ {
15446 + bootargs = "cma=256M";
15447 + };
15448 + };
15449 +
15450 + fragment@1 {
15451 + target-path = "/chosen";
15452 + __dormant__ {
15453 + bootargs = "cma=192M";
15454 + };
15455 + };
15456 +
15457 + fragment@2 {
15458 + target-path = "/chosen";
15459 + __dormant__ {
15460 + bootargs = "cma=128M";
15461 + };
15462 + };
15463 +
15464 + fragment@3 {
15465 + target-path = "/chosen";
15466 + __dormant__ {
15467 + bootargs = "cma=96M";
15468 + };
15469 + };
15470 +
15471 + fragment@4 {
15472 + target-path = "/chosen";
15473 + __dormant__ {
15474 + bootargs = "cma=64M";
15475 + };
15476 + };
15477 +
15478 + fragment@5 {
15479 + target = <&fb>;
15480 + __overlay__ {
15481 + status = "disabled";
15482 + };
15483 + };
15484 +
15485 + fragment@6 {
15486 + target = <&firmwarekms>;
15487 + __overlay__ {
15488 + status = "okay";
15489 + };
15490 + };
15491 +
15492 + fragment@7 {
15493 + target = <&v3d>;
15494 + __overlay__ {
15495 + interrupts = <1 10>;
15496 + status = "okay";
15497 + };
15498 + };
15499 +
15500 + fragment@8 {
15501 + target = <&vc4>;
15502 + __overlay__ {
15503 + status = "okay";
15504 + };
15505 + };
15506 +
15507 + fragment@9 {
15508 + target-path = "/soc/dma";
15509 + __overlay__ {
15510 + brcm,dma-channel-mask = <0x7f35>;
15511 + };
15512 + };
15513 +
15514 + __overrides__ {
15515 + cma-256 = <0>,"+0-1-2-3-4";
15516 + cma-192 = <0>,"-0+1-2-3-4";
15517 + cma-128 = <0>,"-0-1+2-3-4";
15518 + cma-96 = <0>,"-0-1-2+3-4";
15519 + cma-64 = <0>,"-0-1-2-3+4";
15520 + };
15521 +};
15522 --- /dev/null
15523 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
15524 @@ -0,0 +1,151 @@
15525 +/*
15526 + * vc4-kms-v3d-overlay.dts
15527 + */
15528 +
15529 +/dts-v1/;
15530 +/plugin/;
15531 +
15532 +#include <dt-bindings/clock/bcm2835.h>
15533 +
15534 +/ {
15535 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15536 +
15537 + fragment@0 {
15538 + target-path = "/chosen";
15539 + __overlay__ {
15540 + bootargs = "cma=256M";
15541 + };
15542 + };
15543 +
15544 + fragment@1 {
15545 + target-path = "/chosen";
15546 + __dormant__ {
15547 + bootargs = "cma=192M";
15548 + };
15549 + };
15550 +
15551 + fragment@2 {
15552 + target-path = "/chosen";
15553 + __dormant__ {
15554 + bootargs = "cma=128M";
15555 + };
15556 + };
15557 +
15558 + fragment@3 {
15559 + target-path = "/chosen";
15560 + __dormant__ {
15561 + bootargs = "cma=96M";
15562 + };
15563 + };
15564 +
15565 + fragment@4 {
15566 + target-path = "/chosen";
15567 + __dormant__ {
15568 + bootargs = "cma=64M";
15569 + };
15570 + };
15571 +
15572 + fragment@5 {
15573 + target = <&i2c2>;
15574 + __overlay__ {
15575 + status = "okay";
15576 + };
15577 + };
15578 +
15579 + fragment@6 {
15580 + target = <&fb>;
15581 + __overlay__ {
15582 + status = "disabled";
15583 + };
15584 + };
15585 +
15586 + fragment@7 {
15587 + target = <&pixelvalve0>;
15588 + __overlay__ {
15589 + interrupts = <2 13>; /* pwa0 */
15590 + status = "okay";
15591 + };
15592 + };
15593 +
15594 + fragment@8 {
15595 + target = <&pixelvalve1>;
15596 + __overlay__ {
15597 + interrupts = <2 14>; /* pwa1 */
15598 + status = "okay";
15599 + };
15600 + };
15601 +
15602 + fragment@9 {
15603 + target = <&pixelvalve2>;
15604 + __overlay__ {
15605 + interrupts = <2 10>; /* pixelvalve */
15606 + status = "okay";
15607 + };
15608 + };
15609 +
15610 + fragment@10 {
15611 + target = <&hvs>;
15612 + __overlay__ {
15613 + interrupts = <2 1>;
15614 + status = "okay";
15615 + };
15616 + };
15617 +
15618 + fragment@11 {
15619 + target = <&hdmi>;
15620 + __overlay__ {
15621 + interrupts = <2 8>, <2 9>;
15622 + status = "okay";
15623 + };
15624 + };
15625 +
15626 + fragment@12 {
15627 + target = <&v3d>;
15628 + __overlay__ {
15629 + interrupts = <1 10>;
15630 + status = "okay";
15631 + };
15632 + };
15633 +
15634 + fragment@13 {
15635 + target = <&vc4>;
15636 + __overlay__ {
15637 + status = "okay";
15638 + };
15639 + };
15640 +
15641 + fragment@14 {
15642 + target-path = "/soc/dma";
15643 + __overlay__ {
15644 + brcm,dma-channel-mask = <0x7f35>;
15645 + };
15646 + };
15647 +
15648 +
15649 + fragment@15 {
15650 + target = <&clocks>;
15651 + __overlay__ {
15652 + claim-clocks = <
15653 + BCM2835_PLLD_DSI0
15654 + BCM2835_PLLD_DSI1
15655 + BCM2835_PLLH_AUX
15656 + BCM2835_PLLH_PIX
15657 + >;
15658 + };
15659 + };
15660 +
15661 + fragment@16 {
15662 + target = <&vec>;
15663 + __overlay__ {
15664 + status = "okay";
15665 + };
15666 + };
15667 +
15668 + __overrides__ {
15669 + cma-256 = <0>,"+0-1-2-3-4";
15670 + cma-192 = <0>,"-0+1-2-3-4";
15671 + cma-128 = <0>,"-0-1+2-3-4";
15672 + cma-96 = <0>,"-0-1-2+3-4";
15673 + cma-64 = <0>,"-0-1-2-3+4";
15674 + };
15675 +};
15676 --- /dev/null
15677 +++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
15678 @@ -0,0 +1,30 @@
15679 +/dts-v1/;
15680 +/plugin/;
15681 +
15682 +/{
15683 + compatible = "brcm,bcm2708";
15684 +
15685 + // There is no VGA driver module, but we need a platform device
15686 + // node (that doesn't already use pinctrl) to hang the pinctrl
15687 + // reference on - leds will do
15688 +
15689 + fragment@0 {
15690 + target = <&leds>;
15691 + __overlay__ {
15692 + pinctrl-names = "default";
15693 + pinctrl-0 = <&vga666_pins>;
15694 + };
15695 + };
15696 +
15697 + fragment@1 {
15698 + target = <&gpio>;
15699 + __overlay__ {
15700 + vga666_pins: vga666_pins {
15701 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
15702 + 13 14 15 16 17 18 19 20 21>;
15703 + brcm,function = <6>; /* alt2 */
15704 + brcm,pull = <0>; /* no pull */
15705 + };
15706 + };
15707 + };
15708 +};
15709 --- /dev/null
15710 +++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
15711 @@ -0,0 +1,41 @@
15712 +// Definitions for w1-gpio module (without external pullup)
15713 +/dts-v1/;
15714 +/plugin/;
15715 +
15716 +/ {
15717 + compatible = "brcm,bcm2708";
15718 +
15719 + fragment@0 {
15720 + target-path = "/";
15721 + __overlay__ {
15722 +
15723 + w1: onewire@0 {
15724 + compatible = "w1-gpio";
15725 + pinctrl-names = "default";
15726 + pinctrl-0 = <&w1_pins>;
15727 + gpios = <&gpio 4 0>;
15728 + rpi,parasitic-power = <0>;
15729 + status = "okay";
15730 + };
15731 + };
15732 + };
15733 +
15734 + fragment@1 {
15735 + target = <&gpio>;
15736 + __overlay__ {
15737 + w1_pins: w1_pins@0 {
15738 + brcm,pins = <4>;
15739 + brcm,function = <0>; // in (initially)
15740 + brcm,pull = <0>; // off
15741 + };
15742 + };
15743 + };
15744 +
15745 + __overrides__ {
15746 + gpiopin = <&w1>,"gpios:4",
15747 + <&w1>,"reg:0",
15748 + <&w1_pins>,"brcm,pins:0",
15749 + <&w1_pins>,"reg:0";
15750 + pullup = <&w1>,"rpi,parasitic-power:0";
15751 + };
15752 +};
15753 --- /dev/null
15754 +++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
15755 @@ -0,0 +1,43 @@
15756 +// Definitions for w1-gpio module (with external pullup)
15757 +/dts-v1/;
15758 +/plugin/;
15759 +
15760 +/ {
15761 + compatible = "brcm,bcm2708";
15762 +
15763 + fragment@0 {
15764 + target-path = "/";
15765 + __overlay__ {
15766 +
15767 + w1: onewire@0 {
15768 + compatible = "w1-gpio";
15769 + pinctrl-names = "default";
15770 + pinctrl-0 = <&w1_pins>;
15771 + gpios = <&gpio 4 0>, <&gpio 5 1>;
15772 + rpi,parasitic-power = <0>;
15773 + status = "okay";
15774 + };
15775 + };
15776 + };
15777 +
15778 + fragment@1 {
15779 + target = <&gpio>;
15780 + __overlay__ {
15781 + w1_pins: w1_pins@0 {
15782 + brcm,pins = <4 5>;
15783 + brcm,function = <0 1>; // in out
15784 + brcm,pull = <0 0>; // off off
15785 + };
15786 + };
15787 + };
15788 +
15789 + __overrides__ {
15790 + gpiopin = <&w1>,"gpios:4",
15791 + <&w1>,"reg:0",
15792 + <&w1_pins>,"brcm,pins:0",
15793 + <&w1_pins>,"reg:0";
15794 + extpullup = <&w1>,"gpios:16",
15795 + <&w1_pins>,"brcm,pins:4";
15796 + pullup = <&w1>,"rpi,parasitic-power:0";
15797 + };
15798 +};
15799 --- /dev/null
15800 +++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
15801 @@ -0,0 +1,44 @@
15802 +/*
15803 + * Device Tree overlay for Witty Pi extension board by UUGear
15804 + *
15805 + */
15806 +
15807 +/dts-v1/;
15808 +/plugin/;
15809 +
15810 +/ {
15811 +
15812 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15813 +
15814 + fragment@0 {
15815 + target = <&leds>;
15816 + __overlay__ {
15817 + compatible = "gpio-leds";
15818 + wittypi_led: wittypi_led {
15819 + label = "wittypi_led";
15820 + linux,default-trigger = "default-on";
15821 + gpios = <&gpio 17 0>;
15822 + };
15823 + };
15824 + };
15825 +
15826 + fragment@1 {
15827 + target = <&i2c1>;
15828 + __overlay__ {
15829 + #address-cells = <1>;
15830 + #size-cells = <0>;
15831 +
15832 + rtc: ds1337@68 {
15833 + compatible = "dallas,ds1337";
15834 + reg = <0x68>;
15835 + wakeup-source;
15836 + };
15837 + };
15838 + };
15839 +
15840 + __overrides__ {
15841 + led_gpio = <&wittypi_led>,"gpios:4";
15842 + led_trigger = <&wittypi_led>,"linux,default-trigger";
15843 + };
15844 +
15845 +};
15846 --- a/scripts/Makefile.dtbinst
15847 +++ b/scripts/Makefile.dtbinst
15848 @@ -20,6 +20,7 @@ include scripts/Kbuild.include
15849 include $(src)/Makefile
15850
15851 dtbinst-files := $(sort $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
15852 +dtboinst-files := $(sort $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
15853 dtbinst-dirs := $(subdir-y) $(subdir-m)
15854
15855 # Helper targets for Installing DTBs into the boot directory
15856 @@ -31,10 +32,13 @@ install-dir = $(patsubst $(dtbinst_root)
15857 $(dtbinst-files): %.dtb: $(obj)/%.dtb
15858 $(call cmd,dtb_install,$(install-dir))
15859
15860 +$(dtboinst-files): %.dtbo: $(obj)/%.dtbo
15861 + $(call cmd,dtb_install,$(install-dir))
15862 +
15863 $(dtbinst-dirs):
15864 $(Q)$(MAKE) $(dtbinst)=$(obj)/$@
15865
15866 -PHONY += $(dtbinst-files) $(dtbinst-dirs)
15867 -__dtbs_install: $(dtbinst-files) $(dtbinst-dirs)
15868 +PHONY += $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
15869 +__dtbs_install: $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
15870
15871 .PHONY: $(PHONY)
15872 --- a/scripts/Makefile.lib
15873 +++ b/scripts/Makefile.lib
15874 @@ -248,6 +248,7 @@ DTC ?= $(objtree)/scripts/dtc/dtc
15875 ifeq ($(findstring 1,$(KBUILD_ENABLE_EXTRA_GCC_CHECKS)),)
15876 DTC_FLAGS += -Wno-unit_address_vs_reg \
15877 -Wno-unit_address_format \
15878 + -Wno-gpios_property \
15879 -Wno-avoid_unnecessary_addr_size \
15880 -Wno-alias_paths \
15881 -Wno-graph_child_address \
15882 @@ -293,6 +294,18 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
15883 $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE
15884 $(call if_changed_dep,dtc)
15885
15886 +quiet_cmd_dtco = DTCO $@
15887 +cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
15888 + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
15889 + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
15890 + -i $(dir $<) $(DTC_FLAGS) \
15891 + -Wno-interrupts_property \
15892 + -d $(depfile).dtc.tmp $(dtc-tmp) ; \
15893 + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
15894 +
15895 +$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
15896 + $(call if_changed_dep,dtco)
15897 +
15898 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
15899
15900 # Bzip2
Staging tree of Mathias Kresin