target/linux/bcm63xx/patches-5.4/518-board_bcm6368.patch

   1 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
   2 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
   3 @@ -13,6 +13,8 @@
   4  #include <linux/kernel.h>
   5  #include <linux/string.h>
   6  #include <linux/pci_ids.h>
   7 +#include <linux/platform_data/b53.h>
   8 +#include <linux/spi/spi.h>
   9  #include <asm/addrspace.h>
  10  #include <bcm63xx_board.h>
  11  #include <bcm63xx_cpu.h>
  12 @@ -2067,6 +2069,648 @@ static struct board_info __initdata boar
  13  #endif /* CONFIG_BCM63XX_CPU_6362 */
  14
  15  /*
  16 + * known 6368 boards
  17 + */
  18 +#ifdef CONFIG_BCM63XX_CPU_6368
  19 +static struct board_info __initdata board_96368mvngr = {
  20 +       .name = "96368MVNgr",
  21 +       .expected_cpu_id = 0x6368,
  22 +
  23 +       .has_pci = 1,
  24 +       .has_ohci0 = 1,
  25 +       .has_ehci0 = 1,
  26 +
  27 +       .has_enetsw = 1,
  28 +       .enetsw = {
  29 +               .used_ports = {
  30 +                       [0] = {
  31 +                               .used = 1,
  32 +                               .phy_id = 1,
  33 +                               .name = "port1",
  34 +                       },
  35 +                       [1] = {
  36 +                               .used = 1,
  37 +                               .phy_id = 2,
  38 +                               .name = "port2",
  39 +                       },
  40 +                       [2] = {
  41 +                               .used = 1,
  42 +                               .phy_id = 3,
  43 +                               .name = "port3",
  44 +                       },
  45 +                       [3] = {
  46 +                               .used = 1,
  47 +                               .phy_id = 4,
  48 +                               .name = "port4",
  49 +                       },
  50 +               },
  51 +       },
  52 +};
  53 +
  54 +static struct board_info __initdata board_96368mvwg = {
  55 +       .name = "96368MVWG",
  56 +       .expected_cpu_id = 0x6368,
  57 +
  58 +       .has_pci = 1,
  59 +       .has_ohci0 = 1,
  60 +       .has_ehci0 = 1,
  61 +
  62 +       .has_usbd = 1,
  63 +       .usbd = {
  64 +               .use_fullspeed = 0,
  65 +               .port_no = 0,
  66 +       },
  67 +
  68 +       .has_enetsw = 1,
  69 +       .enetsw = {
  70 +               .used_ports = {
  71 +                       [1] = {
  72 +                               .used = 1,
  73 +                               .phy_id = 2,
  74 +                               .name = "port1",
  75 +                       },
  76 +                       [2] = {
  77 +                               .used = 1,
  78 +                               .phy_id = 3,
  79 +                               .name = "port2",
  80 +                       },
  81 +                       [4] = {
  82 +                               .used = 1,
  83 +                               .phy_id = 0x12,
  84 +                               .name = "port0",
  85 +                       },
  86 +                       [5] = {
  87 +                               .used = 1,
  88 +                               .phy_id = 0x11,
  89 +                               .name = "port3",
  90 +                       },
  91 +               },
  92 +       },
  93 +};
  94 +
  95 +static struct board_info __initdata board_AV4202N = {
  96 +       .name = "96368_Swiss_S1",
  97 +       .expected_cpu_id = 0x6368,
  98 +
  99 +       .has_pci = 1,
 100 +       .has_ohci0 = 1,
 101 +       .has_ehci0 = 1,
 102 +       .num_usbh_ports = 2,
 103 +
 104 +       .has_enetsw = 1,
 105 +       .enetsw = {
 106 +               .used_ports = {
 107 +                       [0] = {
 108 +                               .used = 1,
 109 +                               .phy_id = 1,
 110 +                               .name = "port1",
 111 +                       },
 112 +                       [1] = {
 113 +                               .used = 1,
 114 +                               .phy_id = 2,
 115 +                               .name = "port2",
 116 +                       },
 117 +                       [2] = {
 118 +                               .used = 1,
 119 +                               .phy_id = 3,
 120 +                               .name = "port3",
 121 +                       },
 122 +                       [3] = {
 123 +                               .used = 1,
 124 +                               .phy_id = 4,
 125 +                               .name = "port4",
 126 +                       },
 127 +               },
 128 +       },
 129 +
 130 +       .use_fallback_sprom = 1,
 131 +       .fallback_sprom = {
 132 +               .type = SPROM_BCM4322,
 133 +               .pci_bus = 0,
 134 +               .pci_dev = 1,
 135 +       },
 136 +};
 137 +
 138 +static struct board_info __initdata board_DGND3700v1_3800B = {
 139 +       .name = "U12L144T01",
 140 +       .expected_cpu_id = 0x6368,
 141 +
 142 +       .has_pci = 1,
 143 +       .has_ohci0 = 1,
 144 +       .has_ehci0 = 1,
 145 +       .num_usbh_ports = 2,
 146 +
 147 +       .has_enetsw = 1,
 148 +       .enetsw = {
 149 +               .used_ports = {
 150 +                       [5] = {
 151 +                               .used = 1,
 152 +                               .phy_id = 0xff,
 153 +                               .bypass_link = 1,
 154 +                               .force_speed = 1000,
 155 +                               .force_duplex_full = 1,
 156 +                               .name = "RGMII",
 157 +                       },
 158 +               },
 159 +       },
 160 +};
 161 +
 162 +static struct sprom_fixup __initdata EVG2000_fixups[] = {
 163 +  { .offset = 219, .value = 0xec08 },
 164 +};
 165 +
 166 +static struct board_info __initdata board_EVG2000 = {
 167 +       .name = "96369PVG",
 168 +       .expected_cpu_id = 0x6368,
 169 +
 170 +       .has_pci = 1,
 171 +       .has_ohci0 = 1,
 172 +       .has_ehci0 = 1,
 173 +       .num_usbh_ports = 2,
 174 +
 175 +       .has_enetsw = 1,
 176 +       .enetsw = {
 177 +               .used_ports = {
 178 +                       [5] = {
 179 +                               .used = 1,
 180 +                               .phy_id = 0xff,
 181 +                               .bypass_link = 1,
 182 +                               .force_speed = 1000,
 183 +                               .force_duplex_full = 1,
 184 +                               .name = "RGMII",
 185 +                       },
 186 +               },
 187 +       },
 188 +
 189 +       .use_fallback_sprom = 1,
 190 +       .fallback_sprom = {
 191 +               .type = SPROM_BCM4322,
 192 +               .pci_bus = 0,
 193 +               .pci_dev = 1,
 194 +               .board_fixups = EVG2000_fixups,
 195 +               .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
 196 +       },
 197 +};
 198 +
 199 +static struct board_info __initdata board_HG622 = {
 200 +       .name = "96368MVWG_hg622",
 201 +       .expected_cpu_id = 0x6368,
 202 +
 203 +       .has_pci = 1,
 204 +       .has_ohci0 = 1,
 205 +       .has_ehci0 = 1,
 206 +       .num_usbh_ports = 2,
 207 +
 208 +       .has_caldata = 1,
 209 +       .caldata = {
 210 +               {
 211 +                       .vendor = PCI_VENDOR_ID_RALINK,
 212 +                       .caldata_offset = 0xfa0000,
 213 +                       .slot = 1,
 214 +                       .eeprom = "rt2x00.eeprom",
 215 +               },
 216 +       },
 217 +
 218 +       .has_enetsw = 1,
 219 +       .enetsw = {
 220 +               .used_ports = {
 221 +                       [0] = {
 222 +                               .used = 1,
 223 +                               .phy_id = 1,
 224 +                               .name = "port1",
 225 +                       },
 226 +                       [1] = {
 227 +                               .used = 1,
 228 +                               .phy_id = 2,
 229 +                               .name = "port2",
 230 +                       },
 231 +                       [2] = {
 232 +                               .used = 1,
 233 +                               .phy_id = 3,
 234 +                               .name = "port3",
 235 +                       },
 236 +                       [3] = {
 237 +                               .used = 1,
 238 +                               .phy_id = 4,
 239 +                               .name = "port4",
 240 +                       },
 241 +               },
 242 +       },
 243 +};
 244 +
 245 +static struct board_info __initdata board_HG655b = {
 246 +       .name = "HW65x",
 247 +       .expected_cpu_id = 0x6368,
 248 +
 249 +       .has_pci = 1,
 250 +       .has_ohci0 = 1,
 251 +       .has_ehci0 = 1,
 252 +       .num_usbh_ports = 2,
 253 +
 254 +       .has_caldata = 1,
 255 +       .caldata = {
 256 +               {
 257 +                       .vendor = PCI_VENDOR_ID_RALINK,
 258 +                       .caldata_offset = 0x7c0000,
 259 +                       .slot = 1,
 260 +                       .eeprom = "rt2x00.eeprom",
 261 +               },
 262 +       },
 263 +
 264 +       .has_enetsw = 1,
 265 +       .enetsw = {
 266 +               .used_ports = {
 267 +                       [0] = {
 268 +                               .used = 1,
 269 +                               .phy_id = 1,
 270 +                               .name = "port1",
 271 +                       },
 272 +                       [1] = {
 273 +                               .used = 1,
 274 +                               .phy_id = 2,
 275 +                               .name = "port2",
 276 +                       },
 277 +                       [2] = {
 278 +                               .used = 1,
 279 +                               .phy_id = 3,
 280 +                               .name = "port3",
 281 +                       },
 282 +                       [3] = {
 283 +                               .used = 1,
 284 +                               .phy_id = 4,
 285 +                               .name = "port4",
 286 +                       },
 287 +               },
 288 +       },
 289 +};
 290 +
 291 +static struct board_info __initdata board_P870HW51A_V2 = {
 292 +       .name = "P870HW-51a_v2",
 293 +       .expected_cpu_id = 0x6368,
 294 +
 295 +       .has_pci = 1,
 296 +       .has_ohci0 = 1,
 297 +       .has_ehci0 = 1,
 298 +
 299 +       .has_enetsw = 1,
 300 +       .enetsw = {
 301 +               .used_ports = {
 302 +                       [0] = {
 303 +                               .used = 1,
 304 +                               .phy_id = 1,
 305 +                               .name = "port1",
 306 +                       },
 307 +                       [1] = {
 308 +                               .used = 1,
 309 +                               .phy_id = 2,
 310 +                               .name = "port2",
 311 +                       },
 312 +                       [2] = {
 313 +                               .used = 1,
 314 +                               .phy_id = 3,
 315 +                               .name = "port3",
 316 +                       },
 317 +                       [3] = {
 318 +                               .used = 1,
 319 +                               .phy_id = 4,
 320 +                               .name = "port4",
 321 +                       },
 322 +               },
 323 +       },
 324 +
 325 +       .use_fallback_sprom = 1,
 326 +       .fallback_sprom = {
 327 +               .type = SPROM_BCM4318,
 328 +               .pci_bus = 0,
 329 +               .pci_dev = 1,
 330 +       },
 331 +};
 332 +
 333 +static struct board_info __initdata board_R1000H = {
 334 +       .name = "R1000H",
 335 +       .expected_cpu_id = 0x6368,
 336 +
 337 +       .has_pci = 1,
 338 +       .has_ohci0 = 1,
 339 +       .has_ehci0 = 1,
 340 +
 341 +       .has_enetsw = 1,
 342 +       .enetsw = {
 343 +               .used_ports = {
 344 +                       [5] = {
 345 +                               .used = 1,
 346 +                               .phy_id = 0xff,
 347 +                               .bypass_link = 1,
 348 +                               .force_speed = 1000,
 349 +                               .force_duplex_full = 1,
 350 +                               .name = "RGMII",
 351 +                       },
 352 +               },
 353 +       },
 354 +};
 355 +
 356 +static struct sprom_fixup __initdata vh4032n_fixups[] = {
 357 +       { .offset = 2, .value = 0x04d2 },
 358 +       { .offset = 4, .value = 0x4350 },
 359 +       { .offset = 65, .value = 0x1300 },
 360 +       { .offset = 68, .value = 0x0402 },
 361 +       { .offset = 70, .value = 0x0090 },
 362 +       { .offset = 71, .value = 0x4c19 },
 363 +       { .offset = 72, .value = 0x2345 },
 364 +       { .offset = 87, .value = 0x0315 },
 365 +       { .offset = 88, .value = 0x0315 },
 366 +       { .offset = 96, .value = 0x2048 },
 367 +       { .offset = 97, .value = 0xfed7 },
 368 +       { .offset = 98, .value = 0x15a6 },
 369 +       { .offset = 99, .value = 0xfaee },
 370 +       { .offset = 100, .value = 0x3e3a },
 371 +       { .offset = 101, .value = 0x3a36 },
 372 +       { .offset = 102, .value = 0xff7f },
 373 +       { .offset = 103, .value = 0x11b9 },
 374 +       { .offset = 104, .value = 0xfc53 },
 375 +       { .offset = 105, .value = 0xffe6 },
 376 +       { .offset = 106, .value = 0xfdd2 },
 377 +       { .offset = 107, .value = 0xfe49 },
 378 +       { .offset = 108, .value = 0xff6a },
 379 +       { .offset = 109, .value = 0x136e },
 380 +       { .offset = 110, .value = 0xfbed },
 381 +       { .offset = 111, .value = 0x0000 },
 382 +       { .offset = 112, .value = 0x2048 },
 383 +       { .offset = 113, .value = 0xfee2 },
 384 +       { .offset = 114, .value = 0x15e5 },
 385 +       { .offset = 115, .value = 0xfaed },
 386 +       { .offset = 116, .value = 0x3e3a },
 387 +       { .offset = 117, .value = 0x3a36 },
 388 +       { .offset = 118, .value = 0xffc8 },
 389 +       { .offset = 119, .value = 0x12b8 },
 390 +       { .offset = 120, .value = 0xfca1 },
 391 +       { .offset = 121, .value = 0xff9b },
 392 +       { .offset = 122, .value = 0x122a },
 393 +       { .offset = 123, .value = 0xfcc8 },
 394 +       { .offset = 124, .value = 0xff95 },
 395 +       { .offset = 125, .value = 0x146b },
 396 +       { .offset = 126, .value = 0xfbba },
 397 +       { .offset = 127, .value = 0x0000 },
 398 +       { .offset = 161, .value = 0x0000 },
 399 +       { .offset = 162, .value = 0x0000 },
 400 +       { .offset = 169, .value = 0x0000 },
 401 +       { .offset = 170, .value = 0x0000 },
 402 +       { .offset = 171, .value = 0x0000 },
 403 +       { .offset = 172, .value = 0x0000 },
 404 +       { .offset = 173, .value = 0x0000 },
 405 +       { .offset = 174, .value = 0x0000 },
 406 +       { .offset = 175, .value = 0x0000 },
 407 +       { .offset = 176, .value = 0x0000 },
 408 +       { .offset = 219, .value = 0x1108 },
 409 +};
 410 +
 411 +static struct board_info __initdata board_VH4032N = {
 412 +       .name = "VH4032N",
 413 +       .expected_cpu_id = 0x6368,
 414 +
 415 +       .has_pci = 1,
 416 +       .has_ohci0 = 1,
 417 +       .has_ehci0 = 1,
 418 +       .num_usbh_ports = 2,
 419 +
 420 +       .has_enetsw = 1,
 421 +       .enetsw = {
 422 +               .used_ports = {
 423 +                       [0] = {
 424 +                               .used = 1,
 425 +                               .phy_id = 1,
 426 +                               .name = "LAN4",
 427 +                       },
 428 +                       [1] = {
 429 +                               .used = 1,
 430 +                               .phy_id = 2,
 431 +                               .name = "LAN3",
 432 +                       },
 433 +                       [2] = {
 434 +                               .used = 1,
 435 +                               .phy_id = 3,
 436 +                               .name = "LAN2",
 437 +                       },
 438 +                       [3] = {
 439 +                               .used = 1,
 440 +                               .phy_id = 4,
 441 +                               .name = "LAN1",
 442 +                       },
 443 +               },
 444 +       },
 445 +
 446 +       .use_fallback_sprom = 1,
 447 +       .fallback_sprom = {
 448 +               .type = SPROM_BCM43222,
 449 +               .pci_bus = 0,
 450 +               .pci_dev = 1,
 451 +               .board_fixups = vh4032n_fixups,
 452 +               .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
 453 +       },
 454 +};
 455 +
 456 +static struct sprom_fixup __initdata vr3025u_fixups[] = {
 457 +       { .offset = 97, .value = 0xfeb3 },
 458 +       { .offset = 98, .value = 0x1618 },
 459 +       { .offset = 99, .value = 0xfab0 },
 460 +       { .offset = 113, .value = 0xfed1 },
 461 +       { .offset = 114, .value = 0x1609 },
 462 +       { .offset = 115, .value = 0xfad9 },
 463 +};
 464 +
 465 +static struct board_info __initdata board_VR3025u = {
 466 +       .name = "96368M-1541N",
 467 +       .expected_cpu_id = 0x6368,
 468 +
 469 +       .has_pci = 1,
 470 +       .has_ohci0 = 1,
 471 +       .has_ehci0 = 1,
 472 +
 473 +       .has_enetsw = 1,
 474 +       .enetsw = {
 475 +               .used_ports = {
 476 +                       [0] = {
 477 +                               .used = 1,
 478 +                               .phy_id = 1,
 479 +                               .name = "port1",
 480 +                       },
 481 +                       [1] = {
 482 +                               .used = 1,
 483 +                               .phy_id = 2,
 484 +                               .name = "port2",
 485 +                       },
 486 +                       [2] = {
 487 +                               .used = 1,
 488 +                               .phy_id = 3,
 489 +                               .name = "port3",
 490 +                       },
 491 +                       [3] = {
 492 +                               .used = 1,
 493 +                               .phy_id = 4,
 494 +                               .name = "port4",
 495 +                       },
 496 +               },
 497 +       },
 498 +
 499 +       .use_fallback_sprom = 1,
 500 +       .fallback_sprom = {
 501 +               .type = SPROM_BCM43222,
 502 +               .pci_bus = 0,
 503 +               .pci_dev = 1,
 504 +               .board_fixups = vr3025u_fixups,
 505 +               .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
 506 +       },
 507 +};
 508 +
 509 +static struct sprom_fixup __initdata vr3025un_fixups[] = {
 510 +       { .offset = 97, .value = 0xfeb3 },
 511 +       { .offset = 98, .value = 0x1618 },
 512 +       { .offset = 99, .value = 0xfab0 },
 513 +       { .offset = 113, .value = 0xfed1 },
 514 +       { .offset = 114, .value = 0x1609 },
 515 +       { .offset = 115, .value = 0xfad9 },
 516 +};
 517 +
 518 +static struct board_info __initdata board_VR3025un = {
 519 +       .name = "96368M-1341N",
 520 +       .expected_cpu_id = 0x6368,
 521 +
 522 +       .has_pci = 1,
 523 +       .has_ohci0 = 1,
 524 +       .has_ehci0 = 1,
 525 +
 526 +       .has_enetsw = 1,
 527 +       .enetsw = {
 528 +               .used_ports = {
 529 +                       [0] = {
 530 +                               .used = 1,
 531 +                               .phy_id = 1,
 532 +                               .name = "port1",
 533 +                       },
 534 +                       [1] = {
 535 +                               .used = 1,
 536 +                               .phy_id = 2,
 537 +                               .name = "port2",
 538 +                       },
 539 +                       [2] = {
 540 +                               .used = 1,
 541 +                               .phy_id = 3,
 542 +                               .name = "port3",
 543 +                       },
 544 +                       [3] = {
 545 +                               .used = 1,
 546 +                               .phy_id = 4,
 547 +                               .name = "port4",
 548 +                       },
 549 +               },
 550 +       },
 551 +
 552 +       .use_fallback_sprom = 1,
 553 +       .fallback_sprom = {
 554 +               .type = SPROM_BCM43222,
 555 +               .pci_bus = 0,
 556 +               .pci_dev = 1,
 557 +               .board_fixups = vr3025un_fixups,
 558 +               .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
 559 +       },
 560 +};
 561 +
 562 +static struct sprom_fixup __initdata vr3026e_fixups[] = {
 563 +       { .offset = 97, .value = 0xfeb3 },
 564 +       { .offset = 98, .value = 0x1618 },
 565 +       { .offset = 99, .value = 0xfab0 },
 566 +       { .offset = 113, .value = 0xfed1 },
 567 +       { .offset = 114, .value = 0x1609 },
 568 +       { .offset = 115, .value = 0xfad9 },
 569 +};
 570 +
 571 +static struct board_info __initdata board_VR3026e = {
 572 +       .name = "96368MT-1341N1",
 573 +       .expected_cpu_id = 0x6368,
 574 +
 575 +       .has_pci = 1,
 576 +       .has_ohci0 = 1,
 577 +       .has_ehci0 = 1,
 578 +
 579 +       .has_enetsw = 1,
 580 +       .enetsw = {
 581 +               .used_ports = {
 582 +                       [0] = {
 583 +                               .used = 1,
 584 +                               .phy_id = 1,
 585 +                               .name = "port1",
 586 +                       },
 587 +                       [1] = {
 588 +                               .used = 1,
 589 +                               .phy_id = 2,
 590 +                               .name = "port2",
 591 +                       },
 592 +                       [2] = {
 593 +                               .used = 1,
 594 +                               .phy_id = 3,
 595 +                               .name = "port3",
 596 +                       },
 597 +                       [3] = {
 598 +                               .used = 1,
 599 +                               .phy_id = 4,
 600 +                               .name = "port4",
 601 +                       },
 602 +               },
 603 +       },
 604 +
 605 +       .use_fallback_sprom = 1,
 606 +       .fallback_sprom = {
 607 +               .type = SPROM_BCM43222,
 608 +               .pci_bus = 0,
 609 +               .pci_dev = 1,
 610 +               .board_fixups = vr3026e_fixups,
 611 +               .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
 612 +       },
 613 +};
 614 +
 615 +static struct sprom_fixup __initdata wap5813n_fixups[] = {
 616 +       { .offset = 97, .value = 0xfeed },
 617 +       { .offset = 98, .value = 0x15d1 },
 618 +       { .offset = 99, .value = 0xfb0d },
 619 +       { .offset = 113, .value = 0xfef7 },
 620 +       { .offset = 114, .value = 0x15f7 },
 621 +       { .offset = 115, .value = 0xfb1a },
 622 +};
 623 +
 624 +static struct board_info __initdata board_WAP5813n = {
 625 +       .name = "96369R-1231N",
 626 +       .expected_cpu_id = 0x6368,
 627 +
 628 +       .has_pci = 1,
 629 +       .has_ohci0 = 1,
 630 +       .has_ehci0 = 1,
 631 +
 632 +       .has_enetsw = 1,
 633 +       .enetsw = {
 634 +               .used_ports = {
 635 +                       [4] = {
 636 +                               .used = 1,
 637 +                               .phy_id = 0xff,
 638 +                               .bypass_link = 1,
 639 +                               .force_speed = 1000,
 640 +                               .force_duplex_full = 1,
 641 +                               .name = "RGMII",
 642 +                       },
 643 +               },
 644 +       },
 645 +
 646 +       .use_fallback_sprom = 1,
 647 +       .fallback_sprom = {
 648 +               .type = SPROM_BCM43222,
 649 +               .pci_bus = 0,
 650 +               .pci_dev = 1,
 651 +               .board_fixups = wap5813n_fixups,
 652 +               .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
 653 +       },
 654 +};
 655 +#endif /* CONFIG_BCM63XX_CPU_6368 */
 656 +
 657 +/*
 658   * all boards
 659   */
 660  static const struct board_info __initconst *bcm963xx_boards[] = {
 661 @@ -2155,6 +2799,22 @@ static const struct board_info __initcon
 662         &board_hg253s_v2,
 663         &board_nb6,
 664  #endif /* CONFIG_BCM63XX_CPU_6362 */
 665 +#ifdef CONFIG_BCM63XX_CPU_6368
 666 +       &board_96368mvngr,
 667 +       &board_96368mvwg,
 668 +       &board_AV4202N,
 669 +       &board_DGND3700v1_3800B,
 670 +       &board_EVG2000,
 671 +       &board_HG622,
 672 +       &board_HG655b,
 673 +       &board_P870HW51A_V2,
 674 +       &board_R1000H,
 675 +       &board_VH4032N,
 676 +       &board_VR3025u,
 677 +       &board_VR3025un,
 678 +       &board_VR3026e,
 679 +       &board_WAP5813n,
 680 +#endif /* CONFIG_BCM63XX_CPU_6368 */
 681  };
 682
 683  static struct of_device_id const bcm963xx_boards_dt[] = {
 684 @@ -2256,6 +2916,20 @@ static struct of_device_id const bcm963x
 685         { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
 686  #endif /* CONFIG_BCM63XX_CPU_6362 */
 687  #ifdef CONFIG_BCM63XX_CPU_6368
 688 +       { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
 689 +       { .compatible = "adb,av4202n", .data = &board_AV4202N, },
 690 +       { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
 691 +       { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
 692 +       { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
 693 +       { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
 694 +       { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
 695 +       { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
 696 +       { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
 697 +       { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
 698 +       { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
 699 +       { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
 700 +       { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
 701 +       { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
 702  #endif /* CONFIG_BCM63XX_CPU_6368 */
 703  #ifdef CONFIG_BCM63XX_CPU_63268
 704  #endif /* CONFIG_BCM63XX_CPU_63268 */
 705 --- a/arch/mips/bcm63xx/boards/board_common.c
 706 +++ b/arch/mips/bcm63xx/boards/board_common.c
 707 @@ -81,12 +81,25 @@ void __init board_early_setup(const stru
 708                 bcm63xx_pci_enabled = 1;
 709                 if (BCMCPU_IS_6348())
 710                         val |= GPIO_MODE_6348_G2_PCI;
 711 +
 712 +               if (BCMCPU_IS_6368())
 713 +                       val |= GPIO_MODE_6368_PCI_REQ1 |
 714 +                               GPIO_MODE_6368_PCI_GNT1 |
 715 +                               GPIO_MODE_6368_PCI_INTB |
 716 +                               GPIO_MODE_6368_PCI_REQ0 |
 717 +                               GPIO_MODE_6368_PCI_GNT0;
 718         }
 719  #endif
 720
 721         if (board.has_pccard) {
 722                 if (BCMCPU_IS_6348())
 723                         val |= GPIO_MODE_6348_G1_MII_PCCARD;
 724 +
 725 +               if (BCMCPU_IS_6368())
 726 +                       val |= GPIO_MODE_6368_PCMCIA_CD1 |
 727 +                               GPIO_MODE_6368_PCMCIA_CD2 |
 728 +                               GPIO_MODE_6368_PCMCIA_VS1 |
 729 +                               GPIO_MODE_6368_PCMCIA_VS2;
 730         }
 731
 732         if (board.has_enet0 && !board.enet0.use_internal_phy) {