target/linux/bcm53xx/patches-5.15/030-v5.15-0007-ARM-dts-NSP-Add-Ax-stepping-modifications.patch

   1 From 2addf9266a1d0f4ba59c9868b3effcd50de441a4 Mon Sep 17 00:00:00 2001
   2 From: Matthew Hagan <mnhagan88@gmail.com>
   3 Date: Fri, 6 Aug 2021 21:44:33 +0100
   4 Subject: [PATCH] ARM: dts: NSP: Add Ax stepping modifications
   5
   6 While uncommon, some Ax NSP SoCs exist in the wild. This stepping
   7 requires a modified secondary CPU boot-reg and removal of DMA coherency
   8 properties. Without these modifications, the secondary CPU will be
   9 inactive and many peripherals will exhibit undefined behaviour.
  10
  11 Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
  12 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  13 ---
  14  arch/arm/boot/dts/bcm-nsp-ax.dtsi | 70 +++++++++++++++++++++++++++++++
  15  1 file changed, 70 insertions(+)
  16  create mode 100644 arch/arm/boot/dts/bcm-nsp-ax.dtsi
  17
  18 --- /dev/null
  19 +++ b/arch/arm/boot/dts/bcm-nsp-ax.dtsi
  20 @@ -0,0 +1,70 @@
  21 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  22 +/*
  23 + * Broadcom Northstar Plus Ax stepping-specific bindings.
  24 + * Notable differences from B0+ are the secondary-boot-reg and
  25 + * lack of DMA coherency.
  26 + */
  27 +
  28 +&cpu1 {
  29 +       secondary-boot-reg = <0xffff042c>;
  30 +};
  31 +
  32 +&dma {
  33 +       /delete-property/ dma-coherent;
  34 +};
  35 +
  36 +&sdio {
  37 +       /delete-property/ dma-coherent;
  38 +};
  39 +
  40 +&amac0 {
  41 +       /delete-property/ dma-coherent;
  42 +};
  43 +
  44 +&amac1 {
  45 +       /delete-property/ dma-coherent;
  46 +};
  47 +
  48 +&amac2 {
  49 +       /delete-property/ dma-coherent;
  50 +};
  51 +
  52 +&ehci0 {
  53 +       /delete-property/ dma-coherent;
  54 +};
  55 +
  56 +&mailbox {
  57 +       /delete-property/ dma-coherent;
  58 +};
  59 +
  60 +&xhci {
  61 +       /delete-property/ dma-coherent;
  62 +};
  63 +
  64 +&ehci0 {
  65 +       /delete-property/ dma-coherent;
  66 +};
  67 +
  68 +&ohci0 {
  69 +       /delete-property/ dma-coherent;
  70 +};
  71 +
  72 +&i2c0 {
  73 +       /delete-property/ dma-coherent;
  74 +};
  75 +
  76 +&sata {
  77 +       /delete-property/ dma-coherent;
  78 +};
  79 +
  80 +&pcie0 {
  81 +       /delete-property/ dma-coherent;
  82 +};
  83 +
  84 +&pcie1 {
  85 +       /delete-property/ dma-coherent;
  86 +};
  87 +
  88 +&pcie2 {
  89 +       /delete-property/ dma-coherent;
  90 +};