f13be0bfd749c6cfa678e783548622bcbf3c8716
[openwrt/staging/mkresin.git] / target / linux / at91 / patches-5.10 / 114-clk-at91-sama7g5-remove-all-kernel-doc-kernel-doc-wa.patch
1 From 9997227090cf529675aeb775585ec9f6c2f0f131 Mon Sep 17 00:00:00 2001
2 From: Randy Dunlap <rdunlap@infradead.org>
3 Date: Thu, 19 Aug 2021 15:32:37 -0700
4 Subject: [PATCH 114/247] clk: at91: sama7g5: remove all kernel-doc &
5 kernel-doc warnings
6
7 Remove all "/**" kernel-doc markers from sama7g5.c since they are
8 all internal to this driver source file only.
9 This eliminates 14 warnings that were reported by the kernel test robot.
10
11 Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
12 Reported-by: kernel test robot <lkp@intel.com>
13 Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
14 Cc: Michael Turquette <mturquette@baylibre.com>
15 Cc: Stephen Boyd <sboyd@kernel.org>
16 Cc: Eugen Hristev <eugen.hristev@microchip.com>
17 Cc: linux-clk@vger.kernel.org
18 Cc: linux-arm-kernel@lists.infradead.org
19 Link: https://lore.kernel.org/r/20210819223237.20115-1-rdunlap@infradead.org
20 Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
21 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
22 ---
23 drivers/clk/at91/sama7g5.c | 14 +++++++-------
24 1 file changed, 7 insertions(+), 7 deletions(-)
25
26 diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
27 index 9e1ec48c4474..cf8c079aa086 100644
28 --- a/drivers/clk/at91/sama7g5.c
29 +++ b/drivers/clk/at91/sama7g5.c
30 @@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
31 static DEFINE_SPINLOCK(pmc_mck0_lock);
32 static DEFINE_SPINLOCK(pmc_mckX_lock);
33
34 -/**
35 +/*
36 * PLL clocks identifiers
37 * @PLL_ID_CPU: CPU PLL identifier
38 * @PLL_ID_SYS: System PLL identifier
39 @@ -56,7 +56,7 @@ enum pll_ids {
40 PLL_ID_MAX,
41 };
42
43 -/**
44 +/*
45 * PLL type identifiers
46 * @PLL_TYPE_FRAC: fractional PLL identifier
47 * @PLL_TYPE_DIV: divider PLL identifier
48 @@ -118,7 +118,7 @@ static const struct clk_pll_characteristics pll_characteristics = {
49 .output = pll_outputs,
50 };
51
52 -/**
53 +/*
54 * PLL clocks description
55 * @n: clock name
56 * @p: clock parent
57 @@ -285,7 +285,7 @@ static const struct {
58 },
59 };
60
61 -/**
62 +/*
63 * Master clock (MCK[1..4]) description
64 * @n: clock name
65 * @ep: extra parents names array
66 @@ -337,7 +337,7 @@ static const struct {
67 .c = 1, },
68 };
69
70 -/**
71 +/*
72 * System clock description
73 * @n: clock name
74 * @p: clock parent name
75 @@ -361,7 +361,7 @@ static const struct {
76 /* Mux table for programmable clocks. */
77 static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
78
79 -/**
80 +/*
81 * Peripheral clock description
82 * @n: clock name
83 * @p: clock parent name
84 @@ -449,7 +449,7 @@ static const struct {
85 { .n = "uhphs_clk", .p = "mck1", .id = 106, },
86 };
87
88 -/**
89 +/*
90 * Generic clock description
91 * @n: clock name
92 * @pp: PLL parents
93 --
94 2.32.0
95