ar71xx: merge nand scan patch
[openwrt/staging/mkresin.git] / target / linux / ar71xx / files / drivers / mtd / nand / rb4xx_nand.c
1 /*
2 * NAND flash driver for the MikroTik RouterBoard 4xx series
3 *
4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This file was based on the driver for Linux 2.6.22 published by
8 * MikroTik for their RouterBoard 4xx series devices.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 */
14
15 #include <linux/init.h>
16 #include <linux/mtd/nand.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/partitions.h>
19 #include <linux/platform_device.h>
20 #include <linux/delay.h>
21 #include <linux/io.h>
22 #include <linux/gpio.h>
23 #include <linux/slab.h>
24
25 #include <asm/mach-ar71xx/ar71xx.h>
26 #include <asm/mach-ar71xx/rb4xx_cpld.h>
27
28 #define DRV_NAME "rb4xx-nand"
29 #define DRV_VERSION "0.2.0"
30 #define DRV_DESC "NAND flash driver for RouterBoard 4xx series"
31
32 #define RB4XX_NAND_GPIO_READY 5
33 #define RB4XX_NAND_GPIO_ALE 37
34 #define RB4XX_NAND_GPIO_CLE 38
35 #define RB4XX_NAND_GPIO_NCE 39
36
37 struct rb4xx_nand_info {
38 struct nand_chip chip;
39 struct mtd_info mtd;
40 };
41
42 /*
43 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
44 * will not be able to find the kernel that we load.
45 */
46 static struct nand_ecclayout rb4xx_nand_ecclayout = {
47 .eccbytes = 6,
48 .eccpos = { 8, 9, 10, 13, 14, 15 },
49 .oobavail = 9,
50 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
51 };
52
53 static struct mtd_partition rb4xx_nand_partitions[] = {
54 {
55 .name = "booter",
56 .offset = 0,
57 .size = (256 * 1024),
58 .mask_flags = MTD_WRITEABLE,
59 },
60 {
61 .name = "kernel",
62 .offset = (256 * 1024),
63 .size = (6 * 1024 * 1024) - (256 * 1024),
64 },
65 {
66 .name = "rootfs",
67 .offset = MTDPART_OFS_NXTBLK,
68 .size = MTDPART_SIZ_FULL,
69 },
70 };
71
72 static int rb4xx_nand_dev_ready(struct mtd_info *mtd)
73 {
74 return gpio_get_value_cansleep(RB4XX_NAND_GPIO_READY);
75 }
76
77 static void rb4xx_nand_write_cmd(unsigned char cmd)
78 {
79 unsigned char data = cmd;
80 int err;
81
82 err = rb4xx_cpld_write(&data, 1);
83 if (err)
84 pr_err("rb4xx_nand: write cmd failed, err=%d\n", err);
85 }
86
87 static void rb4xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
88 unsigned int ctrl)
89 {
90 if (ctrl & NAND_CTRL_CHANGE) {
91 gpio_set_value_cansleep(RB4XX_NAND_GPIO_CLE,
92 (ctrl & NAND_CLE) ? 1 : 0);
93 gpio_set_value_cansleep(RB4XX_NAND_GPIO_ALE,
94 (ctrl & NAND_ALE) ? 1 : 0);
95 gpio_set_value_cansleep(RB4XX_NAND_GPIO_NCE,
96 (ctrl & NAND_NCE) ? 0 : 1);
97 }
98
99 if (cmd != NAND_CMD_NONE)
100 rb4xx_nand_write_cmd(cmd);
101 }
102
103 static unsigned char rb4xx_nand_read_byte(struct mtd_info *mtd)
104 {
105 unsigned char data = 0;
106 int err;
107
108 err = rb4xx_cpld_read(&data, NULL, 1);
109 if (err) {
110 pr_err("rb4xx_nand: read data failed, err=%d\n", err);
111 data = 0xff;
112 }
113
114 return data;
115 }
116
117 static void rb4xx_nand_write_buf(struct mtd_info *mtd, const unsigned char *buf,
118 int len)
119 {
120 int err;
121
122 err = rb4xx_cpld_write(buf, len);
123 if (err)
124 pr_err("rb4xx_nand: write buf failed, err=%d\n", err);
125 }
126
127 static void rb4xx_nand_read_buf(struct mtd_info *mtd, unsigned char *buf,
128 int len)
129 {
130 int err;
131
132 err = rb4xx_cpld_read(buf, NULL, len);
133 if (err)
134 pr_err("rb4xx_nand: read buf failed, err=%d\n", err);
135 }
136
137 static int __init rb4xx_nand_probe(struct platform_device *pdev)
138 {
139 struct rb4xx_nand_info *info;
140 int ret;
141
142 printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
143
144 ret = gpio_request(RB4XX_NAND_GPIO_READY, "NAND RDY");
145 if (ret) {
146 dev_err(&pdev->dev, "unable to request gpio %d\n",
147 RB4XX_NAND_GPIO_READY);
148 goto err;
149 }
150
151 ret = gpio_direction_input(RB4XX_NAND_GPIO_READY);
152 if (ret) {
153 dev_err(&pdev->dev, "unable to set input mode on gpio %d\n",
154 RB4XX_NAND_GPIO_READY);
155 goto err_free_gpio_ready;
156 }
157
158 ret = gpio_request(RB4XX_NAND_GPIO_ALE, "NAND ALE");
159 if (ret) {
160 dev_err(&pdev->dev, "unable to request gpio %d\n",
161 RB4XX_NAND_GPIO_ALE);
162 goto err_free_gpio_ready;
163 }
164
165 ret = gpio_direction_output(RB4XX_NAND_GPIO_ALE, 0);
166 if (ret) {
167 dev_err(&pdev->dev, "unable to set output mode on gpio %d\n",
168 RB4XX_NAND_GPIO_ALE);
169 goto err_free_gpio_ale;
170 }
171
172 ret = gpio_request(RB4XX_NAND_GPIO_CLE, "NAND CLE");
173 if (ret) {
174 dev_err(&pdev->dev, "unable to request gpio %d\n",
175 RB4XX_NAND_GPIO_CLE);
176 goto err_free_gpio_ale;
177 }
178
179 ret = gpio_direction_output(RB4XX_NAND_GPIO_CLE, 0);
180 if (ret) {
181 dev_err(&pdev->dev, "unable to set output mode on gpio %d\n",
182 RB4XX_NAND_GPIO_CLE);
183 goto err_free_gpio_cle;
184 }
185
186 ret = gpio_request(RB4XX_NAND_GPIO_NCE, "NAND NCE");
187 if (ret) {
188 dev_err(&pdev->dev, "unable to request gpio %d\n",
189 RB4XX_NAND_GPIO_NCE);
190 goto err_free_gpio_cle;
191 }
192
193 ret = gpio_direction_output(RB4XX_NAND_GPIO_NCE, 1);
194 if (ret) {
195 dev_err(&pdev->dev, "unable to set output mode on gpio %d\n",
196 RB4XX_NAND_GPIO_ALE);
197 goto err_free_gpio_nce;
198 }
199
200 info = kzalloc(sizeof(*info), GFP_KERNEL);
201 if (!info) {
202 dev_err(&pdev->dev, "rb4xx-nand: no memory for private data\n");
203 ret = -ENOMEM;
204 goto err_free_gpio_nce;
205 }
206
207 info->chip.priv = &info;
208 info->mtd.priv = &info->chip;
209 info->mtd.owner = THIS_MODULE;
210
211 info->chip.cmd_ctrl = rb4xx_nand_cmd_ctrl;
212 info->chip.dev_ready = rb4xx_nand_dev_ready;
213 info->chip.read_byte = rb4xx_nand_read_byte;
214 info->chip.write_buf = rb4xx_nand_write_buf;
215 info->chip.read_buf = rb4xx_nand_read_buf;
216 #if 0
217 info->chip.verify_buf = rb4xx_nand_verify_buf;
218 #endif
219
220 info->chip.chip_delay = 25;
221 info->chip.ecc.mode = NAND_ECC_SOFT;
222 info->chip.options |= NAND_NO_AUTOINCR;
223
224 platform_set_drvdata(pdev, info);
225
226 ret = nand_scan_ident(&info->mtd, 1, NULL);
227 if (ret) {
228 ret = -ENXIO;
229 goto err_free_info;
230 }
231
232 if (info->mtd.writesize == 512)
233 info->chip.ecc.layout = &rb4xx_nand_ecclayout;
234
235 ret = nand_scan_tail(&info->mtd);
236 if (ret) {
237 return -ENXIO;
238 goto err_set_drvdata;
239 }
240
241 #ifdef CONFIG_MTD_PARTITIONS
242 ret = add_mtd_partitions(&info->mtd, rb4xx_nand_partitions,
243 ARRAY_SIZE(rb4xx_nand_partitions));
244 #else
245 ret = add_mtd_device(&info->mtd);
246 #endif
247 if (ret)
248 goto err_release_nand;
249
250 return 0;
251
252 err_release_nand:
253 nand_release(&info->mtd);
254 err_set_drvdata:
255 platform_set_drvdata(pdev, NULL);
256 err_free_info:
257 kfree(info);
258 err_free_gpio_nce:
259 gpio_free(RB4XX_NAND_GPIO_NCE);
260 err_free_gpio_cle:
261 gpio_free(RB4XX_NAND_GPIO_CLE);
262 err_free_gpio_ale:
263 gpio_free(RB4XX_NAND_GPIO_ALE);
264 err_free_gpio_ready:
265 gpio_free(RB4XX_NAND_GPIO_READY);
266 err:
267 return ret;
268 }
269
270 static int __devexit rb4xx_nand_remove(struct platform_device *pdev)
271 {
272 struct rb4xx_nand_info *info = platform_get_drvdata(pdev);
273
274 nand_release(&info->mtd);
275 platform_set_drvdata(pdev, NULL);
276 kfree(info);
277 gpio_free(RB4XX_NAND_GPIO_NCE);
278 gpio_free(RB4XX_NAND_GPIO_CLE);
279 gpio_free(RB4XX_NAND_GPIO_ALE);
280 gpio_free(RB4XX_NAND_GPIO_READY);
281
282 return 0;
283 }
284
285 static struct platform_driver rb4xx_nand_driver = {
286 .probe = rb4xx_nand_probe,
287 .remove = __devexit_p(rb4xx_nand_remove),
288 .driver = {
289 .name = DRV_NAME,
290 .owner = THIS_MODULE,
291 },
292 };
293
294 static int __init rb4xx_nand_init(void)
295 {
296 return platform_driver_register(&rb4xx_nand_driver);
297 }
298
299 static void __exit rb4xx_nand_exit(void)
300 {
301 platform_driver_unregister(&rb4xx_nand_driver);
302 }
303
304 module_init(rb4xx_nand_init);
305 module_exit(rb4xx_nand_exit);
306
307 MODULE_DESCRIPTION(DRV_DESC);
308 MODULE_VERSION(DRV_VERSION);
309 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
310 MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
311 MODULE_LICENSE("GPL v2");