target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch

   1 From 1dcd0095019aca7533eaeed9475d995a4eb30137 Mon Sep 17 00:00:00 2001
   2 From: Corentin Labbe <clabbe.montjoie@gmail.com>
   3 Date: Mon, 5 Jun 2017 21:21:26 +0200
   4 Subject: ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
   5
   6 The dwmac-sun8i hardware is present on the Orange PI plus.
   7 It uses an external PHY rtl8211e via RGMII.
   8
   9 This patch create the needed regulator, emac and phy nodes.
  10
  11 Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
  12 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  13 ---
  14  arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++
  15  1 file changed, 32 insertions(+)
  16
  17 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
  18 +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
  19 @@ -47,6 +47,20 @@
  20         model = "Xunlong Orange Pi Plus / Plus 2";
  21         compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
  22
  23 +       aliases {
  24 +               ethernet0 = &emac;
  25 +       };
  26 +
  27 +       reg_gmac_3v3: gmac-3v3 {
  28 +               compatible = "regulator-fixed";
  29 +               regulator-name = "gmac-3v3";
  30 +               regulator-min-microvolt = <3300000>;
  31 +               regulator-max-microvolt = <3300000>;
  32 +               startup-delay-us = <100000>;
  33 +               enable-active-high;
  34 +               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
  35 +       };
  36 +
  37         reg_usb3_vbus: usb3-vbus {
  38                 compatible = "regulator-fixed";
  39                 pinctrl-names = "default";
  40 @@ -64,6 +78,24 @@
  41         status = "okay";
  42  };
  43
  44 +&emac {
  45 +       pinctrl-names = "default";
  46 +       pinctrl-0 = <&emac_rgmii_pins>;
  47 +       phy-supply = <&reg_gmac_3v3>;
  48 +       phy-handle = <&ext_rgmii_phy>;
  49 +       phy-mode = "rgmii";
  50 +
  51 +       allwinner,leds-active-low;
  52 +       status = "okay";
  53 +};
  54 +
  55 +&mdio {
  56 +       ext_rgmii_phy: ethernet-phy@1 {
  57 +               compatible = "ethernet-phy-ieee802.3-c22";
  58 +               reg = <0>;
  59 +       };
  60 +};
  61 +
  62  &mmc2 {
  63         pinctrl-names = "default";
  64         pinctrl-0 = <&mmc2_8bit_pins>;