target/linux/mediatek/patches-4.14/0196-mtd-mtk-nor-modify-functions-name-more-generally.patch

   1 From 4dab73d46eb58c142b5d2e7039f12e4e5df357ad Mon Sep 17 00:00:00 2001
   2 From: Guochun Mao <guochun.mao@mediatek.com>
   3 Date: Mon, 18 Dec 2017 09:47:35 +0800
   4 Subject: [PATCH 196/224] mtd: mtk-nor: modify functions' name more generally
   5
   6 Since more and more Mediatek's SoC can use this driver to
   7 control spi-nor flash, functions' name with "mt8173_" is
   8 no longer properly. Replacing "mt8173_" with "mtk_" will
   9 be more accurate to describe these functions' usable scope.
  10
  11 Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
  12 Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
  13 ---
  14  drivers/mtd/spi-nor/mtk-quadspi.c | 240 +++++++++++++++++++-------------------
  15  1 file changed, 120 insertions(+), 120 deletions(-)
  16
  17 diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c
  18 index abe455ccd68b..5442993b71ff 100644
  19 --- a/drivers/mtd/spi-nor/mtk-quadspi.c
  20 +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
  21 @@ -110,7 +110,7 @@
  22  #define MTK_NOR_PRG_REG(n)             (MTK_NOR_PRGDATA0_REG + 4 * (n))
  23  #define MTK_NOR_SHREG(n)               (MTK_NOR_SHREG0_REG + 4 * (n))
  24
  25 -struct mt8173_nor {
  26 +struct mtk_nor {
  27         struct spi_nor nor;
  28         struct device *dev;
  29         void __iomem *base;     /* nor flash base address */
  30 @@ -118,48 +118,48 @@ struct mt8173_nor {
  31         struct clk *nor_clk;
  32  };
  33
  34 -static void mt8173_nor_set_read_mode(struct mt8173_nor *mt8173_nor)
  35 +static void mtk_nor_set_read_mode(struct mtk_nor *mtk_nor)
  36  {
  37 -       struct spi_nor *nor = &mt8173_nor->nor;
  38 +       struct spi_nor *nor = &mtk_nor->nor;
  39
  40         switch (nor->read_proto) {
  41         case SNOR_PROTO_1_1_1:
  42 -               writeb(nor->read_opcode, mt8173_nor->base +
  43 +               writeb(nor->read_opcode, mtk_nor->base +
  44                        MTK_NOR_PRGDATA3_REG);
  45 -               writeb(MTK_NOR_FAST_READ, mt8173_nor->base +
  46 +               writeb(MTK_NOR_FAST_READ, mtk_nor->base +
  47                        MTK_NOR_CFG1_REG);
  48                 break;
  49         case SNOR_PROTO_1_1_2:
  50 -               writeb(nor->read_opcode, mt8173_nor->base +
  51 +               writeb(nor->read_opcode, mtk_nor->base +
  52                        MTK_NOR_PRGDATA3_REG);
  53 -               writeb(MTK_NOR_DUAL_READ_EN, mt8173_nor->base +
  54 +               writeb(MTK_NOR_DUAL_READ_EN, mtk_nor->base +
  55                        MTK_NOR_DUAL_REG);
  56                 break;
  57         case SNOR_PROTO_1_1_4:
  58 -               writeb(nor->read_opcode, mt8173_nor->base +
  59 +               writeb(nor->read_opcode, mtk_nor->base +
  60                        MTK_NOR_PRGDATA4_REG);
  61 -               writeb(MTK_NOR_QUAD_READ_EN, mt8173_nor->base +
  62 +               writeb(MTK_NOR_QUAD_READ_EN, mtk_nor->base +
  63                        MTK_NOR_DUAL_REG);
  64                 break;
  65         default:
  66 -               writeb(MTK_NOR_DUAL_DISABLE, mt8173_nor->base +
  67 +               writeb(MTK_NOR_DUAL_DISABLE, mtk_nor->base +
  68                        MTK_NOR_DUAL_REG);
  69                 break;
  70         }
  71  }
  72
  73 -static int mt8173_nor_execute_cmd(struct mt8173_nor *mt8173_nor, u8 cmdval)
  74 +static int mtk_nor_execute_cmd(struct mtk_nor *mtk_nor, u8 cmdval)
  75  {
  76         int reg;
  77         u8 val = cmdval & 0x1f;
  78
  79 -       writeb(cmdval, mt8173_nor->base + MTK_NOR_CMD_REG);
  80 -       return readl_poll_timeout(mt8173_nor->base + MTK_NOR_CMD_REG, reg,
  81 +       writeb(cmdval, mtk_nor->base + MTK_NOR_CMD_REG);
  82 +       return readl_poll_timeout(mtk_nor->base + MTK_NOR_CMD_REG, reg,
  83                                   !(reg & val), 100, 10000);
  84  }
  85
  86 -static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
  87 -                              u8 *tx, int txlen, u8 *rx, int rxlen)
  88 +static int mtk_nor_do_tx_rx(struct mtk_nor *mtk_nor, u8 op,
  89 +                           u8 *tx, int txlen, u8 *rx, int rxlen)
  90  {
  91         int len = 1 + txlen + rxlen;
  92         int i, ret, idx;
  93 @@ -167,26 +167,26 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
  94         if (len > MTK_NOR_MAX_SHIFT)
  95                 return -EINVAL;
  96
  97 -       writeb(len * 8, mt8173_nor->base + MTK_NOR_CNT_REG);
  98 +       writeb(len * 8, mtk_nor->base + MTK_NOR_CNT_REG);
  99
 100         /* start at PRGDATA5, go down to PRGDATA0 */
 101         idx = MTK_NOR_MAX_RX_TX_SHIFT - 1;
 102
 103         /* opcode */
 104 -       writeb(op, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
 105 +       writeb(op, mtk_nor->base + MTK_NOR_PRG_REG(idx));
 106         idx--;
 107
 108         /* program TX data */
 109         for (i = 0; i < txlen; i++, idx--)
 110 -               writeb(tx[i], mt8173_nor->base + MTK_NOR_PRG_REG(idx));
 111 +               writeb(tx[i], mtk_nor->base + MTK_NOR_PRG_REG(idx));
 112
 113         /* clear out rest of TX registers */
 114         while (idx >= 0) {
 115 -               writeb(0, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
 116 +               writeb(0, mtk_nor->base + MTK_NOR_PRG_REG(idx));
 117                 idx--;
 118         }
 119
 120 -       ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PRG_CMD);
 121 +       ret = mtk_nor_execute_cmd(mtk_nor, MTK_NOR_PRG_CMD);
 122         if (ret)
 123                 return ret;
 124
 125 @@ -195,20 +195,20 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
 126
 127         /* read out RX data */
 128         for (i = 0; i < rxlen; i++, idx--)
 129 -               rx[i] = readb(mt8173_nor->base + MTK_NOR_SHREG(idx));
 130 +               rx[i] = readb(mtk_nor->base + MTK_NOR_SHREG(idx));
 131
 132         return 0;
 133  }
 134
 135  /* Do a WRSR (Write Status Register) command */
 136 -static int mt8173_nor_wr_sr(struct mt8173_nor *mt8173_nor, u8 sr)
 137 +static int mtk_nor_wr_sr(struct mtk_nor *mtk_nor, u8 sr)
 138  {
 139 -       writeb(sr, mt8173_nor->base + MTK_NOR_PRGDATA5_REG);
 140 -       writeb(8, mt8173_nor->base + MTK_NOR_CNT_REG);
 141 -       return mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_WRSR_CMD);
 142 +       writeb(sr, mtk_nor->base + MTK_NOR_PRGDATA5_REG);
 143 +       writeb(8, mtk_nor->base + MTK_NOR_CNT_REG);
 144 +       return mtk_nor_execute_cmd(mtk_nor, MTK_NOR_WRSR_CMD);
 145  }
 146
 147 -static int mt8173_nor_write_buffer_enable(struct mt8173_nor *mt8173_nor)
 148 +static int mtk_nor_write_buffer_enable(struct mtk_nor *mtk_nor)
 149  {
 150         u8 reg;
 151
 152 @@ -216,27 +216,27 @@ static int mt8173_nor_write_buffer_enable(struct mt8173_nor *mt8173_nor)
 153          * 0: pre-fetch buffer use for read
 154          * 1: pre-fetch buffer use for page program
 155          */
 156 -       writel(MTK_NOR_WR_BUF_ENABLE, mt8173_nor->base + MTK_NOR_CFG2_REG);
 157 -       return readb_poll_timeout(mt8173_nor->base + MTK_NOR_CFG2_REG, reg,
 158 +       writel(MTK_NOR_WR_BUF_ENABLE, mtk_nor->base + MTK_NOR_CFG2_REG);
 159 +       return readb_poll_timeout(mtk_nor->base + MTK_NOR_CFG2_REG, reg,
 160                                   0x01 == (reg & 0x01), 100, 10000);
 161  }
 162
 163 -static int mt8173_nor_write_buffer_disable(struct mt8173_nor *mt8173_nor)
 164 +static int mtk_nor_write_buffer_disable(struct mtk_nor *mtk_nor)
 165  {
 166         u8 reg;
 167
 168 -       writel(MTK_NOR_WR_BUF_DISABLE, mt8173_nor->base + MTK_NOR_CFG2_REG);
 169 -       return readb_poll_timeout(mt8173_nor->base + MTK_NOR_CFG2_REG, reg,
 170 +       writel(MTK_NOR_WR_BUF_DISABLE, mtk_nor->base + MTK_NOR_CFG2_REG);
 171 +       return readb_poll_timeout(mtk_nor->base + MTK_NOR_CFG2_REG, reg,
 172                                   MTK_NOR_WR_BUF_DISABLE == (reg & 0x1), 100,
 173                                   10000);
 174  }
 175
 176 -static void mt8173_nor_set_addr_width(struct mt8173_nor *mt8173_nor)
 177 +static void mtk_nor_set_addr_width(struct mtk_nor *mtk_nor)
 178  {
 179         u8 val;
 180 -       struct spi_nor *nor = &mt8173_nor->nor;
 181 +       struct spi_nor *nor = &mtk_nor->nor;
 182
 183 -       val = readb(mt8173_nor->base + MTK_NOR_DUAL_REG);
 184 +       val = readb(mtk_nor->base + MTK_NOR_DUAL_REG);
 185
 186         switch (nor->addr_width) {
 187         case 3:
 188 @@ -246,115 +246,115 @@ static void mt8173_nor_set_addr_width(struct mt8173_nor *mt8173_nor)
 189                 val |= MTK_NOR_4B_ADDR_EN;
 190                 break;
 191         default:
 192 -               dev_warn(mt8173_nor->dev, "Unexpected address width %u.\n",
 193 +               dev_warn(mtk_nor->dev, "Unexpected address width %u.\n",
 194                          nor->addr_width);
 195                 break;
 196         }
 197
 198 -       writeb(val, mt8173_nor->base + MTK_NOR_DUAL_REG);
 199 +       writeb(val, mtk_nor->base + MTK_NOR_DUAL_REG);
 200  }
 201
 202 -static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)
 203 +static void mtk_nor_set_addr(struct mtk_nor *mtk_nor, u32 addr)
 204  {
 205         int i;
 206
 207 -       mt8173_nor_set_addr_width(mt8173_nor);
 208 +       mtk_nor_set_addr_width(mtk_nor);
 209
 210         for (i = 0; i < 3; i++) {
 211 -               writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG + i * 4);
 212 +               writeb(addr & 0xff, mtk_nor->base + MTK_NOR_RADR0_REG + i * 4);
 213                 addr >>= 8;
 214         }
 215         /* Last register is non-contiguous */
 216 -       writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR3_REG);
 217 +       writeb(addr & 0xff, mtk_nor->base + MTK_NOR_RADR3_REG);
 218  }
 219
 220 -static ssize_t mt8173_nor_read(struct spi_nor *nor, loff_t from, size_t length,
 221 -                              u_char *buffer)
 222 +static ssize_t mtk_nor_read(struct spi_nor *nor, loff_t from, size_t length,
 223 +                           u_char *buffer)
 224  {
 225         int i, ret;
 226         int addr = (int)from;
 227         u8 *buf = (u8 *)buffer;
 228 -       struct mt8173_nor *mt8173_nor = nor->priv;
 229 +       struct mtk_nor *mtk_nor = nor->priv;
 230
 231         /* set mode for fast read mode ,dual mode or quad mode */
 232 -       mt8173_nor_set_read_mode(mt8173_nor);
 233 -       mt8173_nor_set_addr(mt8173_nor, addr);
 234 +       mtk_nor_set_read_mode(mtk_nor);
 235 +       mtk_nor_set_addr(mtk_nor, addr);
 236
 237         for (i = 0; i < length; i++) {
 238 -               ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PIO_READ_CMD);
 239 +               ret = mtk_nor_execute_cmd(mtk_nor, MTK_NOR_PIO_READ_CMD);
 240                 if (ret < 0)
 241                         return ret;
 242 -               buf[i] = readb(mt8173_nor->base + MTK_NOR_RDATA_REG);
 243 +               buf[i] = readb(mtk_nor->base + MTK_NOR_RDATA_REG);
 244         }
 245         return length;
 246  }
 247
 248 -static int mt8173_nor_write_single_byte(struct mt8173_nor *mt8173_nor,
 249 -                                       int addr, int length, u8 *data)
 250 +static int mtk_nor_write_single_byte(struct mtk_nor *mtk_nor,
 251 +                                    int addr, int length, u8 *data)
 252  {
 253         int i, ret;
 254
 255 -       mt8173_nor_set_addr(mt8173_nor, addr);
 256 +       mtk_nor_set_addr(mtk_nor, addr);
 257
 258         for (i = 0; i < length; i++) {
 259 -               writeb(*data++, mt8173_nor->base + MTK_NOR_WDATA_REG);
 260 -               ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PIO_WR_CMD);
 261 +               writeb(*data++, mtk_nor->base + MTK_NOR_WDATA_REG);
 262 +               ret = mtk_nor_execute_cmd(mtk_nor, MTK_NOR_PIO_WR_CMD);
 263                 if (ret < 0)
 264                         return ret;
 265         }
 266         return 0;
 267  }
 268
 269 -static int mt8173_nor_write_buffer(struct mt8173_nor *mt8173_nor, int addr,
 270 -                                  const u8 *buf)
 271 +static int mtk_nor_write_buffer(struct mtk_nor *mtk_nor, int addr,
 272 +                               const u8 *buf)
 273  {
 274         int i, bufidx, data;
 275
 276 -       mt8173_nor_set_addr(mt8173_nor, addr);
 277 +       mtk_nor_set_addr(mtk_nor, addr);
 278
 279         bufidx = 0;
 280         for (i = 0; i < SFLASH_WRBUF_SIZE; i += 4) {
 281                 data = buf[bufidx + 3]<<24 | buf[bufidx + 2]<<16 |
 282                        buf[bufidx + 1]<<8 | buf[bufidx];
 283                 bufidx += 4;
 284 -               writel(data, mt8173_nor->base + MTK_NOR_PP_DATA_REG);
 285 +               writel(data, mtk_nor->base + MTK_NOR_PP_DATA_REG);
 286         }
 287 -       return mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_WR_CMD);
 288 +       return mtk_nor_execute_cmd(mtk_nor, MTK_NOR_WR_CMD);
 289  }
 290
 291 -static ssize_t mt8173_nor_write(struct spi_nor *nor, loff_t to, size_t len,
 292 -                               const u_char *buf)
 293 +static ssize_t mtk_nor_write(struct spi_nor *nor, loff_t to, size_t len,
 294 +                            const u_char *buf)
 295  {
 296         int ret;
 297 -       struct mt8173_nor *mt8173_nor = nor->priv;
 298 +       struct mtk_nor *mtk_nor = nor->priv;
 299         size_t i;
 300
 301 -       ret = mt8173_nor_write_buffer_enable(mt8173_nor);
 302 +       ret = mtk_nor_write_buffer_enable(mtk_nor);
 303         if (ret < 0) {
 304 -               dev_warn(mt8173_nor->dev, "write buffer enable failed!\n");
 305 +               dev_warn(mtk_nor->dev, "write buffer enable failed!\n");
 306                 return ret;
 307         }
 308
 309         for (i = 0; i + SFLASH_WRBUF_SIZE <= len; i += SFLASH_WRBUF_SIZE) {
 310 -               ret = mt8173_nor_write_buffer(mt8173_nor, to, buf);
 311 +               ret = mtk_nor_write_buffer(mtk_nor, to, buf);
 312                 if (ret < 0) {
 313 -                       dev_err(mt8173_nor->dev, "write buffer failed!\n");
 314 +                       dev_err(mtk_nor->dev, "write buffer failed!\n");
 315                         return ret;
 316                 }
 317                 to += SFLASH_WRBUF_SIZE;
 318                 buf += SFLASH_WRBUF_SIZE;
 319         }
 320 -       ret = mt8173_nor_write_buffer_disable(mt8173_nor);
 321 +       ret = mtk_nor_write_buffer_disable(mtk_nor);
 322         if (ret < 0) {
 323 -               dev_warn(mt8173_nor->dev, "write buffer disable failed!\n");
 324 +               dev_warn(mtk_nor->dev, "write buffer disable failed!\n");
 325                 return ret;
 326         }
 327
 328         if (i < len) {
 329 -               ret = mt8173_nor_write_single_byte(mt8173_nor, to,
 330 -                                                  (int)(len - i), (u8 *)buf);
 331 +               ret = mtk_nor_write_single_byte(mtk_nor, to,
 332 +                                               (int)(len - i), (u8 *)buf);
 333                 if (ret < 0) {
 334 -                       dev_err(mt8173_nor->dev, "write single byte failed!\n");
 335 +                       dev_err(mtk_nor->dev, "write single byte failed!\n");
 336                         return ret;
 337                 }
 338         }
 339 @@ -362,72 +362,72 @@ static ssize_t mt8173_nor_write(struct spi_nor *nor, loff_t to, size_t len,
 340         return len;
 341  }
 342
 343 -static int mt8173_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
 344 +static int mtk_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
 345  {
 346         int ret;
 347 -       struct mt8173_nor *mt8173_nor = nor->priv;
 348 +       struct mtk_nor *mtk_nor = nor->priv;
 349
 350         switch (opcode) {
 351         case SPINOR_OP_RDSR:
 352 -               ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_RDSR_CMD);
 353 +               ret = mtk_nor_execute_cmd(mtk_nor, MTK_NOR_RDSR_CMD);
 354                 if (ret < 0)
 355                         return ret;
 356                 if (len == 1)
 357 -                       *buf = readb(mt8173_nor->base + MTK_NOR_RDSR_REG);
 358 +                       *buf = readb(mtk_nor->base + MTK_NOR_RDSR_REG);
 359                 else
 360 -                       dev_err(mt8173_nor->dev, "len should be 1 for read status!\n");
 361 +                       dev_err(mtk_nor->dev, "len should be 1 for read status!\n");
 362                 break;
 363         default:
 364 -               ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, NULL, 0, buf, len);
 365 +               ret = mtk_nor_do_tx_rx(mtk_nor, opcode, NULL, 0, buf, len);
 366                 break;
 367         }
 368         return ret;
 369  }
 370
 371 -static int mt8173_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
 372 -                               int len)
 373 +static int mtk_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
 374 +                            int len)
 375  {
 376         int ret;
 377 -       struct mt8173_nor *mt8173_nor = nor->priv;
 378 +       struct mtk_nor *mtk_nor = nor->priv;
 379
 380         switch (opcode) {
 381         case SPINOR_OP_WRSR:
 382                 /* We only handle 1 byte */
 383 -               ret = mt8173_nor_wr_sr(mt8173_nor, *buf);
 384 +               ret = mtk_nor_wr_sr(mtk_nor, *buf);
 385                 break;
 386         default:
 387 -               ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, buf, len, NULL, 0);
 388 +               ret = mtk_nor_do_tx_rx(mtk_nor, opcode, buf, len, NULL, 0);
 389                 if (ret)
 390 -                       dev_warn(mt8173_nor->dev, "write reg failure!\n");
 391 +                       dev_warn(mtk_nor->dev, "write reg failure!\n");
 392                 break;
 393         }
 394         return ret;
 395  }
 396
 397 -static void mt8173_nor_disable_clk(struct mt8173_nor *mt8173_nor)
 398 +static void mtk_nor_disable_clk(struct mtk_nor *mtk_nor)
 399  {
 400 -       clk_disable_unprepare(mt8173_nor->spi_clk);
 401 -       clk_disable_unprepare(mt8173_nor->nor_clk);
 402 +       clk_disable_unprepare(mtk_nor->spi_clk);
 403 +       clk_disable_unprepare(mtk_nor->nor_clk);
 404  }
 405
 406 -static int mt8173_nor_enable_clk(struct mt8173_nor *mt8173_nor)
 407 +static int mtk_nor_enable_clk(struct mtk_nor *mtk_nor)
 408  {
 409         int ret;
 410
 411 -       ret = clk_prepare_enable(mt8173_nor->spi_clk);
 412 +       ret = clk_prepare_enable(mtk_nor->spi_clk);
 413         if (ret)
 414                 return ret;
 415
 416 -       ret = clk_prepare_enable(mt8173_nor->nor_clk);
 417 +       ret = clk_prepare_enable(mtk_nor->nor_clk);
 418         if (ret) {
 419 -               clk_disable_unprepare(mt8173_nor->spi_clk);
 420 +               clk_disable_unprepare(mtk_nor->spi_clk);
 421                 return ret;
 422         }
 423
 424         return 0;
 425  }
 426
 427 -static int mtk_nor_init(struct mt8173_nor *mt8173_nor,
 428 +static int mtk_nor_init(struct mtk_nor *mtk_nor,
 429                         struct device_node *flash_node)
 430  {
 431         const struct spi_nor_hwcaps hwcaps = {
 432 @@ -439,18 +439,18 @@ static int mtk_nor_init(struct mt8173_nor *mt8173_nor,
 433         struct spi_nor *nor;
 434
 435         /* initialize controller to accept commands */
 436 -       writel(MTK_NOR_ENABLE_SF_CMD, mt8173_nor->base + MTK_NOR_WRPROT_REG);
 437 +       writel(MTK_NOR_ENABLE_SF_CMD, mtk_nor->base + MTK_NOR_WRPROT_REG);
 438
 439 -       nor = &mt8173_nor->nor;
 440 -       nor->dev = mt8173_nor->dev;
 441 -       nor->priv = mt8173_nor;
 442 +       nor = &mtk_nor->nor;
 443 +       nor->dev = mtk_nor->dev;
 444 +       nor->priv = mtk_nor;
 445         spi_nor_set_flash_node(nor, flash_node);
 446
 447         /* fill the hooks to spi nor */
 448 -       nor->read = mt8173_nor_read;
 449 -       nor->read_reg = mt8173_nor_read_reg;
 450 -       nor->write = mt8173_nor_write;
 451 -       nor->write_reg = mt8173_nor_write_reg;
 452 +       nor->read = mtk_nor_read;
 453 +       nor->read_reg = mtk_nor_read_reg;
 454 +       nor->write = mtk_nor_write;
 455 +       nor->write_reg = mtk_nor_write_reg;
 456         nor->mtd.name = "mtk_nor";
 457         /* initialized with NULL */
 458         ret = spi_nor_scan(nor, NULL, &hwcaps);
 459 @@ -465,34 +465,34 @@ static int mtk_nor_drv_probe(struct platform_device *pdev)
 460         struct device_node *flash_np;
 461         struct resource *res;
 462         int ret;
 463 -       struct mt8173_nor *mt8173_nor;
 464 +       struct mtk_nor *mtk_nor;
 465
 466         if (!pdev->dev.of_node) {
 467                 dev_err(&pdev->dev, "No DT found\n");
 468                 return -EINVAL;
 469         }
 470
 471 -       mt8173_nor = devm_kzalloc(&pdev->dev, sizeof(*mt8173_nor), GFP_KERNEL);
 472 -       if (!mt8173_nor)
 473 +       mtk_nor = devm_kzalloc(&pdev->dev, sizeof(*mtk_nor), GFP_KERNEL);
 474 +       if (!mtk_nor)
 475                 return -ENOMEM;
 476 -       platform_set_drvdata(pdev, mt8173_nor);
 477 +       platform_set_drvdata(pdev, mtk_nor);
 478
 479         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 480 -       mt8173_nor->base = devm_ioremap_resource(&pdev->dev, res);
 481 -       if (IS_ERR(mt8173_nor->base))
 482 -               return PTR_ERR(mt8173_nor->base);
 483 +       mtk_nor->base = devm_ioremap_resource(&pdev->dev, res);
 484 +       if (IS_ERR(mtk_nor->base))
 485 +               return PTR_ERR(mtk_nor->base);
 486
 487 -       mt8173_nor->spi_clk = devm_clk_get(&pdev->dev, "spi");
 488 -       if (IS_ERR(mt8173_nor->spi_clk))
 489 -               return PTR_ERR(mt8173_nor->spi_clk);
 490 +       mtk_nor->spi_clk = devm_clk_get(&pdev->dev, "spi");
 491 +       if (IS_ERR(mtk_nor->spi_clk))
 492 +               return PTR_ERR(mtk_nor->spi_clk);
 493
 494 -       mt8173_nor->nor_clk = devm_clk_get(&pdev->dev, "sf");
 495 -       if (IS_ERR(mt8173_nor->nor_clk))
 496 -               return PTR_ERR(mt8173_nor->nor_clk);
 497 +       mtk_nor->nor_clk = devm_clk_get(&pdev->dev, "sf");
 498 +       if (IS_ERR(mtk_nor->nor_clk))
 499 +               return PTR_ERR(mtk_nor->nor_clk);
 500
 501 -       mt8173_nor->dev = &pdev->dev;
 502 +       mtk_nor->dev = &pdev->dev;
 503
 504 -       ret = mt8173_nor_enable_clk(mt8173_nor);
 505 +       ret = mtk_nor_enable_clk(mtk_nor);
 506         if (ret)
 507                 return ret;
 508
 509 @@ -503,20 +503,20 @@ static int mtk_nor_drv_probe(struct platform_device *pdev)
 510                 ret = -ENODEV;
 511                 goto nor_free;
 512         }
 513 -       ret = mtk_nor_init(mt8173_nor, flash_np);
 514 +       ret = mtk_nor_init(mtk_nor, flash_np);
 515
 516  nor_free:
 517         if (ret)
 518 -               mt8173_nor_disable_clk(mt8173_nor);
 519 +               mtk_nor_disable_clk(mtk_nor);
 520
 521         return ret;
 522  }
 523
 524  static int mtk_nor_drv_remove(struct platform_device *pdev)
 525  {
 526 -       struct mt8173_nor *mt8173_nor = platform_get_drvdata(pdev);
 527 +       struct mtk_nor *mtk_nor = platform_get_drvdata(pdev);
 528
 529 -       mt8173_nor_disable_clk(mt8173_nor);
 530 +       mtk_nor_disable_clk(mtk_nor);
 531
 532         return 0;
 533  }
 534 @@ -524,18 +524,18 @@ static int mtk_nor_drv_remove(struct platform_device *pdev)
 535  #ifdef CONFIG_PM_SLEEP
 536  static int mtk_nor_suspend(struct device *dev)
 537  {
 538 -       struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
 539 +       struct mtk_nor *mtk_nor = dev_get_drvdata(dev);
 540
 541 -       mt8173_nor_disable_clk(mt8173_nor);
 542 +       mtk_nor_disable_clk(mtk_nor);
 543
 544         return 0;
 545  }
 546
 547  static int mtk_nor_resume(struct device *dev)
 548  {
 549 -       struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
 550 +       struct mtk_nor *mtk_nor = dev_get_drvdata(dev);
 551
 552 -       return mt8173_nor_enable_clk(mt8173_nor);
 553 +       return mtk_nor_enable_clk(mtk_nor);
 554  }
 555
 556  static const struct dev_pm_ops mtk_nor_dev_pm_ops = {
 557 --
 558 2.11.0
 559