target/linux/lantiq/files/arch/mips/boot/dts/FRITZ736X.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include "vr9.dtsi"
   5
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   8
   9 / {
  10         compatible = "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
  11
  12         chosen {
  13                 bootargs = "console=ttyLTQ0,115200";
  14         };
  15
  16         aliases {
  17                 led-boot = &power_green;
  18                 led-failsafe = &power_red;
  19                 led-running = &power_green;
  20                 led-upgrade = &power_green;
  21                 led-dsl = &info_green;
  22                 led-wifi = &wifi;
  23         };
  24
  25         memory@0 {
  26                 reg = <0x0 0x8000000>;
  27         };
  28
  29         keys {
  30                 compatible = "gpio-keys-polled";
  31                 poll-interval = <100>;
  32
  33                 dect {
  34                         label = "dect";
  35                         gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
  36                         linux,code = <KEY_PHONE>;
  37                 };
  38
  39                 wifi {
  40                         label = "wifi";
  41                         gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
  42                         linux,code = <KEY_WLAN>;
  43                 };
  44         };
  45
  46         leds: leds {
  47                 compatible = "gpio-leds";
  48
  49                 power_green: power {
  50                         gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
  51                         default-state = "keep";
  52                 };
  53
  54                 power_red: power2 {
  55                         gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  56                 };
  57
  58                 info_green: info_green {
  59                         gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
  60                 };
  61
  62                 wifi: wifi {
  63                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  64                 };
  65
  66                 info_red: info_red {
  67                         gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
  68                 };
  69
  70                 dect: dect {
  71                         gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
  72                 };
  73         };
  74 };
  75
  76 &eth0 {
  77         lan: interface@0 {
  78                 compatible = "lantiq,xrx200-pdi";
  79                 #address-cells = <1>;
  80                 #size-cells = <0>;
  81                 reg = <0>;
  82                 mtd-mac-address = <&urlader 0xa91>;
  83                 mtd-mac-address-increment = <(-2)>;
  84                 lantiq,switch;
  85
  86                 ethernet@0 {
  87                         compatible = "lantiq,xrx200-pdi-port";
  88                         reg = <0>;
  89                         phy-mode = "rmii";
  90                         phy-handle = <&phy0>;
  91                 };
  92
  93                 ethernet@1 {
  94                         compatible = "lantiq,xrx200-pdi-port";
  95                         reg = <1>;
  96                         phy-mode = "rmii";
  97                         phy-handle = <&phy1>;
  98                 };
  99
 100                 ethernet@2 {
 101                         compatible = "lantiq,xrx200-pdi-port";
 102                         reg = <2>;
 103                         phy-mode = "gmii";
 104                         phy-handle = <&phy11>;
 105                 };
 106
 107                 ethernet@3 {
 108                         compatible = "lantiq,xrx200-pdi-port";
 109                         reg = <4>;
 110                         phy-mode = "gmii";
 111                         phy-handle = <&phy13>;
 112                 };
 113         };
 114
 115         mdio@0 {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118                 compatible = "lantiq,xrx200-mdio";
 119                 reg = <0>;
 120
 121                 phy0: ethernet-phy@0 {
 122                         reg = <0x00>;
 123                         compatible = "ethernet-phy-ieee802.3-c22";
 124                         reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 125                 };
 126
 127                 phy1: ethernet-phy@1 {
 128                         reg = <0x01>;
 129                         compatible = "ethernet-phy-ieee802.3-c22";
 130                         reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 131                 };
 132
 133                 phy11: ethernet-phy@11 {
 134                         reg = <0x11>;
 135                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 136                 };
 137
 138                 phy13: ethernet-phy@13 {
 139                         reg = <0x13>;
 140                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 141                 };
 142         };
 143 };
 144
 145 &gphy0 {
 146         lantiq,gphy-mode = <GPHY_MODE_GE>;
 147 };
 148
 149 &gphy1 {
 150         lantiq,gphy-mode = <GPHY_MODE_GE>;
 151 };
 152
 153 &gpio {
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&state_default>;
 156
 157         state_default: pinmux {
 158                 mdio {
 159                         lantiq,groups = "mdio";
 160                         lantiq,function = "mdio";
 161                 };
 162
 163                 phy-rst {
 164                         lantiq,pins = "io37", "io44";
 165                         lantiq,pull = <0>;
 166                         lantiq,open-drain;
 167                         lantiq,output = <1>;
 168                 };
 169         };
 170
 171 };
 172
 173 &pcie0 {
 174         status = "okay";
 175
 176         pcie@0 {
 177                 reg = <0 0 0 0 0>;
 178                 #interrupt-cells = <1>;
 179                 #size-cells = <1>;
 180                 #address-cells = <2>;
 181                 device_type = "pci";
 182
 183                 wifi@168c,002e {
 184                         compatible = "pci168c,002e";
 185                         reg = <0 0 0 0 0>;
 186                         qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
 187                 };
 188         };
 189 };
 190
 191 &usb_phy0 {
 192         status = "okay";
 193 };
 194
 195 &usb_phy1 {
 196         status = "okay";
 197 };
 198
 199 &usb0 {
 200         status = "okay";
 201 };
 202
 203 &usb1 {
 204         status = "okay";
 205 };