target/linux/brcm2708/patches-4.19/950-0641-spi-devicetree-add-overlays-for-spi-3-to-6.patch

   1 From 075cb9a202526c4d4e712fda5db598c28ae74e4a Mon Sep 17 00:00:00 2001
   2 From: Martin Sperl <kernel@martin.sperl.org>
   3 Date: Sun, 12 May 2019 16:17:08 +0000
   4 Subject: [PATCH 641/703] spi: devicetree: add overlays for spi 3 to 6
   5
   6 Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
   7 ---
   8  arch/arm/boot/dts/overlays/Makefile           |   8 ++
   9  arch/arm/boot/dts/overlays/README             | 104 ++++++++++++++++++
  10  .../boot/dts/overlays/spi3-1cs-overlay.dts    |  44 ++++++++
  11  .../boot/dts/overlays/spi3-2cs-overlay.dts    |  56 ++++++++++
  12  .../boot/dts/overlays/spi4-1cs-overlay.dts    |  44 ++++++++
  13  .../boot/dts/overlays/spi4-2cs-overlay.dts    |  56 ++++++++++
  14  .../boot/dts/overlays/spi5-1cs-overlay.dts    |  44 ++++++++
  15  .../boot/dts/overlays/spi5-2cs-overlay.dts    |  56 ++++++++++
  16  .../boot/dts/overlays/spi6-1cs-overlay.dts    |  44 ++++++++
  17  .../boot/dts/overlays/spi6-2cs-overlay.dts    |  56 ++++++++++
  18  10 files changed, 512 insertions(+)
  19  create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
  20  create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
  21  create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
  22  create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
  23  create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
  24  create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
  25  create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
  26  create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
  27
  28 --- a/arch/arm/boot/dts/overlays/Makefile
  29 +++ b/arch/arm/boot/dts/overlays/Makefile
  30 @@ -144,6 +144,14 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
  31         spi2-1cs.dtbo \
  32         spi2-2cs.dtbo \
  33         spi2-3cs.dtbo \
  34 +       spi3-1cs.dtbo \
  35 +       spi3-2cs.dtbo \
  36 +       spi4-1cs.dtbo \
  37 +       spi4-2cs.dtbo \
  38 +       spi5-1cs.dtbo \
  39 +       spi5-2cs.dtbo \
  40 +       spi6-1cs.dtbo \
  41 +       spi6-2cs.dtbo \
  42         ssd1306.dtbo \
  43         superaudioboard.dtbo \
  44         sx150x.dtbo \
  45 --- a/arch/arm/boot/dts/overlays/README
  46 +++ b/arch/arm/boot/dts/overlays/README
  47 @@ -2085,6 +2085,110 @@ Params: cs0_pin                 GPIO pin
  48                                  is 'okay' or enabled).
  49
  50
  51 +Name:   spi3-1cs
  52 +Info:   Enables spi3 with a single chip select (CS) line and associated spidev
  53 +        dev node. The gpio pin number for the CS line and spidev device node
  54 +        creation are configurable.
  55 +Load:   dtoverlay=spi3-1cs,<param>=<val>
  56 +Params: cs0_pin                 GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
  57 +        cs0_spidev              Set to 'off' to prevent the creation of a
  58 +                                userspace device node /dev/spidev3.0 (default
  59 +                                is 'on' or enabled).
  60 +
  61 +
  62 +Name:   spi3-2cs
  63 +Info:   Enables spi3 with two chip select (CS) lines and associated spidev
  64 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
  65 +        creation are configurable.
  66 +Load:   dtoverlay=spi3-2cs,<param>=<val>
  67 +Params: cs0_pin                 GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
  68 +        cs1_pin                 GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
  69 +        cs0_spidev              Set to 'off' to prevent the creation of a
  70 +                                userspace device node /dev/spidev3.0 (default
  71 +                                is 'on' or enabled).
  72 +        cs1_spidev              Set to 'off' to prevent the creation of a
  73 +                                userspace device node /dev/spidev3.1 (default
  74 +                                is 'on' or enabled).
  75 +
  76 +
  77 +Name:   spi4-1cs
  78 +Info:   Enables spi4 with a single chip select (CS) line and associated spidev
  79 +        dev node. The gpio pin number for the CS line and spidev device node
  80 +        creation are configurable.
  81 +Load:   dtoverlay=spi4-1cs,<param>=<val>
  82 +Params: cs0_pin                 GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
  83 +        cs0_spidev              Set to 'off' to prevent the creation of a
  84 +                                userspace device node /dev/spidev4.0 (default
  85 +                                is 'on' or enabled).
  86 +
  87 +
  88 +Name:   spi4-2cs
  89 +Info:   Enables spi4 with two chip select (CS) lines and associated spidev
  90 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
  91 +        creation are configurable.
  92 +Load:   dtoverlay=spi4-2cs,<param>=<val>
  93 +Params: cs0_pin                 GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
  94 +        cs1_pin                 GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
  95 +        cs0_spidev              Set to 'off' to prevent the creation of a
  96 +                                userspace device node /dev/spidev4.0 (default
  97 +                                is 'on' or enabled).
  98 +        cs1_spidev              Set to 'off' to prevent the creation of a
  99 +                                userspace device node /dev/spidev4.1 (default
 100 +                                is 'on' or enabled).
 101 +
 102 +
 103 +Name:   spi5-1cs
 104 +Info:   Enables spi5 with a single chip select (CS) line and associated spidev
 105 +        dev node. The gpio pin numbers for the CS lines and spidev device node
 106 +        creation are configurable.
 107 +Load:   dtoverlay=spi5-1cs,<param>=<val>
 108 +Params: cs0_pin                 GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
 109 +        cs0_spidev              Set to 'off' to prevent the creation of a
 110 +                                userspace device node /dev/spidev5.0 (default
 111 +                                is 'on' or enabled).
 112 +
 113 +
 114 +Name:   spi5-2cs
 115 +Info:   Enables spi5 with two chip select (CS) lines and associated spidev
 116 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
 117 +        creation are configurable.
 118 +Load:   dtoverlay=spi5-2cs,<param>=<val>
 119 +Params: cs0_pin                 GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
 120 +        cs1_pin                 GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
 121 +        cs0_spidev              Set to 'off' to prevent the creation of a
 122 +                                userspace device node /dev/spidev5.0 (default
 123 +                                is 'on' or enabled).
 124 +        cs1_spidev              Set to 'off' to prevent the creation of a
 125 +                                userspace device node /dev/spidev5.1 (default
 126 +                                is 'on' or enabled).
 127 +
 128 +
 129 +Name:   spi6-1cs
 130 +Info:   Enables spi6 with a single chip select (CS) line and associated spidev
 131 +        dev node. The gpio pin number for the CS line and spidev device node
 132 +        creation are configurable.
 133 +Load:   dtoverlay=spi6-1cs,<param>=<val>
 134 +Params: cs0_pin                 GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
 135 +        cs0_spidev              Set to 'off' to prevent the creation of a
 136 +                                userspace device node /dev/spidev6.0 (default
 137 +                                is 'on' or enabled).
 138 +
 139 +
 140 +Name:   spi6-2cs
 141 +Info:   Enables spi6 with two chip select (CS) lines and associated spidev
 142 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
 143 +        creation are configurable.
 144 +Load:   dtoverlay=spi6-2cs,<param>=<val>
 145 +Params: cs0_pin                 GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
 146 +        cs1_pin                 GPIO pin for CS1 (default 27 - BCM SPI6_CE1).
 147 +        cs0_spidev              Set to 'off' to prevent the creation of a
 148 +                                userspace device node /dev/spidev6.0 (default
 149 +                                is 'on' or enabled).
 150 +        cs1_spidev              Set to 'off' to prevent the creation of a
 151 +                                userspace device node /dev/spidev6.1 (default
 152 +                                is 'on' or enabled).
 153 +
 154 +
 155  Name:   ssd1306
 156  Info:   Overlay for activation of SSD1306 over I2C OLED display framebuffer.
 157  Load:   dtoverlay=ssd1306,<param>=<val>
 158 --- /dev/null
 159 +++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
 160 @@ -0,0 +1,44 @@
 161 +/dts-v1/;
 162 +/plugin/;
 163 +
 164 +
 165 +/ {
 166 +       compatible = "brcm,bcm2838";
 167 +
 168 +       fragment@0 {
 169 +               target = <&spi3_cs_pins>;
 170 +               frag0: __overlay__ {
 171 +                       brcm,pins = <0>;
 172 +                       brcm,function = <1>; /* output */
 173 +               };
 174 +       };
 175 +
 176 +       fragment@1 {
 177 +               target = <&spi3>;
 178 +               frag1: __overlay__ {
 179 +                       /* needed to avoid dtc warning */
 180 +                       #address-cells = <1>;
 181 +                       #size-cells = <0>;
 182 +
 183 +                       pinctrl-names = "default";
 184 +                       pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
 185 +                       cs-gpios = <&gpio 0 1>;
 186 +                       status = "okay";
 187 +
 188 +                       spidev3_0: spidev@0 {
 189 +                               compatible = "spidev";
 190 +                               reg = <0>;      /* CE0 */
 191 +                               #address-cells = <1>;
 192 +                               #size-cells = <0>;
 193 +                               spi-max-frequency = <125000000>;
 194 +                               status = "okay";
 195 +                       };
 196 +               };
 197 +       };
 198 +
 199 +       __overrides__ {
 200 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 201 +                          <&frag1>,"cs-gpios:4";
 202 +               cs0_spidev = <&spidev3_0>,"status";
 203 +       };
 204 +};
 205 --- /dev/null
 206 +++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
 207 @@ -0,0 +1,56 @@
 208 +/dts-v1/;
 209 +/plugin/;
 210 +
 211 +
 212 +/ {
 213 +       compatible = "brcm,bcm2838";
 214 +
 215 +       fragment@0 {
 216 +               target = <&spi3_cs_pins>;
 217 +               frag0: __overlay__ {
 218 +                       brcm,pins = <0 24>;
 219 +                       brcm,function = <1>; /* output */
 220 +               };
 221 +       };
 222 +
 223 +       fragment@1 {
 224 +               target = <&spi3>;
 225 +               frag1: __overlay__ {
 226 +                       /* needed to avoid dtc warning */
 227 +                       #address-cells = <1>;
 228 +                       #size-cells = <0>;
 229 +
 230 +                       pinctrl-names = "default";
 231 +                       pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
 232 +                       cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
 233 +                       status = "okay";
 234 +
 235 +                       spidev3_0: spidev@0 {
 236 +                               compatible = "spidev";
 237 +                               reg = <0>;      /* CE0 */
 238 +                               #address-cells = <1>;
 239 +                               #size-cells = <0>;
 240 +                               spi-max-frequency = <125000000>;
 241 +                               status = "okay";
 242 +                       };
 243 +
 244 +                       spidev3_1: spidev@1 {
 245 +                               compatible = "spidev";
 246 +                               reg = <1>;      /* CE1 */
 247 +                               #address-cells = <1>;
 248 +                               #size-cells = <0>;
 249 +                               spi-max-frequency = <125000000>;
 250 +                               status = "okay";
 251 +                       };
 252 +               };
 253 +       };
 254 +
 255 +       __overrides__ {
 256 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 257 +                          <&frag1>,"cs-gpios:4";
 258 +               cs1_pin  = <&frag0>,"brcm,pins:4",
 259 +                          <&frag1>,"cs-gpios:16";
 260 +               cs0_spidev = <&spidev3_0>,"status";
 261 +               cs1_spidev = <&spidev3_1>,"status";
 262 +       };
 263 +};
 264 --- /dev/null
 265 +++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
 266 @@ -0,0 +1,44 @@
 267 +/dts-v1/;
 268 +/plugin/;
 269 +
 270 +
 271 +/ {
 272 +       compatible = "brcm,bcm2838";
 273 +
 274 +       fragment@0 {
 275 +               target = <&spi4_cs_pins>;
 276 +               frag0: __overlay__ {
 277 +                       brcm,pins = <4>;
 278 +                       brcm,function = <1>; /* output */
 279 +               };
 280 +       };
 281 +
 282 +       fragment@1 {
 283 +               target = <&spi4>;
 284 +               frag1: __overlay__ {
 285 +                       /* needed to avoid dtc warning */
 286 +                       #address-cells = <1>;
 287 +                       #size-cells = <0>;
 288 +
 289 +                       pinctrl-names = "default";
 290 +                       pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
 291 +                       cs-gpios = <&gpio 4 1>;
 292 +                       status = "okay";
 293 +
 294 +                       spidev4_0: spidev@0 {
 295 +                               compatible = "spidev";
 296 +                               reg = <0>;      /* CE0 */
 297 +                               #address-cells = <1>;
 298 +                               #size-cells = <0>;
 299 +                               spi-max-frequency = <125000000>;
 300 +                               status = "okay";
 301 +                       };
 302 +               };
 303 +       };
 304 +
 305 +       __overrides__ {
 306 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 307 +                          <&frag1>,"cs-gpios:4";
 308 +               cs0_spidev = <&spidev4_0>,"status";
 309 +       };
 310 +};
 311 --- /dev/null
 312 +++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
 313 @@ -0,0 +1,56 @@
 314 +/dts-v1/;
 315 +/plugin/;
 316 +
 317 +
 318 +/ {
 319 +       compatible = "brcm,bcm2838";
 320 +
 321 +       fragment@0 {
 322 +               target = <&spi4_cs_pins>;
 323 +               frag0: __overlay__ {
 324 +                       brcm,pins = <4 25>;
 325 +                       brcm,function = <1>; /* output */
 326 +               };
 327 +       };
 328 +
 329 +       fragment@1 {
 330 +               target = <&spi4>;
 331 +               frag1: __overlay__ {
 332 +                       /* needed to avoid dtc warning */
 333 +                       #address-cells = <1>;
 334 +                       #size-cells = <0>;
 335 +
 336 +                       pinctrl-names = "default";
 337 +                       pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
 338 +                       cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
 339 +                       status = "okay";
 340 +
 341 +                       spidev4_0: spidev@0 {
 342 +                               compatible = "spidev";
 343 +                               reg = <0>;      /* CE0 */
 344 +                               #address-cells = <1>;
 345 +                               #size-cells = <0>;
 346 +                               spi-max-frequency = <125000000>;
 347 +                               status = "okay";
 348 +                       };
 349 +
 350 +                       spidev4_1: spidev@1 {
 351 +                               compatible = "spidev";
 352 +                               reg = <1>;      /* CE1 */
 353 +                               #address-cells = <1>;
 354 +                               #size-cells = <0>;
 355 +                               spi-max-frequency = <125000000>;
 356 +                               status = "okay";
 357 +                       };
 358 +               };
 359 +       };
 360 +
 361 +       __overrides__ {
 362 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 363 +                          <&frag1>,"cs-gpios:4";
 364 +               cs1_pin  = <&frag0>,"brcm,pins:4",
 365 +                          <&frag1>,"cs-gpios:16";
 366 +               cs0_spidev = <&spidev4_0>,"status";
 367 +               cs1_spidev = <&spidev4_1>,"status";
 368 +       };
 369 +};
 370 --- /dev/null
 371 +++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
 372 @@ -0,0 +1,44 @@
 373 +/dts-v1/;
 374 +/plugin/;
 375 +
 376 +
 377 +/ {
 378 +       compatible = "brcm,bcm2838";
 379 +
 380 +       fragment@0 {
 381 +               target = <&spi5_cs_pins>;
 382 +               frag0: __overlay__ {
 383 +                       brcm,pins = <12>;
 384 +                       brcm,function = <1>; /* output */
 385 +               };
 386 +       };
 387 +
 388 +       fragment@1 {
 389 +               target = <&spi5>;
 390 +               frag1: __overlay__ {
 391 +                       /* needed to avoid dtc warning */
 392 +                       #address-cells = <1>;
 393 +                       #size-cells = <0>;
 394 +
 395 +                       pinctrl-names = "default";
 396 +                       pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
 397 +                       cs-gpios = <&gpio 12 1>;
 398 +                       status = "okay";
 399 +
 400 +                       spidev5_0: spidev@0 {
 401 +                               compatible = "spidev";
 402 +                               reg = <0>;      /* CE0 */
 403 +                               #address-cells = <1>;
 404 +                               #size-cells = <0>;
 405 +                               spi-max-frequency = <125000000>;
 406 +                               status = "okay";
 407 +                       };
 408 +               };
 409 +       };
 410 +
 411 +       __overrides__ {
 412 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 413 +                          <&frag1>,"cs-gpios:4";
 414 +               cs0_spidev = <&spidev5_0>,"status";
 415 +       };
 416 +};
 417 --- /dev/null
 418 +++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
 419 @@ -0,0 +1,56 @@
 420 +/dts-v1/;
 421 +/plugin/;
 422 +
 423 +
 424 +/ {
 425 +       compatible = "brcm,bcm2838";
 426 +
 427 +       fragment@0 {
 428 +               target = <&spi5_cs_pins>;
 429 +               frag0: __overlay__ {
 430 +                       brcm,pins = <12 26>;
 431 +                       brcm,function = <1>; /* output */
 432 +               };
 433 +       };
 434 +
 435 +       fragment@1 {
 436 +               target = <&spi5>;
 437 +               frag1: __overlay__ {
 438 +                       /* needed to avoid dtc warning */
 439 +                       #address-cells = <1>;
 440 +                       #size-cells = <0>;
 441 +
 442 +                       pinctrl-names = "default";
 443 +                       pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
 444 +                       cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
 445 +                       status = "okay";
 446 +
 447 +                       spidev5_0: spidev@0 {
 448 +                               compatible = "spidev";
 449 +                               reg = <0>;      /* CE0 */
 450 +                               #address-cells = <1>;
 451 +                               #size-cells = <0>;
 452 +                               spi-max-frequency = <125000000>;
 453 +                               status = "okay";
 454 +                       };
 455 +
 456 +                       spidev5_1: spidev@1 {
 457 +                               compatible = "spidev";
 458 +                               reg = <1>;      /* CE1 */
 459 +                               #address-cells = <1>;
 460 +                               #size-cells = <0>;
 461 +                               spi-max-frequency = <125000000>;
 462 +                               status = "okay";
 463 +                       };
 464 +               };
 465 +       };
 466 +
 467 +       __overrides__ {
 468 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 469 +                          <&frag1>,"cs-gpios:4";
 470 +               cs1_pin  = <&frag0>,"brcm,pins:4",
 471 +                          <&frag1>,"cs-gpios:16";
 472 +               cs0_spidev = <&spidev5_0>,"status";
 473 +               cs1_spidev = <&spidev5_1>,"status";
 474 +       };
 475 +};
 476 --- /dev/null
 477 +++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
 478 @@ -0,0 +1,44 @@
 479 +/dts-v1/;
 480 +/plugin/;
 481 +
 482 +
 483 +/ {
 484 +       compatible = "brcm,bcm2838";
 485 +
 486 +       fragment@0 {
 487 +               target = <&spi6_cs_pins>;
 488 +               frag0: __overlay__ {
 489 +                       brcm,pins = <18>;
 490 +                       brcm,function = <1>; /* output */
 491 +               };
 492 +       };
 493 +
 494 +       fragment@1 {
 495 +               target = <&spi6>;
 496 +               frag1: __overlay__ {
 497 +                       /* needed to avoid dtc warning */
 498 +                       #address-cells = <1>;
 499 +                       #size-cells = <0>;
 500 +
 501 +                       pinctrl-names = "default";
 502 +                       pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
 503 +                       cs-gpios = <&gpio 18 1>;
 504 +                       status = "okay";
 505 +
 506 +                       spidev6_0: spidev@0 {
 507 +                               compatible = "spidev";
 508 +                               reg = <0>;      /* CE0 */
 509 +                               #address-cells = <1>;
 510 +                               #size-cells = <0>;
 511 +                               spi-max-frequency = <125000000>;
 512 +                               status = "okay";
 513 +                       };
 514 +               };
 515 +       };
 516 +
 517 +       __overrides__ {
 518 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 519 +                          <&frag1>,"cs-gpios:4";
 520 +               cs0_spidev = <&spidev6_0>,"status";
 521 +       };
 522 +};
 523 --- /dev/null
 524 +++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
 525 @@ -0,0 +1,56 @@
 526 +/dts-v1/;
 527 +/plugin/;
 528 +
 529 +
 530 +/ {
 531 +       compatible = "brcm,bcm2838";
 532 +
 533 +       fragment@0 {
 534 +               target = <&spi6_cs_pins>;
 535 +               frag0: __overlay__ {
 536 +                       brcm,pins = <18 27>;
 537 +                       brcm,function = <1>; /* output */
 538 +               };
 539 +       };
 540 +
 541 +       fragment@1 {
 542 +               target = <&spi6>;
 543 +               frag1: __overlay__ {
 544 +                       /* needed to avoid dtc warning */
 545 +                       #address-cells = <1>;
 546 +                       #size-cells = <0>;
 547 +
 548 +                       pinctrl-names = "default";
 549 +                       pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
 550 +                       cs-gpios = <&gpio 18 1>, <&gpio 27 1>;
 551 +                       status = "okay";
 552 +
 553 +                       spidev6_0: spidev@0 {
 554 +                               compatible = "spidev";
 555 +                               reg = <0>;      /* CE0 */
 556 +                               #address-cells = <1>;
 557 +                               #size-cells = <0>;
 558 +                               spi-max-frequency = <125000000>;
 559 +                               status = "okay";
 560 +                       };
 561 +
 562 +                       spidev6_1: spidev@1 {
 563 +                               compatible = "spidev";
 564 +                               reg = <1>;      /* CE1 */
 565 +                               #address-cells = <1>;
 566 +                               #size-cells = <0>;
 567 +                               spi-max-frequency = <125000000>;
 568 +                               status = "okay";
 569 +                       };
 570 +               };
 571 +       };
 572 +
 573 +       __overrides__ {
 574 +               cs0_pin  = <&frag0>,"brcm,pins:0",
 575 +                          <&frag1>,"cs-gpios:4";
 576 +               cs1_pin  = <&frag0>,"brcm,pins:4",
 577 +                          <&frag1>,"cs-gpios:16";
 578 +               cs0_spidev = <&spidev6_0>,"status";
 579 +               cs1_spidev = <&spidev6_1>,"status";
 580 +       };
 581 +};