target/linux/ath79/patches-4.14/0020-MIPS-ath79-turn-pci-ar71xx-driver-into-a-pure-OF-dri.patch

   1 From cc5a306038b7956b5736a70696dddaaf3792df76 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <john@phrozen.org>
   3 Date: Tue, 6 Mar 2018 09:22:49 +0100
   4 Subject: [PATCH 20/27] MIPS: ath79: turn pci-ar71xx driver into a pure OF
   5  driver
   6
   7 Signed-off-by: John Crispin <john@phrozen.org>
   8 ---
   9  arch/mips/pci/pci-ar71xx.c | 81 +++++++++++++++++++++++-----------------------
  10  1 file changed, 40 insertions(+), 41 deletions(-)
  11
  12 diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c
  13 index bdf87b43633f..1dc9f01a495d 100644
  14 --- a/arch/mips/pci/pci-ar71xx.c
  15 +++ b/arch/mips/pci/pci-ar71xx.c
  16 @@ -18,8 +18,11 @@
  17  #include <linux/pci.h>
  18  #include <linux/pci_regs.h>
  19  #include <linux/interrupt.h>
  20 +#include <linux/irqchip/chained_irq.h>
  21  #include <linux/init.h>
  22  #include <linux/platform_device.h>
  23 +#include <linux/of_irq.h>
  24 +#include <linux/of_pci.h>
  25
  26  #include <asm/mach-ath79/ar71xx_regs.h>
  27  #include <asm/mach-ath79/ath79.h>
  28 @@ -49,12 +52,13 @@
  29  #define AR71XX_PCI_IRQ_COUNT           5
  30
  31  struct ar71xx_pci_controller {
  32 +       struct device_node *np;
  33         void __iomem *cfg_base;
  34         int irq;
  35 -       int irq_base;
  36         struct pci_controller pci_ctrl;
  37         struct resource io_res;
  38         struct resource mem_res;
  39 +       struct irq_domain *domain;
  40  };
  41
  42  /* Byte lane enable bits */
  43 @@ -228,29 +232,30 @@ static struct pci_ops ar71xx_pci_ops = {
  44
  45  static void ar71xx_pci_irq_handler(struct irq_desc *desc)
  46  {
  47 -       struct ar71xx_pci_controller *apc;
  48         void __iomem *base = ath79_reset_base;
  49 +       struct irq_chip *chip = irq_desc_get_chip(desc);
  50 +       struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
  51         u32 pending;
  52
  53 -       apc = irq_desc_get_handler_data(desc);
  54 -
  55 +       chained_irq_enter(chip, desc);
  56         pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
  57                   __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  58
  59         if (pending & AR71XX_PCI_INT_DEV0)
  60 -               generic_handle_irq(apc->irq_base + 0);
  61 +               generic_handle_irq(irq_linear_revmap(apc->domain, 1));
  62
  63         else if (pending & AR71XX_PCI_INT_DEV1)
  64 -               generic_handle_irq(apc->irq_base + 1);
  65 +               generic_handle_irq(irq_linear_revmap(apc->domain, 2));
  66
  67         else if (pending & AR71XX_PCI_INT_DEV2)
  68 -               generic_handle_irq(apc->irq_base + 2);
  69 +               generic_handle_irq(irq_linear_revmap(apc->domain, 3));
  70
  71         else if (pending & AR71XX_PCI_INT_CORE)
  72 -               generic_handle_irq(apc->irq_base + 4);
  73 +               generic_handle_irq(irq_linear_revmap(apc->domain, 4));
  74
  75         else
  76                 spurious_interrupt();
  77 +       chained_irq_exit(chip, desc);
  78  }
  79
  80  static void ar71xx_pci_irq_unmask(struct irq_data *d)
  81 @@ -261,7 +266,7 @@ static void ar71xx_pci_irq_unmask(struct irq_data *d)
  82         u32 t;
  83
  84         apc = irq_data_get_irq_chip_data(d);
  85 -       irq = d->irq - apc->irq_base;
  86 +       irq = irq_linear_revmap(apc->domain, d->irq);
  87
  88         t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  89         __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  90 @@ -278,7 +283,7 @@ static void ar71xx_pci_irq_mask(struct irq_data *d)
  91         u32 t;
  92
  93         apc = irq_data_get_irq_chip_data(d);
  94 -       irq = d->irq - apc->irq_base;
  95 +       irq = irq_linear_revmap(apc->domain, d->irq);
  96
  97         t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  98         __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  99 @@ -294,24 +299,30 @@ static struct irq_chip ar71xx_pci_irq_chip = {
 100         .irq_mask_ack   = ar71xx_pci_irq_mask,
 101  };
 102
 103 +static int ar71xx_pci_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
 104 +{
 105 +       struct ar71xx_pci_controller *apc = d->host_data;
 106 +
 107 +       irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
 108 +       irq_set_chip_data(irq, apc);
 109 +
 110 +       return 0;
 111 +}
 112 +
 113 +static const struct irq_domain_ops ar71xx_pci_domain_ops = {
 114 +       .xlate = irq_domain_xlate_onecell,
 115 +       .map = ar71xx_pci_irq_map,
 116 +};
 117 +
 118  static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
 119  {
 120         void __iomem *base = ath79_reset_base;
 121 -       int i;
 122
 123         __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 124         __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
 125
 126 -       BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
 127 -
 128 -       apc->irq_base = ATH79_PCI_IRQ_BASE;
 129 -       for (i = apc->irq_base;
 130 -            i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
 131 -               irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
 132 -                                        handle_level_irq);
 133 -               irq_set_chip_data(i, apc);
 134 -       }
 135 -
 136 +       apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
 137 +                                           &ar71xx_pci_domain_ops, apc);
 138         irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
 139                                          apc);
 140  }
 141 @@ -328,6 +339,11 @@ static void ar71xx_pci_reset(void)
 142         mdelay(100);
 143  }
 144
 145 +static const struct of_device_id ar71xx_pci_ids[] = {
 146 +       { .compatible = "qca,ar7100-pci" },
 147 +       {},
 148 +};
 149 +
 150  static int ar71xx_pci_probe(struct platform_device *pdev)
 151  {
 152         struct ar71xx_pci_controller *apc;
 153 @@ -348,26 +364,6 @@ static int ar71xx_pci_probe(struct platform_device *pdev)
 154         if (apc->irq < 0)
 155                 return -EINVAL;
 156
 157 -       res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
 158 -       if (!res)
 159 -               return -EINVAL;
 160 -
 161 -       apc->io_res.parent = res;
 162 -       apc->io_res.name = "PCI IO space";
 163 -       apc->io_res.start = res->start;
 164 -       apc->io_res.end = res->end;
 165 -       apc->io_res.flags = IORESOURCE_IO;
 166 -
 167 -       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
 168 -       if (!res)
 169 -               return -EINVAL;
 170 -
 171 -       apc->mem_res.parent = res;
 172 -       apc->mem_res.name = "PCI memory space";
 173 -       apc->mem_res.start = res->start;
 174 -       apc->mem_res.end = res->end;
 175 -       apc->mem_res.flags = IORESOURCE_MEM;
 176 -
 177         ar71xx_pci_reset();
 178
 179         /* setup COMMAND register */
 180 @@ -380,9 +376,11 @@ static int ar71xx_pci_probe(struct platform_device *pdev)
 181
 182         ar71xx_pci_irq_init(apc);
 183
 184 +       apc->np = pdev->dev.of_node;
 185         apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
 186         apc->pci_ctrl.mem_resource = &apc->mem_res;
 187         apc->pci_ctrl.io_resource = &apc->io_res;
 188 +       pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node);
 189
 190         register_pci_controller(&apc->pci_ctrl);
 191
 192 @@ -393,6 +391,7 @@ static struct platform_driver ar71xx_pci_driver = {
 193         .probe = ar71xx_pci_probe,
 194         .driver = {
 195                 .name = "ar71xx-pci",
 196 +               .of_match_table = of_match_ptr(ar71xx_pci_ids),
 197         },
 198  };
 199
 200 --
 201 2.11.0
 202