Add build for the MTK3943 reference board for MT7981B+MT7976C.
**Hardware specification:**
- SoC: MediaTek MT7981B 2x A53
- Flash: various options
- RAM: 256MB DDR3
- Ethernet: 4 x 10/100/1000 Mbps via MT7531AE switch
EITHER 1 x 10/100/1000 Mbps built-in PHY
OR 1 x 10/100/1000/2500 Mbps MaxLinear GPY211C
- Switch: MediaTek MT7531AE
- WiFi: MediaTek MT7976C
- Button: RST, WPS
**Flash instructions for SPIM-NAND:**
- write *mt7981-rfb-spim-nand-preloader.bin to 'BL2' partition
- write *mt7981-rfb-spim-nand-bl31-uboot.fip to 'FIP' partition
- erase 'ubi' partition
- reset board
- create ubootenv and ubootenv2 UBI volumes in U-Boot
- edit environment and set bootcmd, e.g.
setenv bootconf 'config-1#mt7981-rfb-spim-nand#mt7981-rfb-mxl-2p5g-phy-eth1'
setenv bootcmd 'ubi read $loadaddr fit; bootm $loadaddr#$bootconf'
- load initramfs image via TFTP:
setenv serverip 192.168.1.254
setenv ipaddr 192.168.1.1
setenv bootfile openwrt-mediatek-filogic-mediatek_mt7981-rfb-initramfs.itb
saveenv ; saveenv
tftpboot
bootm $loadaddr#$bootconf
- Now use sysupgrade to write OpenWrt firmware to flash.
SNFI-NAND, SPIM-NOR and eMMC all work very similar, a bootable SD card image
is also being generated. However, as the board I've been provided only comes
with SPIM-NAND all other boot media are untested.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- /dev/null
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&gmac1>;
+ __overlay__ {
+ phy-mode = "2500base-x";
+ phy-handle = <&phy5>;
+ };
+ };
+
+ fragment@1 {
+ target = <&mdio_bus>;
+ __overlay__ {
+ reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <600>;
+ reset-post-delay-us = <20000>;
+
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ phy-mode = "2500base-x";
+ };
+ };
+ };
+};
--- /dev/null
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&sw_p5>;
+ __overlay__ {
+ phy-mode = "2500base-x";
+ phy-handle = <&phy5>;
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&mdio_bus>;
+ __overlay__ {
+ reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <600>;
+ reset-post-delay-us = <20000>;
+
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ phy-mode = "2500base-x";
+ };
+ };
+ };
+};
--- /dev/null
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&spi0>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spi_nand: spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ reg = <1>;
+ spi-max-frequency = <10000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "BL2";
+ reg = <0x00000 0x0100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x0100000 0x0080000>;
+ };
+
+ factory: partition@180000 {
+ label = "Factory";
+ reg = <0x180000 0x0200000>;
+ };
+
+ partition@380000 {
+ label = "FIP";
+ reg = <0x380000 0x0200000>;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x4000000>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&wifi>;
+ __overlay__ {
+ mediatek,mtd-eeprom = <&factory 0x0>;
+ status = "okay";
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Sam.Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7981.dtsi"
+
+/ {
+ model = "MediaTek MT7981 RFB";
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x20000000>;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "gmii";
+ phy-handle = <&int_gbe_phy>;
+ };
+};
+
+&mdio_bus {
+ switch: switch@1f {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ cs-gpios = <0>, <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ sw_p5: port@5 {
+ reg = <5>;
+ label = "lan5";
+ status = "disabled";
+ };
+
+ port@6 {
+ reg = <6>;
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&xhci {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
--- /dev/null
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&gmac1>;
+ __overlay__ {
+ phy-mode = "2500base-x";
+ phy-handle = <&phy5>;
+ };
+ };
+
+ fragment@1 {
+ target = <&mdio_bus>;
+ __overlay__ {
+ reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <600>;
+ reset-post-delay-us = <20000>;
+
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ phy-mode = "2500base-x";
+ };
+ };
+ };
+};
--- /dev/null
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&sw_p5>;
+ __overlay__ {
+ phy-mode = "2500base-x";
+ phy-handle = <&phy5>;
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&mdio_bus>;
+ __overlay__ {
+ reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <600>;
+ reset-post-delay-us = <20000>;
+
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ phy-mode = "2500base-x";
+ };
+ };
+ };
+};
--- /dev/null
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&spi0>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spi_nand: spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ reg = <1>;
+ spi-max-frequency = <10000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "BL2";
+ reg = <0x00000 0x0100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x0100000 0x0080000>;
+ };
+
+ factory: partition@180000 {
+ label = "Factory";
+ reg = <0x180000 0x0200000>;
+ };
+
+ partition@380000 {
+ label = "FIP";
+ reg = <0x380000 0x0200000>;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x4000000>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&wifi>;
+ __overlay__ {
+ mediatek,mtd-eeprom = <&factory 0x0>;
+ status = "okay";
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Sam.Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7981.dtsi"
+
+/ {
+ model = "MediaTek MT7981 RFB";
+ compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x20000000>;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "gmii";
+ phy-handle = <&int_gbe_phy>;
+ };
+};
+
+&mdio_bus {
+ switch: switch@1f {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ cs-gpios = <0>, <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ sw_p5: port@5 {
+ reg = <5>;
+ label = "lan5";
+ status = "disabled";
+ };
+
+ port@6 {
+ reg = <6>;
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&xhci {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
acer,predator-w6)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
;;
- asus,tuf-ax4200)
+ asus,tuf-ax4200|\
+ mediatek,mt7981-rfb)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
;;
netgear,wax220|\
nand_do_upgrade "$1"
;;
h3c,magic-nx30-pro|\
+ mediatek,mt7981-rfb|\
qihoo,360t7|\
tplink,tl-xdr4288|\
tplink,tl-xdr6086|\
endef
TARGET_DEVICES += netgear_wax220
+define Device/mediatek_mt7981-rfb
+ DEVICE_VENDOR := MediaTek
+ DEVICE_MODEL := MT7981 rfb
+ DEVICE_DTS := mt7981-rfb
+ DEVICE_DTS_OVERLAY:= \
+ mt7981-rfb-spim-nand \
+ mt7981-rfb-mxl-2p5g-phy-eth1 \
+ mt7981-rfb-mxl-2p5g-phy-swp5
+ DEVICE_DTS_DIR := $(DTS_DIR)/
+ DEVICE_DTC_FLAGS := --pad 4096
+ DEVICE_DTS_LOADADDR := 0x43f00000
+ DEVICE_PACKAGES := kmod-mt7981-firmware kmod-usb3 e2fsprogs f2fsck mkf2fs mt7981-wo-firmware
+ KERNEL_LOADADDR := 0x44000000
+ KERNEL := kernel-bin | gzip
+ KERNEL_INITRAMFS := kernel-bin | lzma | \
+ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+ KERNEL_INITRAMFS_SUFFIX := .itb
+ KERNEL_IN_UBI := 1
+ UBOOTENV_IN_UBI := 1
+ IMAGES := sysupgrade.itb
+ IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
+ IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | pad-rootfs | append-metadata
+ ARTIFACTS := \
+ emmc-preloader.bin emmc-bl31-uboot.fip \
+ nor-preloader.bin nor-bl31-uboot.fip \
+ sdcard.img.gz \
+ snfi-nand-preloader.bin snfi-nand-bl31-uboot.fip \
+ spim-nand-preloader.bin spim-nand-bl31-uboot.fip
+ ARTIFACT/emmc-preloader.bin := mt7981-bl2 emmc-ddr3
+ ARTIFACT/emmc-bl31-uboot.fip := mt7981-bl31-uboot rfb-emmc
+ ARTIFACT/nor-preloader.bin := mt7981-bl2 nor-ddr3
+ ARTIFACT/nor-bl31-uboot.fip := mt7981-bl31-uboot rfb-emmc
+ ARTIFACT/snfi-nand-preloader.bin := mt7981-bl2 snand-ddr3
+ ARTIFACT/snfi-nand-bl31-uboot.fip := mt7981-bl31-uboot rfb-snfi
+ ARTIFACT/spim-nand-preloader.bin := mt7981-bl2 spim-nand-ddr3
+ ARTIFACT/spim-nand-bl31-uboot.fip := mt7981-bl31-uboot rfb-spim-nand
+ ARTIFACT/sdcard.img.gz := mt798x-gpt sdmmc |\
+ pad-to 17k | mt7981-bl2 sdmmc-ddr3 |\
+ pad-to 6656k | mt7981-bl31-uboot rfb-sd |\
+ $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\
+ pad-to 12M | append-image-stage initramfs.itb | check-size 44m |\
+ ) \
+ pad-to 44M | mt7981-bl2 spim-nand-ddr3 |\
+ pad-to 45M | mt7981-bl31-uboot rfb-spim-nand |\
+ pad-to 49M | mt7981-bl2 nor-ddr3 |\
+ pad-to 50M | mt7981-bl31-uboot rfb-nor |\
+ pad-to 51M | mt7981-bl2 snand-ddr3 |\
+ pad-to 53M | mt7981-bl31-uboot rfb-snfi |\
+ $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\
+ pad-to 64M | append-image squashfs-sysupgrade.itb | check-size |\
+ ) \
+ gzip
+endef
+TARGET_DEVICES += mediatek_mt7981-rfb
+
define Device/mediatek_mt7986a-rfb-nand
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MT7986 rfba AP (NAND)
projects / openwrt / staging / jow.git / commitdiff