mediatek: filogic: reorder mt7981 DT name-based nodes
authorRafał Miłecki <rafal@milecki.pl>
Tue, 20 Feb 2024 09:42:40 +0000 (10:42 +0100)
committerRafał Miłecki <rafal@milecki.pl>
Tue, 20 Feb 2024 11:42:28 +0000 (12:42 +0100)
Follow upstream Linux kernel guidelines:
https://www.kernel.org/doc/html/next/devicetree/bindings/dts-coding-style.html#order-of-nodes

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi

index cfe7d50eb384d722b4607ff0c5d6704c07f3cec0..c96444db57077fa242ef7560af5153012f648d72 100644 (file)
                };
        };
 
+       ice: ice_debug {
+               compatible = "mediatek,mt7981-ice_debug",
+                          "mediatek,mt2701-ice_debug";
+               clocks = <&infracfg CLK_INFRA_DBG_CK>;
+               clock-names = "ice_dbg";
+       };
+
+       clk40m: oscillator@0 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <40000000>;
+               clock-output-names = "clkxtal";
+       };
+
+       psci {
+               compatible  = "arm,psci-0.2";
+               method      = "smc";
+       };
+
+       fan: pwm-fan {
+               compatible = "pwm-fan";
+               /* cooling level (0, 1, 2, 3, 4, 5, 6, 7) : (0%/25%/37.5%/50%/62.5%/75%/87.5%/100% duty) */
+               cooling-levels = <0 63 95 127 159 191 223 255>;
+               #cooling-cells = <2>;
+               status = "disabled";
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               /* 64 KiB reserved for ramoops/pstore */
+               ramoops@42ff0000 {
+                       compatible = "ramoops";
+                       reg = <0 0x42ff0000 0 0x10000>;
+                       record-size = <0x1000>;
+               };
+
+               /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
+               secmon_reserved: secmon@43000000 {
+                       reg = <0 0x43000000 0 0x30000>;
+                       no-map;
+               };
+
+               wmcpu_emi: wmcpu-reserved@47c80000 {
+                       reg = <0 0x47c80000 0 0x100000>;
+                       no-map;
+               };
+
+               wo_emi0: wo-emi@47d80000 {
+                       reg = <0 0x47d80000 0 0x40000>;
+                       no-map;
+               };
+
+               wo_data: wo-data@47dc0000 {
+                       reg = <0 0x47dc0000 0 0x240000>;
+                       no-map;
+               };
+       };
+
        soc {
                compatible = "simple-bus";
                ranges;
                };
        };
 
-       fan: pwm-fan {
-               compatible = "pwm-fan";
-               /* cooling level (0, 1, 2, 3, 4, 5, 6, 7) : (0%/25%/37.5%/50%/62.5%/75%/87.5%/100% duty) */
-               cooling-levels = <0 63 95 127 159 191 223 255>;
-               #cooling-cells = <2>;
-               status = "disabled";
-       };
-
        thermal-zones {
                cpu_thermal: cpu-thermal {
                        polling-delay-passive = <1000>;
                };
        };
 
-       reserved-memory {
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               /* 64 KiB reserved for ramoops/pstore */
-               ramoops@42ff0000 {
-                       compatible = "ramoops";
-                       reg = <0 0x42ff0000 0 0x10000>;
-                       record-size = <0x1000>;
-               };
-
-               /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
-               secmon_reserved: secmon@43000000 {
-                       reg = <0 0x43000000 0 0x30000>;
-                       no-map;
-               };
-
-               wmcpu_emi: wmcpu-reserved@47c80000 {
-                       reg = <0 0x47c80000 0 0x100000>;
-                       no-map;
-               };
-
-               wo_emi0: wo-emi@47d80000 {
-                       reg = <0 0x47d80000 0 0x40000>;
-                       no-map;
-               };
-
-               wo_data: wo-data@47dc0000 {
-                       reg = <0 0x47dc0000 0 0x240000>;
-                       no-map;
-               };
-       };
-
-       psci {
-               compatible  = "arm,psci-0.2";
-               method      = "smc";
-       };
-
-       trng {
-               compatible = "mediatek,mt7981-rng";
-       };
-
-       clk40m: oscillator@0 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <40000000>;
-               clock-output-names = "clkxtal";
-       };
-
        timer {
                compatible = "arm,armv8-timer";
                interrupt-parent = <&gic>;
 
        };
 
-       reg_3p3v: regulator-3p3v {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-3.3V";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       ice: ice_debug {
-               compatible = "mediatek,mt7981-ice_debug",
-                          "mediatek,mt2701-ice_debug";
-               clocks = <&infracfg CLK_INFRA_DBG_CK>;
-               clock-names = "ice_dbg";
+       trng {
+               compatible = "mediatek,mt7981-rng";
        };
 };