realtek: update the tree to the latest refactored version
[openwrt/staging/jow.git] / target / linux / realtek / files-5.4 / drivers / gpio / gpio-rtl838x.c
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include <linux/gpio/driver.h>
4 #include <linux/module.h>
5 #include <linux/platform_device.h>
6 #include <linux/delay.h>
7 #include <asm/mach-rtl838x/mach-rtl83xx.h>
8
9 /* RTL8231 registers for LED control */
10 #define RTL8231_LED_FUNC0 0x0000
11 #define RTL8231_GPIO_PIN_SEL(gpio) ((0x0002) + ((gpio) >> 4))
12 #define RTL8231_GPIO_DIR(gpio) ((0x0005) + ((gpio) >> 4))
13 #define RTL8231_GPIO_DATA(gpio) ((0x001C) + ((gpio) >> 4))
14
15 struct rtl838x_gpios {
16 struct gpio_chip gc;
17 u32 id;
18 struct device *dev;
19 int irq;
20 int num_leds;
21 int min_led;
22 int leds_per_port;
23 u32 led_mode;
24 int led_glb_ctrl;
25 int led_sw_ctrl;
26 int (*led_sw_p_ctrl)(int port);
27 int (*led_sw_p_en_ctrl)(int port);
28 int (*ext_gpio_dir)(int i);
29 int (*ext_gpio_data)(int i);
30 };
31
32 inline int rtl838x_ext_gpio_dir(int i)
33 {
34 return RTL838X_EXT_GPIO_DIR + ((i >>5) << 2);
35 }
36
37 inline int rtl839x_ext_gpio_dir(int i)
38 {
39 return RTL839X_EXT_GPIO_DIR + ((i >>5) << 2);
40 }
41
42 inline int rtl838x_ext_gpio_data(int i)
43 {
44 return RTL838X_EXT_GPIO_DATA + ((i >>5) << 2);
45 }
46
47 inline int rtl839x_ext_gpio_data(int i)
48 {
49 return RTL839X_EXT_GPIO_DATA + ((i >>5) << 2);
50 }
51
52 inline int rtl838x_led_sw_p_ctrl(int p)
53 {
54 return RTL838X_LED_SW_P_CTRL + (p << 2);
55 }
56
57 inline int rtl839x_led_sw_p_ctrl(int p)
58 {
59 return RTL839X_LED_SW_P_CTRL + (p << 2);
60 }
61
62 inline int rtl838x_led_sw_p_en_ctrl(int p)
63 {
64 return RTL838X_LED_SW_P_EN_CTRL + ((p / 10) << 2);
65 }
66
67 inline int rtl839x_led_sw_p_en_ctrl(int p)
68 {
69 return RTL839X_LED_SW_P_EN_CTRL + ((p / 10) << 2);
70 }
71
72 extern struct mutex smi_lock;
73 extern struct rtl83xx_soc_info soc_info;
74
75
76 void rtl838x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
77 {
78 int bit;
79 struct rtl838x_gpios *gpios = gpiochip_get_data(gc);
80
81 pr_debug("rtl838x_set: %d, value: %d\n", offset, value);
82 /* Internal GPIO of the RTL8380 */
83 if (offset < 32) {
84 if (value)
85 rtl83xx_w32_mask(0, BIT(offset), RTL838X_GPIO_PABC_DATA);
86 else
87 rtl83xx_w32_mask(BIT(offset), 0, RTL838X_GPIO_PABC_DATA);
88 }
89
90 /* LED driver for PWR and SYS */
91 if (offset >= 32 && offset < 64) {
92 bit = offset - 32;
93 if (value)
94 sw_w32_mask(0, BIT(bit), gpios->led_glb_ctrl);
95 else
96 sw_w32_mask(BIT(bit), 0, gpios->led_glb_ctrl);
97 return;
98 }
99
100 bit = (offset - 64) % 32;
101 /* First Port-LED */
102 if (offset >= 64 && offset < 96
103 && offset >= (64 + gpios->min_led)
104 && offset < (64 + gpios->min_led + gpios->num_leds)) {
105 if (value)
106 sw_w32_mask(7, 5, gpios->led_sw_p_ctrl(bit));
107 else
108 sw_w32_mask(7, 0, gpios->led_sw_p_ctrl(bit));
109 }
110 if (offset >= 96 && offset < 128
111 && offset >= (96 + gpios->min_led)
112 && offset < (96 + gpios->min_led + gpios->num_leds)) {
113 if (value)
114 sw_w32_mask(7 << 3, 5 << 3, gpios->led_sw_p_ctrl(bit));
115 else
116 sw_w32_mask(7 << 3, 0, gpios->led_sw_p_ctrl(bit));
117 }
118 if (offset >= 128 && offset < 160
119 && offset >= (128 + gpios->min_led)
120 && offset < (128 + gpios->min_led + gpios->num_leds)) {
121 if (value)
122 sw_w32_mask(7 << 6, 5 << 6, gpios->led_sw_p_ctrl(bit));
123 else
124 sw_w32_mask(7 << 6, 0, gpios->led_sw_p_ctrl(bit));
125 }
126 __asm__ volatile ("sync");
127 }
128
129 static int rtl838x_direction_input(struct gpio_chip *gc, unsigned int offset)
130 {
131 pr_debug("%s: %d\n", __func__, offset);
132
133 if (offset < 32) {
134 rtl83xx_w32_mask(BIT(offset), 0, RTL838X_GPIO_PABC_DIR);
135 return 0;
136 }
137
138 /* Internal LED driver does not support input */
139 return -ENOTSUPP;
140 }
141
142 static int rtl838x_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
143 {
144 pr_debug("%s: %d\n", __func__, offset);
145 if (offset < 32)
146 rtl83xx_w32_mask(0, BIT(offset), RTL838X_GPIO_PABC_DIR);
147 rtl838x_gpio_set(gc, offset, value);
148
149 /* LED for PWR and SYS driver is direction output by default */
150 return 0;
151 }
152
153 static int rtl838x_get_direction(struct gpio_chip *gc, unsigned int offset)
154 {
155 u32 v = 0;
156
157 pr_debug("%s: %d\n", __func__, offset);
158 if (offset < 32) {
159 v = rtl83xx_r32(RTL838X_GPIO_PABC_DIR);
160 if (v & BIT(offset))
161 return 0;
162 return 1;
163 }
164
165 /* LED driver for PWR and SYS is direction output by default */
166 if (offset >= 32 && offset < 64)
167 return 0;
168
169 return 0;
170 }
171
172 static int rtl838x_gpio_get(struct gpio_chip *gc, unsigned int offset)
173 {
174 u32 v;
175 struct rtl838x_gpios *gpios = gpiochip_get_data(gc);
176
177 pr_debug("%s: %d\n", __func__, offset);
178
179 /* Internal GPIO of the RTL8380 */
180 if (offset < 32) {
181 v = rtl83xx_r32(RTL838X_GPIO_PABC_DATA);
182 if (v & BIT(offset))
183 return 1;
184 return 0;
185 }
186
187 /* LED driver for PWR and SYS */
188 if (offset >= 32 && offset < 64) {
189 v = sw_r32(gpios->led_glb_ctrl);
190 if (v & BIT(offset-32))
191 return 1;
192 return 0;
193 }
194
195 /* BUG:
196 bit = (offset - 64) % 32;
197 if (offset >= 64 && offset < 96) {
198 if (sw_r32(RTL838X_LED1_SW_P_EN_CTRL) & BIT(bit))
199 return 1;
200 return 0;
201 }
202 if (offset >= 96 && offset < 128) {
203 if (sw_r32(RTL838X_LED1_SW_P_EN_CTRL) & BIT(bit))
204 return 1;
205 return 0;
206 }
207 if (offset >= 128 && offset < 160) {
208 if (sw_r32(RTL838X_LED1_SW_P_EN_CTRL) & BIT(bit))
209 return 1;
210 return 0;
211 }
212 */
213 return 0;
214 }
215
216 void rtl8380_led_test(struct rtl838x_gpios *gpios, u32 mask)
217 {
218 int i;
219 u32 led_gbl = sw_r32(gpios->led_glb_ctrl);
220 u32 mode_sel, led_p_en;
221
222 if (soc_info.family == RTL8380_FAMILY_ID) {
223 mode_sel = sw_r32(RTL838X_LED_MODE_SEL);
224 led_p_en = sw_r32(RTL838X_LED_P_EN_CTRL);
225 }
226
227 /* 2 Leds for ports 0-23 and 24-27, 3 would be 0x7 */
228 sw_w32_mask(0x3f, 0x3 | (0x3 << 3), gpios->led_glb_ctrl);
229
230 if(soc_info.family == RTL8380_FAMILY_ID) {
231 /* Enable all leds */
232 sw_w32(0xFFFFFFF, RTL838X_LED_P_EN_CTRL);
233 }
234 /* Enable software control of all leds */
235 sw_w32(0xFFFFFFF, gpios->led_sw_ctrl);
236 sw_w32(0xFFFFFFF, gpios->led_sw_p_en_ctrl(0));
237 sw_w32(0xFFFFFFF, gpios->led_sw_p_en_ctrl(10));
238 sw_w32(0x0000000, gpios->led_sw_p_en_ctrl(20));
239
240 for (i = 0; i < 28; i++) {
241 if (mask & BIT(i))
242 sw_w32(5 | (5 << 3) | (5 << 6), gpios->led_sw_p_ctrl(i));
243 }
244 msleep(3000);
245
246 if (soc_info.family == RTL8380_FAMILY_ID)
247 sw_w32(led_p_en, RTL838X_LED_P_EN_CTRL);
248 /* Disable software control of all leds */
249 sw_w32(0x0000000, gpios->led_sw_ctrl);
250 sw_w32(0x0000000, gpios->led_sw_p_en_ctrl(0));
251 sw_w32(0x0000000, gpios->led_sw_p_en_ctrl(10));
252 sw_w32(0x0000000, gpios->led_sw_p_en_ctrl(20));
253
254 sw_w32(led_gbl, gpios->led_glb_ctrl);
255 if (soc_info.family == RTL8380_FAMILY_ID)
256 sw_w32(mode_sel, RTL838X_LED_MODE_SEL);
257 }
258
259 void take_port_leds(struct rtl838x_gpios *gpios)
260 {
261 int leds_per_port = gpios->leds_per_port;
262 int mode = gpios->led_mode;
263
264 pr_info("%s, %d, %x\n", __func__, leds_per_port, mode);
265 pr_debug("Bootloader settings: %x %x %x\n",
266 sw_r32(gpios->led_sw_p_en_ctrl(0)),
267 sw_r32(gpios->led_sw_p_en_ctrl(10)),
268 sw_r32(gpios->led_sw_p_en_ctrl(20))
269 );
270
271 if (soc_info.family == RTL8380_FAMILY_ID) {
272 pr_debug("led glb: %x, sel %x\n",
273 sw_r32(gpios->led_glb_ctrl), sw_r32(RTL838X_LED_MODE_SEL));
274 pr_debug("RTL838X_LED_P_EN_CTRL: %x", sw_r32(RTL838X_LED_P_EN_CTRL));
275 pr_debug("RTL838X_LED_MODE_CTRL: %x", sw_r32(RTL838X_LED_MODE_CTRL));
276 sw_w32_mask(3, 0, RTL838X_LED_MODE_SEL);
277 sw_w32(mode, RTL838X_LED_MODE_CTRL);
278 }
279
280 /* Enable software control of all leds */
281 sw_w32(0xFFFFFFF, gpios->led_sw_ctrl);
282 if (soc_info.family == RTL8380_FAMILY_ID)
283 sw_w32(0xFFFFFFF, RTL838X_LED_P_EN_CTRL);
284
285 sw_w32(0x0000000, gpios->led_sw_p_en_ctrl(0));
286 sw_w32(0x0000000, gpios->led_sw_p_en_ctrl(10));
287 sw_w32(0x0000000, gpios->led_sw_p_en_ctrl(20));
288
289 sw_w32_mask(0x3f, 0, gpios->led_glb_ctrl);
290 switch (leds_per_port) {
291 case 3:
292 sw_w32_mask(0, 0x7 | (0x7 << 3), gpios->led_glb_ctrl);
293 sw_w32(0xFFFFFFF, gpios->led_sw_p_en_ctrl(20));
294 /* FALLTHRU */
295 case 2:
296 sw_w32_mask(0, 0x3 | (0x3 << 3), gpios->led_glb_ctrl);
297 sw_w32(0xFFFFFFF, gpios->led_sw_p_en_ctrl(10));
298 /* FALLTHRU */
299 case 1:
300 sw_w32_mask(0, 0x1 | (0x1 << 3), gpios->led_glb_ctrl);
301 sw_w32(0xFFFFFFF, gpios->led_sw_p_en_ctrl(0));
302 break;
303 default:
304 pr_err("No LEDS configured for software control\n");
305 }
306 }
307
308 static const struct of_device_id rtl838x_gpio_of_match[] = {
309 { .compatible = "realtek,rtl838x-gpio" },
310 {},
311 };
312
313 MODULE_DEVICE_TABLE(of, rtl838x_gpio_of_match);
314
315 static int rtl838x_gpio_probe(struct platform_device *pdev)
316 {
317 struct device *dev = &pdev->dev;
318 struct device_node *np = dev->of_node;
319 struct rtl838x_gpios *gpios;
320 int err;
321
322 pr_info("Probing RTL838X GPIOs\n");
323
324 if (!np) {
325 dev_err(&pdev->dev, "No DT found\n");
326 return -EINVAL;
327 }
328
329 gpios = devm_kzalloc(dev, sizeof(*gpios), GFP_KERNEL);
330 if (!gpios)
331 return -ENOMEM;
332
333 gpios->id = soc_info.id;
334
335 switch (gpios->id) {
336 case 0x8332:
337 pr_debug("Found RTL8332M GPIO\n");
338 break;
339 case 0x8380:
340 pr_debug("Found RTL8380M GPIO\n");
341 break;
342 case 0x8381:
343 pr_debug("Found RTL8381M GPIO\n");
344 break;
345 case 0x8382:
346 pr_debug("Found RTL8382M GPIO\n");
347 break;
348 case 0x8391:
349 pr_debug("Found RTL8391 GPIO\n");
350 break;
351 case 0x8393:
352 pr_debug("Found RTL8393 GPIO\n");
353 break;
354 default:
355 pr_err("Unknown GPIO chip id (%04x)\n", gpios->id);
356 return -ENODEV;
357 }
358
359 if (soc_info.family == RTL8380_FAMILY_ID) {
360 gpios->led_glb_ctrl = gpios->led_glb_ctrl;
361 gpios->led_sw_ctrl = RTL838X_LED_SW_CTRL;
362 gpios->led_sw_p_ctrl = rtl838x_led_sw_p_ctrl;
363 gpios->led_sw_p_en_ctrl = rtl838x_led_sw_p_en_ctrl;
364 gpios->ext_gpio_dir = rtl838x_ext_gpio_dir;
365 gpios->ext_gpio_data = rtl838x_ext_gpio_data;
366 }
367
368 if (soc_info.family == RTL8390_FAMILY_ID) {
369 gpios->led_glb_ctrl = RTL839X_LED_GLB_CTRL;
370 gpios->led_sw_ctrl = RTL839X_LED_SW_CTRL;
371 gpios->led_sw_p_ctrl = rtl839x_led_sw_p_ctrl;
372 gpios->led_sw_p_en_ctrl = rtl839x_led_sw_p_en_ctrl;
373 gpios->ext_gpio_dir = rtl839x_ext_gpio_dir;
374 gpios->ext_gpio_data = rtl839x_ext_gpio_data;
375 }
376
377 gpios->dev = dev;
378 gpios->gc.base = 0;
379 /* 0-31: internal
380 * 32-63, LED control register
381 * 64-95: PORT-LED 0
382 * 96-127: PORT-LED 1
383 * 128-159: PORT-LED 2
384 */
385 gpios->gc.ngpio = 160;
386 gpios->gc.label = "rtl838x";
387 gpios->gc.parent = dev;
388 gpios->gc.owner = THIS_MODULE;
389 gpios->gc.can_sleep = true;
390 gpios->irq = 31;
391
392 gpios->gc.direction_input = rtl838x_direction_input;
393 gpios->gc.direction_output = rtl838x_direction_output;
394 gpios->gc.set = rtl838x_gpio_set;
395 gpios->gc.get = rtl838x_gpio_get;
396 gpios->gc.get_direction = rtl838x_get_direction;
397
398 if (of_property_read_bool(np, "take-port-leds")) {
399 if (of_property_read_u32(np, "leds-per-port", &gpios->leds_per_port))
400 gpios->leds_per_port = 2;
401 if (of_property_read_u32(np, "led-mode", &gpios->led_mode))
402 gpios->led_mode = (0x1ea << 15) | 0x1ea;
403 if (of_property_read_u32(np, "num-leds", &gpios->num_leds))
404 gpios->num_leds = 32;
405 if (of_property_read_u32(np, "min-led", &gpios->min_led))
406 gpios->min_led = 0;
407 take_port_leds(gpios);
408 }
409
410 err = devm_gpiochip_add_data(dev, &gpios->gc, gpios);
411 return err;
412 }
413
414 static struct platform_driver rtl838x_gpio_driver = {
415 .driver = {
416 .name = "rtl838x-gpio",
417 .of_match_table = rtl838x_gpio_of_match,
418 },
419 .probe = rtl838x_gpio_probe,
420 };
421
422 module_platform_driver(rtl838x_gpio_driver);
423
424 MODULE_DESCRIPTION("Realtek RTL838X GPIO API support");
425 MODULE_LICENSE("GPL v2");