target/linux/realtek/dts-5.15/rtl8393_tplink_sg2452p-v4.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "rtl839x.dtsi"
   4
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         compatible = "tplink,sg2452p-v4", "realtek,rtl8393-soc";
  11         model = "TP-Link SG2452P v4";
  12
  13         memory@0 {
  14                 device_type = "memory";
  15                 reg = <0x0 0x10000000>;
  16         };
  17
  18         aliases {
  19                 led-boot = &led_sys;
  20                 led-failsafe = &led_sys;
  21                 led-running = &led_sys;
  22                 led-upgrade = &led_sys;
  23                 label-mac-device = &ethernet0;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:38400n8";
  28         };
  29
  30         keys {
  31                 compatible = "gpio-keys";
  32
  33                 reset {
  34                         label = "reset";
  35                         gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
  36                         linux,code = <KEY_RESTART>;
  37                 };
  38
  39                 speed {
  40                         label = "speed";
  41                         gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
  42                         linux,code = <BTN_0>;
  43                 };
  44         };
  45
  46         gpio_fan_sys {
  47                 compatible = "gpio-fan";
  48                 alarm-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  49         };
  50
  51         gpio_fan_psu_1 {
  52                 pinctrl-names = "default";
  53                 pinctrl-0 = <&disable_jtag>;
  54                 compatible = "gpio-fan";
  55
  56                 alarm-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  57                 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
  58                 /* the actual speeds (rpm) are unknown, just use dummy values */
  59                 gpio-fan,speed-map = <1 0>, <2 1>;
  60                 #cooling-cells = <2>;
  61         };
  62
  63         gpio_fan_psu_2 {
  64                 /* This fan runs in parallel to PSU1 fan, but has a separate
  65                  * alarm GPIO. This is not (yet) supported by the gpio-fan driver,
  66                  * so a separate instance is added
  67                  */
  68                 compatible = "gpio-fan";
  69                 alarm-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  70         };
  71
  72         leds {
  73                 pinctrl-names = "default";
  74                 compatible = "gpio-leds";
  75
  76                 led-0 {
  77                         label = "green:speed";
  78                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  79                         color = <LED_COLOR_ID_GREEN>;
  80                         function = LED_FUNCTION_INDICATOR;
  81                 };
  82
  83                 led-1 {
  84                         label = "green:poe";
  85                         gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  86                         color = <LED_COLOR_ID_GREEN>;
  87                         function = LED_FUNCTION_INDICATOR;
  88                 };
  89
  90                 led_sys: led-2 {
  91                         label = "green:sys";
  92                         gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  93                         color = <LED_COLOR_ID_GREEN>;
  94                         function = LED_FUNCTION_STATUS;
  95                 };
  96
  97                 led-3 {
  98                         label = "green:fan";
  99                         gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
 100                         color = <LED_COLOR_ID_GREEN>;
 101                         function = LED_FUNCTION_STATUS;
 102                 };
 103
 104                 led-4 {
 105                         label = "amber:fan";
 106                         gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
 107                         color = <LED_COLOR_ID_AMBER>;
 108                         function = "fault-fan";
 109                 };
 110
 111                 led-5 {
 112                         label = "green:poe-max";
 113                         gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
 114                         color = <LED_COLOR_ID_GREEN>;
 115                         function = "alarm-poe";
 116                 };
 117         };
 118
 119         i2c-gpio-0 {
 120                 compatible = "i2c-gpio";
 121                 sda-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 122                 scl-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 123                 i2c-gpio,delay-us = <2>;
 124                 #address-cells = <1>;
 125                 #size-cells = <0>;
 126
 127                 /* LAN9 - LAN12 */
 128                 tps23861@5 {
 129                         compatible = "ti,tps23861";
 130                         reg = <0x05>;
 131                 };
 132
 133                 /* LAN17 - LAN20 */
 134                 tps23861@6 {
 135                         compatible = "ti,tps23861";
 136                         reg = <0x06>;
 137                 };
 138
 139                 /* LAN45 - LAN48 */
 140                 tps23861@9 {
 141                         compatible = "ti,tps23861";
 142                         reg = <0x09>;
 143                 };
 144
 145                 /* LAN37 - LAN40 */
 146                 tps23861@a {
 147                         compatible = "ti,tps23861";
 148                         reg = <0x0a>;
 149                 };
 150
 151                 /* LAN1 - LAN4 */
 152                 tps23861@14 {
 153                         compatible = "ti,tps23861";
 154                         reg = <0x14>;
 155                 };
 156
 157                 /* LAN25 - LAN28 */
 158                 tps23861@24 {
 159                         compatible = "ti,tps23861";
 160                         reg = <0x24>;
 161                 };
 162
 163                 /* LAN33 - LAN 36 */
 164                 tps23861@25 {
 165                         compatible = "ti,tps23861";
 166                         reg = <0x25>;
 167                 };
 168
 169                 /* LAN41 - LAN44 */
 170                 tps23861@26 {
 171                         compatible = "ti,tps23861";
 172                         reg = <0x26>;
 173                 };
 174
 175                 /* LAN13 - LAN16 */
 176                 tps23861@29 {
 177                         compatible = "ti,tps23861";
 178                         reg = <0x29>;
 179                 };
 180
 181                 /* LAN29 - LAN32 */
 182                 tps23861@2c {
 183                         compatible = "ti,tps23861";
 184                         reg = <0x2c>;
 185                 };
 186
 187                 /* LAN5 - LAN8 */
 188                 tps23861@48 {
 189                         compatible = "ti,tps23861";
 190                         reg = <0x48>;
 191                 };
 192
 193                 /* LAN21 - LAN24 */
 194                 tps23861@49 {
 195                         compatible = "ti,tps23861";
 196                         reg = <0x49>;
 197                 };
 198         };
 199
 200         gpio-restart {
 201                 compatible = "gpio-restart";
 202                 gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 203         };
 204 };
 205
 206 &gpio0 {
 207         poe-enable {
 208                 gpio-hog;
 209                 gpios = <23 GPIO_ACTIVE_HIGH>;
 210                 output-high;
 211                 line-name = "poe-enable";
 212         };
 213 };
 214
 215 &spi0 {
 216         status = "okay";
 217         flash@0 {
 218                 compatible = "jedec,spi-nor";
 219                 reg = <0>;
 220                 spi-max-frequency = <10000000>;
 221
 222                 partitions {
 223                         compatible = "fixed-partitions";
 224                         #address-cells = <1>;
 225                         #size-cells = <1>;
 226
 227                         partition@0 {
 228                                 label = "u-boot";
 229                                 reg = <0x0 0xe0000>;
 230                                 read-only;
 231                         };
 232                         partition@e0000 {
 233                                 label = "u-boot-env";
 234                                 reg = <0xe0000 0x20000>;
 235                         };
 236
 237                         /* We use the "sys", "usrimg1" and "usrimg2" partitions
 238                          *  as firmware since the kernel needs to be in "sys", but the
 239                          *  partition is too small to hold the "rootfs" as well.
 240                          *  The original partition map contains:
 241                          *
 242                          *   partition@100000 {
 243                          *       label = "sys";
 244                          *       reg = <0x100000 0x600000>;
 245                          *   };
 246                          *   partition@700000 {
 247                          *       label = "usrimg1";
 248                          *       reg = <0x700000 0xa00000>;
 249                          *   };
 250                          *   partition@1100000 {
 251                          *       label = "usrimg2";
 252                          *       reg = <0x1100000 0xa00000>;
 253                          *   };
 254                          */
 255
 256                         partition@100000 {
 257                                 label = "firmware";
 258                                 reg = <0x100000 0x1a00000>;
 259                         };
 260                         partition@1b00000 {
 261                                 label = "usrappfs";
 262                                 reg = <0x1b00000 0x400000>;
 263                         };
 264                         partition@1f00000 {
 265                                 label = "para";
 266                                 reg = <0x1f00000 0x100000>;
 267                                 read-only;
 268
 269                                 nvmem-layout {
 270                                         compatible = "fixed-layout";
 271                                         #address-cells = <1>;
 272                                         #size-cells = <1>;
 273
 274                                         factory_macaddr: macaddr@fdff4 {
 275                                                 reg = <0xfdff4 0x6>;
 276                                         };
 277                                 };
 278                         };
 279                 };
 280         };
 281 };
 282
 283 &ethernet0 {
 284         nvmem-cells = <&factory_macaddr>;
 285         nvmem-cell-names = "mac-address";
 286
 287         mdio: mdio-bus {
 288                 compatible = "realtek,rtl838x-mdio";
 289                 #address-cells = <1>;
 290                 #size-cells = <0>;
 291
 292                 /* External phy RTL8218B #1 */
 293                 EXTERNAL_PHY(0)
 294                 EXTERNAL_PHY(1)
 295                 EXTERNAL_PHY(2)
 296                 EXTERNAL_PHY(3)
 297                 EXTERNAL_PHY(4)
 298                 EXTERNAL_PHY(5)
 299                 EXTERNAL_PHY(6)
 300                 EXTERNAL_PHY(7)
 301
 302                 /* External phy RTL8218B #2 */
 303                 EXTERNAL_PHY(8)
 304                 EXTERNAL_PHY(9)
 305                 EXTERNAL_PHY(10)
 306                 EXTERNAL_PHY(11)
 307                 EXTERNAL_PHY(12)
 308                 EXTERNAL_PHY(13)
 309                 EXTERNAL_PHY(14)
 310                 EXTERNAL_PHY(15)
 311
 312                 /* External phy RTL8218B #3 */
 313                 EXTERNAL_PHY(16)
 314                 EXTERNAL_PHY(17)
 315                 EXTERNAL_PHY(18)
 316                 EXTERNAL_PHY(19)
 317                 EXTERNAL_PHY(20)
 318                 EXTERNAL_PHY(21)
 319                 EXTERNAL_PHY(22)
 320                 EXTERNAL_PHY(23)
 321
 322                 /* External phy RTL8218B #4 */
 323                 EXTERNAL_PHY(24)
 324                 EXTERNAL_PHY(25)
 325                 EXTERNAL_PHY(26)
 326                 EXTERNAL_PHY(27)
 327                 EXTERNAL_PHY(28)
 328                 EXTERNAL_PHY(29)
 329                 EXTERNAL_PHY(30)
 330                 EXTERNAL_PHY(31)
 331
 332                 /* External phy RTL8218B #5 */
 333                 EXTERNAL_PHY(32)
 334                 EXTERNAL_PHY(33)
 335                 EXTERNAL_PHY(34)
 336                 EXTERNAL_PHY(35)
 337                 EXTERNAL_PHY(36)
 338                 EXTERNAL_PHY(37)
 339                 EXTERNAL_PHY(38)
 340                 EXTERNAL_PHY(39)
 341
 342                 /* External phy RTL8218B #6 */
 343                 EXTERNAL_PHY(40)
 344                 EXTERNAL_PHY(41)
 345                 EXTERNAL_PHY(42)
 346                 EXTERNAL_PHY(43)
 347                 EXTERNAL_PHY(44)
 348                 EXTERNAL_PHY(45)
 349                 EXTERNAL_PHY(46)
 350                 EXTERNAL_PHY(47)
 351         };
 352 };
 353
 354 &switch0 {
 355         ports {
 356                 #address-cells = <1>;
 357                 #size-cells = <0>;
 358
 359                 SWITCH_PORT(0, 01, qsgmii)
 360                 SWITCH_PORT(1, 02, qsgmii)
 361                 SWITCH_PORT(2, 03, qsgmii)
 362                 SWITCH_PORT(3, 04, qsgmii)
 363                 SWITCH_PORT(4, 05, qsgmii)
 364                 SWITCH_PORT(5, 06, qsgmii)
 365                 SWITCH_PORT(6, 07, qsgmii)
 366                 SWITCH_PORT(7, 08, qsgmii)
 367
 368                 SWITCH_PORT(8, 09, qsgmii)
 369                 SWITCH_PORT(9, 10, qsgmii)
 370                 SWITCH_PORT(10, 11, qsgmii)
 371                 SWITCH_PORT(11, 12, qsgmii)
 372                 SWITCH_PORT(12, 13, qsgmii)
 373                 SWITCH_PORT(13, 14, qsgmii)
 374                 SWITCH_PORT(14, 15, qsgmii)
 375                 SWITCH_PORT(15, 16, qsgmii)
 376
 377                 SWITCH_PORT(16, 17, qsgmii)
 378                 SWITCH_PORT(17, 18, qsgmii)
 379                 SWITCH_PORT(18, 19, qsgmii)
 380                 SWITCH_PORT(19, 20, qsgmii)
 381                 SWITCH_PORT(20, 21, qsgmii)
 382                 SWITCH_PORT(21, 22, qsgmii)
 383                 SWITCH_PORT(22, 23, qsgmii)
 384                 SWITCH_PORT(23, 24, qsgmii)
 385
 386                 SWITCH_PORT(24, 25, qsgmii)
 387                 SWITCH_PORT(25, 26, qsgmii)
 388                 SWITCH_PORT(26, 27, qsgmii)
 389                 SWITCH_PORT(27, 28, qsgmii)
 390                 SWITCH_PORT(28, 29, qsgmii)
 391                 SWITCH_PORT(29, 30, qsgmii)
 392                 SWITCH_PORT(30, 31, qsgmii)
 393                 SWITCH_PORT(31, 32, qsgmii)
 394
 395                 SWITCH_PORT(32, 33, qsgmii)
 396                 SWITCH_PORT(33, 34, qsgmii)
 397                 SWITCH_PORT(34, 35, qsgmii)
 398                 SWITCH_PORT(35, 36, qsgmii)
 399                 SWITCH_PORT(36, 37, qsgmii)
 400                 SWITCH_PORT(37, 38, qsgmii)
 401                 SWITCH_PORT(38, 39, qsgmii)
 402                 SWITCH_PORT(39, 40, qsgmii)
 403
 404                 SWITCH_PORT(40, 41, qsgmii)
 405                 SWITCH_PORT(41, 42, qsgmii)
 406                 SWITCH_PORT(42, 43, qsgmii)
 407                 SWITCH_PORT(43, 44, qsgmii)
 408                 SWITCH_PORT(44, 45, qsgmii)
 409                 SWITCH_PORT(45, 46, qsgmii)
 410                 SWITCH_PORT(46, 47, qsgmii)
 411                 SWITCH_PORT(47, 48, qsgmii)
 412
 413                 /* CPU-Port */
 414                 port@52 {
 415                         ethernet = <&ethernet0>;
 416                         reg = <52>;
 417                         phy-mode = "internal";
 418
 419                         fixed-link {
 420                                 speed = <1000>;
 421                                 full-duplex;
 422                         };
 423                 };
 424         };
 425 };