target/linux/ramips/dts/rt5350_vocore_vocore.dtsi

   1 #include "rt5350.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/leds/common.h>
   5
   6 / {
   7         compatible = "vocore,vocore", "ralink,rt5350-soc";
   8
   9         aliases {
  10                 led-boot = &led_status;
  11                 led-failsafe = &led_status;
  12                 led-running = &led_status;
  13                 led-upgrade = &led_status;
  14                 label-mac-device = &ethernet;
  15         };
  16
  17         gpio-export {
  18                 compatible = "gpio-export";
  19                 #size-cells = <0>;
  20
  21                 gpio0 {
  22                         gpio-export,name = "gpio0";
  23                         gpio-export,direction_may_change = <1>;
  24                         gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  25                 };
  26
  27                 /* UARTF */
  28                 gpio7 {
  29                         /* UARTF_RTS_N */
  30                         gpio-export,name = "gpio7";
  31                         gpio-export,direction_may_change = <1>;
  32                         gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
  33                 };
  34
  35                 gpio8 {
  36                         /* UARTF_TXD */
  37                         gpio-export,name = "gpio8";
  38                         gpio-export,direction_may_change = <1>;
  39                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  40                 };
  41
  42                 gpio9 {
  43                         /* UARTF_CTS_N */
  44                         gpio-export,name = "gpio9";
  45                         gpio-export,direction_may_change = <1>;
  46                         gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  47                 };
  48
  49                 gpio12 {
  50                         /* UARTF_DCD_N */
  51                         gpio-export,name = "gpio12";
  52                         gpio-export,direction_may_change = <1>;
  53                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  54                 };
  55
  56                 gpio13 {
  57                         /* UARTF_DSR_N */
  58                         gpio-export,name = "gpio13";
  59                         gpio-export,direction_may_change = <1>;
  60                         gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  61                 };
  62
  63                 gpio14 {
  64                         /* UARTF_RIN */
  65                         gpio-export,name = "gpio14";
  66                         gpio-export,direction_may_change = <1>;
  67                         gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  68                 };
  69
  70                 /* JTAG */
  71                 gpio17 {
  72                         /* JTAG_TDO */
  73                         gpio-export,name = "gpio17";
  74                         gpio-export,direction_may_change = <1>;
  75                         gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
  76                 };
  77
  78                 gpio18 {
  79                         /* JTAG_TDI */
  80                         gpio-export,name = "gpio18";
  81                         gpio-export,direction_may_change = <1>;
  82                         gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
  83                 };
  84
  85                 gpio19 {
  86                         /* JTAG_TMS */
  87                         gpio-export,name = "gpio19";
  88                         gpio-export,direction_may_change = <1>;
  89                         gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
  90                 };
  91
  92                 gpio20 {
  93                         /* JTAG_TCLK */
  94                         gpio-export,name = "gpio20";
  95                         gpio-export,direction_may_change = <1>;
  96                         gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  97                 };
  98
  99                 gpio21 {
 100                         /* JTAG_TRST_N */
 101                         gpio-export,name = "gpio21";
 102                         gpio-export,direction_may_change = <1>;
 103                         gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
 104                 };
 105
 106                 /* ETH LEDs */
 107                 gpio22 {
 108                         /* ETH0_LED */
 109                         gpio-export,name = "gpio22";
 110                         gpio-export,direction_may_change = <1>;
 111                         gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
 112                 };
 113
 114                 gpio23 {
 115                         /* ETH1_LED */
 116                         gpio-export,name = "gpio23";
 117                         gpio-export,direction_may_change = <1>;
 118                         gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 119                 };
 120
 121                 gpio24 {
 122                         /* ETH2_LED */
 123                         gpio-export,name = "gpio24";
 124                         gpio-export,direction_may_change = <1>;
 125                         gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 126                 };
 127
 128                 gpio25 {
 129                         /* ETH3_LED */
 130                         gpio-export,name = "gpio25";
 131                         gpio-export,direction_may_change = <1>;
 132                         gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
 133                 };
 134
 135                 gpio26 {
 136                         /* ETH4_LED */
 137                         gpio-export,name = "gpio26";
 138                         gpio-export,direction_may_change = <1>;
 139                         gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 140                 };
 141         };
 142
 143         leds {
 144                 compatible = "gpio-leds";
 145
 146                 led_status: status {
 147                         /* UARTF_RXD */
 148                         function = LED_FUNCTION_STATUS;
 149                         color = <LED_COLOR_ID_GREEN>;
 150                         gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
 151                 };
 152
 153                 eth {
 154                         /* UARTF_DTR_N */
 155                         label = "orange:eth";
 156                         gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 157                 };
 158         };
 159 };
 160
 161 &spi0 {
 162         status = "okay";
 163
 164         flash@0 {
 165                 compatible = "jedec,spi-nor";
 166                 reg = <0>;
 167                 spi-max-frequency = <10000000>;
 168
 169                 partitions {
 170                         compatible = "fixed-partitions";
 171                         #address-cells = <1>;
 172                         #size-cells = <1>;
 173
 174                         partition@0 {
 175                                 label = "uboot";
 176                                 reg = <0x0 0x30000>;
 177                                 read-only;
 178                         };
 179
 180                         partition@30000 {
 181                                 label = "uboot-env";
 182                                 reg = <0x30000 0x10000>;
 183                                 read-only;
 184                         };
 185
 186                         partition@40000 {
 187                                 label = "factory";
 188                                 reg = <0x40000 0x10000>;
 189                                 read-only;
 190
 191                                 nvmem-layout {
 192                                         compatible = "fixed-layout";
 193                                         #address-cells = <1>;
 194                                         #size-cells = <1>;
 195
 196                                         eeprom_factory_0: eeprom@0 {
 197                                                 reg = <0x0 0x200>;
 198                                         };
 199
 200                                         macaddr_factory_4: macaddr@4 {
 201                                                 reg = <0x4 0x6>;
 202                                         };
 203                                 };
 204                         };
 205
 206                         firmware: partition@50000 {
 207                                 compatible = "denx,uimage";
 208                                 label = "firmware";
 209                                 /* reg property is set based on flash size in DTS files */
 210                         };
 211                 };
 212         };
 213 };
 214
 215 &gpio1 {
 216         status = "okay";
 217 };
 218
 219 &i2c {
 220         status = "okay";
 221 };
 222
 223 &state_default {
 224         gpio {
 225                 groups = "jtag", "uartf", "led";
 226                 function = "gpio";
 227         };
 228 };
 229
 230 &ethernet {
 231         nvmem-cells = <&macaddr_factory_4>;
 232         nvmem-cell-names = "mac-address";
 233 };
 234
 235 &esw {
 236         mediatek,portmap = <0x11>;
 237         mediatek,portdisable = <0x2e>;
 238 };
 239
 240 &wmac {
 241         nvmem-cells = <&eeprom_factory_0>;
 242         nvmem-cell-names = "eeprom";
 243 };
 244
 245 &spi1 {
 246         status = "okay";
 247
 248         spidev@0 {
 249                 compatible = "linux,spidev";
 250                 spi-max-frequency = <10000000>;
 251                 reg = <0>;
 252         };
 253 };