target/linux/ramips/dts/rt5350_vocore_vocore.dtsi

   1 #include "rt5350.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 / {
   6         compatible = "vocore,vocore", "ralink,rt5350-soc";
   7
   8         aliases {
   9                 led-boot = &led_status;
  10                 led-failsafe = &led_status;
  11                 led-running = &led_status;
  12                 led-upgrade = &led_status;
  13                 label-mac-device = &ethernet;
  14         };
  15
  16         gpio-export {
  17                 compatible = "gpio-export";
  18                 #size-cells = <0>;
  19
  20                 gpio0 {
  21                         gpio-export,name = "gpio0";
  22                         gpio-export,direction_may_change = <1>;
  23                         gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  24                 };
  25
  26                 /* UARTF */
  27                 gpio7 {
  28                         /* UARTF_RTS_N */
  29                         gpio-export,name = "gpio7";
  30                         gpio-export,direction_may_change = <1>;
  31                         gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
  32                 };
  33
  34                 gpio8 {
  35                         /* UARTF_TXD */
  36                         gpio-export,name = "gpio8";
  37                         gpio-export,direction_may_change = <1>;
  38                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  39                 };
  40
  41                 gpio9 {
  42                         /* UARTF_CTS_N */
  43                         gpio-export,name = "gpio9";
  44                         gpio-export,direction_may_change = <1>;
  45                         gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  46                 };
  47
  48                 gpio12 {
  49                         /* UARTF_DCD_N */
  50                         gpio-export,name = "gpio12";
  51                         gpio-export,direction_may_change = <1>;
  52                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  53                 };
  54
  55                 gpio13 {
  56                         /* UARTF_DSR_N */
  57                         gpio-export,name = "gpio13";
  58                         gpio-export,direction_may_change = <1>;
  59                         gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  60                 };
  61
  62                 gpio14 {
  63                         /* UARTF_RIN */
  64                         gpio-export,name = "gpio14";
  65                         gpio-export,direction_may_change = <1>;
  66                         gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  67                 };
  68
  69                 /* JTAG */
  70                 gpio17 {
  71                         /* JTAG_TDO */
  72                         gpio-export,name = "gpio17";
  73                         gpio-export,direction_may_change = <1>;
  74                         gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
  75                 };
  76
  77                 gpio18 {
  78                         /* JTAG_TDI */
  79                         gpio-export,name = "gpio18";
  80                         gpio-export,direction_may_change = <1>;
  81                         gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
  82                 };
  83
  84                 gpio19 {
  85                         /* JTAG_TMS */
  86                         gpio-export,name = "gpio19";
  87                         gpio-export,direction_may_change = <1>;
  88                         gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
  89                 };
  90
  91                 gpio20 {
  92                         /* JTAG_TCLK */
  93                         gpio-export,name = "gpio20";
  94                         gpio-export,direction_may_change = <1>;
  95                         gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  96                 };
  97
  98                 gpio21 {
  99                         /* JTAG_TRST_N */
 100                         gpio-export,name = "gpio21";
 101                         gpio-export,direction_may_change = <1>;
 102                         gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
 103                 };
 104
 105                 /* ETH LEDs */
 106                 gpio22 {
 107                         /* ETH0_LED */
 108                         gpio-export,name = "gpio22";
 109                         gpio-export,direction_may_change = <1>;
 110                         gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
 111                 };
 112
 113                 gpio23 {
 114                         /* ETH1_LED */
 115                         gpio-export,name = "gpio23";
 116                         gpio-export,direction_may_change = <1>;
 117                         gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 118                 };
 119
 120                 gpio24 {
 121                         /* ETH2_LED */
 122                         gpio-export,name = "gpio24";
 123                         gpio-export,direction_may_change = <1>;
 124                         gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 125                 };
 126
 127                 gpio25 {
 128                         /* ETH3_LED */
 129                         gpio-export,name = "gpio25";
 130                         gpio-export,direction_may_change = <1>;
 131                         gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
 132                 };
 133
 134                 gpio26 {
 135                         /* ETH4_LED */
 136                         gpio-export,name = "gpio26";
 137                         gpio-export,direction_may_change = <1>;
 138                         gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 139                 };
 140         };
 141
 142         leds {
 143                 compatible = "gpio-leds";
 144
 145                 led_status: status {
 146                         /* UARTF_RXD */
 147                         label = "green:status";
 148                         gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
 149                 };
 150
 151                 eth {
 152                         /* UARTF_DTR_N */
 153                         label = "orange:eth";
 154                         gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 155                 };
 156         };
 157 };
 158
 159 &spi0 {
 160         status = "okay";
 161
 162         flash@0 {
 163                 compatible = "jedec,spi-nor";
 164                 reg = <0>;
 165                 spi-max-frequency = <10000000>;
 166
 167                 partitions {
 168                         compatible = "fixed-partitions";
 169                         #address-cells = <1>;
 170                         #size-cells = <1>;
 171
 172                         partition@0 {
 173                                 label = "uboot";
 174                                 reg = <0x0 0x30000>;
 175                                 read-only;
 176                         };
 177
 178                         partition@30000 {
 179                                 label = "uboot-env";
 180                                 reg = <0x30000 0x10000>;
 181                                 read-only;
 182                         };
 183
 184                         factory: partition@40000 {
 185                                 compatible = "nvmem-cells";
 186                                 label = "factory";
 187                                 reg = <0x40000 0x10000>;
 188                                 #address-cells = <1>;
 189                                 #size-cells = <1>;
 190                                 read-only;
 191
 192                                 eeprom_factory_0: eeprom@0 {
 193                                         reg = <0x0 0x200>;
 194                                 };
 195
 196                                 macaddr_factory_4: macaddr@4 {
 197                                         reg = <0x4 0x6>;
 198                                 };
 199                         };
 200
 201                         firmware: partition@50000 {
 202                                 compatible = "denx,uimage";
 203                                 label = "firmware";
 204                                 /* reg property is set based on flash size in DTS files */
 205                         };
 206                 };
 207         };
 208 };
 209
 210 &gpio1 {
 211         status = "okay";
 212 };
 213
 214 &i2c {
 215         status = "okay";
 216 };
 217
 218 &state_default {
 219         gpio {
 220                 groups = "jtag", "uartf", "led";
 221                 function = "gpio";
 222         };
 223 };
 224
 225 &ethernet {
 226         nvmem-cells = <&macaddr_factory_4>;
 227         nvmem-cell-names = "mac-address";
 228 };
 229
 230 &esw {
 231         mediatek,portmap = <0x11>;
 232         mediatek,portdisable = <0x2e>;
 233 };
 234
 235 &wmac {
 236         nvmem-cells = <&eeprom_factory_0>;
 237         nvmem-cell-names = "eeprom";
 238 };
 239
 240 &spi1 {
 241         status = "okay";
 242
 243         spidev@0 {
 244                 compatible = "linux,spidev";
 245                 spi-max-frequency = <10000000>;
 246                 reg = <0>;
 247         };
 248 };