8a4120175e1bfa8406370e85f73082fc0277225f
[openwrt/staging/jow.git] / target / linux / ramips / dts / rt3052_skyline_sl-r7205.dts
1 #include "rt3050.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "skyline,sl-r7205", "ralink,rt3052-soc";
8 model = "Skyline SL-R7205 Wireless 3G Router";
9
10 aliases {
11 led-boot = &led_wifi;
12 led-failsafe = &led_wifi;
13 led-running = &led_wifi;
14 led-upgrade = &led_wifi;
15 };
16
17 flash@1f000000 {
18 compatible = "cfi-flash";
19 reg = <0x1f000000 0x800000>;
20 bank-width = <2>;
21 device-width = <2>;
22
23 partitions {
24 compatible = "fixed-partitions";
25 #address-cells = <1>;
26 #size-cells = <1>;
27
28 partition@0 {
29 label = "u-boot";
30 reg = <0x0 0x30000>;
31 read-only;
32 };
33
34 partition@30000 {
35 label = "u-boot-env";
36 reg = <0x30000 0x10000>;
37 read-only;
38 };
39
40 factory: partition@40000 {
41 label = "factory";
42 reg = <0x40000 0x10000>;
43 read-only;
44
45 nvmem-layout {
46 compatible = "fixed-layout";
47 #address-cells = <1>;
48 #size-cells = <1>;
49
50 eeprom_factory_0: eeprom@0 {
51 reg = <0x0 0x200>;
52 };
53
54 macaddr_factory_4: macaddr@4 {
55 reg = <0x4 0x6>;
56 };
57 };
58 };
59
60 partition@50000 {
61 compatible = "denx,uimage";
62 label = "firmware";
63 reg = <0x50000 0x3b0000>;
64 };
65 };
66 };
67
68 leds {
69 compatible = "gpio-leds";
70
71 led_wifi: wifi {
72 label = "green:wifi";
73 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
74 };
75 };
76
77 keys {
78 compatible = "gpio-keys-polled";
79 poll-interval = <20>;
80
81 reset {
82 label = "reset";
83 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
84 linux,code = <KEY_RESTART>;
85 };
86
87 wps {
88 label = "wps";
89 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
90 linux,code = <KEY_WPS_BUTTON>;
91 };
92 };
93 };
94
95 &state_default {
96 gpio {
97 groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
98 function = "gpio";
99 };
100 };
101
102 &ethernet {
103 nvmem-cells = <&macaddr_factory_4>;
104 nvmem-cell-names = "mac-address";
105 };
106
107 &esw {
108 mediatek,portmap = <0x3e>;
109 };
110
111 &wmac {
112 nvmem-cells = <&eeprom_factory_0>;
113 nvmem-cell-names = "eeprom";
114 };
115
116 &otg {
117 status = "okay";
118 };