643f599246c045a78f019baf2f20bc19a139057f
[openwrt/staging/jow.git] / target / linux / ramips / dts / mt7628an_jotale_js76x8.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7628an.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "jotale,js76x8", "mediatek,mt7628an-soc";
10
11 aliases {
12 led-boot = &led_system;
13 led-failsafe = &led_system;
14 led-running = &led_system;
15 led-upgrade = &led_system;
16 };
17
18 chosen {
19 bootargs = "console=ttyS0,115200";
20 };
21
22 leds {
23 compatible = "gpio-leds";
24
25 led_system: system {
26 label = "green:system";
27 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
28 };
29
30 wifi {
31 label = "green:wifi";
32 gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
33 linux,default-trigger = "phy0tpt";
34 };
35 };
36
37 keys {
38 compatible = "gpio-keys";
39
40 reset {
41 label = "reset";
42 gpios = <&gpio 38 GPIO_ACTIVE_HIGH>;
43 linux,code = <KEY_RESTART>;
44 };
45 };
46 };
47
48 &state_default {
49 gpio {
50 groups = "refclk", "wdt", "wled_an";
51 function = "gpio";
52 };
53 };
54
55 &spi0 {
56 status = "okay";
57
58 pinctrl-names = "default";
59 pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
60
61 flash0: flash@0 {
62 compatible = "jedec,spi-nor";
63 reg = <0>;
64 spi-max-frequency = <40000000>;
65
66 partitions {
67 compatible = "fixed-partitions";
68 #address-cells = <1>;
69 #size-cells = <1>;
70
71 partition@0 {
72 label = "u-boot";
73 reg = <0x0 0x30000>;
74 read-only;
75 };
76
77 partition@30000 {
78 label = "u-boot-env";
79 reg = <0x30000 0x10000>;
80 read-only;
81 };
82
83 factory: partition@40000 {
84 label = "factory";
85 reg = <0x40000 0x10000>;
86 read-only;
87
88 nvmem-layout {
89 compatible = "fixed-layout";
90 #address-cells = <1>;
91 #size-cells = <1>;
92
93 eeprom_factory_0: eeprom@0 {
94 reg = <0x0 0x400>;
95 };
96
97 macaddr_factory_28: macaddr@28 {
98 reg = <0x28 0x6>;
99 };
100 };
101 };
102
103 firmware: partition@50000 {
104 compatible = "denx,uimage";
105 label = "firmware";
106 /* reg property is set based on flash size in DTS files */
107 };
108 };
109 };
110 };
111
112 &i2c {
113 status = "okay";
114 };
115
116 &i2s {
117 status = "okay";
118 };
119
120 &uart1 {
121 status = "okay";
122 };
123
124 &uart2 {
125 status = "okay";
126 };
127
128 &ethernet {
129 nvmem-cells = <&macaddr_factory_28>;
130 nvmem-cell-names = "mac-address";
131 };
132
133 &sdhci {
134 status = "okay";
135 mediatek,cd-low;
136 };
137
138 &wmac {
139 status = "okay";
140
141 nvmem-cells = <&eeprom_factory_0>;
142 nvmem-cell-names = "eeprom";
143 };