1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
10 compatible = "dlink,dir-853-a3", "mediatek,mt7621-soc";
11 model = "D-Link DIR-853 A3";
14 label-mac-device = &gmac0;
16 led-boot = &led_power_orange;
17 led-failsafe = &led_power_blue;
18 led-running = &led_power_blue;
19 led-upgrade = &led_net_orange;
23 compatible = "gpio-keys";
27 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
28 linux,code = <KEY_RESTART>;
33 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_WPS_BUTTON>;
39 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
40 linux,code = <KEY_RFKILL>;
45 compatible = "gpio-leds";
47 led_power_orange: power_orange {
48 function = LED_FUNCTION_POWER;
49 color = <LED_COLOR_ID_ORANGE>;
50 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
53 led_power_blue: power_blue {
54 function = LED_FUNCTION_POWER;
55 color = <LED_COLOR_ID_BLUE>;
56 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
59 led_net_orange: net_orange {
61 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
66 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
70 function = LED_FUNCTION_USB;
71 color = <LED_COLOR_ID_BLUE>;
72 gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
73 trigger-sources = <&xhci_ehci_port1>;
74 linux,default-trigger = "usbport";
78 label = "blue:wlan2g";
79 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
80 linux,default-trigger = "phy0radio";
84 label = "blue:wlan5g";
85 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
86 linux,default-trigger = "phy1radio";
95 compatible = "fixed-partitions";
107 reg = <0x80000 0x80000>;
113 reg = <0x100000 0x40000>;
117 compatible = "fixed-layout";
118 #address-cells = <1>;
121 eeprom_factory_0: eeprom@0 {
125 macaddr_factory_4: macaddr@4 {
129 macaddr_factory_e000: macaddr@e000 {
133 macaddr_factory_e006: macaddr@e006 {
141 reg = <0x140000 0x40000>;
147 compatible = "openwrt,uimage", "denx,uimage";
148 openwrt,padding = <96>;
149 reg = <0x180000 0x2800000>;
154 reg = <0x2980000 0x2000000>;
160 reg = <0x4980000 0x2800000>;
165 reg = <0x7180000 0x600000>;
171 reg = <0x7780000 0x880000>;
183 compatible = "mediatek,mt76";
184 reg = <0x0000 0 0 0 0>;
185 /* 5 GHz (phy1) does not take the address from calibration data,
186 but setting it manually here works */
187 nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4>;
188 nvmem-cell-names = "eeprom", "mac-address";
193 nvmem-cells = <&macaddr_factory_e000>;
194 nvmem-cell-names = "mac-address";
200 phy-handle = <ðphy4>;
202 nvmem-cells = <&macaddr_factory_e006>;
203 nvmem-cell-names = "mac-address";
207 ethphy4: ethernet-phy@4 {
238 groups = "i2c", "uart2", "uart3", "jtag", "wdt";