315f0bfb56ad2fc991df0c63a967699760c6d4d7
[openwrt/staging/jow.git] / target / linux / ramips / dts / mt7620a_iodata_wn-ac1167gr.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8
9 / {
10 compatible = "iodata,wn-ac1167gr", "ralink,mt7620a-soc";
11 model = "I-O DATA WN-AC1167GR";
12
13 aliases {
14 led-boot = &led_power;
15 led-failsafe = &led_power;
16 led-running = &led_power;
17 led-upgrade = &led_power;
18 };
19
20 leds {
21 compatible = "gpio-leds";
22
23 led_power: power {
24 function = LED_FUNCTION_POWER;
25 color = <LED_COLOR_ID_GREEN>;
26 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
27 default-state = "on";
28 };
29
30 wlan2g {
31 label = "green:wlan2g";
32 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
33 };
34
35 notification {
36 label = "green:notification";
37 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
38 };
39
40 wlan5g {
41 label = "green:wlan5g";
42 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
43 };
44 };
45
46 keys {
47 compatible = "gpio-keys";
48
49 wps {
50 label = "wps";
51 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
52 linux,code = <KEY_WPS_BUTTON>;
53 };
54
55 reset {
56 label = "reset";
57 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_RESTART>;
59 };
60
61 auto {
62 label = "auto";
63 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
64 linux,code = <BTN_0>;
65 linux,input-type = <EV_SW>;
66 };
67 };
68 };
69
70 &spi0 {
71 status = "okay";
72
73 flash@0 {
74 compatible = "jedec,spi-nor";
75 reg = <0>;
76 spi-max-frequency = <10000000>;
77
78 partitions {
79 compatible = "fixed-partitions";
80 #address-cells = <1>;
81 #size-cells = <1>;
82
83 partition@0 {
84 label = "u-boot";
85 reg = <0x0 0x30000>;
86 read-only;
87 };
88
89 partition@30000 {
90 label = "u-boot-env";
91 reg = <0x30000 0x10000>;
92 read-only;
93 };
94
95 factory: partition@40000 {
96 label = "factory";
97 reg = <0x40000 0x8000>;
98 read-only;
99
100 nvmem-layout {
101 compatible = "fixed-layout";
102 #address-cells = <1>;
103 #size-cells = <1>;
104
105 eeprom_factory_0: eeprom@0 {
106 reg = <0x0 0x200>;
107 };
108
109 macaddr_factory_4: macaddr@4 {
110 reg = <0x4 0x6>;
111 };
112 };
113 };
114
115 iNIC_rf: partition@48000 {
116 label = "iNIC_rf";
117 reg = <0x48000 0x8000>;
118 read-only;
119
120 nvmem-layout {
121 compatible = "fixed-layout";
122 #address-cells = <1>;
123 #size-cells = <1>;
124
125 eeprom_iNIC_rf_0: eeprom@0 {
126 reg = <0x0 0x200>;
127 };
128 };
129 };
130
131 partition@50000 {
132 label = "NoUsed";
133 reg = <0x50000 0x20000>;
134 read-only;
135 };
136
137 partition@70000 {
138 compatible = "denx,uimage";
139 label = "firmware";
140 reg = <0x70000 0x6b4000>;
141 };
142
143 partition@724000 {
144 label = "manufacture";
145 reg = <0x724000 0x8c000>;
146 read-only;
147 };
148
149 partition@7b0000 {
150 label = "backup";
151 reg = <0x7b0000 0x10000>;
152 read-only;
153 };
154
155 partition@7c0000 {
156 label = "storage";
157 reg = <0x7c0000 0x40000>;
158 read-only;
159 };
160 };
161 };
162 };
163
164 &ethernet {
165 pinctrl-names = "default";
166 pinctrl-0 = <&rgmii1_pins &mdio_pins>;
167
168 nvmem-cells = <&macaddr_factory_4>;
169 nvmem-cell-names = "mac-address";
170
171 port@5 {
172 status = "okay";
173 mediatek,fixed-link = <1000 1 1 1>;
174 phy-mode = "rgmii";
175 };
176
177 mdio-bus {
178 #address-cells = <1>;
179 #size-cells = <0>;
180 status = "okay";
181
182 ethernet-phy@0 {
183 reg = <0>;
184 phy-mode = "rgmii";
185 };
186
187 ethernet-phy@1 {
188 reg = <1>;
189 phy-mode = "rgmii";
190 };
191
192 ethernet-phy@2 {
193 reg = <2>;
194 phy-mode = "rgmii";
195 };
196
197 ethernet-phy@3 {
198 reg = <3>;
199 phy-mode = "rgmii";
200 };
201
202 ethernet-phy@4 {
203 reg = <4>;
204 phy-mode = "rgmii";
205 };
206
207 ethernet-phy@1f {
208 reg = <0x1f>;
209 phy-mode = "rgmii";
210 };
211 };
212 };
213
214 &gsw {
215 mediatek,ephy-base = /bits/ 8 <12>;
216 };
217
218 &state_default {
219 gpio {
220 groups = "i2c", "uartf";
221 function = "gpio";
222 };
223 };
224
225 &pcie {
226 status = "okay";
227 };
228
229 &pcie0 {
230 wifi@0,0 {
231 reg = <0x0000 0 0 0 0>;
232 nvmem-cells = <&eeprom_iNIC_rf_0>;
233 nvmem-cell-names = "eeprom";
234 ieee80211-freq-limit = <5000000 6000000>;
235 };
236 };
237
238 &wmac {
239 nvmem-cells = <&eeprom_factory_0>;
240 nvmem-cell-names = "eeprom";
241 };