target/linux/qualcommax/patches-6.1/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch

   1 From 153c74fc80b9f33ed1a50d7790bf6979fdceb370 Mon Sep 17 00:00:00 2001
   2 From: Mantas Pucka <mantas@8devices.com>
   3 Date: Tue, 16 Jan 2024 11:41:06 +0200
   4 Subject: [PATCH 19/19] arm64: dts: qcom: ipq6018: add wifi node
   5
   6 IPQ6018 has a AHB based Q6v5 802.11ax radios that are supported
   7 by the ath11k.
   8
   9 Add the required DT node to enable the built-in radios.
  10
  11 Signed-off-by: Mantas Pucka <mantas@8devices.com>
  12 ---
  13  arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96 +++++++++++++++++++++++++++++++++++
  14  1 file changed, 96 insertions(+)
  15
  16 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  17 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  18 @@ -807,6 +807,102 @@
  19                         };
  20                 };
  21
  22 +               wifi: wifi@c000000 {
  23 +                       compatible = "qcom,ipq6018-wifi";
  24 +                       reg = <0x0 0xc000000 0x0 0x1000000>;
  25 +                       qcom,rproc = <&q6v5_wcss>;
  26 +                       interrupts = <GIC_SPI 320 IRQ_TYPE_EDGE_RISING>,
  27 +                                    <GIC_SPI 319 IRQ_TYPE_EDGE_RISING>,
  28 +                                    <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>,
  29 +                                    <GIC_SPI 317 IRQ_TYPE_EDGE_RISING>,
  30 +                                    <GIC_SPI 316 IRQ_TYPE_EDGE_RISING>,
  31 +                                    <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>,
  32 +                                    <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
  33 +                                    <GIC_SPI 311 IRQ_TYPE_EDGE_RISING>,
  34 +                                    <GIC_SPI 310 IRQ_TYPE_EDGE_RISING>,
  35 +                                    <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
  36 +                                    <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
  37 +                                    <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
  38 +                                    <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
  39 +                                    <GIC_SPI 302 IRQ_TYPE_EDGE_RISING>,
  40 +                                    <GIC_SPI 301 IRQ_TYPE_EDGE_RISING>,
  41 +                                    <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
  42 +                                    <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
  43 +                                    <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
  44 +                                    <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>,
  45 +                                    <GIC_SPI 294 IRQ_TYPE_EDGE_RISING>,
  46 +                                    <GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,
  47 +                                    <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>,
  48 +                                    <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>,
  49 +                                    <GIC_SPI 290 IRQ_TYPE_EDGE_RISING>,
  50 +                                    <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>,
  51 +                                    <GIC_SPI 288 IRQ_TYPE_EDGE_RISING>,
  52 +                                    <GIC_SPI 239 IRQ_TYPE_EDGE_RISING>,
  53 +                                    <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>,
  54 +                                    <GIC_SPI 235 IRQ_TYPE_EDGE_RISING>,
  55 +                                    <GIC_SPI 234 IRQ_TYPE_EDGE_RISING>,
  56 +                                    <GIC_SPI 233 IRQ_TYPE_EDGE_RISING>,
  57 +                                    <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
  58 +                                    <GIC_SPI 231 IRQ_TYPE_EDGE_RISING>,
  59 +                                    <GIC_SPI 230 IRQ_TYPE_EDGE_RISING>,
  60 +                                    <GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
  61 +                                    <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>,
  62 +                                    <GIC_SPI 224 IRQ_TYPE_EDGE_RISING>,
  63 +                                    <GIC_SPI 223 IRQ_TYPE_EDGE_RISING>,
  64 +                                    <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>,
  65 +                                    <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>,
  66 +                                    <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>,
  67 +                                    <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>,
  68 +                                    <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>,
  69 +                                    <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>,
  70 +                                    <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>,
  71 +                                    <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>,
  72 +                                    <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
  73 +                                    <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>,
  74 +                                    <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
  75 +                                    <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
  76 +                                    <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>,
  77 +                                    <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
  78 +                       interrupt-names = "misc-pulse1", "misc-latch", "sw-exception",
  79 +                                         "watchdog", "ce0", "ce1", "ce2", "ce3", "ce4",
  80 +                                         "ce5", "ce6", "ce7", "ce8", "ce9", "ce10",
  81 +                                         "ce11", "host2wbm-desc-feed",
  82 +                                         "host2reo-re-injection", "host2reo-command",
  83 +                                         "host2rxdma-monitor-ring3",
  84 +                                         "host2rxdma-monitor-ring2",
  85 +                                         "host2rxdma-monitor-ring1",
  86 +                                         "reo2ost-exception", "wbm2host-rx-release",
  87 +                                         "reo2host-status",
  88 +                                         "reo2host-destination-ring4",
  89 +                                         "reo2host-destination-ring3",
  90 +                                         "reo2host-destination-ring2",
  91 +                                         "reo2host-destination-ring1",
  92 +                                         "rxdma2host-monitor-destination-mac3",
  93 +                                         "rxdma2host-monitor-destination-mac2",
  94 +                                         "rxdma2host-monitor-destination-mac1",
  95 +                                         "ppdu-end-interrupts-mac3",
  96 +                                         "ppdu-end-interrupts-mac2",
  97 +                                         "ppdu-end-interrupts-mac1",
  98 +                                         "rxdma2host-monitor-status-ring-mac3",
  99 +                                         "rxdma2host-monitor-status-ring-mac2",
 100 +                                         "rxdma2host-monitor-status-ring-mac1",
 101 +                                         "host2rxdma-host-buf-ring-mac3",
 102 +                                         "host2rxdma-host-buf-ring-mac2",
 103 +                                         "host2rxdma-host-buf-ring-mac1",
 104 +                                         "rxdma2host-destination-ring-mac3",
 105 +                                         "rxdma2host-destination-ring-mac2",
 106 +                                         "rxdma2host-destination-ring-mac1",
 107 +                                         "host2tcl-input-ring4",
 108 +                                         "host2tcl-input-ring3",
 109 +                                         "host2tcl-input-ring2",
 110 +                                         "host2tcl-input-ring1",
 111 +                                         "wbm2host-tx-completions-ring3",
 112 +                                         "wbm2host-tx-completions-ring2",
 113 +                                         "wbm2host-tx-completions-ring1",
 114 +                                         "tcl2host-status-ring";
 115 +                       status = "disabled";
 116 +               };
 117 +
 118                 q6v5_wcss: remoteproc@cd00000 {
 119                         compatible = "qcom,ipq6018-wcss-pil";
 120                         reg = <0x0 0x0cd00000 0x0 0x4040>,