target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (c) 2022, Karol Przybylski <itor@o2.pl>
   4  * Copyright (c) 2023, Andre Valentin <avalentin@marcant.net>
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "ipq8074.dtsi"
  10 #include "ipq8074-hk-cpu.dtsi"
  11 #include "ipq8074-ess.dtsi"
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/leds/common.h>
  14 #include <dt-bindings/input/input.h>
  15
  16
  17 / {
  18         model = "Zyxel NBG7815";
  19         compatible = "zyxel,nbg7815", "qcom,ipq8074";
  20
  21         aliases {
  22                 serial0 = &blsp1_uart5;
  23                 serial1 = &blsp1_uart3;
  24                 /* Alias as required by u-boot to patch MAC addresses */
  25                 ethernet0 = &dp1;
  26                 label-mac-device = &dp1;
  27         };
  28
  29         chosen {
  30                 stdout-path = "serial0:115200n8";
  31         };
  32
  33         keys {
  34                 compatible = "gpio-keys";
  35
  36                 reset {
  37                         label = "reset";
  38                         linux,code = <KEY_RESTART>;
  39                         gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
  40                 };
  41         };
  42 };
  43
  44 &tlmm {
  45         mdio_pins: mdio-pins {
  46                 mdc {
  47                         pins = "gpio68";
  48                         function = "mdc";
  49                         drive-strength = <8>;
  50                         bias-pull-up;
  51                 };
  52
  53                 mdio {
  54                         pins = "gpio69";
  55                         function = "mdio";
  56                         drive-strength = <8>;
  57                         bias-pull-up;
  58                 };
  59         };
  60 };
  61
  62
  63 &blsp1_uart3 {
  64         status = "okay";
  65 };
  66
  67 &blsp1_uart5 {
  68         status = "okay";
  69 };
  70
  71 &prng {
  72         status = "okay";
  73 };
  74
  75 &cryptobam {
  76         status = "okay";
  77 };
  78
  79 &crypto {
  80         status = "okay";
  81 };
  82
  83 &qpic_bam {
  84         status = "okay";
  85 };
  86
  87
  88 &blsp1_spi1 {
  89         pinctrl-0 = <&spi_0_pins>;
  90         pinctrl-names = "default";
  91         cs-gpios = <0>;
  92         status = "okay";
  93
  94         /*
  95          * Bootloader will find the NAND DT node by the compatible and
  96          * then "fixup" it by adding the partitions from the SMEM table
  97          * using the legacy bindings thus making it impossible for us
  98          * to change the partition table or utilize NVMEM for calibration.
  99          * So add a dummy partitions node that bootloader will populate
 100          * and set it as disabled so the kernel ignores it instead of
 101          * printing warnings due to the broken way bootloader adds the
 102          * partitions.
 103          */
 104         partitions {
 105                 status = "disabled";
 106         };
 107
 108
 109         flash@0 {
 110                 #address-cells = <1>;
 111                 #size-cells = <1>;
 112                 reg = <0>;
 113                 compatible = "jedec,spi-nor";
 114                 spi-max-frequency = <50000000>;
 115
 116                 partitions {
 117                         compatible = "fixed-partitions";
 118                         #address-cells = <1>;
 119                         #size-cells = <1>;
 120
 121                         partition@0 {
 122                                 label = "0:sbl1";
 123                                 reg = <0x0 0x50000>;
 124                                 read-only;
 125                         };
 126
 127                         partition@50000 {
 128                                 label = "0:mibib";
 129                                 reg = <0x50000 0x10000>;
 130                                 read-only;
 131                         };
 132
 133                         partition@60000 {
 134                                 label = "0:bootconfig";
 135                                 reg = <0x60000 0x20000>;
 136                                 read-only;
 137                         };
 138
 139                         partition@80000 {
 140                                 label = "0:bootconfig1";
 141                                 reg = <0x80000 0x20000>;
 142                                 read-only;
 143                         };
 144
 145                         partition@a0000 {
 146                                 label = "0:qsee";
 147                                 reg = <0xa0000 0x180000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@220000 {
 152                                 label = "0:qsee_1";
 153                                 reg = <0x220000 0x180000>;
 154                                 read-only;
 155                         };
 156
 157                         partition@3a0000 {
 158                                 label = "0:devcfg";
 159                                 reg = <0x3a0000 0x10000>;
 160                                 read-only;
 161                         };
 162
 163                         partition@3b0000 {
 164                                 label = "0:devcfg_1";
 165                                 reg = <0x3b0000 0x10000>;
 166                                 read-only;
 167                         };
 168
 169                         partition@3c0000 {
 170                                 label = "0:apdp";
 171                                 reg = <0x3c0000 0x10000>;
 172                                 read-only;
 173                         };
 174
 175                         partition@3d0000 {
 176                                 label = "0:apdp_1";
 177                                 reg = <0x3d0000 0x10000>;
 178                                 read-only;
 179                         };
 180
 181                         partition@3e0000 {
 182                                 label = "0:rpm";
 183                                 reg = <0x3e0000 0x40000>;
 184                                 read-only;
 185                         };
 186
 187                         partition@420000 {
 188                                 label = "0:rpm_1";
 189                                 reg = <0x420000 0x40000>;
 190                                 read-only;
 191                         };
 192
 193                         partition@460000 {
 194                                 label = "0:cdt";
 195                                 reg = <0x460000 0x10000>;
 196                                 read-only;
 197                         };
 198
 199                         partition@470000 {
 200                                 label = "0:cdt_1";
 201                                 reg = <0x470000 0x10000>;
 202                                 read-only;
 203                         };
 204
 205                         partition@480000 {
 206                                 label = "0:appsbl";
 207                                 reg = <0x480000 0xc0000>;
 208                                 read-only;
 209                         };
 210
 211                         partition@540000 {
 212                                 label = "0:appsbl_1";
 213                                 reg = <0x540000 0xc0000>;
 214                                 read-only;
 215                         };
 216
 217                         partition@600000 {
 218                                 compatible = "u-boot,env";
 219                                 label = "0:appsblenv";
 220                                 reg = <0x600000 0x10000>;
 221
 222                                 macaddr_lan: ethaddr {
 223                                         #nvmem-cell-cells = <1>;
 224                                 };
 225                         };
 226
 227                         partition@610000 {
 228                                 label = "0:art";
 229                                 reg = <0x610000 0x40000>;
 230                                 read-only;
 231                         };
 232
 233                         partition@650000 {
 234                                 label = "0:ethphyfw";
 235                                 reg = <0x650000 0x80000>;
 236                                 read-only;
 237                         };
 238
 239                         partition@6d0000 {
 240                                 label = "0:crt";
 241                                 reg = <0x6d0000 0x10000>;
 242                                 read-only;
 243                         };
 244
 245                         partition@6e0000 {
 246                                 label = "dual_flag";
 247                                 reg = <0x6e0000 0x10000>;
 248                         };
 249
 250                         partition@6f0000 {
 251                                 label = "reserved";
 252                                 reg = <0x6f0000 0x110000>;
 253                                 read-only;
 254                         };
 255                 };
 256         };
 257 };
 258
 259 &mdio {
 260         status = "okay";
 261         pinctrl-0 = <&mdio_pins>;
 262         pinctrl-names = "default";
 263         reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
 264
 265         qca8075_1: ethernet-phy@0 {
 266                 compatible = "ethernet-phy-ieee802.3-c22";
 267                 reg = <0>;
 268         };
 269
 270         qca8075_2: ethernet-phy@1 {
 271                 compatible = "ethernet-phy-ieee802.3-c22";
 272                 reg = <1>;
 273         };
 274
 275         qca8075_3: ethernet-phy@2 {
 276                 compatible = "ethernet-phy-ieee802.3-c22";
 277                 reg = <2>;
 278         };
 279
 280         qca8075_4: ethernet-phy@3 {
 281                 compatible = "ethernet-phy-ieee802.3-c22";
 282                 reg = <3>;
 283         };
 284
 285         qca8081: ethernet-phy@4{
 286                 compatible = "ethernet-phy-id004d.d101";
 287                 reg = <28>;
 288                 reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
 289         };
 290
 291         aqr113c: ethernet-phy@5 {
 292                 compatible = "ethernet-phy-ieee802.3-c45";
 293                 reg = <8>;
 294                 reset-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
 295         };
 296 };
 297
 298 &switch {
 299         status = "okay";
 300
 301         switch_cpu_bmp = <0x1>;
 302         switch_lan_bmp = <0x3e>;
 303         switch_wan_bmp = <0x40>;
 304         switch_mac_mode = <0x0>;
 305         switch_mac_mode1 = <0xf>;
 306         switch_mac_mode2 = <0xd>;
 307         bm_tick_mode = <0>;
 308         tm_tick_mode = <0>;
 309
 310         qcom,port_phyinfo {
 311                 port@0 {
 312                         port_id = <1>;
 313                         phy_address = <0>;
 314                 };
 315
 316                 port@1 {
 317                         port_id = <2>;
 318                         phy_address = <1>;
 319                 };
 320
 321                 port@2 {
 322                         port_id = <3>;
 323                         phy_address = <2>;
 324                 };
 325
 326                 port@3 {
 327                         port_id = <4>;
 328                         phy_address = <3>;
 329                 };
 330
 331                 port@4 {
 332                         port_id = <5>;
 333                         phy_address = <28>;
 334                         port_mac_sel = "QGMAC_PORT";
 335                 };
 336
 337                 port@5 {
 338                         port_id = <6>;
 339                         ethernet-phy-ieee802.3-c45;
 340                         phy_address = <8>;
 341                 };
 342         };
 343 };
 344
 345 &edma {
 346         status = "okay";
 347 };
 348
 349 &dp1 {
 350         status = "okay";
 351         phy-handle = <&qca8075_1>;
 352         label = "lan1";
 353         nvmem-cells = <&macaddr_lan 0>;
 354         nvmem-cell-names = "mac-address";
 355 };
 356
 357 &dp2 {
 358         status = "okay";
 359         phy-handle = <&qca8075_2>;
 360         label = "lan2";
 361         nvmem-cells = <&macaddr_lan 0>;
 362         nvmem-cell-names = "mac-address";
 363 };
 364
 365 &dp3 {
 366         status = "okay";
 367         phy-handle = <&qca8075_3>;
 368         label = "lan3";
 369         nvmem-cells = <&macaddr_lan 0>;
 370         nvmem-cell-names = "mac-address";
 371 };
 372
 373 &dp4 {
 374         status = "okay";
 375         phy-handle = <&qca8075_4>;
 376         label = "lan4";
 377         nvmem-cells = <&macaddr_lan 0>;
 378         nvmem-cell-names = "mac-address";
 379 };
 380
 381 &dp5 {
 382         status = "okay";
 383         phy-handle = <&qca8081>;
 384         label = "wan";
 385         nvmem-cells = <&macaddr_lan 1>;
 386         nvmem-cell-names = "mac-address";
 387 };
 388
 389 &dp6_syn {
 390         status = "okay";
 391         phy-handle = <&aqr113c>;
 392         label = "10g";
 393         nvmem-cells = <&macaddr_lan 0>;
 394         nvmem-cell-names = "mac-address";
 395 };
 396
 397 &blsp1_i2c2 {
 398         pinctrl-0 = <&i2c_0_pins>;
 399         pinctrl-names = "default";
 400         status = "okay";
 401
 402         tmp103@70 {
 403                 compatible = "ti,tmp103";
 404                 reg = <0x70>;
 405         };
 406 };
 407
 408 &sdhc_1 {
 409         status = "okay";
 410         /* unstable, problem with the hs400 > h200 speed switch */
 411         /delete-property/ mmc-hs400-1_8v;
 412         mmc-hs200-1_8v;
 413         mmc-ddr-1_8v;
 414         vqmmc-supply = <&l11>;
 415 };
 416
 417 &ssphy_0 {
 418         status = "okay";
 419 };
 420
 421 &qusb_phy_0 {
 422         status = "okay";
 423 };
 424
 425 &ssphy_1 {
 426         status = "okay";
 427 };
 428
 429 &qusb_phy_1 {
 430         status = "okay";
 431 };
 432
 433 &usb_0 {
 434         status = "okay";
 435 };
 436
 437 &usb_1 {
 438         status = "okay";
 439 };
 440
 441 &wifi {
 442         status = "okay";
 443
 444         qcom,ath11k-calibration-variant = "Zyxel-NBG7815";
 445 };