target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2022, Matthew Hagan <mnhagan88@gmail.com> */
   3
   4 /dts-v1/;
   5
   6 #include "ipq8074.dtsi"
   7 #include "ipq8074-ac-cpu.dtsi"
   8 #include "ipq8074-ess.dtsi"
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/input/input.h>
  11
  12 / {
  13         model = "Edgecore EAP102";
  14         compatible = "edgecore,eap102", "qcom,ipq8074";
  15
  16         aliases {
  17                 serial0 = &blsp1_uart5;
  18                 serial1 = &blsp1_uart3;
  19                 led-boot = &led_system_green;
  20                 led-failsafe = &led_system_green;
  21                 led-running = &led_system_green;
  22                 led-upgrade = &led_system_green;
  23                 /* Aliases as required by u-boot to patch MAC addresses */
  24                 ethernet0 = &dp5;
  25                 ethernet1 = &dp6;
  26                 label-mac-device = &dp5;
  27         };
  28
  29         chosen {
  30                 stdout-path = "serial0:115200n8";
  31                 bootargs-append = " root=/dev/ubiblock0_1";
  32         };
  33
  34         keys {
  35                 compatible = "gpio-keys";
  36                 pinctrl-0 = <&button_pins>;
  37                 pinctrl-names = "default";
  38
  39                 reset {
  40                         label = "reset";
  41                         gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
  42                         linux,code = <KEY_RESTART>;
  43                 };
  44         };
  45
  46         leds {
  47                 compatible = "gpio-leds";
  48
  49                 led_wanpoe {
  50                         label = "green:wanpoe";
  51                         gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
  52                 };
  53
  54                 led_wlan2g {
  55                         label = "green:wlan2g";
  56                         gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
  57                         linux,default-trigger = "phy1radio";
  58                 };
  59
  60                 led_wlan5g {
  61                         label = "green:wlan5g";
  62                         gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
  63                         linux,default-trigger = "phy0radio";
  64                 };
  65
  66                 led_system_green: led_system {
  67                         label = "green:power";
  68                         gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
  69                 };
  70         };
  71 };
  72
  73 &tlmm {
  74         mdio_pins: mdio-pins {
  75                 mdc {
  76                         pins = "gpio68";
  77                         function = "mdc";
  78                         drive-strength = <8>;
  79                         bias-pull-up;
  80                 };
  81
  82                 mdio {
  83                         pins = "gpio69";
  84                         function = "mdio";
  85                         drive-strength = <8>;
  86                         bias-pull-up;
  87                 };
  88         };
  89
  90         button_pins: button_pins {
  91                 reset_button {
  92                         pins = "gpio66";
  93                         function = "gpio";
  94                         drive-strength = <8>;
  95                         bias-pull-up;
  96                 };
  97         };
  98 };
  99
 100 &blsp1_spi1 {
 101         status = "okay";
 102
 103         flash@0 {
 104                 #address-cells = <1>;
 105                 #size-cells = <1>;
 106                 reg = <0>;
 107                 compatible = "jedec,spi-nor";
 108                 spi-max-frequency = <50000000>;
 109
 110                 partitions {
 111                         compatible = "fixed-partitions";
 112                         #address-cells = <1>;
 113                         #size-cells = <1>;
 114
 115                         partition@0 {
 116                                 label = "0:sbl1";
 117                                 reg = <0x0 0x50000>;
 118                                 read-only;
 119                         };
 120
 121                         partition@50000 {
 122                                 label = "0:mibib";
 123                                 reg = <0x50000 0x10000>;
 124                                 read-only;
 125                         };
 126
 127                         partition@60000 {
 128                                 label = "0:bootconfig";
 129                                 reg = <0x60000 0x20000>;
 130                                 read-only;
 131                         };
 132
 133                         partition@80000 {
 134                                 label = "0:bootconfig1";
 135                                 reg = <0x80000 0x20000>;
 136                                 read-only;
 137                         };
 138
 139                         partition@a0000 {
 140                                 label = "0:qsee";
 141                                 reg = <0xa0000 0x180000>;
 142                                 read-only;
 143                         };
 144
 145                         partition@220000 {
 146                                 label = "0:qsee_1";
 147                                 reg = <0x220000 0x180000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@3a0000 {
 152                                 label = "0:devcfg";
 153                                 reg = <0x3a0000 0x10000>;
 154                                 read-only;
 155                         };
 156
 157                         partition@3b0000 {
 158                                 label = "0:devcfg_1";
 159                                 reg = <0x3b0000 0x10000>;
 160                                 read-only;
 161                         };
 162
 163                         partition@3c0000 {
 164                                 label = "0:apdp";
 165                                 reg = <0x3c0000 0x10000>;
 166                                 read-only;
 167                         };
 168
 169                         partition@3d0000 {
 170                                 label = "0:apdp_1";
 171                                 reg = <0x3d0000 0x10000>;
 172                                 read-only;
 173                         };
 174
 175                         partition@3e0000 {
 176                                 label = "0:rpm";
 177                                 reg = <0x3e0000 0x40000>;
 178                                 read-only;
 179                         };
 180
 181                         partition@420000 {
 182                                 label = "0:rpm_1";
 183                                 reg = <0x420000 0x40000>;
 184                                 read-only;
 185                         };
 186
 187                         partition@460000 {
 188                                 label = "0:cdt";
 189                                 reg = <0x460000 0x10000>;
 190                                 read-only;
 191                         };
 192
 193                         partition@470000 {
 194                                 label = "0:cdt_1";
 195                                 reg = <0x470000 0x10000>;
 196                                 read-only;
 197                         };
 198
 199                         partition@480000 {
 200                                 label = "0:appsblenv";
 201                                 reg = <0x480000 0x10000>;
 202                         };
 203
 204                         partition@490000 {
 205                                 label = "0:appsbl";
 206                                 reg = <0x490000 0xc0000>;
 207                                 read-only;
 208                         };
 209
 210                         partition@550000 {
 211                                 label = "0:appsbl_1";
 212                                 reg = <0x530000 0xc0000>;
 213                                 read-only;
 214                         };
 215
 216                         partition@610000 {
 217                                 label = "0:art";
 218                                 reg = <0x610000 0x40000>;
 219                                 read-only;
 220                         };
 221
 222                         partition@650000 {
 223                                 label = "0:ethphyfw";
 224                                 reg = <0x650000 0x80000>;
 225                                 read-only;
 226                         };
 227
 228                         partition@6d0000 {
 229                                 label = "0:product_info";
 230                                 reg = <0x6d0000 0x80000>;
 231                                 read-only;
 232                         };
 233
 234                         partition@750000 {
 235                                 label = "priv_data1";
 236                                 reg = <0x750000 0x10000>;
 237                                 read-only;
 238                         };
 239
 240                         partition@760000 {
 241                                 label = "priv_data2";
 242                                 reg = <0x760000 0x10000>;
 243                                 read-only;
 244                         };
 245                 };
 246         };
 247 };
 248
 249 &blsp1_uart3 {
 250         status = "okay";
 251 };
 252
 253 &blsp1_uart5 {
 254         status = "okay";
 255 };
 256
 257 &crypto {
 258         status = "okay";
 259 };
 260
 261 &cryptobam {
 262         status = "okay";
 263 };
 264
 265 &prng {
 266         status = "okay";
 267 };
 268
 269 &qpic_bam {
 270         status = "okay";
 271 };
 272
 273 &qusb_phy_0 {
 274         status = "okay";
 275 };
 276
 277 &ssphy_0 {
 278         status = "okay";
 279 };
 280
 281 &usb_0 {
 282         status = "okay";
 283 };
 284
 285 &qpic_nand {
 286         status = "okay";
 287
 288         nand@0 {
 289                 reg = <0>;
 290                 nand-ecc-strength = <8>;
 291                 nand-ecc-step-size = <512>;
 292                 nand-bus-width = <8>;
 293
 294                 partitions {
 295                         compatible = "fixed-partitions";
 296                         #address-cells = <1>;
 297                         #size-cells = <1>;
 298
 299                         partition@0 {
 300                                 label = "rootfs1";
 301                                 reg = <0x0000000 0x3400000>;
 302                         };
 303
 304                         partition@3400000 {
 305                                 label = "0:wififw";
 306                                 reg = <0x3400000 0x800000>;
 307                                 read-only;
 308                         };
 309
 310                         partition@3c00000 {
 311                                 label = "rootfs2";
 312                                 reg = <0x3c00000 0x3400000>;
 313                         };
 314
 315                         partition@7000000 {
 316                                 label = "0:wififw_1";
 317                                 reg = <0x7000000 0x800000>;
 318                                 read-only;
 319                         };
 320                 };
 321         };
 322 };
 323
 324 &mdio {
 325         status = "okay";
 326
 327         pinctrl-0 = <&mdio_pins>;
 328         pinctrl-names = "default";
 329
 330         qca8081_24: ethernet-phy@24 {
 331                 compatible = "ethernet-phy-id004d.d101";
 332                 reg = <24>;
 333                 reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
 334         };
 335
 336         qca8081_28: ethernet-phy@28 {
 337                 compatible = "ethernet-phy-id004d.d101";
 338                 reg = <28>;
 339                 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 340         };
 341 };
 342
 343 &switch {
 344         status = "okay";
 345
 346         switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
 347         switch_lan_bmp = <0x3e>; /* lan port bitmap */
 348         switch_wan_bmp = <0x40>; /* wan port bitmap */
 349         switch_mac_mode = <0xff>; /* mac mode for uniphy instance0*/
 350         switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
 351         switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
 352         bm_tick_mode = <0>; /* bm tick mode */
 353         tm_tick_mode = <0>; /* tm tick mode */
 354
 355         qcom,port_phyinfo {
 356                 port@4 {
 357                         port_id = <5>;
 358                         phy_address = <24>;
 359                         port_mac_sel = "QGMAC_PORT";
 360                 };
 361                 port@5 {
 362                         port_id = <6>;
 363                         phy_address = <28>;
 364                         port_mac_sel = "QGMAC_PORT";
 365                 };
 366         };
 367 };
 368
 369 &edma {
 370         status = "okay";
 371 };
 372
 373 &dp5 {
 374         status = "okay";
 375         phy-handle = <&qca8081_28>;
 376         label = "wan";
 377 };
 378
 379 &dp6 {
 380         status = "okay";
 381         phy-handle = <&qca8081_24>;
 382         label = "lan";
 383 };
 384
 385 &wifi {
 386         status = "okay";
 387
 388         qcom,ath11k-calibration-variant = "Edgecore-EAP102";
 389 };