target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3715i.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 /include/ "fsl/p1010si-pre.dtsi"
   7
   8 / {
   9         model = "Enterasys WS-AP3715i";
  10         compatible = "enterasys,ws-ap3715i";
  11
  12         aliases {
  13                 led-boot = &led_power_green;
  14                 led-failsafe = &led_power_red;
  15                 led-running = &led_power_green;
  16                 led-upgrade = &led_power_red;
  17         };
  18
  19         chosen {
  20                 bootargs = "console=ttyS0,115200";
  21         };
  22
  23         memory {
  24                 device_type = "memory";
  25                 reg = <0x0 0x0 0x0 0x10000000>;
  26         };
  27
  28         leds {
  29                 compatible = "gpio-leds";
  30
  31                 wifi1 {
  32                         gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
  33                         label = "green:radio1";
  34                         linux,default-trigger = "phy1tpt";
  35                 };
  36
  37                 wifi2 {
  38                         gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
  39                         label = "green:radio2";
  40                         linux,default-trigger = "phy0tpt";
  41                 };
  42
  43                 led_power_green: power_green {
  44                         gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
  45                         label = "green:power";
  46                 };
  47
  48                 led_power_red: power_red {
  49                         gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
  50                         label = "red:power";
  51                 };
  52
  53                 lan1_red {
  54                         gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
  55                         label = "red:lan1";
  56                 };
  57
  58                 lan1_green {
  59                         gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
  60                         label = "green:lan1";
  61                 };
  62
  63                 lan2_red {
  64                         gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
  65                         label = "red:lan2";
  66                 };
  67
  68                 lan2_green {
  69                         gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
  70                         label = "green:lan2";
  71                 };
  72         };
  73
  74         keys {
  75                 compatible = "gpio-keys";
  76
  77                 reset {
  78                         label = "Reset button";
  79                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
  80                         linux,code = <KEY_RESTART>;
  81                 };
  82         };
  83
  84         soc: soc@ffe00000 {
  85                 ranges = <0x0 0x0 0xffe00000 0x100000>;
  86
  87                 gpio0: gpio-controller@fc00 {
  88                 };
  89
  90                 usb@22000 {
  91                         status = "disabled";
  92                 };
  93
  94                 mdio@24000 {
  95                         phy0: ethernet-phy@0 {
  96                                 reg = <0x1>;
  97                         };
  98
  99                         phy2: ethernet-phy@2 {
 100                                 reg = <0x2>;
 101                         };
 102                 };
 103
 104                 mdio@25000 {
 105                         tbi_phy: tbi-phy@11 {
 106                                 reg = <0x11>;
 107                         };
 108                 };
 109
 110                 mdio@26000 {
 111                         status = "disabled";
 112                 };
 113
 114                 enet0: ethernet@b0000 {
 115                         phy-handle = <&phy0>;
 116                         phy-connection-type = "rgmii-id";
 117
 118                         label = "lan1";
 119                 };
 120
 121                 enet1: ethernet@b1000 {
 122                         phy-handle = <&phy2>;
 123                         phy-connection-type = "sgmii";
 124
 125                         tbi-handle = <&tbi_phy>;
 126
 127                         label = "lan2";
 128                 };
 129
 130                 enet2: ethernet@b2000 {
 131                         status = "disabled";
 132                 };
 133
 134                 sdhc@2e000 {
 135                         status = "disabled";
 136                 };
 137         };
 138
 139         ifc: ifc@ffe1e000 {
 140         };
 141
 142         pci0: pcie@ffe09000 {
 143                 reg = <0 0xffe09000 0 0x1000>;
 144                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 145                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 146                 pcie@0 {
 147                         ranges = <0x2000000 0x0 0xa0000000
 148                                   0x2000000 0x0 0xa0000000
 149                                   0x0 0x20000000
 150
 151                                   0x1000000 0x0 0x0
 152                                   0x1000000 0x0 0x0
 153                                   0x0 0x100000>;
 154
 155                         wifi@0,0 {
 156                                 compatible = "pci168c,0033";
 157                                 reg = <0x0 0 0 0 0>;
 158                                 ieee80211-freq-limit = <2400000 2500000>;
 159                         };
 160                 };
 161         };
 162
 163         pci1: pcie@ffe0a000 {
 164                 reg = <0 0xffe0a000 0 0x1000>;
 165                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 166                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 167                 pcie@0 {
 168                         ranges = <0x2000000 0x0 0x80000000
 169                                   0x2000000 0x0 0x80000000
 170                                   0x0 0x20000000
 171
 172                                   0x1000000 0x0 0x0
 173                                   0x1000000 0x0 0x0
 174                                   0x0 0x100000>;
 175
 176                         wifi@0,0 {
 177                                 compatible = "pci168c,0033";
 178                                 reg = <0x0 0 0 0 0>;
 179                                 ieee80211-freq-limit = <5000000 6000000>;
 180                         };
 181                 };
 182         };
 183 };
 184
 185 &soc {
 186         led_spi {
 187                 compatible = "spi-gpio";
 188                 #address-cells = <1>;
 189                 #size-cells = <0>;
 190
 191                 sck-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
 192                 mosi-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 193                 num-chipselects = <0>;
 194
 195                 spi_gpio: led_gpio@0 {
 196                         compatible = "fairchild,74hc595";
 197                         reg = <0>;
 198                         gpio-controller;
 199                         #gpio-cells = <2>;
 200                         registers-number = <1>;
 201                         spi-max-frequency = <100000>;
 202                 };
 203         };
 204
 205         spi0: spi@7000 {
 206                 flash@0 {
 207                         compatible = "jedec,spi-nor";
 208                         reg = <0>;
 209                         spi-max-frequency = <25000000>;
 210
 211                         partitions {
 212                                 compatible = "fixed-partitions";
 213                                 #address-cells = <1>;
 214                                 #size-cells = <1>;
 215
 216                                 partition@0 {
 217                                         reg = <0x0 0xa0000>;
 218                                         label = "boot-bak";
 219                                         read-only;
 220                                 };
 221
 222                                 partition@a0000 {
 223                                         reg = <0xa0000 0xa0000>;
 224                                         label = "boot-pri";
 225                                         read-only;
 226                                 };
 227
 228                                 partition@120000 {
 229                                         reg = <0x120000 0x10000>;
 230                                         label = "cfg1";
 231                                         read-only;
 232                                 };
 233
 234                                 partition@130000 {
 235                                         reg = <0x130000 0x10000>;
 236                                         label = "cfg2";
 237                                         read-only;
 238                                 };
 239
 240                                 partition@140000 {
 241                                         compatible = "denx,uimage";
 242                                         reg = <0x140000 0x1d80000>;
 243                                         label = "firmware";
 244                                 };
 245
 246                                 partition@1ec0000 {
 247                                         reg = <0x1ec0000 0x100000>;
 248                                         label = "nvram";
 249                                         read-only;
 250                                 };
 251                         };
 252                 };
 253         };
 254 };
 255
 256 /include/ "fsl/p1010si-post.dtsi"
 257
 258 / {
 259         cpus {
 260                 PowerPC,P1010@0 {
 261                         bus-frequency = <399999996>;
 262                         timebase-frequency = <50000000>;
 263                         clock-frequency = <799999992>;
 264                         d-cache-block-size = <0x20>;
 265                         d-cache-size = <0x8000>;
 266                         d-cache-sets = <0x80>;
 267                         i-cache-block-size = <0x20>;
 268                         i-cache-size = <0x8000>;
 269                         i-cache-sets = <0x80>;
 270                 };
 271         };
 272
 273         soc@ffe00000 {
 274                 bus-frequency = <399999996>;
 275
 276                 serial@4600 {
 277                         clock-frequency = <399999996>;
 278                         status = "disabled";
 279                 };
 280
 281                 serial@4500 {
 282                         clock-frequency = <399999996>;
 283                 };
 284
 285                 pic@40000 {
 286                         clock-frequency = <399999996>;
 287                 };
 288         };
 289 };
 290
 291 /*
 292  * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
 293  * aliases to determine PCI domain numbers, drop aliases so as not to
 294  * change the sysfs path of our wireless netdevs.
 295  */
 296
 297 / {
 298         aliases {
 299                 /delete-property/ pci0;
 300                 /delete-property/ pci1;
 301         };
 302 };
 303