target/linux/mediatek/patches-6.1/830-v6.7-46-dt-bindings-thermal-mediatek-Add-LVTS-thermal-contro.patch

   1 From 0bb4937b58ab712f158588376dbac97f8e9df68e Mon Sep 17 00:00:00 2001
   2 From: Balsam CHIHI <bchihi@baylibre.com>
   3 Date: Tue, 17 Oct 2023 21:05:41 +0200
   4 Subject: [PATCH] dt-bindings: thermal: mediatek: Add LVTS thermal controller
   5  definition for mt8192
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Add LVTS thermal controller definition for MT8192.
  11
  12 Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
  13 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  14 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  15 Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
  16 Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
  17 Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
  18 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
  19 Link: https://lore.kernel.org/r/20231017190545.157282-2-bero@baylibre.com
  20 ---
  21  .../thermal/mediatek,lvts-thermal.h           | 19 +++++++++++++++++++
  22  1 file changed, 19 insertions(+)
  23
  24 --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
  25 +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
  26 @@ -35,4 +35,23 @@
  27  #define MT8195_AP_CAM0  15
  28  #define MT8195_AP_CAM1  16
  29
  30 +#define MT8192_MCU_BIG_CPU0     0
  31 +#define MT8192_MCU_BIG_CPU1     1
  32 +#define MT8192_MCU_BIG_CPU2     2
  33 +#define MT8192_MCU_BIG_CPU3     3
  34 +#define MT8192_MCU_LITTLE_CPU0  4
  35 +#define MT8192_MCU_LITTLE_CPU1  5
  36 +#define MT8192_MCU_LITTLE_CPU2  6
  37 +#define MT8192_MCU_LITTLE_CPU3  7
  38 +
  39 +#define MT8192_AP_VPU0  8
  40 +#define MT8192_AP_VPU1  9
  41 +#define MT8192_AP_GPU0  10
  42 +#define MT8192_AP_GPU1  11
  43 +#define MT8192_AP_INFRA 12
  44 +#define MT8192_AP_CAM   13
  45 +#define MT8192_AP_MD0   14
  46 +#define MT8192_AP_MD1   15
  47 +#define MT8192_AP_MD2   16
  48 +
  49  #endif /* __MEDIATEK_LVTS_DT_H */