1 From 677805f6d83524717b46b3cde74aa455dbf6299f Mon Sep 17 00:00:00 2001
2 From: Chunfeng Yun <chunfeng.yun@mediatek.com>
3 Date: Fri, 13 Oct 2017 17:10:40 +0800
4 Subject: [PATCH 106/224] usb: mtu3: add optional mcu and dma bus clocks
6 There are mcu_bus and dma_bus clocks needed to be turned on/off by
7 driver on some SoCs, so add them as optional ones
9 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
10 Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
12 drivers/usb/mtu3/mtu3.h | 5 ++
13 drivers/usb/mtu3/mtu3_plat.c | 121 +++++++++++++++++++++++++++++--------------
14 2 files changed, 86 insertions(+), 40 deletions(-)
16 --- a/drivers/usb/mtu3/mtu3.h
17 +++ b/drivers/usb/mtu3/mtu3.h
18 @@ -206,6 +206,9 @@ struct otg_switch_mtk {
19 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
20 * @vusb33: usb3.3V shared by device/host IP
21 * @sys_clk: system clock of mtu3, shared by device/host IP
22 + * @ref_clk: reference clock
23 + * @mcu_clk: mcu_bus_ck clock for AHB bus etc
24 + * @dma_clk: dma_bus_ck clock for AXI bus etc
25 * @dr_mode: works in which mode:
26 * host only, device only or dual-role mode
27 * @u2_ports: number of usb2.0 host ports
28 @@ -226,6 +229,8 @@ struct ssusb_mtk {
29 struct regulator *vusb33;
32 + struct clk *mcu_clk;
33 + struct clk *dma_clk;
35 struct otg_switch_mtk otg_switch;
36 enum usb_dr_mode dr_mode;
37 --- a/drivers/usb/mtu3/mtu3_plat.c
38 +++ b/drivers/usb/mtu3/mtu3_plat.c
39 @@ -110,15 +110,9 @@ static void ssusb_phy_power_off(struct s
40 phy_power_off(ssusb->phys[i]);
43 -static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
44 +static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
48 - ret = regulator_enable(ssusb->vusb33);
50 - dev_err(ssusb->dev, "failed to enable vusb33\n");
55 ret = clk_prepare_enable(ssusb->sys_clk);
57 @@ -132,6 +126,52 @@ static int ssusb_rscs_init(struct ssusb_
61 + ret = clk_prepare_enable(ssusb->mcu_clk);
63 + dev_err(ssusb->dev, "failed to enable mcu_clk\n");
67 + ret = clk_prepare_enable(ssusb->dma_clk);
69 + dev_err(ssusb->dev, "failed to enable dma_clk\n");
76 + clk_disable_unprepare(ssusb->mcu_clk);
78 + clk_disable_unprepare(ssusb->ref_clk);
80 + clk_disable_unprepare(ssusb->sys_clk);
85 +static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
87 + clk_disable_unprepare(ssusb->dma_clk);
88 + clk_disable_unprepare(ssusb->mcu_clk);
89 + clk_disable_unprepare(ssusb->ref_clk);
90 + clk_disable_unprepare(ssusb->sys_clk);
93 +static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
97 + ret = regulator_enable(ssusb->vusb33);
99 + dev_err(ssusb->dev, "failed to enable vusb33\n");
103 + ret = ssusb_clks_enable(ssusb);
107 ret = ssusb_phy_init(ssusb);
109 dev_err(ssusb->dev, "failed to init phy\n");
110 @@ -149,20 +189,16 @@ static int ssusb_rscs_init(struct ssusb_
112 ssusb_phy_exit(ssusb);
114 - clk_disable_unprepare(ssusb->ref_clk);
116 - clk_disable_unprepare(ssusb->sys_clk);
118 + ssusb_clks_disable(ssusb);
120 regulator_disable(ssusb->vusb33);
126 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
128 - clk_disable_unprepare(ssusb->sys_clk);
129 - clk_disable_unprepare(ssusb->ref_clk);
130 + ssusb_clks_disable(ssusb);
131 regulator_disable(ssusb->vusb33);
132 ssusb_phy_power_off(ssusb);
133 ssusb_phy_exit(ssusb);
134 @@ -203,6 +239,19 @@ static int get_iddig_pinctrl(struct ssus
138 +/* ignore the error if the clock does not exist */
139 +static struct clk *get_optional_clk(struct device *dev, const char *id)
141 + struct clk *opt_clk;
143 + opt_clk = devm_clk_get(dev, id);
144 + /* ignore error number except EPROBE_DEFER */
145 + if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
151 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
153 struct device_node *node = pdev->dev.of_node;
154 @@ -225,18 +274,17 @@ static int get_ssusb_rscs(struct platfor
155 return PTR_ERR(ssusb->sys_clk);
159 - * reference clock is usually a "fixed-clock", make it optional
160 - * for backward compatibility and ignore the error if it does
163 - ssusb->ref_clk = devm_clk_get(dev, "ref_ck");
164 - if (IS_ERR(ssusb->ref_clk)) {
165 - if (PTR_ERR(ssusb->ref_clk) == -EPROBE_DEFER)
166 - return -EPROBE_DEFER;
168 - ssusb->ref_clk = NULL;
170 + ssusb->ref_clk = get_optional_clk(dev, "ref_ck");
171 + if (IS_ERR(ssusb->ref_clk))
172 + return PTR_ERR(ssusb->ref_clk);
174 + ssusb->mcu_clk = get_optional_clk(dev, "mcu_ck");
175 + if (IS_ERR(ssusb->mcu_clk))
176 + return PTR_ERR(ssusb->mcu_clk);
178 + ssusb->dma_clk = get_optional_clk(dev, "dma_ck");
179 + if (IS_ERR(ssusb->dma_clk))
180 + return PTR_ERR(ssusb->dma_clk);
182 ssusb->num_phys = of_count_phandle_with_args(node,
183 "phys", "#phy-cells");
184 @@ -451,8 +499,7 @@ static int __maybe_unused mtu3_suspend(s
186 ssusb_host_disable(ssusb, true);
187 ssusb_phy_power_off(ssusb);
188 - clk_disable_unprepare(ssusb->sys_clk);
189 - clk_disable_unprepare(ssusb->ref_clk);
190 + ssusb_clks_disable(ssusb);
191 ssusb_wakeup_enable(ssusb);
194 @@ -470,27 +517,21 @@ static int __maybe_unused mtu3_resume(st
197 ssusb_wakeup_disable(ssusb);
198 - ret = clk_prepare_enable(ssusb->sys_clk);
202 - ret = clk_prepare_enable(ssusb->ref_clk);
203 + ret = ssusb_clks_enable(ssusb);
208 ret = ssusb_phy_power_on(ssusb);
213 ssusb_host_enable(ssusb);
218 - clk_disable_unprepare(ssusb->ref_clk);
220 - clk_disable_unprepare(ssusb->sys_clk);
223 + ssusb_clks_disable(ssusb);