9b68caa36796c34bf9d56631fa4c72626a8fa265
[openwrt/staging/jow.git] / target / linux / mediatek / patches-4.14 / 0106-usb-mtu3-add-optional-mcu-and-dma-bus-clocks.patch
1 From 677805f6d83524717b46b3cde74aa455dbf6299f Mon Sep 17 00:00:00 2001
2 From: Chunfeng Yun <chunfeng.yun@mediatek.com>
3 Date: Fri, 13 Oct 2017 17:10:40 +0800
4 Subject: [PATCH 106/224] usb: mtu3: add optional mcu and dma bus clocks
5
6 There are mcu_bus and dma_bus clocks needed to be turned on/off by
7 driver on some SoCs, so add them as optional ones
8
9 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
10 Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
11 ---
12 drivers/usb/mtu3/mtu3.h | 5 ++
13 drivers/usb/mtu3/mtu3_plat.c | 121 +++++++++++++++++++++++++++++--------------
14 2 files changed, 86 insertions(+), 40 deletions(-)
15
16 --- a/drivers/usb/mtu3/mtu3.h
17 +++ b/drivers/usb/mtu3/mtu3.h
18 @@ -206,6 +206,9 @@ struct otg_switch_mtk {
19 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
20 * @vusb33: usb3.3V shared by device/host IP
21 * @sys_clk: system clock of mtu3, shared by device/host IP
22 + * @ref_clk: reference clock
23 + * @mcu_clk: mcu_bus_ck clock for AHB bus etc
24 + * @dma_clk: dma_bus_ck clock for AXI bus etc
25 * @dr_mode: works in which mode:
26 * host only, device only or dual-role mode
27 * @u2_ports: number of usb2.0 host ports
28 @@ -226,6 +229,8 @@ struct ssusb_mtk {
29 struct regulator *vusb33;
30 struct clk *sys_clk;
31 struct clk *ref_clk;
32 + struct clk *mcu_clk;
33 + struct clk *dma_clk;
34 /* otg */
35 struct otg_switch_mtk otg_switch;
36 enum usb_dr_mode dr_mode;
37 --- a/drivers/usb/mtu3/mtu3_plat.c
38 +++ b/drivers/usb/mtu3/mtu3_plat.c
39 @@ -110,15 +110,9 @@ static void ssusb_phy_power_off(struct s
40 phy_power_off(ssusb->phys[i]);
41 }
42
43 -static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
44 +static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
45 {
46 - int ret = 0;
47 -
48 - ret = regulator_enable(ssusb->vusb33);
49 - if (ret) {
50 - dev_err(ssusb->dev, "failed to enable vusb33\n");
51 - goto vusb33_err;
52 - }
53 + int ret;
54
55 ret = clk_prepare_enable(ssusb->sys_clk);
56 if (ret) {
57 @@ -132,6 +126,52 @@ static int ssusb_rscs_init(struct ssusb_
58 goto ref_clk_err;
59 }
60
61 + ret = clk_prepare_enable(ssusb->mcu_clk);
62 + if (ret) {
63 + dev_err(ssusb->dev, "failed to enable mcu_clk\n");
64 + goto mcu_clk_err;
65 + }
66 +
67 + ret = clk_prepare_enable(ssusb->dma_clk);
68 + if (ret) {
69 + dev_err(ssusb->dev, "failed to enable dma_clk\n");
70 + goto dma_clk_err;
71 + }
72 +
73 + return 0;
74 +
75 +dma_clk_err:
76 + clk_disable_unprepare(ssusb->mcu_clk);
77 +mcu_clk_err:
78 + clk_disable_unprepare(ssusb->ref_clk);
79 +ref_clk_err:
80 + clk_disable_unprepare(ssusb->sys_clk);
81 +sys_clk_err:
82 + return ret;
83 +}
84 +
85 +static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
86 +{
87 + clk_disable_unprepare(ssusb->dma_clk);
88 + clk_disable_unprepare(ssusb->mcu_clk);
89 + clk_disable_unprepare(ssusb->ref_clk);
90 + clk_disable_unprepare(ssusb->sys_clk);
91 +}
92 +
93 +static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
94 +{
95 + int ret = 0;
96 +
97 + ret = regulator_enable(ssusb->vusb33);
98 + if (ret) {
99 + dev_err(ssusb->dev, "failed to enable vusb33\n");
100 + goto vusb33_err;
101 + }
102 +
103 + ret = ssusb_clks_enable(ssusb);
104 + if (ret)
105 + goto clks_err;
106 +
107 ret = ssusb_phy_init(ssusb);
108 if (ret) {
109 dev_err(ssusb->dev, "failed to init phy\n");
110 @@ -149,20 +189,16 @@ static int ssusb_rscs_init(struct ssusb_
111 phy_err:
112 ssusb_phy_exit(ssusb);
113 phy_init_err:
114 - clk_disable_unprepare(ssusb->ref_clk);
115 -ref_clk_err:
116 - clk_disable_unprepare(ssusb->sys_clk);
117 -sys_clk_err:
118 + ssusb_clks_disable(ssusb);
119 +clks_err:
120 regulator_disable(ssusb->vusb33);
121 vusb33_err:
122 -
123 return ret;
124 }
125
126 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
127 {
128 - clk_disable_unprepare(ssusb->sys_clk);
129 - clk_disable_unprepare(ssusb->ref_clk);
130 + ssusb_clks_disable(ssusb);
131 regulator_disable(ssusb->vusb33);
132 ssusb_phy_power_off(ssusb);
133 ssusb_phy_exit(ssusb);
134 @@ -203,6 +239,19 @@ static int get_iddig_pinctrl(struct ssus
135 return 0;
136 }
137
138 +/* ignore the error if the clock does not exist */
139 +static struct clk *get_optional_clk(struct device *dev, const char *id)
140 +{
141 + struct clk *opt_clk;
142 +
143 + opt_clk = devm_clk_get(dev, id);
144 + /* ignore error number except EPROBE_DEFER */
145 + if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
146 + opt_clk = NULL;
147 +
148 + return opt_clk;
149 +}
150 +
151 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
152 {
153 struct device_node *node = pdev->dev.of_node;
154 @@ -225,18 +274,17 @@ static int get_ssusb_rscs(struct platfor
155 return PTR_ERR(ssusb->sys_clk);
156 }
157
158 - /*
159 - * reference clock is usually a "fixed-clock", make it optional
160 - * for backward compatibility and ignore the error if it does
161 - * not exist.
162 - */
163 - ssusb->ref_clk = devm_clk_get(dev, "ref_ck");
164 - if (IS_ERR(ssusb->ref_clk)) {
165 - if (PTR_ERR(ssusb->ref_clk) == -EPROBE_DEFER)
166 - return -EPROBE_DEFER;
167 -
168 - ssusb->ref_clk = NULL;
169 - }
170 + ssusb->ref_clk = get_optional_clk(dev, "ref_ck");
171 + if (IS_ERR(ssusb->ref_clk))
172 + return PTR_ERR(ssusb->ref_clk);
173 +
174 + ssusb->mcu_clk = get_optional_clk(dev, "mcu_ck");
175 + if (IS_ERR(ssusb->mcu_clk))
176 + return PTR_ERR(ssusb->mcu_clk);
177 +
178 + ssusb->dma_clk = get_optional_clk(dev, "dma_ck");
179 + if (IS_ERR(ssusb->dma_clk))
180 + return PTR_ERR(ssusb->dma_clk);
181
182 ssusb->num_phys = of_count_phandle_with_args(node,
183 "phys", "#phy-cells");
184 @@ -451,8 +499,7 @@ static int __maybe_unused mtu3_suspend(s
185
186 ssusb_host_disable(ssusb, true);
187 ssusb_phy_power_off(ssusb);
188 - clk_disable_unprepare(ssusb->sys_clk);
189 - clk_disable_unprepare(ssusb->ref_clk);
190 + ssusb_clks_disable(ssusb);
191 ssusb_wakeup_enable(ssusb);
192
193 return 0;
194 @@ -470,27 +517,21 @@ static int __maybe_unused mtu3_resume(st
195 return 0;
196
197 ssusb_wakeup_disable(ssusb);
198 - ret = clk_prepare_enable(ssusb->sys_clk);
199 - if (ret)
200 - goto err_sys_clk;
201 -
202 - ret = clk_prepare_enable(ssusb->ref_clk);
203 + ret = ssusb_clks_enable(ssusb);
204 if (ret)
205 - goto err_ref_clk;
206 + goto clks_err;
207
208 ret = ssusb_phy_power_on(ssusb);
209 if (ret)
210 - goto err_power_on;
211 + goto phy_err;
212
213 ssusb_host_enable(ssusb);
214
215 return 0;
216
217 -err_power_on:
218 - clk_disable_unprepare(ssusb->ref_clk);
219 -err_ref_clk:
220 - clk_disable_unprepare(ssusb->sys_clk);
221 -err_sys_clk:
222 +phy_err:
223 + ssusb_clks_disable(ssusb);
224 +clks_err:
225 return ret;
226 }
227