target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/pinctrl/mt65xx.h>
   7
   8 #include "mt7986a.dtsi"
   9
  10 / {
  11         model = "GL.iNet GL-MT6000";
  12         compatible = "glinet,gl-mt6000", "mediatek,mt7986a";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 led-boot = &led_blue;
  17                 led-failsafe = &led_blue;
  18                 led-running = &led_white;
  19                 led-upgrade = &led_white;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24                 bootargs-append = " root=PARTLABEL=rootfs rootwait";
  25         };
  26
  27         reg_1p8v: regulator-1p8v {
  28                 compatible = "regulator-fixed";
  29                 regulator-name = "1.8vd";
  30                 regulator-min-microvolt = <1800000>;
  31                 regulator-max-microvolt = <1800000>;
  32                 regulator-boot-on;
  33                 regulator-always-on;
  34         };
  35
  36         reg_3p3v: regulator-3p3v {
  37                 compatible = "regulator-fixed";
  38                 regulator-name = "fixed-3.3V";
  39                 regulator-min-microvolt = <3300000>;
  40                 regulator-max-microvolt = <3300000>;
  41                 regulator-boot-on;
  42                 regulator-always-on;
  43         };
  44
  45         keys {
  46                 compatible = "gpio-keys";
  47
  48                 reset {
  49                         label = "reset";
  50                         linux,code = <KEY_RESTART>;
  51                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  52                 };
  53         };
  54
  55         leds {
  56                 compatible = "gpio-leds";
  57
  58                 led_blue: led@0 {
  59                         label = "blue:run";
  60                         gpios = <&pio 38 GPIO_ACTIVE_LOW>;
  61                 };
  62
  63                 led_white: led@1 {
  64                         label = "white:system";
  65                         gpios = <&pio 37 GPIO_ACTIVE_LOW>;
  66                 };
  67         };
  68
  69         usb_vbus: regulator-usb-vbus {
  70                 compatible = "regulator-fixed";
  71                 regulator-name = "usb_vbus";
  72                 regulator-min-microvolt = <5000000>;
  73                 regulator-max-microvolt = <5000000>;
  74                 gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
  75                 enable-active-high;
  76                 regulator-boot-on;
  77         };
  78 };
  79
  80 &eth {
  81         status = "okay";
  82
  83         gmac0: mac@0 {
  84                 compatible = "mediatek,eth-mac";
  85                 reg = <0>;
  86                 phy-mode = "2500base-x";
  87
  88                 fixed-link {
  89                         speed = <2500>;
  90                         full-duplex;
  91                         pause;
  92                 };
  93         };
  94
  95         gmac1: mac@1 {
  96                 compatible = "mediatek,eth-mac";
  97                 reg = <1>;
  98                 phy-mode = "2500base-x";
  99                 phy-handle = <&phy1>;
 100         };
 101
 102         mdio: mdio-bus {
 103                 #address-cells = <1>;
 104                 #size-cells = <0>;
 105
 106                 phy1: phy@1 {
 107                         compatible = "ethernet-phy-ieee802.3-c45";
 108                         reg = <1>;
 109                         reset-assert-us = <100000>;
 110                         reset-deassert-us = <100000>;
 111                         reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 112                         interrupt-parent = <&pio>;
 113                         interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
 114                         realtek,aldps-enable;
 115                 };
 116
 117                 phy7: ethernet-phy@7 {
 118                         compatible = "ethernet-phy-ieee802.3-c45";
 119                         reg = <7>;
 120                         reset-assert-us = <100000>;
 121                         reset-deassert-us = <100000>;
 122                         reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>;
 123                         interrupt-parent = <&pio>;
 124                         interrupts = <47 IRQ_TYPE_LEVEL_LOW>;
 125                         realtek,aldps-enable;
 126                 };
 127
 128                 switch: switch@1f {
 129                         compatible = "mediatek,mt7531";
 130                         reg = <31>;
 131                         reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
 132                         interrupt-controller;
 133                         #interrupt-cells = <1>;
 134                         interrupt-parent = <&pio>;
 135                         interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
 136
 137                         ports {
 138                                 #address-cells = <1>;
 139                                 #size-cells = <0>;
 140
 141                                 port@0 {
 142                                         reg = <0>;
 143                                         label = "lan2";
 144                                 };
 145
 146                                 port@1 {
 147                                         reg = <1>;
 148                                         label = "lan3";
 149                                 };
 150
 151                                 port@2 {
 152                                         reg = <2>;
 153                                         label = "lan4";
 154                                 };
 155
 156                                 port@3 {
 157                                         reg = <3>;
 158                                         label = "lan5";
 159                                 };
 160
 161                                 port@5 {
 162                                         reg = <5>;
 163                                         label = "lan1";
 164                                         phy-handle = <&phy7>;
 165                                         phy-mode = "2500base-x";
 166                                 };
 167
 168                                 port@6 {
 169                                         reg = <6>;
 170                                         ethernet = <&gmac0>;
 171                                         phy-mode = "2500base-x";
 172
 173                                         fixed-link {
 174                                                 speed = <2500>;
 175                                                 full-duplex;
 176                                                 pause;
 177                                         };
 178                                 };
 179                         };
 180                 };
 181         };
 182 };
 183
 184 &pio {
 185         wf_2g_5g_pins: wf_2g_5g-pins {
 186                 mux {
 187                         function = "wifi";
 188                         groups = "wf_2g", "wf_5g";
 189                 };
 190                 conf {
 191                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 192                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 193                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 194                                "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 195                                "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 196                                "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 197                                "WF1_TOP_CLK", "WF1_TOP_DATA";
 198                         drive-strength = <4>;
 199                 };
 200         };
 201
 202         mmc0_pins_default: mmc0-pins {
 203                 mux {
 204                         function = "emmc";
 205                         groups = "emmc_51";
 206                 };
 207                 conf-cmd-dat {
 208                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 209                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 210                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 211                         input-enable;
 212                         drive-strength = <4>;
 213                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 214                 };
 215                 conf-clk {
 216                         pins = "EMMC_CK";
 217                         drive-strength = <6>;
 218                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 219                 };
 220                 conf-ds {
 221                         pins = "EMMC_DSL";
 222                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 223                 };
 224                 conf-rst {
 225                         pins = "EMMC_RSTB";
 226                         drive-strength = <4>;
 227                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 228                 };
 229         };
 230
 231         mmc0_pins_uhs: mmc0-uhs-pins {
 232                 mux {
 233                         function = "emmc";
 234                         groups = "emmc_51";
 235                 };
 236                 conf-cmd-dat {
 237                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 238                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 239                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 240                         input-enable;
 241                         drive-strength = <4>;
 242                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 243                 };
 244                 conf-clk {
 245                         pins = "EMMC_CK";
 246                         drive-strength = <6>;
 247                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 248                 };
 249                 conf-ds {
 250                         pins = "EMMC_DSL";
 251                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 252                 };
 253                 conf-rst {
 254                         pins = "EMMC_RSTB";
 255                         drive-strength = <4>;
 256                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 257                 };
 258         };
 259 };
 260
 261 &crypto {
 262         status = "okay";
 263 };
 264
 265 &ssusb {
 266         vusb33-supply = <&reg_3p3v>;
 267         vbus-supply = <&usb_vbus>;
 268         status = "okay";
 269 };
 270
 271 &trng {
 272         status = "okay";
 273 };
 274
 275 &uart0 {
 276         status = "okay";
 277 };
 278
 279 &usb_phy {
 280         status = "okay";
 281 };
 282
 283 &watchdog {
 284         status = "okay";
 285 };
 286
 287 &wifi {
 288         pinctrl-names = "default";
 289         pinctrl-0 = <&wf_2g_5g_pins>;
 290         status = "okay";
 291 };
 292
 293 &mmc0 {
 294         pinctrl-names = "default", "state_uhs";
 295         pinctrl-0 = <&mmc0_pins_default>;
 296         pinctrl-1 = <&mmc0_pins_uhs>;
 297         bus-width = <8>;
 298         max-frequency = <200000000>;
 299         cap-mmc-highspeed;
 300         mmc-hs200-1_8v;
 301         mmc-hs400-1_8v;
 302         hs400-ds-delay = <0x14014>;
 303         vmmc-supply = <&reg_3p3v>;
 304         vqmmc-supply = <&reg_1p8v>;
 305         non-removable;
 306         no-sd;
 307         no-sdio;
 308         status = "okay";
 309 };