target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/leds/common.h>
   7
   8 #include "mt7986a.dtsi"
   9
  10 / {
  11         compatible = "acelink,ew-7886cax", "mediatek,mt7986a";
  12         model = "Acelink EW-7886CAX";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 led-boot = &led_status_blue;
  17                 led-running = &led_status_green;
  18                 led-upgrade = &led_status_red;
  19                 led-failsafe = &led_status_red;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24         };
  25
  26         memory@40000000 {
  27                 reg = <0 0x40000000 0 0x20000000>;
  28                 device_type = "memory";
  29         };
  30
  31         keys {
  32                 compatible = "gpio-keys";
  33
  34                 key-restart {
  35                         label = "Reset";
  36                         gpios = <&pio 7 GPIO_ACTIVE_LOW>;
  37                         linux,code = <KEY_RESTART>;
  38                 };
  39         };
  40
  41         leds {
  42                 compatible = "gpio-leds";
  43
  44                 led_status_red: led-0 {
  45                         function = LED_FUNCTION_STATUS;
  46                         color = <LED_COLOR_ID_RED>;
  47                         gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
  48                 };
  49
  50                 led_status_green: led-1 {
  51                         function = LED_FUNCTION_STATUS;
  52                         color = <LED_COLOR_ID_GREEN>;
  53                         gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
  54                 };
  55
  56                 led_status_blue: led-2 {
  57                         function = LED_FUNCTION_STATUS;
  58                         color = <LED_COLOR_ID_BLUE>;
  59                         gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
  60                 };
  61         };
  62 };
  63
  64 &crypto {
  65         status = "okay";
  66 };
  67
  68 &eth {
  69         status = "okay";
  70
  71         mac@1 {
  72                 compatible = "mediatek,eth-mac";
  73                 reg = <1>;
  74                 phy-mode = "2500base-x";
  75                 phy-handle = <&phy6>;
  76                 nvmem-cells = <&macaddr>;
  77                 nvmem-cell-names = "mac-address";
  78         };
  79
  80         mdio-bus {
  81                 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  82                 reset-delay-us = <50000>;
  83                 reset-post-delay-us = <20000>;
  84                 #address-cells = <1>;
  85                 #size-cells = <0>;
  86
  87                 /* Maxlinear GPY211C */
  88                 phy6: phy@6 {
  89                         compatible = "ethernet-phy-ieee802.3-c45";
  90                         reg = <6>;
  91                 };
  92         };
  93 };
  94
  95 &pcie_phy {
  96         status = "okay";
  97 };
  98
  99 &pio {
 100         spi_flash_pins: spi-flash-pins-33-to-38 {
 101                 mux {
 102                         function = "spi";
 103                         groups = "spi0", "spi0_wp_hold";
 104                 };
 105                 conf-pu {
 106                         pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
 107                         drive-strength = <8>;
 108                         mediatek,pull-up-adv = <0>; /* bias-disable */
 109                 };
 110                 conf-pd {
 111                         pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
 112                         drive-strength = <8>;
 113                         mediatek,pull-down-adv = <0>; /* bias-disable */
 114                 };
 115         };
 116
 117         wf_2g_5g_pins: wf_2g_5g-pins {
 118                 mux {
 119                         function = "wifi";
 120                         groups = "wf_2g", "wf_5g";
 121                 };
 122                 conf {
 123                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 124                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 125                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 126                                "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 127                                "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 128                                "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 129                                "WF1_TOP_CLK", "WF1_TOP_DATA";
 130                         drive-strength = <4>;
 131                 };
 132         };
 133
 134         wf_dbdc_pins: wf-dbdc-pins {
 135                 mux {
 136                         function = "wifi";
 137                         groups = "wf_dbdc";
 138                 };
 139                 conf {
 140                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 141                                 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 142                                 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 143                                 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 144                                 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 145                                 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 146                                 "WF1_TOP_CLK", "WF1_TOP_DATA";
 147                         drive-strength = <4>;
 148                 };
 149         };
 150 };
 151
 152 &spi0 {
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&spi_flash_pins>;
 155         status = "okay";
 156
 157         flash@0 {
 158                 compatible = "spi-nand";
 159                 reg = <0>;
 160                 #address-cells = <1>;
 161                 #size-cells = <1>;
 162                 spi-max-frequency = <52000000>;
 163                 spi-rx-bus-width = <4>;
 164                 spi-tx-bus-width = <4>;
 165                 mediatek,nmbm;
 166                 mediatek,bmt-max-ratio = <1>;
 167                 mediatek,bmt-max-reserved-blocks = <64>;
 168
 169                 partitions {
 170                         compatible = "fixed-partitions";
 171                         #address-cells = <1>;
 172                         #size-cells = <1>;
 173
 174                         partition@0 {
 175                                 reg = <0x0 0x100000>;
 176                                 label = "bootloader";
 177                                 read-only;
 178                         };
 179
 180                         partition@100000 {
 181                                 reg = <0x100000 0x80000>;
 182                                 label = "u-boot-env";
 183                         };
 184
 185                         partition@180000 {
 186                                 compatible = "nvmem-cells";
 187                                 reg = <0x180000 0x200000>;
 188                                 label = "factory";
 189                                 read-only;
 190
 191                                 nvmem-layout {
 192                                         compatible = "fixed-layout";
 193                                         #address-cells = <1>;
 194                                         #size-cells = <1>;
 195
 196                                         eeprom: eeprom@0 {
 197                                                 reg = <0x0 0x1000>;
 198                                         };
 199
 200                                         macaddr: macaddr@4 {
 201                                                 reg = <0x4 0x6>;
 202                                         };
 203                                 };
 204                         };
 205
 206                         partition@380000 {
 207                                 reg = <0x380000 0x200000>;
 208                                 label = "fip";
 209                         };
 210
 211                         partition@580000 {
 212                                 reg = <0x580000 0x4000000>;
 213                                 label = "ubi";
 214                         };
 215                 };
 216         };
 217 };
 218
 219 &trng {
 220         status = "okay";
 221 };
 222
 223 &uart0 {
 224         status = "okay";
 225 };
 226
 227 &watchdog {
 228         status = "okay";
 229 };
 230
 231 &wifi {
 232         pinctrl-names = "default", "dbdc";
 233         pinctrl-0 = <&wf_2g_5g_pins>;
 234         pinctrl-1 = <&wf_dbdc_pins>;
 235         nvmem-cells = <&eeprom>;
 236         nvmem-cell-names = "eeprom";
 237         status = "okay";
 238 };