target/linux/layerscape/patches-5.4/701-net-0387-net-phy-vsc8514-enable-in-band-SGMII-auto-negotiatio.patch

   1 From ebfedac745f6d747df2214e11a89ba44742b3def Mon Sep 17 00:00:00 2001
   2 From: Alex Marginean <alexandru.marginean@nxp.com>
   3 Date: Fri, 27 Dec 2019 21:44:46 +0200
   4 Subject: [PATCH] net: phy: vsc8514: enable in-band SGMII auto-negotiation
   5  setting
   6
   7 The default in-band AN setting for the VSC8514 PHY is not very reliable:
   8 its out-of-reset state is with SerDes AN disabled, but certain boot
   9 firmware (such as U-Boot) enables it during the boot process.
  10
  11 So its final state as seen by Linux depends on whether the U-Boot PHY
  12 driver has run or not.
  13
  14 If SGMII auto-negotiation is enabled but not acknowledged by the MAC,
  15 the PHY does not pass traffic.
  16
  17 But otherwise, it is able to pass traffic both with AN disabled, and
  18 with AN enabled.
  19
  20 We would like to make this explicitly configurable rather than hardcoded
  21 as "on" as we are doing right now, but we'd rather hardcode it in LSDK
  22 and wait until a solution lands upstream, than invent a solution for
  23 this here.
  24
  25 Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  26 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
  27 ---
  28  drivers/net/phy/mscc.c | 10 ++++++++++
  29  1 file changed, 10 insertions(+)
  30
  31 --- a/drivers/net/phy/mscc.c
  32 +++ b/drivers/net/phy/mscc.c
  33 @@ -176,6 +176,8 @@ enum rgmii_rx_clock_delay {
  34  #define SECURE_ON_PASSWD_LEN_4           0x4000
  35
  36  /* Extended Page 3 Registers */
  37 +#define MSCC_PHY_SERDES_CON              16
  38 +#define MSCC_PHY_SERDES_ANEG             BIT(7)
  39  #define MSCC_PHY_SERDES_TX_VALID_CNT     21
  40  #define MSCC_PHY_SERDES_TX_CRC_ERR_CNT   22
  41  #define MSCC_PHY_SERDES_RX_VALID_CNT     28
  42 @@ -2131,6 +2133,14 @@ static int vsc8514_config_init(struct ph
  43
  44         mutex_unlock(&phydev->mdio.bus->mdio_lock);
  45
  46 +       ret = phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_EXTENDED_3);
  47 +       if (ret)
  48 +               return ret;
  49 +
  50 +       ret = phy_set_bits(phydev, MSCC_PHY_SERDES_CON, MSCC_PHY_SERDES_ANEG);
  51 +       if (ret)
  52 +               return ret;
  53 +
  54         ret = phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD);
  55
  56         if (ret)