target/linux/ipq807x/patches-6.1/0112-remoteproc-qcom-Add-PRNG-proxy-clock.patch

   1 From 125681433c8e526356947acf572fe8ca8ad32291 Mon Sep 17 00:00:00 2001
   2 From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
   3 Date: Sat, 30 Jan 2021 10:50:05 +0530
   4 Subject: [PATCH] remoteproc: qcom: Add PRNG proxy clock
   5
   6 PRNG clock is needed by the secure PIL, support for the same
   7 is added in subsequent patches.
   8
   9 Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
  10 Signed-off-by: Sricharan R <sricharan@codeaurora.org>
  11 Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
  12 ---
  13  drivers/remoteproc/qcom_q6v5_wcss.c | 65 +++++++++++++++++++++--------
  14  1 file changed, 47 insertions(+), 18 deletions(-)
  15
  16 --- a/drivers/remoteproc/qcom_q6v5_wcss.c
  17 +++ b/drivers/remoteproc/qcom_q6v5_wcss.c
  18 @@ -91,19 +91,6 @@ enum {
  19         WCSS_QCS404,
  20  };
  21
  22 -struct wcss_data {
  23 -       const char *firmware_name;
  24 -       unsigned int crash_reason_smem;
  25 -       u32 version;
  26 -       bool aon_reset_required;
  27 -       bool wcss_q6_reset_required;
  28 -       const char *ssr_name;
  29 -       const char *sysmon_name;
  30 -       int ssctl_id;
  31 -       const struct rproc_ops *ops;
  32 -       bool requires_force_stop;
  33 -};
  34 -
  35  struct q6v5_wcss {
  36         struct device *dev;
  37
  38 @@ -128,6 +115,7 @@ struct q6v5_wcss {
  39         struct clk *qdsp6ss_xo_cbcr;
  40         struct clk *qdsp6ss_core_gfmux;
  41         struct clk *lcc_bcr_sleep;
  42 +       struct clk *prng_clk;
  43         struct regulator *cx_supply;
  44         struct qcom_sysmon *sysmon;
  45
  46 @@ -151,6 +139,21 @@ struct q6v5_wcss {
  47         struct qcom_rproc_ssr ssr_subdev;
  48  };
  49
  50 +struct wcss_data {
  51 +       int (*init_clock)(struct q6v5_wcss *wcss);
  52 +       int (*init_regulator)(struct q6v5_wcss *wcss);
  53 +       const char *firmware_name;
  54 +       unsigned int crash_reason_smem;
  55 +       u32 version;
  56 +       bool aon_reset_required;
  57 +       bool wcss_q6_reset_required;
  58 +       const char *ssr_name;
  59 +       const char *sysmon_name;
  60 +       int ssctl_id;
  61 +       const struct rproc_ops *ops;
  62 +       bool requires_force_stop;
  63 +};
  64 +
  65  static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
  66  {
  67         int ret;
  68 @@ -240,6 +243,12 @@ static int q6v5_wcss_start(struct rproc
  69         struct q6v5_wcss *wcss = rproc->priv;
  70         int ret;
  71
  72 +       ret = clk_prepare_enable(wcss->prng_clk);
  73 +       if (ret) {
  74 +               dev_err(wcss->dev, "prng clock enable failed\n");
  75 +               return ret;
  76 +       }
  77 +
  78         qcom_q6v5_prepare(&wcss->q6v5);
  79
  80         /* Release Q6 and WCSS reset */
  81 @@ -733,6 +742,7 @@ static int q6v5_wcss_stop(struct rproc *
  82                         return ret;
  83         }
  84
  85 +       clk_disable_unprepare(wcss->prng_clk);
  86         qcom_q6v5_unprepare(&wcss->q6v5);
  87
  88         return 0;
  89 @@ -900,7 +910,21 @@ static int q6v5_alloc_memory_region(stru
  90         return 0;
  91  }
  92
  93 -static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss)
  94 +static int ipq8074_init_clock(struct q6v5_wcss *wcss)
  95 +{
  96 +       int ret;
  97 +
  98 +       wcss->prng_clk = devm_clk_get(wcss->dev, "prng");
  99 +       if (IS_ERR(wcss->prng_clk)) {
 100 +               ret = PTR_ERR(wcss->prng_clk);
 101 +               if (ret != -EPROBE_DEFER)
 102 +                       dev_err(wcss->dev, "Failed to get prng clock\n");
 103 +               return ret;
 104 +       }
 105 +       return 0;
 106 +}
 107 +
 108 +static int qcs404_init_clock(struct q6v5_wcss *wcss)
 109  {
 110         int ret;
 111
 112 @@ -990,7 +1014,7 @@ static int q6v5_wcss_init_clock(struct q
 113         return 0;
 114  }
 115
 116 -static int q6v5_wcss_init_regulator(struct q6v5_wcss *wcss)
 117 +static int qcs404_init_regulator(struct q6v5_wcss *wcss)
 118  {
 119         wcss->cx_supply = devm_regulator_get(wcss->dev, "cx");
 120         if (IS_ERR(wcss->cx_supply))
 121 @@ -1034,12 +1058,14 @@ static int q6v5_wcss_probe(struct platfo
 122         if (ret)
 123                 goto free_rproc;
 124
 125 -       if (wcss->version == WCSS_QCS404) {
 126 -               ret = q6v5_wcss_init_clock(wcss);
 127 +       if (desc->init_clock) {
 128 +               ret = desc->init_clock(wcss);
 129                 if (ret)
 130                         goto free_rproc;
 131 +       }
 132
 133 -               ret = q6v5_wcss_init_regulator(wcss);
 134 +       if (desc->init_regulator) {
 135 +               ret = desc->init_regulator(wcss);
 136                 if (ret)
 137                         goto free_rproc;
 138         }
 139 @@ -1087,6 +1113,7 @@ static int q6v5_wcss_remove(struct platf
 140  }
 141
 142  static const struct wcss_data wcss_ipq8074_res_init = {
 143 +       .init_clock = ipq8074_init_clock,
 144         .firmware_name = "IPQ8074/q6_fw.mdt",
 145         .crash_reason_smem = WCSS_CRASH_REASON,
 146         .aon_reset_required = true,
 147 @@ -1096,6 +1123,8 @@ static const struct wcss_data wcss_ipq80
 148  };
 149
 150  static const struct wcss_data wcss_qcs404_res_init = {
 151 +       .init_clock = qcs404_init_clock,
 152 +       .init_regulator = qcs404_init_regulator,
 153         .crash_reason_smem = WCSS_CRASH_REASON,
 154         .firmware_name = "wcnss.mdt",
 155         .version = WCSS_QCS404,